[llvm] [AMDGPU][CodeGen] Incrementally update reserved regs for SIPreAllocateWWMRegs pass in RegisterClassInfo (PR #212201)

[Jay Foad via llvm-commits]

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@@ -98,6 +98,16 @@ class RegisterClassInfo {
   LLVM_ABI void runOnMachineFunction(const MachineFunction &MF,
                                      bool Rev = false);
 
+  /// allows modification of current reserved register vector
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jayfoad wrote:

Format comments according to the coding standards. They should be full sentences with capital letter and full stop. Avoid needless abbreviations like "prereqs" and "alloc" in the text. Also I don't understand "without invalidating RCI and triggering recomputation when possible".

How about adding a restriction that you can only use this method to _add_ registers to the reserved set, not to remove any?

https://github.com/llvm/llvm-project/pull/212201