[llvm] b8d37cb - [AArch64] Add an OPERAND_IMM_UINT8 operand type. (#209050)

[via llvm-commits]

Author: David Green
Date: 2026-07-12T20:57:32+01:00
New Revision: b8d37cbc139a5adcd56611c21850e02600e560f2

URL: https://github.com/llvm/llvm-project/commit/b8d37cbc139a5adcd56611c21850e02600e560f2
DIFF: https://github.com/llvm/llvm-project/commit/b8d37cbc139a5adcd56611c21850e02600e560f2.diff

LOG: [AArch64] Add an OPERAND_IMM_UINT8 operand type. (#209050)

This helps verify that certain operands are in the correct range, in
this case
0-255.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64InstrFormats.td
    llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
    llvm/test/CodeGen/AArch64/verify-imm.mir
    llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index cc599a5c9dc6f..30d7c291ca4d4 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1531,6 +1531,8 @@ def fpimm16 : Operand<f16>,
     }], fpimm16XForm> {
   let ParserMatchClass = FPImmOperand;
   let PrintMethod = "printFPImmOperand";
+  let OperandType = "OPERAND_IMM_UINT8";
+  let OperandNamespace = "AArch64";
 }
 
 def fpimmbf16 : Operand<bf16>,
@@ -1544,6 +1546,8 @@ def fpimm32 : Operand<f32>,
     }], fpimm32XForm> {
   let ParserMatchClass = FPImmOperand;
   let PrintMethod = "printFPImmOperand";
+  let OperandType = "OPERAND_IMM_UINT8";
+  let OperandNamespace = "AArch64";
 }
 
 def fpimm32SIMDModImmType4 : FPImmLeaf<f32, [{
@@ -1558,12 +1562,15 @@ def fpimm64 : Operand<f64>,
     }], fpimm64XForm> {
   let ParserMatchClass = FPImmOperand;
   let PrintMethod = "printFPImmOperand";
+  let OperandType = "OPERAND_IMM_UINT8";
+  let OperandNamespace = "AArch64";
 }
 
 def fpimm8 : Operand<i32> {
   let ParserMatchClass = FPImmOperand;
   let PrintMethod = "printFPImmOperand";
-  let OperandType = "OPERAND_IMMEDIATE";
+  let OperandType = "OPERAND_IMM_UINT8";
+  let OperandNamespace = "AArch64";
 }
 
 def fpimm0 : FPImmLeaf<fAny, [{

diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index e8c8fa0a2f643..0a07af216b852 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -12141,6 +12141,12 @@ bool AArch64InstrInfo::verifyInstruction(const MachineInstr &MI,
         return false;
       }
       break;
+    case AArch64::OPERAND_IMM_UINT8:
+      if (!MO.isImm() || !isUInt<8>(MO.getImm())) {
+        ErrInfo = "OPERAND_IMM_UINT8 should be in the range 0 to 255";
+        return false;
+      }
+      break;
     default:
       break;
     }

diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
index f6d9855e78612..4e5544e9ba64f 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
@@ -73,6 +73,7 @@ enum OperandType {
   OPERAND_SHIFT_MSL,
   OPERAND_SHIFTED_REGISTER,
   OPERAND_SHIFTED_IMMEDIATE,
+  OPERAND_IMM_UINT8,
 };
 } // namespace AArch64
 

diff  --git a/llvm/test/CodeGen/AArch64/verify-imm.mir b/llvm/test/CodeGen/AArch64/verify-imm.mir
index ab7c4fb950d50..5306155ceb3b0 100644
--- a/llvm/test/CodeGen/AArch64/verify-imm.mir
+++ b/llvm/test/CodeGen/AArch64/verify-imm.mir
@@ -6,6 +6,14 @@
 # CHECK: - instruction: $q0 = MOVIv4s_msl 55, 8
 # CHECK: *** Bad machine code: OPERAND_IMPLICIT_IMM_0 should be 0 ***
 # CHECK: - instruction: $zad0 = MOVA_MXI2Z_V_D $zad0(tied-def 0), $w12, 1, $z0_z1
+# CHECK: *** Bad machine code: OPERAND_IMM_UINT8 should be in the range 0 to 255 ***
+# CHECK: - instruction: $h0 = FMOVHi 256
+# CHECK: *** Bad machine code: OPERAND_IMM_UINT8 should be in the range 0 to 255 ***
+# CHECK: - instruction: $s0 = FMOVSi -1
+# CHECK: *** Bad machine code: OPERAND_IMM_UINT8 should be in the range 0 to 255 ***
+# CHECK: - instruction: $d0 = FMOVDi 256
+# CHECK: *** Bad machine code: OPERAND_IMM_UINT8 should be in the range 0 to 255 ***
+# CHECK: - instruction: $q0 = FMOVv2f64_ns 256
 
 ---
 name:            verifyImm
@@ -18,5 +26,9 @@ body:             |
     $d0 = MOVIv2s_msl 55, 262
     $q0 = MOVIv4s_msl 55, 8
     $zad0 = MOVA_MXI2Z_V_D $zad0, $w12, 1, $z0_z1
+    $h0 = FMOVHi 256
+    $s0 = FMOVSi -1
+    $d0 = FMOVDi 256
+    $q0 = FMOVv2f64_ns 256
     RET undef $lr, implicit $x0
 ...

diff  --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index 3b2487d1fe2f8..a6a92e5674f41 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -351,6 +351,9 @@ Error ExegesisAArch64Target::randomizeTargetMCOperand(
   case llvm::AArch64::OPERAND_SHIFTED_IMMEDIATE:
     AssignedValue = MCOperand::createImm(0);
     return Error::success();
+  case llvm::AArch64::OPERAND_IMM_UINT8:
+    AssignedValue = MCOperand::createImm(1);
+    return Error::success();
   case MCOI::OperandType::OPERAND_PCREL:
     AssignedValue = MCOperand::createImm(8);
     return Error::success();