[llvm] [SLP][NFC]Add a test with incorrect add/sub operands reorder, NFC (PR #209039)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 12 11:11:38 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Alexey Bataev (alexey-bataev)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/209039.diff
1 Files Affected:
- (added) llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll (+199)
``````````diff
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll b/llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
new file mode 100644
index 0000000000000..52a128b175ab9
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
@@ -0,0 +1,199 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-50 < %s | FileCheck %s --check-prefix=THRESH
+
+define i32 @fadd_fsub_constant_lhs_mix(float %s) {
+; CHECK-LABEL: define i32 @fadd_fsub_constant_lhs_mix(
+; CHECK-SAME: float [[S:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[S]], i64 0
+; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP2:%.*]] = fmul <4 x float> [[TMP1]], <float 2.000000e+00, float 1.000000e+00, float 1.125000e+00, float 1.000000e+00>
+; CHECK-NEXT: [[TMP3:%.*]] = fsub <4 x float> <float -0.000000e+00, float 2.000000e+00, float 0.000000e+00, float -1.000000e+00>, [[TMP2]]
+; CHECK-NEXT: [[TMP4:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP3]])
+; CHECK-NEXT: [[TMP5:%.*]] = fcmp ueq <4 x float> [[TMP4]], splat (float +inf)
+; CHECK-NEXT: [[CA:%.*]] = extractelement <4 x i1> [[TMP5]], i64 3
+; CHECK-NEXT: br i1 [[CA]], label %[[ABORT:.*]], label %[[SPLIT:.*]]
+; CHECK: [[SPLIT]]:
+; CHECK-NEXT: [[CB:%.*]] = extractelement <4 x i1> [[TMP5]], i64 2
+; CHECK-NEXT: br i1 [[CB]], label %[[ABORT]], label %[[SPLIT2:.*]]
+; CHECK: [[SPLIT2]]:
+; CHECK-NEXT: [[CD:%.*]] = extractelement <4 x i1> [[TMP5]], i64 1
+; CHECK-NEXT: br i1 [[CD]], label %[[ABORT]], label %[[SPLIT3:.*]]
+; CHECK: [[SPLIT3]]:
+; CHECK-NEXT: [[CE:%.*]] = extractelement <4 x i1> [[TMP5]], i64 0
+; CHECK-NEXT: br i1 [[CE]], label %[[ABORT]], label %[[CONT:.*]]
+; CHECK: [[ABORT]]:
+; CHECK-NEXT: tail call void @abort()
+; CHECK-NEXT: unreachable
+; CHECK: [[CONT]]:
+; CHECK-NEXT: [[E:%.*]] = extractelement <4 x float> [[TMP3]], i64 0
+; CHECK-NEXT: [[EI:%.*]] = fptosi float [[E]] to i32
+; CHECK-NEXT: [[B:%.*]] = extractelement <4 x float> [[TMP3]], i64 2
+; CHECK-NEXT: [[BI:%.*]] = fptosi float [[B]] to i32
+; CHECK-NEXT: [[SUM:%.*]] = add i32 [[EI]], [[BI]]
+; CHECK-NEXT: ret i32 [[SUM]]
+;
+; THRESH-LABEL: define i32 @fadd_fsub_constant_lhs_mix(
+; THRESH-SAME: float [[S:%.*]]) {
+; THRESH-NEXT: [[ENTRY:.*:]]
+; THRESH-NEXT: [[TMP0:%.*]] = insertelement <2 x float> <float 2.000000e+00, float poison>, float [[S]], i64 1
+; THRESH-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[TMP0]], <2 x float> <float poison, float -1.000000e+00>, <2 x i32> <i32 1, i32 3>
+; THRESH-NEXT: [[TMP2:%.*]] = fsub <2 x float> [[TMP0]], [[TMP1]]
+; THRESH-NEXT: [[TMP3:%.*]] = insertelement <2 x float> <float 1.000000e+00, float poison>, float [[S]], i64 1
+; THRESH-NEXT: [[TMP4:%.*]] = fmul <2 x float> <float -0.000000e+00, float 1.125000e+00>, [[TMP3]]
+; THRESH-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP3]], <2 x float> <float poison, float 1.000000e+00>, <2 x i32> <i32 1, i32 3>
+; THRESH-NEXT: [[TMP6:%.*]] = fmul <2 x float> [[TMP5]], <float 2.000000e+00, float 0.000000e+00>
+; THRESH-NEXT: [[TMP7:%.*]] = fsub <2 x float> [[TMP6]], [[TMP4]]
+; THRESH-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> [[TMP7]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; THRESH-NEXT: [[TMP9:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; THRESH-NEXT: [[TMP10:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> [[TMP9]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; THRESH-NEXT: [[TMP11:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP10]])
+; THRESH-NEXT: [[TMP12:%.*]] = fcmp ueq <4 x float> [[TMP11]], splat (float +inf)
+; THRESH-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP12]], i64 3
+; THRESH-NEXT: br i1 [[TMP13]], label %[[ABORT:.*]], label %[[SPLIT:.*]]
+; THRESH: [[SPLIT]]:
+; THRESH-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP12]], i64 1
+; THRESH-NEXT: br i1 [[TMP14]], label %[[ABORT]], label %[[SPLIT2:.*]]
+; THRESH: [[SPLIT2]]:
+; THRESH-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP12]], i64 2
+; THRESH-NEXT: br i1 [[TMP15]], label %[[ABORT]], label %[[SPLIT3:.*]]
+; THRESH: [[SPLIT3]]:
+; THRESH-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP12]], i64 0
+; THRESH-NEXT: br i1 [[TMP16]], label %[[ABORT]], label %[[CONT:.*]]
+; THRESH: [[ABORT]]:
+; THRESH-NEXT: tail call void @abort()
+; THRESH-NEXT: unreachable
+; THRESH: [[CONT]]:
+; THRESH-NEXT: [[TMP17:%.*]] = fptosi <2 x float> [[TMP7]] to <2 x i32>
+; THRESH-NEXT: [[TMP18:%.*]] = extractelement <2 x i32> [[TMP17]], i64 0
+; THRESH-NEXT: [[TMP19:%.*]] = extractelement <2 x i32> [[TMP17]], i64 1
+; THRESH-NEXT: [[SUM:%.*]] = add i32 [[TMP18]], [[TMP19]]
+; THRESH-NEXT: ret i32 [[SUM]]
+;
+entry:
+ %a = fadd float %s, 1.000000e+00
+ %fa = tail call float @llvm.fabs.f32(float %a)
+ %ca = fcmp ueq float %fa, 0x7FF0000000000000
+ %mulb = fmul float %s, 1.125000e+00
+ %b = fsub float 0.000000e+00, %mulb
+ %fb = tail call float @llvm.fabs.f32(float %b)
+ %cb = fcmp ueq float %fb, 0x7FF0000000000000
+ %d = fsub float 2.000000e+00, %s
+ %fd = tail call float @llvm.fabs.f32(float %d)
+ %cd = fcmp ueq float %fd, 0x7FF0000000000000
+ %mule = fmul float %s, 2.000000e+00
+ %e = fadd float %mule, 0.000000e+00
+ %fe = tail call float @llvm.fabs.f32(float %e)
+ %ce = fcmp ueq float %fe, 0x7FF0000000000000
+ br i1 %ca, label %abort, label %split
+
+split:
+ br i1 %cb, label %abort, label %split2
+
+split2:
+ br i1 %cd, label %abort, label %split3
+
+split3:
+ br i1 %ce, label %abort, label %cont
+
+abort:
+ tail call void @abort()
+ unreachable
+
+cont:
+ %ei = fptosi float %e to i32
+ %bi = fptosi float %b to i32
+ %sum = add i32 %ei, %bi
+ ret i32 %sum
+}
+
+define i32 @add_sub_constant_lhs_mix(i32 %s) {
+; CHECK-LABEL: define i32 @add_sub_constant_lhs_mix(
+; CHECK-SAME: i32 [[S:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[A:%.*]] = add i32 [[S]], 1
+; CHECK-NEXT: [[CA:%.*]] = icmp eq i32 [[A]], 0
+; CHECK-NEXT: [[MULB:%.*]] = mul i32 [[S]], 3
+; CHECK-NEXT: [[B:%.*]] = sub i32 5, [[MULB]]
+; CHECK-NEXT: [[CB:%.*]] = icmp eq i32 [[B]], 0
+; CHECK-NEXT: [[D:%.*]] = sub i32 10, [[S]]
+; CHECK-NEXT: [[CD:%.*]] = icmp eq i32 [[D]], 0
+; CHECK-NEXT: [[MULE:%.*]] = mul i32 [[S]], 2
+; CHECK-NEXT: [[E:%.*]] = add i32 [[MULE]], 2
+; CHECK-NEXT: [[CE:%.*]] = icmp eq i32 [[E]], 0
+; CHECK-NEXT: br i1 [[CA]], label %[[ABORT:.*]], label %[[SPLIT:.*]]
+; CHECK: [[SPLIT]]:
+; CHECK-NEXT: br i1 [[CB]], label %[[ABORT]], label %[[SPLIT2:.*]]
+; CHECK: [[SPLIT2]]:
+; CHECK-NEXT: br i1 [[CD]], label %[[ABORT]], label %[[SPLIT3:.*]]
+; CHECK: [[SPLIT3]]:
+; CHECK-NEXT: br i1 [[CE]], label %[[ABORT]], label %[[CONT:.*]]
+; CHECK: [[ABORT]]:
+; CHECK-NEXT: tail call void @abort()
+; CHECK-NEXT: unreachable
+; CHECK: [[CONT]]:
+; CHECK-NEXT: [[SUM:%.*]] = add i32 [[B]], [[E]]
+; CHECK-NEXT: ret i32 [[SUM]]
+;
+; THRESH-LABEL: define i32 @add_sub_constant_lhs_mix(
+; THRESH-SAME: i32 [[S:%.*]]) {
+; THRESH-NEXT: [[ENTRY:.*:]]
+; THRESH-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[S]], i64 0
+; THRESH-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <4 x i32> zeroinitializer
+; THRESH-NEXT: [[TMP2:%.*]] = mul <4 x i32> [[TMP1]], <i32 2, i32 1, i32 1, i32 3>
+; THRESH-NEXT: [[TMP4:%.*]] = sub <4 x i32> <i32 -2, i32 -1, i32 10, i32 5>, [[TMP2]]
+; THRESH-NEXT: [[TMP5:%.*]] = icmp eq <4 x i32> [[TMP4]], zeroinitializer
+; THRESH-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP5]], i64 1
+; THRESH-NEXT: br i1 [[TMP6]], label %[[ABORT:.*]], label %[[SPLIT:.*]]
+; THRESH: [[SPLIT]]:
+; THRESH-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP5]], i64 3
+; THRESH-NEXT: br i1 [[TMP7]], label %[[ABORT]], label %[[SPLIT2:.*]]
+; THRESH: [[SPLIT2]]:
+; THRESH-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP5]], i64 2
+; THRESH-NEXT: br i1 [[TMP8]], label %[[ABORT]], label %[[SPLIT3:.*]]
+; THRESH: [[SPLIT3]]:
+; THRESH-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP5]], i64 0
+; THRESH-NEXT: br i1 [[TMP9]], label %[[ABORT]], label %[[CONT:.*]]
+; THRESH: [[ABORT]]:
+; THRESH-NEXT: tail call void @abort()
+; THRESH-NEXT: unreachable
+; THRESH: [[CONT]]:
+; THRESH-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[TMP4]], i64 0
+; THRESH-NEXT: [[TMP11:%.*]] = extractelement <4 x i32> [[TMP4]], i64 3
+; THRESH-NEXT: [[SUM:%.*]] = add i32 [[TMP11]], [[TMP10]]
+; THRESH-NEXT: ret i32 [[SUM]]
+;
+entry:
+ %a = add i32 %s, 1
+ %ca = icmp eq i32 %a, 0
+ %mulb = mul i32 %s, 3
+ %b = sub i32 5, %mulb
+ %cb = icmp eq i32 %b, 0
+ %d = sub i32 10, %s
+ %cd = icmp eq i32 %d, 0
+ %mule = mul i32 %s, 2
+ %e = add i32 %mule, 2
+ %ce = icmp eq i32 %e, 0
+ br i1 %ca, label %abort, label %split
+
+split:
+ br i1 %cb, label %abort, label %split2
+
+split2:
+ br i1 %cd, label %abort, label %split3
+
+split3:
+ br i1 %ce, label %abort, label %cont
+
+abort:
+ tail call void @abort()
+ unreachable
+
+cont:
+ %sum = add i32 %b, %e
+ ret i32 %sum
+}
+
+declare float @llvm.fabs.f32(float)
+declare void @abort()
``````````
</details>
https://github.com/llvm/llvm-project/pull/209039
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