[llvm] [SLP] Use constant 64-bit indices for Extract/InsertElement (PR #208957)
via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 11 15:01:22 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-systemz
Author: Andreas Jonson (andjo403)
<details>
<summary>Changes</summary>
The canonical form preferred by instCombine is to use 64-bit values for constant index in ExtractElement and InsertElement see
https://github.com/llvm/llvm-project/blob/9d5d8834793da9efe297620db3ef39633688f830/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp#L401-L411
---
Patch is 1.20 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/208957.diff
460 Files Affected:
- (modified) llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp (+3-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll (+9-9)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/div.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll (+31-31)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/extract-subvector-long-input.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/fma-conversion-multi-use-guard.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/fma-reduce-regression.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/fmulladd.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll (+16-16)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll (+32-32)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll (+18-18)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/landing_pad.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll (+11-11)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/matmul.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/phi-node-bitwidt-op-not.ll (+7-7)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-node.ll (+7-7)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll (+21-21)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll (+5-5)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/slp-extval-struct-operand-no-scalar-reuse.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-noreturn-block.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/splat-loads.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/transpose-with-constants.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/unique_values.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/uselistorder.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll (+22-22)
- (modified) llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll (+16-16)
- (modified) llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll (+24-24)
- (modified) llvm/test/Transforms/SLPVectorizer/AMDGPU/packed-math.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/buildvector-all-external-scalars.ll (+14-14)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll (+60-60)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/fmuladd_width_prop.ll (+7-7)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll (+5-5)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll (+20-20)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/reordered-interleaved-loads.ll (+19-19)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/rotated-strided-loads.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/runtime-strided-stores.ll (+82-82)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/shuffled-gather-casted.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/strided-unsupported-type.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/cmp-ptr-minmax.ll (+7-7)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/ext-alt-node-must-ext.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-root-trunc.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-trunc.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/non-power-2-subvector-extract.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fadd.ll (+24-24)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmin-fmax.ll (+56-56)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmul.ll (+24-24)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/SystemZ/vec-elt-insertion.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/WebAssembly/or-reduction-zero-test.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/WebAssembly/simd-splat-shuffle-cost.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/PR35628_1.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/PR35777.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/add-sub-nsw-intmin.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll (+5-5)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll (+5-5)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/alternate-opcode-strict-bitwidth-than-main.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll (+7-7)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/broadcast-load-cost.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll (+7-7)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/broadcast_long.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvector-same-lane-insert.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle-with-root.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvector-store-chains.ll (+28-28)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvector-with-reuses.ll (+5-5)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll (+7-7)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll (+22-22)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/call.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll (+5-5)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/cmp-after-intrinsic-call-minbitwidth.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/cmp-as-alternate-ops.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/commutable-member-in-non-commutable-node.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/commutative-copyable-external-phi-use.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/commutativity.ll (+9-9)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/compare-node-with-reuses.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/complex-fma-combine.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/control-dependence.ll (+20-20)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/conversion-fp16.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-child-node-used-outside.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-non-inst-in-stores.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-operand-non-scheduled-parent-node.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-scheduled-non-copyable.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-used-non-copyable.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-reduced-erased.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-used-outside-with-immediate-op.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-with-non-scheduled-parent-node.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable-with-used-outside-bb.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll (+34-34)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/copyables-with-parent-scalars-in-phis.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/crash_bullet.ll (+19-19)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/crash_clear_undefs.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll (+5-5)
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- (modified) llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll (+17-17)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll (+5-5)
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- (modified) llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/icmp-altopcode-after-reordering.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/in-tree-user.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll (+4-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/insertvalue.ll (+14-14)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/inversed-icmp-to-gather.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/landing-pad-for-split-node.ll (+8-8)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll (+4-4)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll (+12-12)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/loopinvariant.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/many-uses-parent-node.ll (+2-2)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/matched-bv-schedulable.ll (+3-3)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll (+1-1)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll (+6-6)
- (modified) llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll (+6-6)
``````````diff
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 48fb4beba6935..142fd2ad29907 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -22145,7 +22145,7 @@ Value *BoUpSLP::gather(
return Vec;
InsElt = II;
} else {
- Vec = Builder.CreateInsertElement(Vec, Scalar, Builder.getInt32(Pos));
+ Vec = Builder.CreateInsertElement(Vec, Scalar, Pos);
InsElt = dyn_cast<InsertElementInst>(Vec);
if (!InsElt)
return Vec;
@@ -25002,7 +25002,6 @@ Value *BoUpSLP::vectorizeTree(
Value *Vec = E->VectorizedValue;
assert(Vec && "Can't find vectorizable value");
- Value *Lane = Builder.getInt32(ExternalUse.Lane);
auto ExtractAndExtendIfNeeded = [&](Value *Vec) {
if (isa<InsertValueInst>(Scalar))
return Vec;
@@ -25087,7 +25086,7 @@ Value *BoUpSLP::vectorizeTree(
IV->comesBefore(IVec))
Ex = Builder.CreateExtractElement(V, ES->getIndexOperand());
else
- Ex = Builder.CreateExtractElement(Vec, Lane);
+ Ex = Builder.CreateExtractElement(Vec, ExternalUse.Lane);
} else if (auto *VecTy =
dyn_cast<FixedVectorType>(Scalar->getType())) {
assert(SLPReVec && "FixedVectorType is not expected.");
@@ -25131,7 +25130,7 @@ Value *BoUpSLP::vectorizeTree(
Ex = createExtractVector(Builder, Vec, VecTyNumElements,
ExternalUse.Lane * VecTyNumElements);
} else {
- Ex = Builder.CreateExtractElement(Vec, Lane);
+ Ex = Builder.CreateExtractElement(Vec, ExternalUse.Lane);
}
}
// If necessary, sign-extend or zero-extend ScalarRoot
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
index 0f4e0ed31a554..2fc7f92a52b49 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
@@ -9,13 +9,13 @@ define void @foo(ptr %0) {
; CHECK-NEXT: vector.scevcheck:
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 4
; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr null, i64 4
-; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i32 1
-; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x ptr> [[TMP1]], ptr [[SCEVGEP]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i64 1
+; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x ptr> [[TMP1]], ptr [[SCEVGEP]], i64 0
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x ptr> [[TMP2]], <4 x ptr> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult <4 x ptr> [[TMP3]], splat (ptr null)
; CHECK-NEXT: [[TMP5:%.*]] = and <4 x i1> [[TMP4]], zeroinitializer
-; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i32 0
-; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x ptr> [[TMP6]], ptr [[SCEVGEP3]], i32 1
+; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i64 0
+; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x ptr> [[TMP6]], ptr [[SCEVGEP3]], i64 1
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x ptr> [[TMP7]], <4 x ptr> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
; CHECK-NEXT: [[TMP9:%.*]] = icmp ult <4 x ptr> [[TMP8]], splat (ptr null)
; CHECK-NEXT: [[TMP10:%.*]] = and <4 x i1> [[TMP9]], zeroinitializer
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
index d6756cc9c88dd..19591818c40d7 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
@@ -8,8 +8,8 @@ target triple = "aarch64--linux-gnu"
define void @test1(ptr nocapture readonly %J, i32 %xmin, i32 %ymin) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[XMIN:%.*]], i32 0
-; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[YMIN:%.*]], i32 1
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[XMIN:%.*]], i64 0
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[YMIN:%.*]], i64 1
; CHECK-NEXT: br label [[FOR_BODY3_LR_PH:%.*]]
; CHECK: for.body3.lr.ph:
; CHECK-NEXT: [[TMP2:%.*]] = sitofp <2 x i32> [[TMP1]] to <2 x float>
@@ -47,8 +47,8 @@ for.end27:
define void @test2(ptr nocapture readonly %J, i32 %xmin, i32 %ymin) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[XMIN:%.*]], i32 0
-; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[YMIN:%.*]], i32 1
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[XMIN:%.*]], i64 0
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[YMIN:%.*]], i64 1
; CHECK-NEXT: br label [[FOR_BODY3_LR_PH:%.*]]
; CHECK: for.body3.lr.ph:
; CHECK-NEXT: [[TMP2:%.*]] = sitofp <2 x i32> [[TMP1]] to <2 x float>
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
index bb42d9ab22936..9c4b34fd50b82 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
@@ -9,23 +9,23 @@ define ptr @test(ptr %d, i64 %v) {
; CHECK-NEXT: [[CMP4_2:%.*]] = icmp eq i8 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = xor i64 0, [[V]]
; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[CMP4_2]], i64 0, i64 4
-; CHECK-NEXT: [[TMP3:%.*]] = insertelement <3 x i64> <i64 poison, i64 poison, i64 1>, i64 [[TMP7]], i32 0
-; CHECK-NEXT: [[TMP4:%.*]] = insertelement <3 x i64> [[TMP3]], i64 [[TMP2]], i32 1
-; CHECK-NEXT: [[TMP5:%.*]] = insertelement <3 x i64> <i64 1, i64 3, i64 poison>, i64 [[V]], i32 2
+; CHECK-NEXT: [[TMP3:%.*]] = insertelement <3 x i64> <i64 poison, i64 poison, i64 1>, i64 [[TMP7]], i64 0
+; CHECK-NEXT: [[TMP4:%.*]] = insertelement <3 x i64> [[TMP3]], i64 [[TMP2]], i64 1
+; CHECK-NEXT: [[TMP5:%.*]] = insertelement <3 x i64> <i64 1, i64 3, i64 poison>, i64 [[V]], i64 2
; CHECK-NEXT: [[TMP6:%.*]] = udiv <3 x i64> [[TMP4]], [[TMP5]]
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <3 x i64> [[TMP6]], <3 x i64> poison, <6 x i32> <i32 0, i32 1, i32 0, i32 1, i32 2, i32 2>
; CHECK-NEXT: [[TMP9:%.*]] = mul <6 x i64> [[TMP8]], <i64 2, i64 6, i64 4, i64 3, i64 5, i64 4>
-; CHECK-NEXT: [[TMP10:%.*]] = extractelement <6 x i64> [[TMP9]], i32 0
+; CHECK-NEXT: [[TMP10:%.*]] = extractelement <6 x i64> [[TMP9]], i64 0
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP10]]
-; CHECK-NEXT: [[TMP12:%.*]] = extractelement <6 x i64> [[TMP9]], i32 1
+; CHECK-NEXT: [[TMP12:%.*]] = extractelement <6 x i64> [[TMP9]], i64 1
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP12]]
-; CHECK-NEXT: [[TMP14:%.*]] = extractelement <6 x i64> [[TMP9]], i32 2
+; CHECK-NEXT: [[TMP14:%.*]] = extractelement <6 x i64> [[TMP9]], i64 2
; CHECK-NEXT: [[SCEVGEP42:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP14]]
-; CHECK-NEXT: [[TMP15:%.*]] = extractelement <6 x i64> [[TMP9]], i32 3
+; CHECK-NEXT: [[TMP15:%.*]] = extractelement <6 x i64> [[TMP9]], i64 3
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP15]]
-; CHECK-NEXT: [[TMP17:%.*]] = extractelement <6 x i64> [[TMP9]], i32 4
+; CHECK-NEXT: [[TMP17:%.*]] = extractelement <6 x i64> [[TMP9]], i64 4
; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP17]]
-; CHECK-NEXT: [[TMP19:%.*]] = extractelement <6 x i64> [[TMP9]], i32 5
+; CHECK-NEXT: [[TMP19:%.*]] = extractelement <6 x i64> [[TMP9]], i64 5
; CHECK-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP19]]
; CHECK-NEXT: ret ptr [[TMP20]]
;
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/div.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
index a71afc36a205e..1dde51c8393a1 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
@@ -529,8 +529,8 @@ define <2 x i32> @sdiv_v2i32_unknown_divisor(<2 x i32> %a, <2 x i32> %x, <2 x i3
; NO-SVE-NEXT: [[X1:%.*]] = extractelement <2 x i32> [[X]], i64 1
; NO-SVE-NEXT: [[TMP8:%.*]] = sdiv i32 [[A1]], [[X1]]
; NO-SVE-NEXT: [[TMP7:%.*]] = sdiv i32 [[A0]], [[X0]]
-; NO-SVE-NEXT: [[RES0:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
-; NO-SVE-NEXT: [[RES1:%.*]] = insertelement <2 x i32> [[RES0]], i32 [[TMP8]], i32 1
+; NO-SVE-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i64 0
+; NO-SVE-NEXT: [[RES1:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[TMP8]], i64 1
; NO-SVE-NEXT: [[TMP5:%.*]] = add <2 x i32> [[RES1]], [[X]]
; NO-SVE-NEXT: [[TMP6:%.*]] = sub <2 x i32> [[TMP5]], [[Y]]
; NO-SVE-NEXT: [[TMP9:%.*]] = mul <2 x i32> [[TMP6]], [[Z]]
@@ -605,8 +605,8 @@ define <2 x i32> @sdiv_v2i32_Op1_unknown_Op2_const(<2 x i32> %a, <2 x i32> %x, <
; NO-SVE-NEXT: [[A1:%.*]] = extractelement <2 x i32> [[A]], i64 1
; NO-SVE-NEXT: [[TMP2:%.*]] = sdiv i32 [[A1]], 4
; NO-SVE-NEXT: [[TMP7:%.*]] = sdiv i32 [[A0]], [[A0]]
-; NO-SVE-NEXT: [[RES0:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
-; NO-SVE-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[RES0]], i32 [[TMP2]], i32 1
+; NO-SVE-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i64 0
+; NO-SVE-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[TMP2]], i64 1
; NO-SVE-NEXT: [[TMP5:%.*]] = add <2 x i32> [[TMP4]], [[X]]
; NO-SVE-NEXT: [[TMP6:%.*]] = sub <2 x i32> [[TMP5]], [[Y]]
; NO-SVE-NEXT: [[RES1:%.*]] = mul <2 x i32> [[TMP6]], [[Z]]
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
index 2c9eea2571f07..f602ff125bd8c 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
@@ -5,16 +5,16 @@ define void @test(i64 %0, i64 %1, i64 %2, i64 %3, i64 %.sroa.3341.0.copyload, i6
; CHECK-LABEL: define void @test(
; CHECK-SAME: i64 [[TMP0:%.*]], i64 [[TMP1:%.*]], i64 [[TMP2:%.*]], i64 [[TMP3:%.*]], i64 [[DOTSROA_3341_0_COPYLOAD:%.*]], i64 [[DOTSROA_3308_0_COPYLOAD:%.*]], i64 [[DOTNEG1:%.*]], i64 [[INDVAR3788:%.*]], i64 [[TMP4:%.*]], i64 [[TMP5:%.*]], i64 [[TMP6:%.*]], i64 [[TMP7:%.*]], i64 [[TMP8:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[_LR_PH_PREHEADER:.*:]]
-; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i64> poison, i64 [[TMP1]], i32 0
-; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x i64> [[TMP9]], i64 [[TMP0]], i32 1
+; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i64> poison, i64 [[TMP1]], i64 0
+; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x i64> [[TMP9]], i64 [[TMP0]], i64 1
; CHECK-NEXT: [[TMP13:%.*]] = mul <2 x i64> [[TMP10]], <i64 1, i64 24>
; CHECK-NEXT: [[TMP17:%.*]] = mul <2 x i64> [[TMP10]], <i64 1, i64 40>
; CHECK-NEXT: [[TMP11:%.*]] = mul i64 [[TMP0]], 48
-; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i64> <i64 poison, i64 1>, i64 [[TMP0]], i32 0
+; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i64> <i64 poison, i64 1>, i64 [[TMP0]], i64 0
; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <2 x i64> [[TMP14]], <2 x i64> <i64 -1, i64 poison>, <2 x i32> <i32 2, i32 0>
; CHECK-NEXT: [[TMP16:%.*]] = sub <2 x i64> [[TMP14]], [[TMP15]]
; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP0]], 11
-; CHECK-NEXT: [[TMP35:%.*]] = insertelement <2 x i64> poison, i64 [[TMP0]], i32 0
+; CHECK-NEXT: [[TMP35:%.*]] = insertelement <2 x i64> poison, i64 [[TMP0]], i64 0
; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <2 x i64> [[TMP35]], <2 x i64> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[TMP25:%.*]] = shl <2 x i64> [[TMP12]], <i64 11, i64 0>
; CHECK-NEXT: [[TMP21:%.*]] = sub i64 1, [[TMP20]]
@@ -25,20 +25,20 @@ define void @test(i64 %0, i64 %1, i64 %2, i64 %3, i64 %.sroa.3341.0.copyload, i6
; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP18]], [[TMP0]]
; CHECK-NEXT: [[TMP34:%.*]] = or i64 [[TMP19]], 1
; CHECK-NEXT: [[TMP55:%.*]] = mul i64 [[TMP0]], [[TMP0]]
-; CHECK-NEXT: [[TMP58:%.*]] = insertelement <8 x i64> poison, i64 [[TMP0]], i32 0
+; CHECK-NEXT: [[TMP58:%.*]] = insertelement <8 x i64> poison, i64 [[TMP0]], i64 0
; CHECK-NEXT: [[TMP30:%.*]] = shufflevector <8 x i64> [[TMP58]], <8 x i64> poison, <8 x i32> zeroinitializer
; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <8 x i64> [[TMP30]], <8 x i64> <i64 poison, i64 1, i64 1, i64 1, i64 poison, i64 poison, i64 poison, i64 poison>, <6 x i32> <i32 0, i32 9, i32 10, i32 11, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP32:%.*]] = shufflevector <8 x i64> [[TMP30]], <8 x i64> <i64 0, i64 0, i64 0, i64 0, i64 poison, i64 1, i64 1, i64 1>, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 0, i32 13, i32 14, i32 15>
; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <8 x i64> [[TMP30]], <8 x i64> poison, <3 x i32> <i32 0, i32 poison, i32 poison>
-; CHECK-NEXT: [[TMP28:%.*]] = insertelement <3 x i64> [[TMP27]], i64 [[TMP1]], i32 1
-; CHECK-NEXT: [[TMP29:%.*]] = insertelement <3 x i64> [[TMP28]], i64 [[DOTNEG1]], i32 2
+; CHECK-NEXT: [[TMP62:%.*]] = insertelement <3 x i64> [[TMP27]], i64 [[TMP1]], i64 1
+; CHECK-NEXT: [[TMP29:%.*]] = insertelement <3 x i64> [[TMP62]], i64 [[DOTNEG1]], i64 2
; CHECK-NEXT: [[TMP36:%.*]] = shufflevector <3 x i64> [[TMP29]], <3 x i64> poison, <8 x i32> <i32 0, i32 1, i32 1, i32 1, i32 2, i32 0, i32 0, i32 0>
-; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i64> poison, i64 [[TMP2]], i32 0
-; CHECK-NEXT: [[TMP38:%.*]] = insertelement <4 x i64> [[TMP37]], i64 [[TMP8]], i32 1
-; CHECK-NEXT: [[TMP39:%.*]] = insertelement <4 x i64> [[TMP38]], i64 [[DOTSROA_3308_0_COPYLOAD]], i32 2
-; CHECK-NEXT: [[TMP40:%.*]] = insertelement <4 x i64> [[TMP39]], i64 [[TMP0]], i32 3
+; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i64> poison, i64 [[TMP2]], i64 0
+; CHECK-NEXT: [[TMP38:%.*]] = insertelement <4 x i64> [[TMP37]], i64 [[TMP8]], i64 1
+; CHECK-NEXT: [[TMP39:%.*]] = insertelement <4 x i64> [[TMP38]], i64 [[DOTSROA_3308_0_COPYLOAD]], i64 2
+; CHECK-NEXT: [[TMP40:%.*]] = insertelement <4 x i64> [[TMP39]], i64 [[TMP0]], i64 3
; CHECK-NEXT: [[TMP41:%.*]] = shufflevector <2 x i64> [[TMP17]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
-; CHECK-NEXT: [[TMP74:%.*]] = insertelement <4 x i64> poison, i64 [[TMP0]], i32 1
+; CHECK-NEXT: [[TMP63:%.*]] = insertelement <4 x i64> poison, i64 [[TMP0]], i64 1
; CHECK-NEXT: [[TMP43:%.*]] = mul i64 [[TMP0]], [[TMP0]]
; CHECK-NEXT: [[TMP44:%.*]] = shufflevector <2 x i64> [[TMP13]], <2 x i64> poison, <32 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP45:%.*]] = shufflevector <32 x i64> [[TMP44]], <32 x i64> poison, <32 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 5, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
@@ -60,40 +60,40 @@ define void @test(i64 %0, i64 %1, i64 %2, i64 %3, i64 %.sroa.3341.0.copyload, i6
; CHECK-NEXT: [[DIFF_CHECK3805:%.*]] = icmp ugt i64 [[TMP26]], 1
; CHECK-NEXT: [[TMP56:%.*]] = add <8 x i64> [[TMP52]], [[TMP32]]
; CHECK-NEXT: [[TMP57:%.*]] = icmp ult <8 x i64> [[TMP56]], [[TMP36]]
-; CHECK-NEXT: [[TMP24:%.*]] = extractelement <8 x i64> [[TMP52]], i32 5
+; CHECK-NEXT: [[TMP24:%.*]] = extractelement <8 x i64> [[TMP52]], i64 5
; CHECK-NEXT: [[TMP42:%.*]] = add i64 [[TMP24]], 1
; CHECK-NEXT: [[DIFF_CHECK3842:%.*]] = icmp ult i64 [[TMP42]], [[TMP0]]
; CHECK-NEXT: [[DIFF_CHECK3817:%.*]] = icmp ult i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[TMP76:%.*]] = add i64 [[TMP53]], 1
; CHECK-NEXT: [[DIFF_CHECK3820:%.*]] = icmp ult i64 [[TMP76]], [[TMP0]]
; CHECK-NEXT: [[TMP98:%.*]] = shl <2 x i64> [[TMP12]], splat (i64 1)
-; CHECK-NEXT: [[TMP77:%.*]] = insertelement <4 x i64> [[TMP74]], i64 [[INDVAR37888]], i32 0
+; CHECK-NEXT: [[TMP77:%.*]] = insertelement <4 x i64> [[TMP63]], i64 [[INDVAR37888]], i64 0
; CHECK-NEXT: [[TMP78:%.*]] = shufflevector <4 x i64> [[TMP77]], <4 x i64> poison, <4 x i32> <i32 0, i32 1, i32 1, i32 1>
; CHECK-NEXT: [[TMP80:%.*]] = shufflevector <4 x i64> [[TMP77]], <4 x i64> <i64 1, i64 poison, i64 poison, i64 poison>, <4 x i32> <i32 4, i32 1, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP81:%.*]] = shufflevector <4 x i64> [[TMP80]], <4 x i64> [[TMP48]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: [[TMP82:%.*]] = mul <4 x i64> [[TMP78]], [[TMP81]]
; CHECK-NEXT: [[TMP84:%.*]] = add i64 [[TMP54]], 1
-; CHECK-NEXT: [[TMP85:%.*]] = insertelement <32 x i64> [[TMP45]], i64 [[TMP55]], i32 11
+; CHECK-NEXT: [[TMP85:%.*]] = insertelement <32 x i64> [[TMP45]], i64 [[TMP55]], i64 11
; CHECK-NEXT: [[TMP86:%.*]] = shufflevector <4 x i64> [[TMP82]], <4 x i64> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP89:%.*]] = shufflevector <32 x i64> [[TMP85]], <32 x i64> [[TMP86]], <32 x i32> <i32 32, i32 33, i32 34, i32 35, i32 poison, i32 5, i32 poison, i32 poison, i32 poison, i32 poison, i32 10, i32 11, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
-; CHECK-NEXT: [[TMP90:%.*]] = insertelement <32 x i64> [[TMP89]], i64 [[TMP84]], i32 4
+; CHECK-NEXT: [[TMP90:%.*]] = insertelement <32 x i64> [[TMP89]], i64 [[TMP84]], i64 4
; CHECK-NEXT: [[TMP100:%.*]] = shufflevector <8 x i64> [[TMP52]], <8 x i64> poison, <32 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 4, i32 5, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP73:%.*]] = shufflevector <8 x i64> [[TMP52]], <8 x i64> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP87:%.*]] = shufflevector <32 x i64> [[TMP90]], <32 x i64> [[TMP73]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 36, i32 37, i32 poison, i32 poison, i32 10, i32 11, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEX...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/208957
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