[llvm] [NFC][SPIR-V] Add constrainSelectedInstRegOperands helper to dedup repeating pattern in global registry (PR #208703)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-spir-v

Author: Arseniy Obolenskiy (aobolensk)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/208703.diff


2 Files Affected:

- (modified) llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp (+13-24) 
- (modified) llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h (+2) 


``````````diff
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index eea63194fa8b7..29ff3cbdbaac6 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -91,6 +91,13 @@ storageClassRequiresExplictLayout(SPIRV::StorageClass::StorageClass SC) {
 SPIRVGlobalRegistry::SPIRVGlobalRegistry(DataLayout DL)
     : DL(DL), Bound(0), CurMF(nullptr) {}
 
+void SPIRVGlobalRegistry::constrainSelectedInstRegOperands(
+    MachineInstrBuilder &MIB) const {
+  const auto &ST = CurMF->getSubtarget();
+  ::constrainSelectedInstRegOperands(
+      *MIB, *ST.getInstrInfo(), *ST.getRegisterInfo(), *ST.getRegBankInfo());
+}
+
 SPIRVTypeInst
 SPIRVGlobalRegistry::assignIntTypeToVReg(unsigned BitWidth, Register VReg,
                                          MachineInstr &I,
@@ -399,10 +406,7 @@ Register SPIRVGlobalRegistry::createConstFP(const ConstantFP *CF,
                           CF->getValueAPF().bitcastToAPInt().getZExtValue()),
                     MIB);
         }
-        const auto &ST = CurMF->getSubtarget();
-        constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(),
-                                         *ST.getRegisterInfo(),
-                                         *ST.getRegBankInfo());
+        constrainSelectedInstRegOperands(MIB);
         return MIB;
       });
   add(CF, Const);
@@ -464,10 +468,7 @@ Register SPIRVGlobalRegistry::createConstInt(const ConstantInt *CI,
                     .addDef(Res)
                     .addUse(getSPIRVTypeID(SpvType));
         }
-        const auto &ST = CurMF->getSubtarget();
-        constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(),
-                                         *ST.getRegisterInfo(),
-                                         *ST.getRegBankInfo());
+        constrainSelectedInstRegOperands(MIB);
         return MIB;
       });
   add(CI, Const);
@@ -513,10 +514,7 @@ Register SPIRVGlobalRegistry::buildConstantInt(uint64_t Val,
                     .addDef(Res)
                     .addUse(SpvTypeReg);
         }
-        const auto &Subtarget = CurMF->getSubtarget();
-        constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(),
-                                         *Subtarget.getRegisterInfo(),
-                                         *Subtarget.getRegBankInfo());
+        constrainSelectedInstRegOperands(MIB);
         return MIB;
       });
   add(CI, Const);
@@ -609,10 +607,7 @@ Register SPIRVGlobalRegistry::getOrCreateCompositeOrNull(
                     .addDef(Res)
                     .addUse(getSPIRVTypeID(SpvType));
         }
-        const auto &Subtarget = CurMF->getSubtarget();
-        constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(),
-                                         *Subtarget.getRegisterInfo(),
-                                         *Subtarget.getRegBankInfo());
+        constrainSelectedInstRegOperands(MIB);
         return MIB;
       });
   add(CA, NewMI);
@@ -852,10 +847,7 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
   // ISel may introduce a new register on this step, so we need to add it to
   // DT and correct its type avoiding fails on the next stage.
   if (IsInstSelector) {
-    const auto &Subtarget = CurMF->getSubtarget();
-    constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(),
-                                     *Subtarget.getRegisterInfo(),
-                                     *Subtarget.getRegBankInfo());
+    constrainSelectedInstRegOperands(MIB);
   }
   add(GVar, MIB);
 
@@ -2076,10 +2068,7 @@ Register SPIRVGlobalRegistry::getOrCreateUndef(MachineInstr &I,
                            MIRBuilder.getDL(), TII.get(SPIRV::OpUndef))
                        .addDef(Res)
                        .addUse(getSPIRVTypeID(SpvType));
-        const auto &ST = CurMF->getSubtarget();
-        constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(),
-                                         *ST.getRegisterInfo(),
-                                         *ST.getRegBankInfo());
+        constrainSelectedInstRegOperands(MIB);
         return MIB;
       });
   add(UV, NewMI);
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index fcb8b3fd66f91..b52ca5dc5f5b7 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -515,6 +515,8 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
                                  MachineIRBuilder &MIRBuilder);
   bool hasBlockDecoration(SPIRVTypeInst Type) const;
 
+  void constrainSelectedInstRegOperands(MachineInstrBuilder &MIB) const;
+
   SPIRVTypeInst
   getOrCreateOpTypeImage(MachineIRBuilder &MIRBuilder,
                          SPIRVTypeInst SampledType, SPIRV::Dim::Dim Dim,

``````````

</details>


https://github.com/llvm/llvm-project/pull/208703