[llvm] 0ea6d9d - [AMDGPU] Extend wave reduction intrinsics to Pre-gfx8 (#208071)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 10 04:35:45 PDT 2026
Author: Aaditya
Date: 2026-07-10T17:05:40+05:30
New Revision: 0ea6d9d0d6fa07da8122514125c09c92d4f66650
URL: https://github.com/llvm/llvm-project/commit/0ea6d9d0d6fa07da8122514125c09c92d4f66650
DIFF: https://github.com/llvm/llvm-project/commit/0ea6d9d0d6fa07da8122514125c09c92d4f66650.diff
LOG: [AMDGPU] Extend wave reduction intrinsics to Pre-gfx8 (#208071)
Add support for gfx6/7 families.
These subtargets don't support 64-bit Scalar Compares
or S_MUL_HI_U32. Added workarounds for these where
they come up in the code path.
Added:
Modified:
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 4b2fd87c5b078..9cf33b4ccbb87 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -6015,7 +6015,8 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
Register Op1L_Op0H_Reg =
MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
- Register CarryReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
+ Register CarryReg =
+ MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
Register AddReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
Register NegatedValLo =
MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
@@ -6042,9 +6043,23 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_I32), DestSub0)
.addReg(Op1L)
.addReg(LowOpcode);
- BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_HI_U32), CarryReg)
- .addReg(Op1L)
- .addReg(LowOpcode);
+ if (ST.hasScalarMulHiInsts()) {
+ BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_HI_U32), CarryReg)
+ .addReg(Op1L)
+ .addReg(LowOpcode);
+ } else {
+ Register VCarryReg =
+ MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
+ Register LowOpVGPR =
+ MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
+ BuildMI(BB, MI, DL, TII->get(AMDGPU::COPY), LowOpVGPR)
+ .addReg(LowOpcode);
+ BuildMI(BB, MI, DL, TII->get(AMDGPU::V_MUL_HI_U32_e64), VCarryReg)
+ .addReg(Op1L)
+ .addReg(LowOpVGPR);
+ BuildMI(BB, MI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), CarryReg)
+ .addReg(VCarryReg);
+ }
BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_I32), Op1H_Op0L_Reg)
.addReg(Op1H)
.addReg(LowOpcode);
@@ -6365,10 +6380,23 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
ActiveBits.addReg(NewActiveBitsReg).addMBB(ComputeLoop);
// Creating branching
- unsigned CMPOpc = IsWave32 ? AMDGPU::S_CMP_LG_U32 : AMDGPU::S_CMP_LG_U64;
- BuildMI(*ComputeLoop, I, DL, TII->get(CMPOpc))
- .addReg(NewActiveBitsReg)
- .addImm(0);
+ MachineInstrBuilder SetSCCInstr;
+ if (!ST.hasScalarCompareEq64()) {
+ // For targets <= gfx7, use an S_OR_B32/B64 instruction to set SCC.
+ Register LaneMaskReg = MRI.createVirtualRegister(WaveMaskRegClass);
+ unsigned CMPOpc = IsWave32 ? AMDGPU::S_OR_B32 : AMDGPU::S_OR_B64;
+ SetSCCInstr =
+ BuildMI(*ComputeLoop, I, DL, TII->get(CMPOpc), LaneMaskReg);
+ } else {
+ unsigned CMPOpc =
+ IsWave32 ? AMDGPU::S_CMP_LG_U32 : AMDGPU::S_CMP_LG_U64;
+ SetSCCInstr = BuildMI(*ComputeLoop, I, DL, TII->get(CMPOpc));
+ }
+ SetSCCInstr.addReg(NewActiveBitsReg);
+ if (ST.hasScalarCompareEq64())
+ SetSCCInstr.addImm(0);
+ else
+ SetSCCInstr.addReg(NewActiveBitsReg);
BuildMI(*ComputeLoop, I, DL, TII->get(AMDGPU::S_CBRANCH_SCC1))
.addMBB(ComputeLoop);
@@ -8236,6 +8264,30 @@ void SITargetLowering::ReplaceNodeResults(SDNode *N,
case ISD::INTRINSIC_WO_CHAIN: {
unsigned IID = N->getConstantOperandVal(0);
switch (IID) {
+ case Intrinsic::amdgcn_wave_reduce_min:
+ case Intrinsic::amdgcn_wave_reduce_umin:
+ case Intrinsic::amdgcn_wave_reduce_max:
+ case Intrinsic::amdgcn_wave_reduce_umax:
+ case Intrinsic::amdgcn_wave_reduce_add:
+ case Intrinsic::amdgcn_wave_reduce_sub:
+ case Intrinsic::amdgcn_wave_reduce_and:
+ case Intrinsic::amdgcn_wave_reduce_or:
+ case Intrinsic::amdgcn_wave_reduce_xor: {
+ EVT VT = N->getValueType(0);
+ if (isTypeLegal(VT))
+ return;
+ SDLoc SL(N);
+ bool NeedsSignExt = IID == Intrinsic::amdgcn_wave_reduce_min ||
+ IID == Intrinsic::amdgcn_wave_reduce_max ||
+ IID == Intrinsic::amdgcn_wave_reduce_add ||
+ IID == Intrinsic::amdgcn_wave_reduce_sub;
+ unsigned ExtOpc = NeedsSignExt ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
+ SDValue ExtSrc = DAG.getNode(ExtOpc, SL, MVT::i32, N->getOperand(1));
+ SDValue Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SL, MVT::i32,
+ N->getOperand(0), ExtSrc, N->getOperand(2));
+ Results.push_back(DAG.getNode(ISD::TRUNCATE, SL, VT, Result));
+ return;
+ }
case Intrinsic::amdgcn_make_buffer_rsrc:
Results.push_back(lowerPointerAsRsrcIntrin(N, DAG));
return;
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
index 8579a2a9f64fc..08645068ac4cf 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,36 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_sext_i32_i16 s6, s6
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_sext_i32_i16 s6, s6
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -250,6 +282,52 @@ entry:
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_add_i32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_add_i32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -504,6 +582,34 @@ entry:
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -690,6 +796,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -952,6 +1098,34 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -1138,6 +1312,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1496,6 +1710,56 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX6DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX6DAGISEL-NEXT: s_add_u32 s8, s8, s13
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX6DAGISEL-NEXT: s_addc_u32 s9, s9, s14
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX7DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX7DAGISEL-NEXT: s_add_u32 s8, s8, s13
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX7DAGISEL-NEXT: s_addc_u32 s9, s9, s14
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2432,6 +2696,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2790,6 +3094,86 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_2
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mul_i32 s2, s6, s2
+; GFX6DAGISEL-NEXT: .LBB8_2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_2
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mul_i32 s2, s6, s2
+; GFX7DAGISEL-NEXT: .LBB8_2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_add_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -3338,16 +3722,60 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s8, s[4:5]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s8
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: s_mul_i32 s0, s2, s8
+; GFX6DAGISEL-NEXT: v_readfirstlane_b32 s1, v0
+; GFX6DAGISEL-NEXT: s_mul_i32 s2, s3, s8
+; GFX6DAGISEL-NEXT: s_add_u32 s1, s1, s2
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s8, s[4:5]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s8
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: s_mul_i32 s0, s2, s8
+; GFX7DAGISEL-NEXT: v_readfirstlane_b32 s1, v0
+; GFX7DAGISEL-NEXT: s_mul_i32 s2, s3, s8
+; GFX7DAGISEL-NEXT: s_add_u32 s1, s1, s2
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8DAGISEL-NEXT: s_mov_b64 s[4:5], exec
; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s4
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8DAGISEL-NEXT: v_mul_hi_u32 v2, s2, v0
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1
; GFX8DAGISEL-NEXT: s_mul_i32 s0, s2, s4
-; GFX8DAGISEL-NEXT: s_mul_hi_u32 s1, s2, s4
+; GFX8DAGISEL-NEXT: v_readfirstlane_b32 s1, v2
; GFX8DAGISEL-NEXT: s_mul_i32 s2, s3, s4
; GFX8DAGISEL-NEXT: s_add_u32 s1, s1, s2
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1
@@ -3359,15 +3787,17 @@ define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0
; GFX8GISEL: ; %bb.0: ; %entry
; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8GISEL-NEXT: s_mov_b64 s[4:5], exec
-; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s5, s[4:5]
-; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8GISEL-NEXT: s_mul_i32 s4, s2, s5
-; GFX8GISEL-NEXT: s_mul_hi_u32 s2, s2, s5
-; GFX8GISEL-NEXT: s_mul_i32 s3, s3, s5
-; GFX8GISEL-NEXT: s_add_u32 s5, s2, s3
+; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s4
-; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8GISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX8GISEL-NEXT: s_mul_i32 s2, s2, s4
+; GFX8GISEL-NEXT: s_mul_i32 s3, s3, s4
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
+; GFX8GISEL-NEXT: v_readfirstlane_b32 s4, v0
+; GFX8GISEL-NEXT: s_add_u32 s3, s4, s3
+; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s3
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8GISEL-NEXT: s_endpgm
@@ -3555,6 +3985,56 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX6DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX6DAGISEL-NEXT: s_add_u32 s8, s8, s13
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX6DAGISEL-NEXT: s_addc_u32 s9, s9, s14
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX7DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX7DAGISEL-NEXT: s_add_u32 s8, s8, s13
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX7DAGISEL-NEXT: s_addc_u32 s9, s9, s14
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3832,6 +4312,94 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB11_2
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s7, s[6:7]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s7
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX6DAGISEL-NEXT: s_mul_i32 s6, s2, s7
+; GFX6DAGISEL-NEXT: s_mul_i32 s3, s3, s7
+; GFX6DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
+; GFX6DAGISEL-NEXT: s_add_u32 s7, s2, s3
+; GFX6DAGISEL-NEXT: .LBB11_2: ; %Flow
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB11_4
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX6DAGISEL-NEXT: s_mul_i32 s5, s5, s6
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s4, s6
+; GFX6DAGISEL-NEXT: v_readfirstlane_b32 s7, v0
+; GFX6DAGISEL-NEXT: s_add_u32 s5, s7, s5
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: .LBB11_4: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB11_2
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s7, s[6:7]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s7
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX7DAGISEL-NEXT: s_mul_i32 s6, s2, s7
+; GFX7DAGISEL-NEXT: s_mul_i32 s3, s3, s7
+; GFX7DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
+; GFX7DAGISEL-NEXT: s_add_u32 s7, s2, s3
+; GFX7DAGISEL-NEXT: .LBB11_2: ; %Flow
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB11_4
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX7DAGISEL-NEXT: s_mul_i32 s5, s5, s6
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s4, s6
+; GFX7DAGISEL-NEXT: v_readfirstlane_b32 s7, v0
+; GFX7DAGISEL-NEXT: s_add_u32 s5, s7, s5
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: .LBB11_4: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -3844,10 +4412,12 @@ define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64
; GFX8DAGISEL-NEXT: ; %bb.1: ; %else
; GFX8DAGISEL-NEXT: s_mov_b64 s[6:7], exec
; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s7, s[6:7]
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s7
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
; GFX8DAGISEL-NEXT: s_mul_i32 s6, s2, s7
-; GFX8DAGISEL-NEXT: s_mul_hi_u32 s2, s2, s7
; GFX8DAGISEL-NEXT: s_mul_i32 s3, s3, s7
+; GFX8DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX8DAGISEL-NEXT: s_add_u32 s7, s2, s3
; GFX8DAGISEL-NEXT: .LBB11_2: ; %Flow
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
@@ -3855,16 +4425,19 @@ define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s6
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s7
; GFX8DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
+; GFX8DAGISEL-NEXT: s_cbranch_execz .LBB11_4
; GFX8DAGISEL-NEXT: ; %bb.3: ; %if
; GFX8DAGISEL-NEXT: s_mov_b64 s[6:7], exec
-; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s7, s[6:7]
-; GFX8DAGISEL-NEXT: s_mul_i32 s6, s4, s7
-; GFX8DAGISEL-NEXT: s_mul_hi_u32 s4, s4, s7
-; GFX8DAGISEL-NEXT: s_mul_i32 s5, s5, s7
-; GFX8DAGISEL-NEXT: s_add_u32 s7, s4, s5
+; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s6
-; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s7
-; GFX8DAGISEL-NEXT: ; %bb.4: ; %endif
+; GFX8DAGISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX8DAGISEL-NEXT: s_mul_i32 s5, s5, s6
+; GFX8DAGISEL-NEXT: s_mul_i32 s4, s4, s6
+; GFX8DAGISEL-NEXT: v_readfirstlane_b32 s7, v0
+; GFX8DAGISEL-NEXT: s_add_u32 s5, s7, s5
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX8DAGISEL-NEXT: .LBB11_4: ; %endif
; GFX8DAGISEL-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1
@@ -3882,10 +4455,12 @@ define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64
; GFX8GISEL-NEXT: ; %bb.1: ; %else
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], exec
; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s7, s[6:7]
+; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s7
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8GISEL-NEXT: v_mul_hi_u32 v0, s2, v0
; GFX8GISEL-NEXT: s_mul_i32 s6, s2, s7
-; GFX8GISEL-NEXT: s_mul_hi_u32 s2, s2, s7
; GFX8GISEL-NEXT: s_mul_i32 s3, s3, s7
+; GFX8GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX8GISEL-NEXT: s_add_u32 s7, s2, s3
; GFX8GISEL-NEXT: .LBB11_2: ; %Flow
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
@@ -3897,14 +4472,16 @@ define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64
; GFX8GISEL-NEXT: ; %bb.3: ; %if
; GFX8GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], exec
-; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s7, s[6:7]
-; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8GISEL-NEXT: s_mul_i32 s6, s4, s7
-; GFX8GISEL-NEXT: s_mul_hi_u32 s4, s4, s7
-; GFX8GISEL-NEXT: s_mul_i32 s5, s5, s7
-; GFX8GISEL-NEXT: s_add_u32 s7, s4, s5
+; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s6
-; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8GISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX8GISEL-NEXT: s_mul_i32 s5, s5, s6
+; GFX8GISEL-NEXT: s_mul_i32 s4, s4, s6
+; GFX8GISEL-NEXT: v_readfirstlane_b32 s7, v0
+; GFX8GISEL-NEXT: s_add_u32 s5, s7, s5
+; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s5
; GFX8GISEL-NEXT: .LBB11_4: ; %endif
; GFX8GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
@@ -4382,6 +4959,32 @@ endif:
}
define amdgpu_kernel void @constant_value(ptr addrspace(1) %out) {
+; GFX6DAGISEL-LABEL: constant_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s4, 0x10000
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: constant_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s4, 0x10000
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: constant_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
index 947b26df5a569..6b7d8ee27bd98 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,30 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
@@ -170,6 +196,52 @@ define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s10, -1
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_and_b32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s10, -1
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_and_b32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -438,6 +510,28 @@ define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -550,6 +644,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -793,6 +927,28 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -905,6 +1061,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1238,6 +1434,54 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX6DAGISEL-NEXT: s_and_b64 s[8:9], s[8:9], s[12:13]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX7DAGISEL-NEXT: s_and_b64 s[8:9], s[8:9], s[12:13]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2090,6 +2334,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2423,6 +2707,78 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_and_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -2888,6 +3244,32 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -2994,6 +3376,54 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX6DAGISEL-NEXT: s_and_b64 s[8:9], s[8:9], s[12:13]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX7DAGISEL-NEXT: s_and_b64 s[8:9], s[8:9], s[12:13]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3234,6 +3664,50 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
index 1a9e6f3a34475..132612c1f5e6f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,30 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_sext_i32_i16 s4, s6
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_sext_i32_i16 s4, s6
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
@@ -170,6 +196,52 @@ entry:
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s10, 1
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_max_i32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s10, 1
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_max_i32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -400,6 +472,28 @@ entry:
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -512,6 +606,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -755,6 +889,28 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -867,6 +1023,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1204,6 +1400,64 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s8, 0
+; GFX6DAGISEL-NEXT: s_brev_b32 s9, 1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s8, 0
+; GFX7DAGISEL-NEXT: s_brev_b32 s9, 1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2180,6 +2434,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2517,6 +2811,78 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, 1
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_max_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -2982,6 +3348,32 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -3088,6 +3480,64 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s8, 0
+; GFX6DAGISEL-NEXT: s_brev_b32 s9, 1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s8, 0
+; GFX7DAGISEL-NEXT: s_brev_b32 s9, 1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_gt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3386,6 +3836,50 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
index 2c564bccf1678..c19059b754831 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,30 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_sext_i32_i16 s4, s6
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_sext_i32_i16 s4, s6
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
@@ -170,6 +196,52 @@ entry:
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s10, -2
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_min_i32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s10, -2
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_min_i32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -400,6 +472,28 @@ entry:
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -512,6 +606,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -755,6 +889,28 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -867,6 +1023,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1204,6 +1400,64 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s8, -1
+; GFX6DAGISEL-NEXT: s_brev_b32 s9, -2
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_lt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s8, -1
+; GFX7DAGISEL-NEXT: s_brev_b32 s9, -2
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_lt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2180,6 +2434,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2517,6 +2811,78 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_brev_b32 s6, -2
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_min_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -2982,6 +3348,32 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -3088,6 +3480,64 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s8, -1
+; GFX6DAGISEL-NEXT: s_brev_b32 s9, -2
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_lt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s8, -1
+; GFX7DAGISEL-NEXT: s_brev_b32 s9, -2
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_lt_i64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3386,6 +3836,50 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
index 1ae2a4268ff1e..740b83329ad44 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,30 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
@@ -170,6 +196,52 @@ define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_or_b32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_or_b32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -438,6 +510,28 @@ define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -550,6 +644,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -793,6 +927,28 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -905,6 +1061,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1238,6 +1434,54 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2090,6 +2334,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2423,6 +2707,78 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_or_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -2888,6 +3244,32 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -2994,6 +3376,54 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3235,6 +3665,50 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
index e5403a9a7d614..1f51a317cdc08 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,38 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_sext_i32_i16 s6, s6
+; GFX6DAGISEL-NEXT: s_sub_i32 s5, 0, s6
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s5, s4
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_sext_i32_i16 s6, s6
+; GFX7DAGISEL-NEXT: s_sub_i32 s5, 0, s6
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s5, s4
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -270,6 +304,52 @@ entry:
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_sub_i32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_sub_i32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -524,6 +604,36 @@ entry:
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_sub_i32 s5, 0, s6
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s5, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_sub_i32 s5, 0, s6
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s5, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -725,6 +835,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -987,6 +1137,36 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_sub_i32 s5, 0, s6
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s5, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_sub_i32 s5, 0, s6
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s5, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -1188,6 +1368,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1561,6 +1781,56 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX6DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX6DAGISEL-NEXT: s_sub_u32 s8, s8, s13
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX6DAGISEL-NEXT: s_subb_u32 s9, s9, s14
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX7DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX7DAGISEL-NEXT: s_sub_u32 s8, s8, s13
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX7DAGISEL-NEXT: s_subb_u32 s9, s9, s14
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2527,6 +2797,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2900,6 +3210,88 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_2
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_sub_i32 s3, 0, s6
+; GFX6DAGISEL-NEXT: s_mul_i32 s2, s3, s2
+; GFX6DAGISEL-NEXT: .LBB8_2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_2
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_sub_i32 s3, 0, s6
+; GFX7DAGISEL-NEXT: s_mul_i32 s2, s3, s2
+; GFX7DAGISEL-NEXT: .LBB8_2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_sub_i32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -3461,19 +3853,71 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s0, s[8:9]
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: s_sub_i32 s1, 0, s0
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s1
+; GFX6DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX6DAGISEL-NEXT: s_ashr_i32 s0, s1, 31
+; GFX6DAGISEL-NEXT: s_mul_i32 s8, s2, s0
+; GFX6DAGISEL-NEXT: s_mul_i32 s0, s2, s1
+; GFX6DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
+; GFX6DAGISEL-NEXT: s_mul_i32 s1, s3, s1
+; GFX6DAGISEL-NEXT: s_add_u32 s1, s2, s1
+; GFX6DAGISEL-NEXT: s_add_u32 s1, s1, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s0, s[8:9]
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: s_sub_i32 s1, 0, s0
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s1
+; GFX7DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX7DAGISEL-NEXT: s_ashr_i32 s0, s1, 31
+; GFX7DAGISEL-NEXT: s_mul_i32 s8, s2, s0
+; GFX7DAGISEL-NEXT: s_mul_i32 s0, s2, s1
+; GFX7DAGISEL-NEXT: v_readfirstlane_b32 s2, v0
+; GFX7DAGISEL-NEXT: s_mul_i32 s1, s3, s1
+; GFX7DAGISEL-NEXT: s_add_u32 s1, s2, s1
+; GFX7DAGISEL-NEXT: s_add_u32 s1, s1, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8DAGISEL-NEXT: s_mov_b64 s[4:5], exec
; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
; GFX8DAGISEL-NEXT: s_sub_i32 s4, 0, s4
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s4
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8DAGISEL-NEXT: v_mul_hi_u32 v2, s2, v2
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX8DAGISEL-NEXT: s_ashr_i32 s0, s4, 31
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1
; GFX8DAGISEL-NEXT: s_mul_i32 s1, s2, s0
; GFX8DAGISEL-NEXT: s_mul_i32 s0, s2, s4
-; GFX8DAGISEL-NEXT: s_mul_hi_u32 s2, s2, s4
+; GFX8DAGISEL-NEXT: v_readfirstlane_b32 s2, v2
; GFX8DAGISEL-NEXT: s_mul_i32 s3, s3, s4
; GFX8DAGISEL-NEXT: s_add_u32 s2, s2, s3
; GFX8DAGISEL-NEXT: s_add_u32 s1, s2, s1
@@ -3487,17 +3931,19 @@ define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0
; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8GISEL-NEXT: s_mov_b64 s[4:5], exec
; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
-; GFX8GISEL-NEXT: s_sub_i32 s5, 0, s4
-; GFX8GISEL-NEXT: s_ashr_i32 s4, s5, 31
-; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8GISEL-NEXT: s_mul_i32 s6, s2, s4
-; GFX8GISEL-NEXT: s_mul_i32 s4, s2, s5
-; GFX8GISEL-NEXT: s_mul_hi_u32 s2, s2, s5
-; GFX8GISEL-NEXT: s_mul_i32 s3, s3, s5
-; GFX8GISEL-NEXT: s_add_u32 s2, s2, s3
-; GFX8GISEL-NEXT: s_add_u32 s5, s2, s6
+; GFX8GISEL-NEXT: s_sub_i32 s4, 0, s4
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s4
-; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8GISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX8GISEL-NEXT: s_ashr_i32 s5, s4, 31
+; GFX8GISEL-NEXT: s_mul_i32 s3, s3, s4
+; GFX8GISEL-NEXT: s_mul_i32 s5, s2, s5
+; GFX8GISEL-NEXT: v_readfirstlane_b32 s6, v0
+; GFX8GISEL-NEXT: s_add_u32 s3, s6, s3
+; GFX8GISEL-NEXT: s_mul_i32 s2, s2, s4
+; GFX8GISEL-NEXT: s_add_u32 s3, s3, s5
+; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s3
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
@@ -3735,6 +4181,56 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX6DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX6DAGISEL-NEXT: s_sub_u32 s8, s8, s13
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX6DAGISEL-NEXT: s_subb_u32 s9, s9, s14
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s12, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v2, s12
+; GFX7DAGISEL-NEXT: v_readlane_b32 s14, v3, s12
+; GFX7DAGISEL-NEXT: s_sub_u32 s8, s8, s13
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s12
+; GFX7DAGISEL-NEXT: s_subb_u32 s9, s9, s14
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -4012,45 +4508,153 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr8_sgpr9
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB11_2
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s8, s[8:9]
+; GFX6DAGISEL-NEXT: s_sub_i32 s9, 0, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s9
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX6DAGISEL-NEXT: s_ashr_i32 s10, s9, 31
+; GFX6DAGISEL-NEXT: s_mul_i32 s8, s2, s9
+; GFX6DAGISEL-NEXT: s_mul_i32 s2, s2, s10
+; GFX6DAGISEL-NEXT: v_readfirstlane_b32 s10, v0
+; GFX6DAGISEL-NEXT: s_mul_i32 s3, s3, s9
+; GFX6DAGISEL-NEXT: s_add_u32 s3, s10, s3
+; GFX6DAGISEL-NEXT: s_add_u32 s9, s3, s2
+; GFX6DAGISEL-NEXT: .LBB11_2: ; %Flow
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[6:7]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s9
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB11_4
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX6DAGISEL-NEXT: s_sub_i32 s7, 0, s6
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s7
+; GFX6DAGISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX6DAGISEL-NEXT: s_ashr_i32 s8, s7, 31
+; GFX6DAGISEL-NEXT: s_mul_i32 s6, s4, s7
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s4, s8
+; GFX6DAGISEL-NEXT: v_readfirstlane_b32 s8, v0
+; GFX6DAGISEL-NEXT: s_mul_i32 s5, s5, s7
+; GFX6DAGISEL-NEXT: s_add_u32 s5, s8, s5
+; GFX6DAGISEL-NEXT: s_add_u32 s7, s5, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX6DAGISEL-NEXT: .LBB11_4: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr8_sgpr9
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB11_2
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s8, s[8:9]
+; GFX7DAGISEL-NEXT: s_sub_i32 s9, 0, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s9
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX7DAGISEL-NEXT: s_ashr_i32 s10, s9, 31
+; GFX7DAGISEL-NEXT: s_mul_i32 s8, s2, s9
+; GFX7DAGISEL-NEXT: s_mul_i32 s2, s2, s10
+; GFX7DAGISEL-NEXT: v_readfirstlane_b32 s10, v0
+; GFX7DAGISEL-NEXT: s_mul_i32 s3, s3, s9
+; GFX7DAGISEL-NEXT: s_add_u32 s3, s10, s3
+; GFX7DAGISEL-NEXT: s_add_u32 s9, s3, s2
+; GFX7DAGISEL-NEXT: .LBB11_2: ; %Flow
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[6:7]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s9
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB11_4
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX7DAGISEL-NEXT: s_sub_i32 s7, 0, s6
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s7
+; GFX7DAGISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX7DAGISEL-NEXT: s_ashr_i32 s8, s7, 31
+; GFX7DAGISEL-NEXT: s_mul_i32 s6, s4, s7
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s4, s8
+; GFX7DAGISEL-NEXT: v_readfirstlane_b32 s8, v0
+; GFX7DAGISEL-NEXT: s_mul_i32 s5, s5, s7
+; GFX7DAGISEL-NEXT: s_add_u32 s5, s8, s5
+; GFX7DAGISEL-NEXT: s_add_u32 s7, s5, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX7DAGISEL-NEXT: .LBB11_4: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
-; GFX8DAGISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
-; GFX8DAGISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
-; GFX8DAGISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
+; GFX8DAGISEL-NEXT: ; implicit-def: $sgpr8_sgpr9
+; GFX8DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX8DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
; GFX8DAGISEL-NEXT: s_cbranch_execz .LBB11_2
; GFX8DAGISEL-NEXT: ; %bb.1: ; %else
-; GFX8DAGISEL-NEXT: s_mov_b64 s[6:7], exec
-; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX8DAGISEL-NEXT: s_sub_i32 s7, 0, s6
-; GFX8DAGISEL-NEXT: s_ashr_i32 s6, s7, 31
+; GFX8DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s8, s[8:9]
+; GFX8DAGISEL-NEXT: s_sub_i32 s9, 0, s8
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s9
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8DAGISEL-NEXT: s_mul_i32 s10, s2, s6
-; GFX8DAGISEL-NEXT: s_mul_i32 s6, s2, s7
-; GFX8DAGISEL-NEXT: s_mul_hi_u32 s2, s2, s7
-; GFX8DAGISEL-NEXT: s_mul_i32 s3, s3, s7
-; GFX8DAGISEL-NEXT: s_add_u32 s2, s2, s3
-; GFX8DAGISEL-NEXT: s_add_u32 s7, s2, s10
+; GFX8DAGISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX8DAGISEL-NEXT: s_ashr_i32 s10, s9, 31
+; GFX8DAGISEL-NEXT: s_mul_i32 s8, s2, s9
+; GFX8DAGISEL-NEXT: s_mul_i32 s2, s2, s10
+; GFX8DAGISEL-NEXT: v_readfirstlane_b32 s10, v0
+; GFX8DAGISEL-NEXT: s_mul_i32 s3, s3, s9
+; GFX8DAGISEL-NEXT: s_add_u32 s3, s10, s3
+; GFX8DAGISEL-NEXT: s_add_u32 s9, s3, s2
; GFX8DAGISEL-NEXT: .LBB11_2: ; %Flow
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9]
-; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s6
-; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[6:7]
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s8
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s9
; GFX8DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
; GFX8DAGISEL-NEXT: s_cbranch_execz .LBB11_4
; GFX8DAGISEL-NEXT: ; %bb.3: ; %if
; GFX8DAGISEL-NEXT: s_mov_b64 s[6:7], exec
; GFX8DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
; GFX8DAGISEL-NEXT: s_sub_i32 s7, 0, s6
-; GFX8DAGISEL-NEXT: s_ashr_i32 s6, s7, 31
-; GFX8DAGISEL-NEXT: s_mul_i32 s8, s4, s6
+; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s7
+; GFX8DAGISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX8DAGISEL-NEXT: s_ashr_i32 s8, s7, 31
; GFX8DAGISEL-NEXT: s_mul_i32 s6, s4, s7
-; GFX8DAGISEL-NEXT: s_mul_hi_u32 s4, s4, s7
+; GFX8DAGISEL-NEXT: s_mul_i32 s4, s4, s8
+; GFX8DAGISEL-NEXT: v_readfirstlane_b32 s8, v0
; GFX8DAGISEL-NEXT: s_mul_i32 s5, s5, s7
-; GFX8DAGISEL-NEXT: s_add_u32 s4, s4, s5
-; GFX8DAGISEL-NEXT: s_add_u32 s7, s4, s8
+; GFX8DAGISEL-NEXT: s_add_u32 s5, s8, s5
+; GFX8DAGISEL-NEXT: s_add_u32 s7, s5, s4
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s6
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s7
; GFX8DAGISEL-NEXT: .LBB11_4: ; %endif
@@ -4064,44 +4668,48 @@ define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64
; GFX8GISEL: ; %bb.0: ; %entry
; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0
-; GFX8GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
-; GFX8GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
-; GFX8GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
+; GFX8GISEL-NEXT: ; implicit-def: $sgpr8_sgpr9
+; GFX8GISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX8GISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
; GFX8GISEL-NEXT: s_cbranch_execz .LBB11_2
; GFX8GISEL-NEXT: ; %bb.1: ; %else
-; GFX8GISEL-NEXT: s_mov_b64 s[6:7], exec
-; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX8GISEL-NEXT: s_sub_i32 s7, 0, s6
-; GFX8GISEL-NEXT: s_ashr_i32 s6, s7, 31
+; GFX8GISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s8, s[8:9]
+; GFX8GISEL-NEXT: s_sub_i32 s9, 0, s8
+; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s9
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8GISEL-NEXT: s_mul_i32 s10, s2, s6
-; GFX8GISEL-NEXT: s_mul_i32 s6, s2, s7
-; GFX8GISEL-NEXT: s_mul_hi_u32 s2, s2, s7
-; GFX8GISEL-NEXT: s_mul_i32 s3, s3, s7
-; GFX8GISEL-NEXT: s_add_u32 s2, s2, s3
-; GFX8GISEL-NEXT: s_add_u32 s7, s2, s10
+; GFX8GISEL-NEXT: v_mul_hi_u32 v0, s2, v0
+; GFX8GISEL-NEXT: s_ashr_i32 s10, s9, 31
+; GFX8GISEL-NEXT: s_mul_i32 s8, s2, s9
+; GFX8GISEL-NEXT: s_mul_i32 s2, s2, s10
+; GFX8GISEL-NEXT: v_readfirstlane_b32 s10, v0
+; GFX8GISEL-NEXT: s_mul_i32 s3, s3, s9
+; GFX8GISEL-NEXT: s_add_u32 s3, s10, s3
+; GFX8GISEL-NEXT: s_add_u32 s9, s3, s2
; GFX8GISEL-NEXT: .LBB11_2: ; %Flow
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8GISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9]
-; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s6
-; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX8GISEL-NEXT: s_or_saveexec_b64 s[2:3], s[6:7]
+; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s8
+; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s9
; GFX8GISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
; GFX8GISEL-NEXT: s_cbranch_execz .LBB11_4
; GFX8GISEL-NEXT: ; %bb.3: ; %if
; GFX8GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], exec
; GFX8GISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
-; GFX8GISEL-NEXT: s_sub_i32 s7, 0, s6
-; GFX8GISEL-NEXT: s_ashr_i32 s6, s7, 31
-; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8GISEL-NEXT: s_mul_i32 s8, s4, s6
-; GFX8GISEL-NEXT: s_mul_i32 s6, s4, s7
-; GFX8GISEL-NEXT: s_mul_hi_u32 s4, s4, s7
-; GFX8GISEL-NEXT: s_mul_i32 s5, s5, s7
-; GFX8GISEL-NEXT: s_add_u32 s4, s4, s5
-; GFX8GISEL-NEXT: s_add_u32 s7, s4, s8
+; GFX8GISEL-NEXT: s_sub_i32 s6, 0, s6
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s6
-; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX8GISEL-NEXT: v_mul_hi_u32 v0, s4, v0
+; GFX8GISEL-NEXT: s_ashr_i32 s7, s6, 31
+; GFX8GISEL-NEXT: s_mul_i32 s5, s5, s6
+; GFX8GISEL-NEXT: s_mul_i32 s7, s4, s7
+; GFX8GISEL-NEXT: v_readfirstlane_b32 s8, v0
+; GFX8GISEL-NEXT: s_add_u32 s5, s8, s5
+; GFX8GISEL-NEXT: s_mul_i32 s4, s4, s6
+; GFX8GISEL-NEXT: s_add_u32 s5, s5, s7
+; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s5
; GFX8GISEL-NEXT: .LBB11_4: ; %endif
; GFX8GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
index 4d5bd7c29417a..1684aa599344d 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,30 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
@@ -182,6 +208,52 @@ entry:
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_max_u32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_max_u32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -450,6 +522,28 @@ entry:
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -562,6 +656,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -805,6 +939,28 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -917,6 +1073,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1250,6 +1446,62 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_gt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_gt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2186,6 +2438,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2519,6 +2811,78 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_max_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -2984,6 +3348,32 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -3090,6 +3480,28 @@ entry:
}
define amdgpu_kernel void @const_value_i64(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: const_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: const_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: const_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -3192,6 +3604,14 @@ entry:
}
define amdgpu_kernel void @poison_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: poison_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: poison_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: poison_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_endpgm
@@ -3244,6 +3664,62 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB12_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_gt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB12_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB12_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_gt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB12_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3530,6 +4006,50 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
index e787784a656ee..29d45ce160a71 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,30 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s6, 0xffff
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
@@ -170,6 +196,52 @@ entry:
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s10, -1
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_min_u32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s10, -1
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_min_u32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -438,6 +510,28 @@ entry:
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -550,6 +644,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -793,6 +927,28 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -905,6 +1061,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1238,6 +1434,62 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_lt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_lt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2174,6 +2426,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2507,6 +2799,78 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s2, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_min_u32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -2972,6 +3336,32 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -3078,6 +3468,62 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX6DAGISEL-NEXT: v_cmp_lt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX6DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX6DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s16, s[10:11]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v4, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v5, s9
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s16
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s16
+; GFX7DAGISEL-NEXT: v_cmp_lt_u64_e32 vcc, s[12:13], v[4:5]
+; GFX7DAGISEL-NEXT: s_and_b64 s[14:15], vcc, s[10:11]
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s16
+; GFX7DAGISEL-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3364,6 +3810,50 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s2
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s3
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %if
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: ; %bb.2: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
index 84bb41ad62c57..77d89e18dbadd 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
@@ -1,4 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -global-isel=0 < %s | FileCheck -check-prefixes=GFX6DAGISEL %s
+; RUN: llc -mtriple=amdgcn -mcpu=kaveri -global-isel=0 < %s | FileCheck -check-prefixes=GFX7DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 < %s | FileCheck -check-prefixes=GFX8DAGISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 < %s | FileCheck -check-prefixes=GFX8GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=0 < %s | FileCheck -check-prefixes=GFX9DAGISEL %s
@@ -17,6 +19,38 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -global-isel=1 < %s | FileCheck -check-prefixes=GFX1132GISEL,GFX1132GISEL-TRUE16 %s
define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: uniform_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_and_b32 s6, s6, 0xffff
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_and_b32 s6, s6, 0xffff
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -256,6 +290,52 @@ define amdgpu_kernel void @uniform_value_i16(ptr addrspace(1) %out, i16 %in) {
}
define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
+; GFX6DAGISEL-LABEL: divergent_value_i16:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX6DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX6DAGISEL-NEXT: s_xor_b32 s10, s10, s12
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX6DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i16:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s10, s6
+; GFX7DAGISEL-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s11, s[8:9]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s11
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[8:9], s11
+; GFX7DAGISEL-NEXT: s_xor_b32 s10, s10, s12
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[8:9], s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB1_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s10
+; GFX7DAGISEL-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i16:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -524,6 +604,36 @@ define void @divergent_value_i16(ptr addrspace(1) %out, i16 %in) {
}
define amdgpu_kernel void @uniform_value(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -712,6 +822,46 @@ entry:
}
define amdgpu_kernel void @divergent_value(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -955,6 +1105,36 @@ entry:
}
define amdgpu_kernel void @uniform_value_dpp(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s6, s4
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dword s6, s[4:5], 0x2c
@@ -1143,6 +1323,46 @@ entry:
}
define amdgpu_kernel void @divergent_value_dpp(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB5_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB5_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -1476,6 +1696,54 @@ entry:
}
define void @divergent_value_dpp_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX6DAGISEL-NEXT: s_xor_b64 s[8:9], s[8:9], s[12:13]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_dpp_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB6_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX7DAGISEL-NEXT: s_xor_b64 s[8:9], s[8:9], s[12:13]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB6_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_dpp_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2328,6 +2596,46 @@ entry:
}
define amdgpu_kernel void @default_stratergy(ptr addrspace(1) %out) #0 {
+; GFX6DAGISEL-LABEL: default_stratergy:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX6DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: default_stratergy:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB7_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[4:5]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[4:5], s7
+; GFX7DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[4:5], s[4:5]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB7_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: default_stratergy:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -2661,6 +2969,88 @@ entry:
}
define amdgpu_kernel void @divergent_cfg(ptr addrspace(1) %out, i32 %in) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_2
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX6DAGISEL-NEXT: s_and_b32 s2, s2, 1
+; GFX6DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mul_i32 s2, s6, s2
+; GFX6DAGISEL-NEXT: .LBB8_2: ; %Flow
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX6DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX6DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX6DAGISEL-NEXT: ; %bb.5:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX6DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr2
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_2
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_load_dword s6, s[4:5], 0xb
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX7DAGISEL-NEXT: s_and_b32 s2, s2, 1
+; GFX7DAGISEL-NEXT: ; implicit-def: $vgpr0
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mul_i32 s2, s6, s2
+; GFX7DAGISEL-NEXT: .LBB8_2: ; %Flow
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[0:1], s[0:1]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s2
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB8_6
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[2:3], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: .LBB8_4: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s7, s[2:3]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s8, v0, s7
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[2:3], s7
+; GFX7DAGISEL-NEXT: s_xor_b32 s6, s6, s8
+; GFX7DAGISEL-NEXT: s_or_b64 s[8:9], s[2:3], s[2:3]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB8_4
+; GFX7DAGISEL-NEXT: ; %bb.5:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s6
+; GFX7DAGISEL-NEXT: .LBB8_6: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v1, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
@@ -3178,6 +3568,42 @@ endif:
}
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) #0 {
+; GFX6DAGISEL-LABEL: uniform_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s0, s[8:9]
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX6DAGISEL-NEXT: s_and_b32 s1, s0, 1
+; GFX6DAGISEL-NEXT: s_mul_i32 s0, s2, s1
+; GFX6DAGISEL-NEXT: s_mul_i32 s1, s3, s1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: uniform_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], exec
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, -1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s0
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s0, s[8:9]
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s1
+; GFX7DAGISEL-NEXT: s_and_b32 s1, s0, 1
+; GFX7DAGISEL-NEXT: s_mul_i32 s0, s2, s1
+; GFX7DAGISEL-NEXT: s_mul_i32 s1, s3, s1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: uniform_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -3369,6 +3795,54 @@ entry:
}
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) #0 {
+; GFX6DAGISEL-LABEL: divergent_value_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX6DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX6DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX6DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX6DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX6DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX6DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX6DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX6DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX6DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX6DAGISEL-NEXT: s_xor_b64 s[8:9], s[8:9], s[12:13]
+; GFX6DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX6DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX6DAGISEL-NEXT: ; %bb.2:
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX6DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0)
+; GFX6DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7DAGISEL-LABEL: divergent_value_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mov_b32 s6, 0
+; GFX7DAGISEL-NEXT: s_mov_b32 s7, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s4, s6
+; GFX7DAGISEL-NEXT: s_mov_b32 s5, s6
+; GFX7DAGISEL-NEXT: s_mov_b64 s[8:9], 0
+; GFX7DAGISEL-NEXT: s_mov_b64 s[10:11], exec
+; GFX7DAGISEL-NEXT: .LBB10_1: ; =>This Inner Loop Header: Depth=1
+; GFX7DAGISEL-NEXT: s_ff1_i32_b64 s14, s[10:11]
+; GFX7DAGISEL-NEXT: v_readlane_b32 s12, v2, s14
+; GFX7DAGISEL-NEXT: v_readlane_b32 s13, v3, s14
+; GFX7DAGISEL-NEXT: s_bitset0_b64 s[10:11], s14
+; GFX7DAGISEL-NEXT: s_xor_b64 s[8:9], s[8:9], s[12:13]
+; GFX7DAGISEL-NEXT: s_or_b64 s[12:13], s[10:11], s[10:11]
+; GFX7DAGISEL-NEXT: s_cbranch_scc1 .LBB10_1
+; GFX7DAGISEL-NEXT: ; %bb.2:
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v2, s8
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v3, s9
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
+; GFX7DAGISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7DAGISEL-NEXT: s_setpc_b64 s[30:31]
+;
; GFX8DAGISEL-LABEL: divergent_value_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3609,6 +4083,80 @@ entry:
}
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) #0 {
+; GFX6DAGISEL-LABEL: divergent_cfg_i64:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX6DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX6DAGISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
+; GFX6DAGISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
+; GFX6DAGISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
+; GFX6DAGISEL-NEXT: s_cbranch_execz .LBB11_2
+; GFX6DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX6DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX6DAGISEL-NEXT: s_and_b32 s7, s6, 1
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_mul_i32 s6, s2, s7
+; GFX6DAGISEL-NEXT: s_mul_i32 s7, s3, s7
+; GFX6DAGISEL-NEXT: .LBB11_2: ; %Flow
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9]
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX6DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
+; GFX6DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX6DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX6DAGISEL-NEXT: s_and_b32 s6, s6, 1
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s4, s6
+; GFX6DAGISEL-NEXT: s_mul_i32 s5, s5, s6
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX6DAGISEL-NEXT: ; %bb.4: ; %endif
+; GFX6DAGISEL-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: divergent_cfg_i64:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
+; GFX7DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
+; GFX7DAGISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
+; GFX7DAGISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
+; GFX7DAGISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
+; GFX7DAGISEL-NEXT: s_cbranch_execz .LBB11_2
+; GFX7DAGISEL-NEXT: ; %bb.1: ; %else
+; GFX7DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX7DAGISEL-NEXT: s_and_b32 s7, s6, 1
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_mul_i32 s6, s2, s7
+; GFX7DAGISEL-NEXT: s_mul_i32 s7, s3, s7
+; GFX7DAGISEL-NEXT: .LBB11_2: ; %Flow
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: s_or_saveexec_b64 s[2:3], s[8:9]
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s6
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s7
+; GFX7DAGISEL-NEXT: s_xor_b64 exec, exec, s[2:3]
+; GFX7DAGISEL-NEXT: ; %bb.3: ; %if
+; GFX7DAGISEL-NEXT: s_mov_b64 s[6:7], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s6, s[6:7]
+; GFX7DAGISEL-NEXT: s_and_b32 s6, s6, 1
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s4, s6
+; GFX7DAGISEL-NEXT: s_mul_i32 s5, s5, s6
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v1, s5
+; GFX7DAGISEL-NEXT: ; %bb.4: ; %endif
+; GFX7DAGISEL-NEXT: s_or_b64 exec, exec, s[2:3]
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -4094,6 +4642,34 @@ endif:
}
define amdgpu_kernel void @constant_value(ptr addrspace(1) %out) {
+; GFX6DAGISEL-LABEL: constant_value:
+; GFX6DAGISEL: ; %bb.0: ; %entry
+; GFX6DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX6DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX6DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX6DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX6DAGISEL-NEXT: s_mul_i32 s4, s4, 30
+; GFX6DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX6DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX6DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX6DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX6DAGISEL-NEXT: s_endpgm
+;
+; GFX7DAGISEL-LABEL: constant_value:
+; GFX7DAGISEL: ; %bb.0: ; %entry
+; GFX7DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
+; GFX7DAGISEL-NEXT: s_mov_b64 s[4:5], exec
+; GFX7DAGISEL-NEXT: s_bcnt1_i32_b64 s4, s[4:5]
+; GFX7DAGISEL-NEXT: s_and_b32 s4, s4, 1
+; GFX7DAGISEL-NEXT: s_mul_i32 s4, s4, 30
+; GFX7DAGISEL-NEXT: s_mov_b32 s3, 0xf000
+; GFX7DAGISEL-NEXT: s_mov_b32 s2, -1
+; GFX7DAGISEL-NEXT: v_mov_b32_e32 v0, s4
+; GFX7DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
+; GFX7DAGISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
+; GFX7DAGISEL-NEXT: s_endpgm
+;
; GFX8DAGISEL-LABEL: constant_value:
; GFX8DAGISEL: ; %bb.0: ; %entry
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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