[llvm] [LV] Reduce register pressure of RISC-V outer loop reduction. (PR #208621)

[Luke Lau via llvm-commits]

lukel97 wrote:

> Does this mean vp.merge doesn't need to calculate cost in this situation? If so, we might as well combine the in-loop operation and vp.merge into a new VPExpressionRecipe. This way, we could fix both the cost and register pressure issues at the same time.

Do we need a new TTI hook if we add a VPExpressionRecipe type? Or would we just always assume that a vp.merge will be free and folded in? Although RISC-V is the only target that will emit vp.merge, it being folded away is a target specific assumption.

https://github.com/llvm/llvm-project/pull/208621