[llvm] [AMDGPU] Run early-cse<memssa> at the end of the full-LTO pipeline (PR #208461)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 9 07:09:23 PDT 2026
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@@ -1111,6 +1111,17 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
PB.registerFullLinkTimeOptimizationLastEPCallback(
[this](ModulePassManager &PM, OptimizationLevel Level) {
+ // The regular (non-LTO) and ThinLTO function simplification pipelines
+ // run early-cse with MemorySSA near the start of the function pass
+ // sequence, but the full-LTO postlink pipeline does not. Without it a
+ // redundant load/store round-trip can survive to codegen (the later
+ // GVN/DSE do not catch this pattern), which costs extra hazard s_nop
+ // padding in some kernels. Run it here, at the end of the full-LTO
+ // middle-end, before codegen.
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michaelselehov wrote:
Sure. Already been doing that. Sorry for the late notice :)
https://github.com/llvm/llvm-project/pull/208461
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