[llvm] [AMDGPU] Fix crash on strict fptrunc to bf16 (PR #208037)
Arseniy Obolenskiy via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 9 06:30:32 PDT 2026
================
@@ -0,0 +1,69 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck --check-prefixes=GFX950 %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 < %s | FileCheck --check-prefixes=GFX1250 %s
+
+define amdgpu_ps void @strict_fptrunc_f32_to_bf16(float %a, ptr %out) #0 {
+; GFX950-LABEL: strict_fptrunc_f32_to_bf16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: v_mov_b32_e32 v3, v2
+; GFX950-NEXT: v_mov_b32_e32 v2, v1
+; GFX950-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
+; GFX950-NEXT: flat_store_short v[2:3], v0
+; GFX950-NEXT: s_endpgm
+;
+; GFX1250-LABEL: strict_fptrunc_f32_to_bf16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v2, v1
+; GFX1250-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
+; GFX1250-NEXT: flat_store_b16 v[2:3], v0
+; GFX1250-NEXT: s_endpgm
+ %cvt = call bfloat @llvm.experimental.constrained.fptrunc.bf16.f32(float %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
+ store bfloat %cvt, ptr %out
+ ret void
+}
+
+define amdgpu_ps void @strict_fptrunc_f64_to_bf16(double %a, ptr %out) #0 {
+; GFX950-LABEL: strict_fptrunc_f64_to_bf16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: v_cvt_f32_f64_e32 v6, v[0:1]
+; GFX950-NEXT: v_cvt_f64_f32_e32 v[4:5], v6
+; GFX950-NEXT: v_and_b32_e32 v7, 1, v6
+; GFX950-NEXT: v_cmp_gt_f64_e64 s[2:3], |v[0:1]|, |v[4:5]|
+; GFX950-NEXT: v_cmp_nlg_f64_e32 vcc, v[0:1], v[4:5]
+; GFX950-NEXT: v_cmp_eq_u32_e64 s[0:1], 1, v7
+; GFX950-NEXT: v_cndmask_b32_e64 v0, -1, 1, s[2:3]
+; GFX950-NEXT: v_add_u32_e32 v0, v6, v0
+; GFX950-NEXT: s_or_b64 vcc, vcc, s[0:1]
+; GFX950-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc
+; GFX950-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
+; GFX950-NEXT: flat_store_short v[2:3], v0
+; GFX950-NEXT: s_endpgm
+;
+; GFX1250-LABEL: strict_fptrunc_f64_to_bf16:
+; GFX1250: ; %bb.0:
+; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-NEXT: v_cvt_f32_f64_e32 v6, v[0:1]
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-NEXT: v_cvt_f64_f32_e32 v[4:5], v6
+; GFX1250-NEXT: v_cmp_gt_f64_e64 s0, |v[0:1]|, |v[4:5]|
+; GFX1250-NEXT: v_cmp_nlg_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1250-NEXT: v_cndmask_b32_e64 v0, -1, 1, s0
+; GFX1250-NEXT: v_dual_add_nc_u32 v0, v6, v0 :: v_dual_bitop2_b32 v7, 1, v6 bitop3:0x40
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
+; GFX1250-NEXT: v_cmp_eq_u32_e64 s0, 1, v7
+; GFX1250-NEXT: s_or_b32 vcc_lo, vcc_lo, s0
+; GFX1250-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo
+; GFX1250-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0
+; GFX1250-NEXT: flat_store_b16 v[2:3], v0
+; GFX1250-NEXT: s_endpgm
+ %cvt = call bfloat @llvm.experimental.constrained.fptrunc.bf16.f64(double %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
+ store bfloat %cvt, ptr %out
+ ret void
+}
+
----------------
aobolensk wrote:
Added, they work where bf16 is available
https://github.com/llvm/llvm-project/pull/208037
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