[llvm] [AArch64][InstCombine] Fold zext of all-active SVE cmpne-zero (PR #207720)

[Paul Walker via llvm-commits]

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@@ -2173,13 +2173,44 @@ static std::optional<Instruction *> instCombineXorSVECmpNE(InstCombiner &IC,
   return &II;
 }
 
+// zext(cmpne(ptrue, %v, 0))
+// -> umin(ptrue, %v, 1)
+static std::optional<Instruction *> instCombineZExtSVECmpNE(InstCombiner &IC,
+                                                            IntrinsicInst &II) {
+  if (!isAllActivePredicate(II.getOperand(0)) || !II.hasOneUse())
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paulwalker-arm wrote:

Up to you but perhaps there's no need to restrict on use count. The `umin` and `zext` operations typically have the same latency so overall the cycle counts will be the same, but the latency of the zero extended chain will alway be reduced.

https://github.com/llvm/llvm-project/pull/207720