[llvm] [AMDGPU][GlobalISel] Select s16 G_MERGE_VALUES into wider scalars (PR #207999)
Keshav Vinayak Jha via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 9 02:47:34 PDT 2026
https://github.com/keshavvinayak01 updated https://github.com/llvm/llvm-project/pull/207999
>From 9e45c99985518ef807bdc4d9e0acc662f03c08ff Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Tue, 7 Jul 2026 13:27:17 +0000
Subject: [PATCH 1/3] [AMDGPU][GlobalISel] Don't legalize scalar s16
merge/unmerge into wider scalars with true16
Co-Authored-By: Claude Opus 4.8 <noreply at anthropic.com>
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 11 +-
.../GlobalISel/legalize-merge-values.mir | 577 ++++++++++++++++++
2 files changed, 587 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index c57ef9392a4ca..ef7f85beb9718 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2114,7 +2114,16 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
auto &Builder =
getActionDefinitionsBuilder(Op)
- .legalIf(all(isRegisterType(ST, 0), isRegisterType(ST, 1)))
+ .legalIf(all(isRegisterType(ST, 0), isRegisterType(ST, 1),
+ LegalityPredicate([=](const LegalityQuery &Query) {
+ const LLT BigTy = Query.Types[BigTyIdx];
+ const LLT LitTy = Query.Types[LitTyIdx];
+ // Merging true s16 scalars into (or splitting from)
+ // a scalar wider than 32 bits is not selectable, so
+ // leave it to be widened to s32 pieces.
+ return !(LitTy == S16 && !BigTy.isVector() &&
+ BigTy.getSizeInBits() > 32);
+ })))
.lowerFor({{S16, V2S16}})
.lowerIf([=](const LegalityQuery &Query) {
const LLT BigTy = Query.Types[BigTyIdx];
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
index f19fe840d7ae5..7bf28ed704747 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
@@ -1,6 +1,7 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -pass-remarks-missed='gisel*' -o - %s 2> %t | FileCheck %s
# FileCheck -check-prefix=ERR %s < %t
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1150 -O0 -run-pass=legalizer -o - %s | FileCheck -check-prefix=GFX11 %s
# ERR-NOT: remark:
# ERR: remark: <unknown>:0:0: unable to legalize instruction: %197:_(s136) = G_INSERT %209:_, %206:_(s8), 128 (in function: test_merge_s68_s17_s17_s17_s17)
@@ -64,6 +65,48 @@ body: |
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](p1)
+ ;
+ ; GFX11-LABEL: name: test_merge_p1_s8
+ ; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
+ ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
+ ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
+ ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
+ ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
+ ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
+ ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
+ ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]
+ ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
+ ; GFX11-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C]]
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C1]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]]
+ ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
+ ; GFX11-NEXT: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C]]
+ ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
+ ; GFX11-NEXT: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C]]
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C1]](s16)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]]
+ ; GFX11-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)
+ ; GFX11-NEXT: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C]]
+ ; GFX11-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)
+ ; GFX11-NEXT: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C]]
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C1]](s16)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]]
+ ; GFX11-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)
+ ; GFX11-NEXT: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C]]
+ ; GFX11-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)
+ ; GFX11-NEXT: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C]]
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C1]](s16)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
+ ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
+ ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
+ ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](p1)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
@@ -98,6 +141,15 @@ body: |
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C1]], [[TRUNC]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16)
; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
+ ;
+ ; GFX11-LABEL: name: test_merge_s16_s8_s8
+ ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16)
+ ; GFX11-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s16) = G_MERGE_VALUES %0, %1
@@ -130,6 +182,22 @@ body: |
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]]
; CHECK-NEXT: $vgpr0 = COPY [[OR2]](s32)
+ ;
+ ; GFX11-LABEL: name: test_merge_s24_s8_s8_s8
+ ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+ ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
+ ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C4]]
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
+ ; GFX11-NEXT: $vgpr0 = COPY [[MV]](s32)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -157,6 +225,22 @@ body: |
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[C6]](s32)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
; CHECK-NEXT: $vgpr0 = COPY [[OR2]](s32)
+ ;
+ ; GFX11-LABEL: name: test_merge_s32_s8_s8_s8_s8
+ ; GFX11: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C4]](s32)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C5]](s32)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[C6]](s32)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
+ ; GFX11-NEXT: $vgpr0 = COPY [[OR2]](s32)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -177,6 +261,14 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; CHECK-NEXT: $vgpr1_vgpr2 = COPY [[MV]](s64)
+ ;
+ ; GFX11-LABEL: name: test_merge_s64_s32_s32
+ ; GFX11: liveins: $vgpr0, $vgpr1
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
+ ; GFX11-NEXT: $vgpr1_vgpr2 = COPY [[MV]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s64) = G_MERGE_VALUES %0, %1
@@ -207,6 +299,22 @@ body: |
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32)
; CHECK-NEXT: $vgpr1_vgpr2 = COPY [[MV]](s64)
+ ;
+ ; GFX11-LABEL: name: test_merge_s64_s16_s16_s16_s16
+ ; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
+ ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
+ ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
+ ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
+ ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16)
+ ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC2]](s16), [[TRUNC3]](s16)
+ ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
+ ; GFX11-NEXT: $vgpr1_vgpr2 = COPY [[MV2]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
@@ -268,6 +376,38 @@ body: |
; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL6]]
; CHECK-NEXT: [[TRUNC6:%[0-9]+]]:_(s24) = G_TRUNC [[OR6]](s32)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC6]](s24)
+ ;
+ ; GFX11-LABEL: name: test_merge_s24_s4_s4_s4_s4_s4_s4
+ ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+ ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C3]], [[C4]](s16)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[OR]], [[SHL1]]
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 12
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C5]], [[C6]](s16)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[OR1]], [[SHL2]]
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[C2]](s16)
+ ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C7]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[COPY]], [[SHL3]]
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
+ ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 15
+ ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C8]]
+ ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C4]](s16)
+ ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s16) = G_OR [[OR3]], [[SHL4]]
+ ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
+ ; GFX11-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C8]]
+ ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C6]](s16)
+ ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s16) = G_OR [[OR4]], [[SHL5]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR5]](s16)
+ ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s24) = G_TRUNC [[MV]](s32)
+ ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC2]](s24)
%0:_(s4) = G_CONSTANT i4 0
%1:_(s4) = G_CONSTANT i4 1
%2:_(s4) = G_CONSTANT i4 2
@@ -326,6 +466,37 @@ body: |
; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL6]]
; CHECK-NEXT: [[TRUNC6:%[0-9]+]]:_(s28) = G_TRUNC [[OR6]](s32)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC6]](s28)
+ ;
+ ; GFX11-LABEL: name: test_merge_s28_s4_s4_s4_s4_s4_s4_s4
+ ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+ ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C3]], [[C4]](s16)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[OR]], [[SHL1]]
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 12
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C5]], [[C6]](s16)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[OR1]], [[SHL2]]
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[C2]](s16)
+ ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C7]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[COPY]], [[SHL3]]
+ ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
+ ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[C8]], [[C4]](s16)
+ ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s16) = G_OR [[OR3]], [[SHL4]]
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
+ ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s16) = G_CONSTANT i16 15
+ ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C9]]
+ ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C6]](s16)
+ ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s16) = G_OR [[OR4]], [[SHL5]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR5]](s16)
+ ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s28) = G_TRUNC [[MV]](s32)
+ ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC1]](s28)
%0:_(s4) = G_CONSTANT i4 0
%1:_(s4) = G_CONSTANT i4 1
%2:_(s4) = G_CONSTANT i4 2
@@ -371,6 +542,37 @@ body: |
; CHECK-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C7]], [[C13]](s32)
; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[OR5]], [[SHL6]]
; CHECK-NEXT: S_NOP 0, implicit [[OR6]](s32)
+ ;
+ ; GFX11-LABEL: name: test_merge_s32_s4_s4_s4_s4_s4_s4_s4_s4
+ ; GFX11: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
+ ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C4]](s32)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C8]](s32)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
+ ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[C9]](s32)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
+ ; GFX11-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C4]], [[C10]](s32)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[OR2]], [[SHL3]]
+ ; GFX11-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
+ ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[C5]], [[C11]](s32)
+ ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]]
+ ; GFX11-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[C6]], [[C12]](s32)
+ ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]]
+ ; GFX11-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
+ ; GFX11-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C7]], [[C13]](s32)
+ ; GFX11-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[OR5]], [[SHL6]]
+ ; GFX11-NEXT: S_NOP 0, implicit [[OR6]](s32)
%0:_(s4) = G_CONSTANT i4 0
%1:_(s4) = G_CONSTANT i4 1
%2:_(s4) = G_CONSTANT i4 2
@@ -423,6 +625,29 @@ body: |
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)
+ ;
+ ; GFX11-LABEL: name: test_merge_s64_s8_s8_s8_s8_s8_s8_s8_s8
+ ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C4]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C6]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[C5]], [[SHL2]]
+ ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
+ ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 7
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C8]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[C7]], [[SHL3]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
+ ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
+ ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
+ ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -493,6 +718,38 @@ body: |
; CHECK-NEXT: [[OR8:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL8]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR6]](s32), [[OR7]](s32), [[OR8]](s32)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
+ ;
+ ; GFX11-LABEL: name: test_merge_s96_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8
+ ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C4]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C6]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[C5]], [[SHL2]]
+ ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
+ ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 7
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C8]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[C7]], [[SHL3]]
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[C2]](s16)
+ ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s16) = G_CONSTANT i16 9
+ ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[C9]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s16) = G_OR [[COPY]], [[SHL4]]
+ ; GFX11-NEXT: [[C10:%[0-9]+]]:_(s16) = G_CONSTANT i16 10
+ ; GFX11-NEXT: [[C11:%[0-9]+]]:_(s16) = G_CONSTANT i16 11
+ ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s16) = G_SHL [[C11]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s16) = G_OR [[C10]], [[SHL5]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
+ ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
+ ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR4]](s16), [[OR5]](s16)
+ ; GFX11-NEXT: [[MV3:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32), [[MV2]](s32)
+ ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV3]](s96)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -530,6 +787,19 @@ body: |
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[C5]], [[SHL2]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32), [[OR2]](s32)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
+ ;
+ ; GFX11-LABEL: name: test_merge_s96_s16_s16_s16_s16_s16_s16
+ ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[C]](s16), [[C1]](s16)
+ ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[C2]](s16), [[C3]](s16)
+ ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[C4]](s16), [[C5]](s16)
+ ; GFX11-NEXT: [[MV3:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32), [[MV2]](s32)
+ ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV3]](s96)
%0:_(s16) = G_CONSTANT i16 0
%1:_(s16) = G_CONSTANT i16 1
%2:_(s16) = G_CONSTANT i16 2
@@ -583,6 +853,33 @@ body: |
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)
; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(s56) = G_TRUNC [[MV]](s64)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC4]](s56)
+ ;
+ ; GFX11-LABEL: name: test_merge_s56_s8_s8_s8_s8_s8_s8_s8
+ ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+ ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C4]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C6]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[C5]], [[SHL2]]
+ ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
+ ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
+ ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C8]]
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C2]](s16)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[C7]], [[SHL3]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
+ ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
+ ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
+ ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s56) = G_TRUNC [[MV2]](s64)
+ ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC1]](s56)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -822,6 +1119,231 @@ body: |
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR30]](s32), [[OR61]](s32), [[OR92]](s32)
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s68) = G_TRUNC [[MV]](s96)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC]](s68)
+ ;
+ ; GFX11-LABEL: name: test_merge_s68_s17_s17_s17_s17
+ ; GFX11: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+ ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+ ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)
+ ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
+ ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C2]](s32)
+ ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
+ ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C3]](s32)
+ ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
+ ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
+ ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C4]](s32)
+ ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[OR2]], [[SHL3]]
+ ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
+ ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C5]](s32)
+ ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]]
+ ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
+ ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C6]](s32)
+ ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]]
+ ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
+ ; GFX11-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C7]](s32)
+ ; GFX11-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[OR5]], [[SHL6]]
+ ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
+ ; GFX11-NEXT: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C8]](s32)
+ ; GFX11-NEXT: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]]
+ ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 9
+ ; GFX11-NEXT: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C9]](s32)
+ ; GFX11-NEXT: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]]
+ ; GFX11-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
+ ; GFX11-NEXT: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C10]](s32)
+ ; GFX11-NEXT: [[OR9:%[0-9]+]]:_(s32) = G_OR [[OR8]], [[SHL9]]
+ ; GFX11-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
+ ; GFX11-NEXT: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C11]](s32)
+ ; GFX11-NEXT: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]]
+ ; GFX11-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
+ ; GFX11-NEXT: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C12]](s32)
+ ; GFX11-NEXT: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]]
+ ; GFX11-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 13
+ ; GFX11-NEXT: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C13]](s32)
+ ; GFX11-NEXT: [[OR12:%[0-9]+]]:_(s32) = G_OR [[OR11]], [[SHL12]]
+ ; GFX11-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 14
+ ; GFX11-NEXT: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C14]](s32)
+ ; GFX11-NEXT: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]]
+ ; GFX11-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 15
+ ; GFX11-NEXT: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C15]](s32)
+ ; GFX11-NEXT: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]]
+ ; GFX11-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; GFX11-NEXT: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C16]](s32)
+ ; GFX11-NEXT: [[OR15:%[0-9]+]]:_(s32) = G_OR [[OR14]], [[SHL15]]
+ ; GFX11-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
+ ; GFX11-NEXT: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C17]](s32)
+ ; GFX11-NEXT: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]]
+ ; GFX11-NEXT: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 18
+ ; GFX11-NEXT: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C18]](s32)
+ ; GFX11-NEXT: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]]
+ ; GFX11-NEXT: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 19
+ ; GFX11-NEXT: [[SHL18:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C19]](s32)
+ ; GFX11-NEXT: [[OR18:%[0-9]+]]:_(s32) = G_OR [[OR17]], [[SHL18]]
+ ; GFX11-NEXT: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
+ ; GFX11-NEXT: [[SHL19:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C20]](s32)
+ ; GFX11-NEXT: [[OR19:%[0-9]+]]:_(s32) = G_OR [[OR18]], [[SHL19]]
+ ; GFX11-NEXT: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 21
+ ; GFX11-NEXT: [[SHL20:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C21]](s32)
+ ; GFX11-NEXT: [[OR20:%[0-9]+]]:_(s32) = G_OR [[OR19]], [[SHL20]]
+ ; GFX11-NEXT: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 22
+ ; GFX11-NEXT: [[SHL21:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C22]](s32)
+ ; GFX11-NEXT: [[OR21:%[0-9]+]]:_(s32) = G_OR [[OR20]], [[SHL21]]
+ ; GFX11-NEXT: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 23
+ ; GFX11-NEXT: [[SHL22:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C23]](s32)
+ ; GFX11-NEXT: [[OR22:%[0-9]+]]:_(s32) = G_OR [[OR21]], [[SHL22]]
+ ; GFX11-NEXT: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; GFX11-NEXT: [[SHL23:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C24]](s32)
+ ; GFX11-NEXT: [[OR23:%[0-9]+]]:_(s32) = G_OR [[OR22]], [[SHL23]]
+ ; GFX11-NEXT: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
+ ; GFX11-NEXT: [[SHL24:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C25]](s32)
+ ; GFX11-NEXT: [[OR24:%[0-9]+]]:_(s32) = G_OR [[OR23]], [[SHL24]]
+ ; GFX11-NEXT: [[C26:%[0-9]+]]:_(s32) = G_CONSTANT i32 26
+ ; GFX11-NEXT: [[SHL25:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C26]](s32)
+ ; GFX11-NEXT: [[OR25:%[0-9]+]]:_(s32) = G_OR [[OR24]], [[SHL25]]
+ ; GFX11-NEXT: [[C27:%[0-9]+]]:_(s32) = G_CONSTANT i32 27
+ ; GFX11-NEXT: [[SHL26:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C27]](s32)
+ ; GFX11-NEXT: [[OR26:%[0-9]+]]:_(s32) = G_OR [[OR25]], [[SHL26]]
+ ; GFX11-NEXT: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
+ ; GFX11-NEXT: [[SHL27:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C28]](s32)
+ ; GFX11-NEXT: [[OR27:%[0-9]+]]:_(s32) = G_OR [[OR26]], [[SHL27]]
+ ; GFX11-NEXT: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
+ ; GFX11-NEXT: [[SHL28:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C29]](s32)
+ ; GFX11-NEXT: [[OR28:%[0-9]+]]:_(s32) = G_OR [[OR27]], [[SHL28]]
+ ; GFX11-NEXT: [[C30:%[0-9]+]]:_(s32) = G_CONSTANT i32 30
+ ; GFX11-NEXT: [[SHL29:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C30]](s32)
+ ; GFX11-NEXT: [[OR29:%[0-9]+]]:_(s32) = G_OR [[OR28]], [[SHL29]]
+ ; GFX11-NEXT: [[C31:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
+ ; GFX11-NEXT: [[SHL30:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C31]](s32)
+ ; GFX11-NEXT: [[OR30:%[0-9]+]]:_(s32) = G_OR [[OR29]], [[SHL30]]
+ ; GFX11-NEXT: [[SHL31:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)
+ ; GFX11-NEXT: [[OR31:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL31]]
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
+ ; GFX11-NEXT: [[SHL32:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C2]](s32)
+ ; GFX11-NEXT: [[OR32:%[0-9]+]]:_(s32) = G_OR [[OR31]], [[SHL32]]
+ ; GFX11-NEXT: [[SHL33:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C3]](s32)
+ ; GFX11-NEXT: [[OR33:%[0-9]+]]:_(s32) = G_OR [[OR32]], [[SHL33]]
+ ; GFX11-NEXT: [[SHL34:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C4]](s32)
+ ; GFX11-NEXT: [[OR34:%[0-9]+]]:_(s32) = G_OR [[OR33]], [[SHL34]]
+ ; GFX11-NEXT: [[SHL35:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C5]](s32)
+ ; GFX11-NEXT: [[OR35:%[0-9]+]]:_(s32) = G_OR [[OR34]], [[SHL35]]
+ ; GFX11-NEXT: [[SHL36:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C6]](s32)
+ ; GFX11-NEXT: [[OR36:%[0-9]+]]:_(s32) = G_OR [[OR35]], [[SHL36]]
+ ; GFX11-NEXT: [[SHL37:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C7]](s32)
+ ; GFX11-NEXT: [[OR37:%[0-9]+]]:_(s32) = G_OR [[OR36]], [[SHL37]]
+ ; GFX11-NEXT: [[SHL38:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C8]](s32)
+ ; GFX11-NEXT: [[OR38:%[0-9]+]]:_(s32) = G_OR [[OR37]], [[SHL38]]
+ ; GFX11-NEXT: [[SHL39:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C9]](s32)
+ ; GFX11-NEXT: [[OR39:%[0-9]+]]:_(s32) = G_OR [[OR38]], [[SHL39]]
+ ; GFX11-NEXT: [[SHL40:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C10]](s32)
+ ; GFX11-NEXT: [[OR40:%[0-9]+]]:_(s32) = G_OR [[OR39]], [[SHL40]]
+ ; GFX11-NEXT: [[SHL41:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C11]](s32)
+ ; GFX11-NEXT: [[OR41:%[0-9]+]]:_(s32) = G_OR [[OR40]], [[SHL41]]
+ ; GFX11-NEXT: [[SHL42:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C12]](s32)
+ ; GFX11-NEXT: [[OR42:%[0-9]+]]:_(s32) = G_OR [[OR41]], [[SHL42]]
+ ; GFX11-NEXT: [[SHL43:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C13]](s32)
+ ; GFX11-NEXT: [[OR43:%[0-9]+]]:_(s32) = G_OR [[OR42]], [[SHL43]]
+ ; GFX11-NEXT: [[SHL44:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C14]](s32)
+ ; GFX11-NEXT: [[OR44:%[0-9]+]]:_(s32) = G_OR [[OR43]], [[SHL44]]
+ ; GFX11-NEXT: [[SHL45:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C15]](s32)
+ ; GFX11-NEXT: [[OR45:%[0-9]+]]:_(s32) = G_OR [[OR44]], [[SHL45]]
+ ; GFX11-NEXT: [[SHL46:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C16]](s32)
+ ; GFX11-NEXT: [[OR46:%[0-9]+]]:_(s32) = G_OR [[OR45]], [[SHL46]]
+ ; GFX11-NEXT: [[SHL47:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C17]](s32)
+ ; GFX11-NEXT: [[OR47:%[0-9]+]]:_(s32) = G_OR [[OR46]], [[SHL47]]
+ ; GFX11-NEXT: [[SHL48:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C18]](s32)
+ ; GFX11-NEXT: [[OR48:%[0-9]+]]:_(s32) = G_OR [[OR47]], [[SHL48]]
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; GFX11-NEXT: [[SHL49:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C19]](s32)
+ ; GFX11-NEXT: [[OR49:%[0-9]+]]:_(s32) = G_OR [[OR48]], [[SHL49]]
+ ; GFX11-NEXT: [[SHL50:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C20]](s32)
+ ; GFX11-NEXT: [[OR50:%[0-9]+]]:_(s32) = G_OR [[OR49]], [[SHL50]]
+ ; GFX11-NEXT: [[SHL51:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C21]](s32)
+ ; GFX11-NEXT: [[OR51:%[0-9]+]]:_(s32) = G_OR [[OR50]], [[SHL51]]
+ ; GFX11-NEXT: [[SHL52:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C22]](s32)
+ ; GFX11-NEXT: [[OR52:%[0-9]+]]:_(s32) = G_OR [[OR51]], [[SHL52]]
+ ; GFX11-NEXT: [[SHL53:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C23]](s32)
+ ; GFX11-NEXT: [[OR53:%[0-9]+]]:_(s32) = G_OR [[OR52]], [[SHL53]]
+ ; GFX11-NEXT: [[SHL54:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C24]](s32)
+ ; GFX11-NEXT: [[OR54:%[0-9]+]]:_(s32) = G_OR [[OR53]], [[SHL54]]
+ ; GFX11-NEXT: [[SHL55:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C25]](s32)
+ ; GFX11-NEXT: [[OR55:%[0-9]+]]:_(s32) = G_OR [[OR54]], [[SHL55]]
+ ; GFX11-NEXT: [[SHL56:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C26]](s32)
+ ; GFX11-NEXT: [[OR56:%[0-9]+]]:_(s32) = G_OR [[OR55]], [[SHL56]]
+ ; GFX11-NEXT: [[SHL57:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C27]](s32)
+ ; GFX11-NEXT: [[OR57:%[0-9]+]]:_(s32) = G_OR [[OR56]], [[SHL57]]
+ ; GFX11-NEXT: [[SHL58:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C28]](s32)
+ ; GFX11-NEXT: [[OR58:%[0-9]+]]:_(s32) = G_OR [[OR57]], [[SHL58]]
+ ; GFX11-NEXT: [[SHL59:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C29]](s32)
+ ; GFX11-NEXT: [[OR59:%[0-9]+]]:_(s32) = G_OR [[OR58]], [[SHL59]]
+ ; GFX11-NEXT: [[SHL60:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C30]](s32)
+ ; GFX11-NEXT: [[OR60:%[0-9]+]]:_(s32) = G_OR [[OR59]], [[SHL60]]
+ ; GFX11-NEXT: [[SHL61:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C31]](s32)
+ ; GFX11-NEXT: [[OR61:%[0-9]+]]:_(s32) = G_OR [[OR60]], [[SHL61]]
+ ; GFX11-NEXT: [[SHL62:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)
+ ; GFX11-NEXT: [[OR62:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL62]]
+ ; GFX11-NEXT: [[SHL63:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C2]](s32)
+ ; GFX11-NEXT: [[OR63:%[0-9]+]]:_(s32) = G_OR [[OR62]], [[SHL63]]
+ ; GFX11-NEXT: [[SHL64:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C3]](s32)
+ ; GFX11-NEXT: [[OR64:%[0-9]+]]:_(s32) = G_OR [[OR63]], [[SHL64]]
+ ; GFX11-NEXT: [[SHL65:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C4]](s32)
+ ; GFX11-NEXT: [[OR65:%[0-9]+]]:_(s32) = G_OR [[OR64]], [[SHL65]]
+ ; GFX11-NEXT: [[SHL66:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C5]](s32)
+ ; GFX11-NEXT: [[OR66:%[0-9]+]]:_(s32) = G_OR [[OR65]], [[SHL66]]
+ ; GFX11-NEXT: [[SHL67:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C6]](s32)
+ ; GFX11-NEXT: [[OR67:%[0-9]+]]:_(s32) = G_OR [[OR66]], [[SHL67]]
+ ; GFX11-NEXT: [[SHL68:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C7]](s32)
+ ; GFX11-NEXT: [[OR68:%[0-9]+]]:_(s32) = G_OR [[OR67]], [[SHL68]]
+ ; GFX11-NEXT: [[SHL69:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C8]](s32)
+ ; GFX11-NEXT: [[OR69:%[0-9]+]]:_(s32) = G_OR [[OR68]], [[SHL69]]
+ ; GFX11-NEXT: [[SHL70:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C9]](s32)
+ ; GFX11-NEXT: [[OR70:%[0-9]+]]:_(s32) = G_OR [[OR69]], [[SHL70]]
+ ; GFX11-NEXT: [[SHL71:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C10]](s32)
+ ; GFX11-NEXT: [[OR71:%[0-9]+]]:_(s32) = G_OR [[OR70]], [[SHL71]]
+ ; GFX11-NEXT: [[SHL72:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C11]](s32)
+ ; GFX11-NEXT: [[OR72:%[0-9]+]]:_(s32) = G_OR [[OR71]], [[SHL72]]
+ ; GFX11-NEXT: [[SHL73:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C12]](s32)
+ ; GFX11-NEXT: [[OR73:%[0-9]+]]:_(s32) = G_OR [[OR72]], [[SHL73]]
+ ; GFX11-NEXT: [[SHL74:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C13]](s32)
+ ; GFX11-NEXT: [[OR74:%[0-9]+]]:_(s32) = G_OR [[OR73]], [[SHL74]]
+ ; GFX11-NEXT: [[SHL75:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C14]](s32)
+ ; GFX11-NEXT: [[OR75:%[0-9]+]]:_(s32) = G_OR [[OR74]], [[SHL75]]
+ ; GFX11-NEXT: [[SHL76:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C15]](s32)
+ ; GFX11-NEXT: [[OR76:%[0-9]+]]:_(s32) = G_OR [[OR75]], [[SHL76]]
+ ; GFX11-NEXT: [[SHL77:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C16]](s32)
+ ; GFX11-NEXT: [[OR77:%[0-9]+]]:_(s32) = G_OR [[OR76]], [[SHL77]]
+ ; GFX11-NEXT: [[SHL78:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C17]](s32)
+ ; GFX11-NEXT: [[OR78:%[0-9]+]]:_(s32) = G_OR [[OR77]], [[SHL78]]
+ ; GFX11-NEXT: [[SHL79:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C18]](s32)
+ ; GFX11-NEXT: [[OR79:%[0-9]+]]:_(s32) = G_OR [[OR78]], [[SHL79]]
+ ; GFX11-NEXT: [[SHL80:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C19]](s32)
+ ; GFX11-NEXT: [[OR80:%[0-9]+]]:_(s32) = G_OR [[OR79]], [[SHL80]]
+ ; GFX11-NEXT: [[SHL81:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C20]](s32)
+ ; GFX11-NEXT: [[OR81:%[0-9]+]]:_(s32) = G_OR [[OR80]], [[SHL81]]
+ ; GFX11-NEXT: [[SHL82:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C21]](s32)
+ ; GFX11-NEXT: [[OR82:%[0-9]+]]:_(s32) = G_OR [[OR81]], [[SHL82]]
+ ; GFX11-NEXT: [[SHL83:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C22]](s32)
+ ; GFX11-NEXT: [[OR83:%[0-9]+]]:_(s32) = G_OR [[OR82]], [[SHL83]]
+ ; GFX11-NEXT: [[SHL84:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C23]](s32)
+ ; GFX11-NEXT: [[OR84:%[0-9]+]]:_(s32) = G_OR [[OR83]], [[SHL84]]
+ ; GFX11-NEXT: [[SHL85:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C24]](s32)
+ ; GFX11-NEXT: [[OR85:%[0-9]+]]:_(s32) = G_OR [[OR84]], [[SHL85]]
+ ; GFX11-NEXT: [[SHL86:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C25]](s32)
+ ; GFX11-NEXT: [[OR86:%[0-9]+]]:_(s32) = G_OR [[OR85]], [[SHL86]]
+ ; GFX11-NEXT: [[SHL87:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C26]](s32)
+ ; GFX11-NEXT: [[OR87:%[0-9]+]]:_(s32) = G_OR [[OR86]], [[SHL87]]
+ ; GFX11-NEXT: [[SHL88:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C27]](s32)
+ ; GFX11-NEXT: [[OR88:%[0-9]+]]:_(s32) = G_OR [[OR87]], [[SHL88]]
+ ; GFX11-NEXT: [[SHL89:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C28]](s32)
+ ; GFX11-NEXT: [[OR89:%[0-9]+]]:_(s32) = G_OR [[OR88]], [[SHL89]]
+ ; GFX11-NEXT: [[SHL90:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C29]](s32)
+ ; GFX11-NEXT: [[OR90:%[0-9]+]]:_(s32) = G_OR [[OR89]], [[SHL90]]
+ ; GFX11-NEXT: [[SHL91:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C30]](s32)
+ ; GFX11-NEXT: [[OR91:%[0-9]+]]:_(s32) = G_OR [[OR90]], [[SHL91]]
+ ; GFX11-NEXT: [[SHL92:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C31]](s32)
+ ; GFX11-NEXT: [[OR92:%[0-9]+]]:_(s32) = G_OR [[OR91]], [[SHL92]]
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR30]](s32), [[OR61]](s32), [[OR92]](s32)
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s68) = G_TRUNC [[MV]](s96)
+ ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC]](s68)
%0:_(s17) = G_CONSTANT i17 0
%1:_(s17) = G_CONSTANT i17 1
%2:_(s17) = G_CONSTANT i17 2
@@ -841,6 +1363,12 @@ body: |
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32)
; CHECK-NEXT: $vgpr0 = COPY [[INTTOPTR]](p3)
+ ;
+ ; GFX11-LABEL: name: test_merge_p3_s16_s16
+ ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
+ ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(p3) = G_MERGE_VALUES [[C]](s16), [[C1]](s16)
+ ; GFX11-NEXT: $vgpr0 = COPY [[MV]](p3)
%0:_(s16) = G_CONSTANT i16 0
%1:_(s16) = G_CONSTANT i16 1
%2:_(p3) = G_MERGE_VALUES %0, %1
@@ -865,6 +1393,16 @@ body: |
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
; CHECK-NEXT: $vgpr0 = COPY [[OR]](s32)
+ ;
+ ; GFX11-LABEL: name: test_merge_s32_s16_s16
+ ; GFX11: liveins: $vgpr0, $vgpr1
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
+ ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16)
+ ; GFX11-NEXT: $vgpr0 = COPY [[MV]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0
@@ -897,6 +1435,21 @@ body: |
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32)
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)
+ ;
+ ; GFX11-LABEL: name: test_merge_s48_s16_s16_s16
+ ; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
+ ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
+ ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
+ ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
+ ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16)
+ ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC2]](s16), [[DEF]](s16)
+ ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
+ ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
@@ -924,6 +1477,14 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s128), [[COPY1]](s128)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[MV]](s256)
+ ;
+ ; GFX11-LABEL: name: test_merge_s256_s128
+ ; GFX11: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s128), [[COPY1]](s128)
+ ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[MV]](s256)
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
%2:_(s256) = G_MERGE_VALUES %0, %1
@@ -944,6 +1505,14 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s256) = COPY $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s256), [[COPY1]](s256)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[MV]](s512)
+ ;
+ ; GFX11-LABEL: name: test_merge_s512_s256
+ ; GFX11: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s256) = COPY $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s256), [[COPY1]](s256)
+ ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[MV]](s512)
%0:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
%1:_(s256) = COPY $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
%2:_(s512) = G_MERGE_VALUES %0, %1
@@ -964,6 +1533,14 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s512) = COPY $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s512), [[COPY1]](s512)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = COPY [[MV]](s1024)
+ ;
+ ; GFX11-LABEL: name: test_merge_s1024_s512
+ ; GFX11: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s512) = COPY $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
+ ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s512), [[COPY1]](s512)
+ ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = COPY [[MV]](s1024)
%0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
%1:_(s512) = COPY $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
%2:_(s1024) = G_MERGE_VALUES %0, %1
>From bd4ade80d550ae810fba82fe77739324604989d1 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Wed, 8 Jul 2026 19:58:51 +0000
Subject: [PATCH 2/3] [AMDGPU][GlobalISel] Select s16 G_MERGE_VALUES into wider
scalars
Supersede the earlier legalizer restriction with instruction-selection
support: SGPR packs pairs of s16 with S_PACK_LL_B32_B16, VGPR uses 16-bit
subregister indices directly. Restores the original merge/unmerge legalIf.
Co-Authored-By: Claude Opus 4.8 <noreply at anthropic.com>
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
.../AMDGPU/AMDGPUInstructionSelector.cpp | 46 +-
.../Target/AMDGPU/AMDGPUInstructionSelector.h | 1 +
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 11 +-
.../GlobalISel/legalize-merge-values.mir | 577 ------------------
.../select-merge-values-build-vector-s16.mir | 92 +++
5 files changed, 139 insertions(+), 588 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index c85d7124f62bb..a951c2a824c49 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -775,6 +775,41 @@ bool AMDGPUInstructionSelector::selectS16MergeToS32(MachineInstr &MI) const {
return true;
}
+// Pack each pair of s16 into an s32 with S_PACK_LL_B32_B16, then combine the
+// s32 pieces into the destination with a REG_SEQUENCE.
+bool AMDGPUInstructionSelector::selectS16MergeToWide(MachineInstr &MI) const {
+ MachineBasicBlock *BB = MI.getParent();
+ const DebugLoc &DL = MI.getDebugLoc();
+ Register DstReg = MI.getOperand(0).getReg();
+ const unsigned DstSize = MRI->getType(DstReg).getSizeInBits();
+ const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI);
+ const unsigned NumSrc = MI.getNumOperands() - 1;
+
+ // Pack each pair of s16 sources into an s32.
+ SmallVector<Register, 8> S32Regs;
+ for (unsigned I = 0; I != NumSrc; I += 2) {
+ Register S32 = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);
+ auto Pack = BuildMI(*BB, MI, DL, TII.get(AMDGPU::S_PACK_LL_B32_B16), S32)
+ .addReg(MI.getOperand(I + 1).getReg())
+ .addReg(MI.getOperand(I + 2).getReg());
+ constrainSelectedInstRegOperands(*Pack, TII, TRI, RBI);
+ S32Regs.push_back(S32);
+ }
+
+ // Combine the s32 pieces into the destination with a REG_SEQUENCE.
+ const TargetRegisterClass *DstRC =
+ TRI.getRegClassForSizeOnBank(DstSize, *DstBank);
+ if (!DstRC || !RBI.constrainGenericRegister(DstReg, *DstRC, *MRI))
+ return false;
+ ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(DstRC, /*EltSize=*/4);
+ auto MIB = BuildMI(*BB, MI, DL, TII.get(TargetOpcode::REG_SEQUENCE), DstReg);
+ for (unsigned I = 0, E = S32Regs.size(); I != E; ++I)
+ MIB.addReg(S32Regs[I]).addImm(SubRegs[I]);
+
+ MI.eraseFromParent();
+ return true;
+}
+
bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {
MachineBasicBlock *BB = MI.getParent();
Register DstReg = MI.getOperand(0).getReg();
@@ -788,7 +823,16 @@ bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {
MI.getNumOperands() == 3) {
return selectS16MergeToS32(MI);
}
- return selectImpl(MI, *CoverageInfo);
+ // A scalar wider than 32 bits built from s16 pieces (with true16 a scalar
+ // s16 is a register type)
+ if (SrcSize == 16 && DstTy.getSizeInBits() > 32 &&
+ DstTy.getSizeInBits() % 32 == 0) {
+ // SGPRs have no 16-bit subregisters, so pack pairs of s16 with S_PACK.
+ if (RBI.getRegBank(DstReg, *MRI, TRI)->getID() != AMDGPU::VGPRRegBankID)
+ return selectS16MergeToWide(MI);
+ } else {
+ return selectImpl(MI, *CoverageInfo);
+ }
}
const DebugLoc &DL = MI.getDebugLoc();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
index 19028ef58a166..bd8ec0a769398 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
@@ -102,6 +102,7 @@ class AMDGPUInstructionSelector final : public InstructionSelector {
bool selectG_AMDGPU_MAD_64_32(MachineInstr &I) const;
bool selectG_EXTRACT(MachineInstr &I) const;
bool selectS16MergeToS32(MachineInstr &MI) const;
+ bool selectS16MergeToWide(MachineInstr &MI) const;
bool selectG_MERGE_VALUES(MachineInstr &I) const;
bool selectG_UNMERGE_VALUES(MachineInstr &I) const;
bool selectG_BUILD_VECTOR(MachineInstr &I) const;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index ef7f85beb9718..c57ef9392a4ca 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2114,16 +2114,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
auto &Builder =
getActionDefinitionsBuilder(Op)
- .legalIf(all(isRegisterType(ST, 0), isRegisterType(ST, 1),
- LegalityPredicate([=](const LegalityQuery &Query) {
- const LLT BigTy = Query.Types[BigTyIdx];
- const LLT LitTy = Query.Types[LitTyIdx];
- // Merging true s16 scalars into (or splitting from)
- // a scalar wider than 32 bits is not selectable, so
- // leave it to be widened to s32 pieces.
- return !(LitTy == S16 && !BigTy.isVector() &&
- BigTy.getSizeInBits() > 32);
- })))
+ .legalIf(all(isRegisterType(ST, 0), isRegisterType(ST, 1)))
.lowerFor({{S16, V2S16}})
.lowerIf([=](const LegalityQuery &Query) {
const LLT BigTy = Query.Types[BigTyIdx];
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
index 7bf28ed704747..f19fe840d7ae5 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
@@ -1,7 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -pass-remarks-missed='gisel*' -o - %s 2> %t | FileCheck %s
# FileCheck -check-prefix=ERR %s < %t
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1150 -O0 -run-pass=legalizer -o - %s | FileCheck -check-prefix=GFX11 %s
# ERR-NOT: remark:
# ERR: remark: <unknown>:0:0: unable to legalize instruction: %197:_(s136) = G_INSERT %209:_, %206:_(s8), 128 (in function: test_merge_s68_s17_s17_s17_s17)
@@ -65,48 +64,6 @@ body: |
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](p1)
- ;
- ; GFX11-LABEL: name: test_merge_p1_s8
- ; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
- ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
- ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
- ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
- ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
- ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]
- ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX11-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C]]
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C1]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]]
- ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
- ; GFX11-NEXT: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C]]
- ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
- ; GFX11-NEXT: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C]]
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C1]](s16)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]]
- ; GFX11-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)
- ; GFX11-NEXT: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C]]
- ; GFX11-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)
- ; GFX11-NEXT: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C]]
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C1]](s16)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]]
- ; GFX11-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)
- ; GFX11-NEXT: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C]]
- ; GFX11-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)
- ; GFX11-NEXT: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C]]
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C1]](s16)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
- ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
- ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
- ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](p1)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
@@ -141,15 +98,6 @@ body: |
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C1]], [[TRUNC]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16)
; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
- ;
- ; GFX11-LABEL: name: test_merge_s16_s8_s8
- ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16)
- ; GFX11-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s16) = G_MERGE_VALUES %0, %1
@@ -182,22 +130,6 @@ body: |
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]]
; CHECK-NEXT: $vgpr0 = COPY [[OR2]](s32)
- ;
- ; GFX11-LABEL: name: test_merge_s24_s8_s8_s8
- ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
- ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C4]]
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C2]](s16)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
- ; GFX11-NEXT: $vgpr0 = COPY [[MV]](s32)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -225,22 +157,6 @@ body: |
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[C6]](s32)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
; CHECK-NEXT: $vgpr0 = COPY [[OR2]](s32)
- ;
- ; GFX11-LABEL: name: test_merge_s32_s8_s8_s8_s8
- ; GFX11: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C4]](s32)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C5]](s32)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[C6]](s32)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
- ; GFX11-NEXT: $vgpr0 = COPY [[OR2]](s32)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -261,14 +177,6 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; CHECK-NEXT: $vgpr1_vgpr2 = COPY [[MV]](s64)
- ;
- ; GFX11-LABEL: name: test_merge_s64_s32_s32
- ; GFX11: liveins: $vgpr0, $vgpr1
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
- ; GFX11-NEXT: $vgpr1_vgpr2 = COPY [[MV]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s64) = G_MERGE_VALUES %0, %1
@@ -299,22 +207,6 @@ body: |
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32)
; CHECK-NEXT: $vgpr1_vgpr2 = COPY [[MV]](s64)
- ;
- ; GFX11-LABEL: name: test_merge_s64_s16_s16_s16_s16
- ; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
- ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16)
- ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC2]](s16), [[TRUNC3]](s16)
- ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
- ; GFX11-NEXT: $vgpr1_vgpr2 = COPY [[MV2]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
@@ -376,38 +268,6 @@ body: |
; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL6]]
; CHECK-NEXT: [[TRUNC6:%[0-9]+]]:_(s24) = G_TRUNC [[OR6]](s32)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC6]](s24)
- ;
- ; GFX11-LABEL: name: test_merge_s24_s4_s4_s4_s4_s4_s4
- ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C3]], [[C4]](s16)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[OR]], [[SHL1]]
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 12
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C5]], [[C6]](s16)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[OR1]], [[SHL2]]
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[C2]](s16)
- ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C7]], [[C2]](s16)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[COPY]], [[SHL3]]
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
- ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 15
- ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C8]]
- ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C4]](s16)
- ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s16) = G_OR [[OR3]], [[SHL4]]
- ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
- ; GFX11-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C8]]
- ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C6]](s16)
- ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s16) = G_OR [[OR4]], [[SHL5]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR5]](s16)
- ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s24) = G_TRUNC [[MV]](s32)
- ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC2]](s24)
%0:_(s4) = G_CONSTANT i4 0
%1:_(s4) = G_CONSTANT i4 1
%2:_(s4) = G_CONSTANT i4 2
@@ -466,37 +326,6 @@ body: |
; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL6]]
; CHECK-NEXT: [[TRUNC6:%[0-9]+]]:_(s28) = G_TRUNC [[OR6]](s32)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC6]](s28)
- ;
- ; GFX11-LABEL: name: test_merge_s28_s4_s4_s4_s4_s4_s4_s4
- ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C3]], [[C4]](s16)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[OR]], [[SHL1]]
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 12
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C5]], [[C6]](s16)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[OR1]], [[SHL2]]
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[C2]](s16)
- ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C7]], [[C2]](s16)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[COPY]], [[SHL3]]
- ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
- ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[C8]], [[C4]](s16)
- ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s16) = G_OR [[OR3]], [[SHL4]]
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
- ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s16) = G_CONSTANT i16 15
- ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C9]]
- ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C6]](s16)
- ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s16) = G_OR [[OR4]], [[SHL5]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR5]](s16)
- ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s28) = G_TRUNC [[MV]](s32)
- ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC1]](s28)
%0:_(s4) = G_CONSTANT i4 0
%1:_(s4) = G_CONSTANT i4 1
%2:_(s4) = G_CONSTANT i4 2
@@ -542,37 +371,6 @@ body: |
; CHECK-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C7]], [[C13]](s32)
; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[OR5]], [[SHL6]]
; CHECK-NEXT: S_NOP 0, implicit [[OR6]](s32)
- ;
- ; GFX11-LABEL: name: test_merge_s32_s4_s4_s4_s4_s4_s4_s4_s4
- ; GFX11: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
- ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C4]](s32)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C8]](s32)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
- ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C3]], [[C9]](s32)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
- ; GFX11-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C4]], [[C10]](s32)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[OR2]], [[SHL3]]
- ; GFX11-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
- ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[C5]], [[C11]](s32)
- ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]]
- ; GFX11-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
- ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[C6]], [[C12]](s32)
- ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]]
- ; GFX11-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
- ; GFX11-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C7]], [[C13]](s32)
- ; GFX11-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[OR5]], [[SHL6]]
- ; GFX11-NEXT: S_NOP 0, implicit [[OR6]](s32)
%0:_(s4) = G_CONSTANT i4 0
%1:_(s4) = G_CONSTANT i4 1
%2:_(s4) = G_CONSTANT i4 2
@@ -625,29 +423,6 @@ body: |
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)
- ;
- ; GFX11-LABEL: name: test_merge_s64_s8_s8_s8_s8_s8_s8_s8_s8
- ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C4]], [[C2]](s16)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C6]], [[C2]](s16)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[C5]], [[SHL2]]
- ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
- ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 7
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C8]], [[C2]](s16)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[C7]], [[SHL3]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
- ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
- ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
- ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -718,38 +493,6 @@ body: |
; CHECK-NEXT: [[OR8:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL8]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR6]](s32), [[OR7]](s32), [[OR8]](s32)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
- ;
- ; GFX11-LABEL: name: test_merge_s96_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8
- ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C4]], [[C2]](s16)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C6]], [[C2]](s16)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[C5]], [[SHL2]]
- ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
- ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 7
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[C8]], [[C2]](s16)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[C7]], [[SHL3]]
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[C2]](s16)
- ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s16) = G_CONSTANT i16 9
- ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[C9]], [[C2]](s16)
- ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s16) = G_OR [[COPY]], [[SHL4]]
- ; GFX11-NEXT: [[C10:%[0-9]+]]:_(s16) = G_CONSTANT i16 10
- ; GFX11-NEXT: [[C11:%[0-9]+]]:_(s16) = G_CONSTANT i16 11
- ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s16) = G_SHL [[C11]], [[C2]](s16)
- ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s16) = G_OR [[C10]], [[SHL5]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
- ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
- ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR4]](s16), [[OR5]](s16)
- ; GFX11-NEXT: [[MV3:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32), [[MV2]](s32)
- ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV3]](s96)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -787,19 +530,6 @@ body: |
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[C5]], [[SHL2]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32), [[OR2]](s32)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
- ;
- ; GFX11-LABEL: name: test_merge_s96_s16_s16_s16_s16_s16_s16
- ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[C]](s16), [[C1]](s16)
- ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[C2]](s16), [[C3]](s16)
- ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[C4]](s16), [[C5]](s16)
- ; GFX11-NEXT: [[MV3:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32), [[MV2]](s32)
- ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV3]](s96)
%0:_(s16) = G_CONSTANT i16 0
%1:_(s16) = G_CONSTANT i16 1
%2:_(s16) = G_CONSTANT i16 2
@@ -853,33 +583,6 @@ body: |
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)
; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(s56) = G_TRUNC [[MV]](s64)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC4]](s56)
- ;
- ; GFX11-LABEL: name: test_merge_s56_s8_s8_s8_s8_s8_s8_s8
- ; GFX11: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
- ; GFX11-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[C1]], [[C2]](s16)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 2
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 3
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[C4]], [[C2]](s16)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[C3]], [[SHL1]]
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C6]], [[C2]](s16)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[C5]], [[SHL2]]
- ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 6
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)
- ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
- ; GFX11-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C8]]
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND]], [[C2]](s16)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[C7]], [[SHL3]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR]](s16), [[OR1]](s16)
- ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[OR2]](s16), [[OR3]](s16)
- ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
- ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s56) = G_TRUNC [[MV2]](s64)
- ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC1]](s56)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
@@ -1119,231 +822,6 @@ body: |
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR30]](s32), [[OR61]](s32), [[OR92]](s32)
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s68) = G_TRUNC [[MV]](s96)
; CHECK-NEXT: S_NOP 0, implicit [[TRUNC]](s68)
- ;
- ; GFX11-LABEL: name: test_merge_s68_s17_s17_s17_s17
- ; GFX11: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
- ; GFX11-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
- ; GFX11-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
- ; GFX11-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)
- ; GFX11-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
- ; GFX11-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C2]](s32)
- ; GFX11-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]]
- ; GFX11-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C3]](s32)
- ; GFX11-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]]
- ; GFX11-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; GFX11-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C4]](s32)
- ; GFX11-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[OR2]], [[SHL3]]
- ; GFX11-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
- ; GFX11-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C5]](s32)
- ; GFX11-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]]
- ; GFX11-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
- ; GFX11-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C6]](s32)
- ; GFX11-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]]
- ; GFX11-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
- ; GFX11-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C7]](s32)
- ; GFX11-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[OR5]], [[SHL6]]
- ; GFX11-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; GFX11-NEXT: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C8]](s32)
- ; GFX11-NEXT: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]]
- ; GFX11-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 9
- ; GFX11-NEXT: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C9]](s32)
- ; GFX11-NEXT: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]]
- ; GFX11-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
- ; GFX11-NEXT: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C10]](s32)
- ; GFX11-NEXT: [[OR9:%[0-9]+]]:_(s32) = G_OR [[OR8]], [[SHL9]]
- ; GFX11-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
- ; GFX11-NEXT: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C11]](s32)
- ; GFX11-NEXT: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]]
- ; GFX11-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
- ; GFX11-NEXT: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C12]](s32)
- ; GFX11-NEXT: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]]
- ; GFX11-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 13
- ; GFX11-NEXT: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C13]](s32)
- ; GFX11-NEXT: [[OR12:%[0-9]+]]:_(s32) = G_OR [[OR11]], [[SHL12]]
- ; GFX11-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 14
- ; GFX11-NEXT: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C14]](s32)
- ; GFX11-NEXT: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]]
- ; GFX11-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 15
- ; GFX11-NEXT: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C15]](s32)
- ; GFX11-NEXT: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]]
- ; GFX11-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; GFX11-NEXT: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C16]](s32)
- ; GFX11-NEXT: [[OR15:%[0-9]+]]:_(s32) = G_OR [[OR14]], [[SHL15]]
- ; GFX11-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
- ; GFX11-NEXT: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C17]](s32)
- ; GFX11-NEXT: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]]
- ; GFX11-NEXT: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 18
- ; GFX11-NEXT: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C18]](s32)
- ; GFX11-NEXT: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]]
- ; GFX11-NEXT: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 19
- ; GFX11-NEXT: [[SHL18:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C19]](s32)
- ; GFX11-NEXT: [[OR18:%[0-9]+]]:_(s32) = G_OR [[OR17]], [[SHL18]]
- ; GFX11-NEXT: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
- ; GFX11-NEXT: [[SHL19:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C20]](s32)
- ; GFX11-NEXT: [[OR19:%[0-9]+]]:_(s32) = G_OR [[OR18]], [[SHL19]]
- ; GFX11-NEXT: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 21
- ; GFX11-NEXT: [[SHL20:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C21]](s32)
- ; GFX11-NEXT: [[OR20:%[0-9]+]]:_(s32) = G_OR [[OR19]], [[SHL20]]
- ; GFX11-NEXT: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 22
- ; GFX11-NEXT: [[SHL21:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C22]](s32)
- ; GFX11-NEXT: [[OR21:%[0-9]+]]:_(s32) = G_OR [[OR20]], [[SHL21]]
- ; GFX11-NEXT: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 23
- ; GFX11-NEXT: [[SHL22:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C23]](s32)
- ; GFX11-NEXT: [[OR22:%[0-9]+]]:_(s32) = G_OR [[OR21]], [[SHL22]]
- ; GFX11-NEXT: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
- ; GFX11-NEXT: [[SHL23:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C24]](s32)
- ; GFX11-NEXT: [[OR23:%[0-9]+]]:_(s32) = G_OR [[OR22]], [[SHL23]]
- ; GFX11-NEXT: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
- ; GFX11-NEXT: [[SHL24:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C25]](s32)
- ; GFX11-NEXT: [[OR24:%[0-9]+]]:_(s32) = G_OR [[OR23]], [[SHL24]]
- ; GFX11-NEXT: [[C26:%[0-9]+]]:_(s32) = G_CONSTANT i32 26
- ; GFX11-NEXT: [[SHL25:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C26]](s32)
- ; GFX11-NEXT: [[OR25:%[0-9]+]]:_(s32) = G_OR [[OR24]], [[SHL25]]
- ; GFX11-NEXT: [[C27:%[0-9]+]]:_(s32) = G_CONSTANT i32 27
- ; GFX11-NEXT: [[SHL26:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C27]](s32)
- ; GFX11-NEXT: [[OR26:%[0-9]+]]:_(s32) = G_OR [[OR25]], [[SHL26]]
- ; GFX11-NEXT: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
- ; GFX11-NEXT: [[SHL27:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C28]](s32)
- ; GFX11-NEXT: [[OR27:%[0-9]+]]:_(s32) = G_OR [[OR26]], [[SHL27]]
- ; GFX11-NEXT: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
- ; GFX11-NEXT: [[SHL28:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C29]](s32)
- ; GFX11-NEXT: [[OR28:%[0-9]+]]:_(s32) = G_OR [[OR27]], [[SHL28]]
- ; GFX11-NEXT: [[C30:%[0-9]+]]:_(s32) = G_CONSTANT i32 30
- ; GFX11-NEXT: [[SHL29:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C30]](s32)
- ; GFX11-NEXT: [[OR29:%[0-9]+]]:_(s32) = G_OR [[OR28]], [[SHL29]]
- ; GFX11-NEXT: [[C31:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
- ; GFX11-NEXT: [[SHL30:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C31]](s32)
- ; GFX11-NEXT: [[OR30:%[0-9]+]]:_(s32) = G_OR [[OR29]], [[SHL30]]
- ; GFX11-NEXT: [[SHL31:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)
- ; GFX11-NEXT: [[OR31:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL31]]
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
- ; GFX11-NEXT: [[SHL32:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C2]](s32)
- ; GFX11-NEXT: [[OR32:%[0-9]+]]:_(s32) = G_OR [[OR31]], [[SHL32]]
- ; GFX11-NEXT: [[SHL33:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C3]](s32)
- ; GFX11-NEXT: [[OR33:%[0-9]+]]:_(s32) = G_OR [[OR32]], [[SHL33]]
- ; GFX11-NEXT: [[SHL34:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C4]](s32)
- ; GFX11-NEXT: [[OR34:%[0-9]+]]:_(s32) = G_OR [[OR33]], [[SHL34]]
- ; GFX11-NEXT: [[SHL35:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C5]](s32)
- ; GFX11-NEXT: [[OR35:%[0-9]+]]:_(s32) = G_OR [[OR34]], [[SHL35]]
- ; GFX11-NEXT: [[SHL36:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C6]](s32)
- ; GFX11-NEXT: [[OR36:%[0-9]+]]:_(s32) = G_OR [[OR35]], [[SHL36]]
- ; GFX11-NEXT: [[SHL37:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C7]](s32)
- ; GFX11-NEXT: [[OR37:%[0-9]+]]:_(s32) = G_OR [[OR36]], [[SHL37]]
- ; GFX11-NEXT: [[SHL38:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C8]](s32)
- ; GFX11-NEXT: [[OR38:%[0-9]+]]:_(s32) = G_OR [[OR37]], [[SHL38]]
- ; GFX11-NEXT: [[SHL39:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C9]](s32)
- ; GFX11-NEXT: [[OR39:%[0-9]+]]:_(s32) = G_OR [[OR38]], [[SHL39]]
- ; GFX11-NEXT: [[SHL40:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C10]](s32)
- ; GFX11-NEXT: [[OR40:%[0-9]+]]:_(s32) = G_OR [[OR39]], [[SHL40]]
- ; GFX11-NEXT: [[SHL41:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C11]](s32)
- ; GFX11-NEXT: [[OR41:%[0-9]+]]:_(s32) = G_OR [[OR40]], [[SHL41]]
- ; GFX11-NEXT: [[SHL42:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C12]](s32)
- ; GFX11-NEXT: [[OR42:%[0-9]+]]:_(s32) = G_OR [[OR41]], [[SHL42]]
- ; GFX11-NEXT: [[SHL43:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C13]](s32)
- ; GFX11-NEXT: [[OR43:%[0-9]+]]:_(s32) = G_OR [[OR42]], [[SHL43]]
- ; GFX11-NEXT: [[SHL44:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C14]](s32)
- ; GFX11-NEXT: [[OR44:%[0-9]+]]:_(s32) = G_OR [[OR43]], [[SHL44]]
- ; GFX11-NEXT: [[SHL45:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C15]](s32)
- ; GFX11-NEXT: [[OR45:%[0-9]+]]:_(s32) = G_OR [[OR44]], [[SHL45]]
- ; GFX11-NEXT: [[SHL46:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C16]](s32)
- ; GFX11-NEXT: [[OR46:%[0-9]+]]:_(s32) = G_OR [[OR45]], [[SHL46]]
- ; GFX11-NEXT: [[SHL47:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C17]](s32)
- ; GFX11-NEXT: [[OR47:%[0-9]+]]:_(s32) = G_OR [[OR46]], [[SHL47]]
- ; GFX11-NEXT: [[SHL48:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C18]](s32)
- ; GFX11-NEXT: [[OR48:%[0-9]+]]:_(s32) = G_OR [[OR47]], [[SHL48]]
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
- ; GFX11-NEXT: [[SHL49:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C19]](s32)
- ; GFX11-NEXT: [[OR49:%[0-9]+]]:_(s32) = G_OR [[OR48]], [[SHL49]]
- ; GFX11-NEXT: [[SHL50:%[0-9]+]]:_(s32) = G_SHL [[C1]], [[C20]](s32)
- ; GFX11-NEXT: [[OR50:%[0-9]+]]:_(s32) = G_OR [[OR49]], [[SHL50]]
- ; GFX11-NEXT: [[SHL51:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C21]](s32)
- ; GFX11-NEXT: [[OR51:%[0-9]+]]:_(s32) = G_OR [[OR50]], [[SHL51]]
- ; GFX11-NEXT: [[SHL52:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C22]](s32)
- ; GFX11-NEXT: [[OR52:%[0-9]+]]:_(s32) = G_OR [[OR51]], [[SHL52]]
- ; GFX11-NEXT: [[SHL53:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C23]](s32)
- ; GFX11-NEXT: [[OR53:%[0-9]+]]:_(s32) = G_OR [[OR52]], [[SHL53]]
- ; GFX11-NEXT: [[SHL54:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C24]](s32)
- ; GFX11-NEXT: [[OR54:%[0-9]+]]:_(s32) = G_OR [[OR53]], [[SHL54]]
- ; GFX11-NEXT: [[SHL55:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C25]](s32)
- ; GFX11-NEXT: [[OR55:%[0-9]+]]:_(s32) = G_OR [[OR54]], [[SHL55]]
- ; GFX11-NEXT: [[SHL56:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C26]](s32)
- ; GFX11-NEXT: [[OR56:%[0-9]+]]:_(s32) = G_OR [[OR55]], [[SHL56]]
- ; GFX11-NEXT: [[SHL57:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C27]](s32)
- ; GFX11-NEXT: [[OR57:%[0-9]+]]:_(s32) = G_OR [[OR56]], [[SHL57]]
- ; GFX11-NEXT: [[SHL58:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C28]](s32)
- ; GFX11-NEXT: [[OR58:%[0-9]+]]:_(s32) = G_OR [[OR57]], [[SHL58]]
- ; GFX11-NEXT: [[SHL59:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C29]](s32)
- ; GFX11-NEXT: [[OR59:%[0-9]+]]:_(s32) = G_OR [[OR58]], [[SHL59]]
- ; GFX11-NEXT: [[SHL60:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C30]](s32)
- ; GFX11-NEXT: [[OR60:%[0-9]+]]:_(s32) = G_OR [[OR59]], [[SHL60]]
- ; GFX11-NEXT: [[SHL61:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C31]](s32)
- ; GFX11-NEXT: [[OR61:%[0-9]+]]:_(s32) = G_OR [[OR60]], [[SHL61]]
- ; GFX11-NEXT: [[SHL62:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)
- ; GFX11-NEXT: [[OR62:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL62]]
- ; GFX11-NEXT: [[SHL63:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C2]](s32)
- ; GFX11-NEXT: [[OR63:%[0-9]+]]:_(s32) = G_OR [[OR62]], [[SHL63]]
- ; GFX11-NEXT: [[SHL64:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C3]](s32)
- ; GFX11-NEXT: [[OR64:%[0-9]+]]:_(s32) = G_OR [[OR63]], [[SHL64]]
- ; GFX11-NEXT: [[SHL65:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C4]](s32)
- ; GFX11-NEXT: [[OR65:%[0-9]+]]:_(s32) = G_OR [[OR64]], [[SHL65]]
- ; GFX11-NEXT: [[SHL66:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C5]](s32)
- ; GFX11-NEXT: [[OR66:%[0-9]+]]:_(s32) = G_OR [[OR65]], [[SHL66]]
- ; GFX11-NEXT: [[SHL67:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C6]](s32)
- ; GFX11-NEXT: [[OR67:%[0-9]+]]:_(s32) = G_OR [[OR66]], [[SHL67]]
- ; GFX11-NEXT: [[SHL68:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C7]](s32)
- ; GFX11-NEXT: [[OR68:%[0-9]+]]:_(s32) = G_OR [[OR67]], [[SHL68]]
- ; GFX11-NEXT: [[SHL69:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C8]](s32)
- ; GFX11-NEXT: [[OR69:%[0-9]+]]:_(s32) = G_OR [[OR68]], [[SHL69]]
- ; GFX11-NEXT: [[SHL70:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C9]](s32)
- ; GFX11-NEXT: [[OR70:%[0-9]+]]:_(s32) = G_OR [[OR69]], [[SHL70]]
- ; GFX11-NEXT: [[SHL71:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C10]](s32)
- ; GFX11-NEXT: [[OR71:%[0-9]+]]:_(s32) = G_OR [[OR70]], [[SHL71]]
- ; GFX11-NEXT: [[SHL72:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C11]](s32)
- ; GFX11-NEXT: [[OR72:%[0-9]+]]:_(s32) = G_OR [[OR71]], [[SHL72]]
- ; GFX11-NEXT: [[SHL73:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C12]](s32)
- ; GFX11-NEXT: [[OR73:%[0-9]+]]:_(s32) = G_OR [[OR72]], [[SHL73]]
- ; GFX11-NEXT: [[SHL74:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C13]](s32)
- ; GFX11-NEXT: [[OR74:%[0-9]+]]:_(s32) = G_OR [[OR73]], [[SHL74]]
- ; GFX11-NEXT: [[SHL75:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C14]](s32)
- ; GFX11-NEXT: [[OR75:%[0-9]+]]:_(s32) = G_OR [[OR74]], [[SHL75]]
- ; GFX11-NEXT: [[SHL76:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C15]](s32)
- ; GFX11-NEXT: [[OR76:%[0-9]+]]:_(s32) = G_OR [[OR75]], [[SHL76]]
- ; GFX11-NEXT: [[SHL77:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C16]](s32)
- ; GFX11-NEXT: [[OR77:%[0-9]+]]:_(s32) = G_OR [[OR76]], [[SHL77]]
- ; GFX11-NEXT: [[SHL78:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C17]](s32)
- ; GFX11-NEXT: [[OR78:%[0-9]+]]:_(s32) = G_OR [[OR77]], [[SHL78]]
- ; GFX11-NEXT: [[SHL79:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C18]](s32)
- ; GFX11-NEXT: [[OR79:%[0-9]+]]:_(s32) = G_OR [[OR78]], [[SHL79]]
- ; GFX11-NEXT: [[SHL80:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C19]](s32)
- ; GFX11-NEXT: [[OR80:%[0-9]+]]:_(s32) = G_OR [[OR79]], [[SHL80]]
- ; GFX11-NEXT: [[SHL81:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C20]](s32)
- ; GFX11-NEXT: [[OR81:%[0-9]+]]:_(s32) = G_OR [[OR80]], [[SHL81]]
- ; GFX11-NEXT: [[SHL82:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C21]](s32)
- ; GFX11-NEXT: [[OR82:%[0-9]+]]:_(s32) = G_OR [[OR81]], [[SHL82]]
- ; GFX11-NEXT: [[SHL83:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C22]](s32)
- ; GFX11-NEXT: [[OR83:%[0-9]+]]:_(s32) = G_OR [[OR82]], [[SHL83]]
- ; GFX11-NEXT: [[SHL84:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C23]](s32)
- ; GFX11-NEXT: [[OR84:%[0-9]+]]:_(s32) = G_OR [[OR83]], [[SHL84]]
- ; GFX11-NEXT: [[SHL85:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C24]](s32)
- ; GFX11-NEXT: [[OR85:%[0-9]+]]:_(s32) = G_OR [[OR84]], [[SHL85]]
- ; GFX11-NEXT: [[SHL86:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C25]](s32)
- ; GFX11-NEXT: [[OR86:%[0-9]+]]:_(s32) = G_OR [[OR85]], [[SHL86]]
- ; GFX11-NEXT: [[SHL87:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C26]](s32)
- ; GFX11-NEXT: [[OR87:%[0-9]+]]:_(s32) = G_OR [[OR86]], [[SHL87]]
- ; GFX11-NEXT: [[SHL88:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C27]](s32)
- ; GFX11-NEXT: [[OR88:%[0-9]+]]:_(s32) = G_OR [[OR87]], [[SHL88]]
- ; GFX11-NEXT: [[SHL89:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C28]](s32)
- ; GFX11-NEXT: [[OR89:%[0-9]+]]:_(s32) = G_OR [[OR88]], [[SHL89]]
- ; GFX11-NEXT: [[SHL90:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C29]](s32)
- ; GFX11-NEXT: [[OR90:%[0-9]+]]:_(s32) = G_OR [[OR89]], [[SHL90]]
- ; GFX11-NEXT: [[SHL91:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C30]](s32)
- ; GFX11-NEXT: [[OR91:%[0-9]+]]:_(s32) = G_OR [[OR90]], [[SHL91]]
- ; GFX11-NEXT: [[SHL92:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C31]](s32)
- ; GFX11-NEXT: [[OR92:%[0-9]+]]:_(s32) = G_OR [[OR91]], [[SHL92]]
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR30]](s32), [[OR61]](s32), [[OR92]](s32)
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s68) = G_TRUNC [[MV]](s96)
- ; GFX11-NEXT: S_NOP 0, implicit [[TRUNC]](s68)
%0:_(s17) = G_CONSTANT i17 0
%1:_(s17) = G_CONSTANT i17 1
%2:_(s17) = G_CONSTANT i17 2
@@ -1363,12 +841,6 @@ body: |
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]
; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32)
; CHECK-NEXT: $vgpr0 = COPY [[INTTOPTR]](p3)
- ;
- ; GFX11-LABEL: name: test_merge_p3_s16_s16
- ; GFX11: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
- ; GFX11-NEXT: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(p3) = G_MERGE_VALUES [[C]](s16), [[C1]](s16)
- ; GFX11-NEXT: $vgpr0 = COPY [[MV]](p3)
%0:_(s16) = G_CONSTANT i16 0
%1:_(s16) = G_CONSTANT i16 1
%2:_(p3) = G_MERGE_VALUES %0, %1
@@ -1393,16 +865,6 @@ body: |
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
; CHECK-NEXT: $vgpr0 = COPY [[OR]](s32)
- ;
- ; GFX11-LABEL: name: test_merge_s32_s16_s16
- ; GFX11: liveins: $vgpr0, $vgpr1
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16)
- ; GFX11-NEXT: $vgpr0 = COPY [[MV]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0
@@ -1435,21 +897,6 @@ body: |
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32)
; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)
- ;
- ; GFX11-LABEL: name: test_merge_s48_s16_s16_s16
- ; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
- ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
- ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
- ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
- ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
- ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16)
- ; GFX11-NEXT: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC2]](s16), [[DEF]](s16)
- ; GFX11-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
- ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
@@ -1477,14 +924,6 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s128), [[COPY1]](s128)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[MV]](s256)
- ;
- ; GFX11-LABEL: name: test_merge_s256_s128
- ; GFX11: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s128), [[COPY1]](s128)
- ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[MV]](s256)
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
%2:_(s256) = G_MERGE_VALUES %0, %1
@@ -1505,14 +944,6 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s256) = COPY $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s256), [[COPY1]](s256)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[MV]](s512)
- ;
- ; GFX11-LABEL: name: test_merge_s512_s256
- ; GFX11: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s256) = COPY $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s256), [[COPY1]](s256)
- ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[MV]](s512)
%0:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
%1:_(s256) = COPY $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
%2:_(s512) = G_MERGE_VALUES %0, %1
@@ -1533,14 +964,6 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s512) = COPY $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s512), [[COPY1]](s512)
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = COPY [[MV]](s1024)
- ;
- ; GFX11-LABEL: name: test_merge_s1024_s512
- ; GFX11: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
- ; GFX11-NEXT: {{ $}}
- ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
- ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s512) = COPY $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
- ; GFX11-NEXT: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s512), [[COPY1]](s512)
- ; GFX11-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = COPY [[MV]](s1024)
%0:_(s512) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
%1:_(s512) = COPY $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
%2:_(s1024) = G_MERGE_VALUES %0, %1
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/select-merge-values-build-vector-s16.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/select-merge-values-build-vector-s16.mir
index e607a84507902..6e2b8cf4db8d9 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/select-merge-values-build-vector-s16.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/select-merge-values-build-vector-s16.mir
@@ -137,3 +137,95 @@ body: |
%4:vgpr_32(<2 x s16>) = G_BUILD_VECTOR %2:vgpr_16(s16), %3:vgpr_16(s16)
$vgpr0 = COPY %4:vgpr_32(<2 x s16>)
...
+
+---
+name: test_merge_values_s16_into_s64_sgpr
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
+
+ ; GFX11-LABEL: name: test_merge_values_s16_into_s64_sgpr
+ ; GFX11: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
+ ; GFX11-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
+ ; GFX11-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3
+ ; GFX11-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[COPY1]]
+ ; GFX11-NEXT: [[S_PACK_LL_B32_B16_1:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY2]], [[COPY3]]
+ ; GFX11-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_PACK_LL_B32_B16_]], %subreg.sub0, [[S_PACK_LL_B32_B16_1]], %subreg.sub1
+ ; GFX11-NEXT: $sgpr0_sgpr1 = COPY [[REG_SEQUENCE]]
+ ;
+ ; GFX12-LABEL: name: test_merge_values_s16_into_s64_sgpr
+ ; GFX12: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
+ ; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; GFX12-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
+ ; GFX12-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
+ ; GFX12-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3
+ ; GFX12-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[COPY1]]
+ ; GFX12-NEXT: [[S_PACK_LL_B32_B16_1:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY2]], [[COPY3]]
+ ; GFX12-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_PACK_LL_B32_B16_]], %subreg.sub0, [[S_PACK_LL_B32_B16_1]], %subreg.sub1
+ ; GFX12-NEXT: $sgpr0_sgpr1 = COPY [[REG_SEQUENCE]]
+ %0:sreg_32(s32) = COPY $sgpr0
+ %1:sreg_32(s32) = COPY $sgpr1
+ %2:sreg_32(s32) = COPY $sgpr2
+ %3:sreg_32(s32) = COPY $sgpr3
+ %4:sreg_32(s16) = G_TRUNC %0:sreg_32(s32)
+ %5:sreg_32(s16) = G_TRUNC %1:sreg_32(s32)
+ %6:sreg_32(s16) = G_TRUNC %2:sreg_32(s32)
+ %7:sreg_32(s16) = G_TRUNC %3:sreg_32(s32)
+ %8:sreg_64(s64) = G_MERGE_VALUES %4:sreg_32(s16), %5:sreg_32(s16), %6:sreg_32(s16), %7:sreg_32(s16)
+ $sgpr0_sgpr1 = COPY %8:sreg_64(s64)
+...
+
+---
+name: test_merge_values_s16_into_s64_vgpr
+legalized: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+
+ ; GFX11-LABEL: name: test_merge_values_s16_into_s64_vgpr
+ ; GFX11: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+ ; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+ ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
+ ; GFX11-NEXT: [[COPY4:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16
+ ; GFX11-NEXT: [[COPY5:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
+ ; GFX11-NEXT: [[COPY6:%[0-9]+]]:vgpr_16 = COPY [[COPY2]].lo16
+ ; GFX11-NEXT: [[COPY7:%[0-9]+]]:vgpr_16 = COPY [[COPY3]].lo16
+ ; GFX11-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY4]], %subreg.lo16, [[COPY5]], %subreg.hi16, [[COPY6]], %subreg.sub1_lo16, [[COPY7]], %subreg.sub1_hi16
+ ; GFX11-NEXT: $vgpr0_vgpr1 = COPY [[REG_SEQUENCE]]
+ ;
+ ; GFX12-LABEL: name: test_merge_values_s16_into_s64_vgpr
+ ; GFX12: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+ ; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GFX12-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+ ; GFX12-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+ ; GFX12-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
+ ; GFX12-NEXT: [[COPY4:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16
+ ; GFX12-NEXT: [[COPY5:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
+ ; GFX12-NEXT: [[COPY6:%[0-9]+]]:vgpr_16 = COPY [[COPY2]].lo16
+ ; GFX12-NEXT: [[COPY7:%[0-9]+]]:vgpr_16 = COPY [[COPY3]].lo16
+ ; GFX12-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY4]], %subreg.lo16, [[COPY5]], %subreg.hi16, [[COPY6]], %subreg.sub1_lo16, [[COPY7]], %subreg.sub1_hi16
+ ; GFX12-NEXT: $vgpr0_vgpr1 = COPY [[REG_SEQUENCE]]
+ %0:vgpr_32(s32) = COPY $vgpr0
+ %1:vgpr_32(s32) = COPY $vgpr1
+ %2:vgpr_32(s32) = COPY $vgpr2
+ %3:vgpr_32(s32) = COPY $vgpr3
+ %4:vgpr_16(s16) = G_TRUNC %0:vgpr_32(s32)
+ %5:vgpr_16(s16) = G_TRUNC %1:vgpr_32(s32)
+ %6:vgpr_16(s16) = G_TRUNC %2:vgpr_32(s32)
+ %7:vgpr_16(s16) = G_TRUNC %3:vgpr_32(s32)
+ %8:vreg_64(s64) = G_MERGE_VALUES %4:vgpr_16(s16), %5:vgpr_16(s16), %6:vgpr_16(s16), %7:vgpr_16(s16)
+ $vgpr0_vgpr1 = COPY %8:vreg_64(s64)
+...
>From 1d4fd0e4c652033271be6a79a63eb7a1bb8d86e2 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Thu, 9 Jul 2026 09:46:07 +0000
Subject: [PATCH 3/3] [AMDGPU][GlobalISel] Flatten s16 merge dispatch and add
end-to-end test
Address review: merge the wide-s16 and bank checks into one condition and drop
the else in selectG_MERGE_VALUES; add an ll test that stores a wide integer
(uniform and divergent) end-to-end on gfx1150.
Co-Authored-By: Claude Opus 4.8 <noreply at anthropic.com>
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
.../AMDGPU/AMDGPUInstructionSelector.cpp | 21 ++++---
.../GlobalISel/merge-values-s16-true16.ll | 60 +++++++++++++++++++
2 files changed, 72 insertions(+), 9 deletions(-)
create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index a951c2a824c49..d1696e2cc9475 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -823,16 +823,19 @@ bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {
MI.getNumOperands() == 3) {
return selectS16MergeToS32(MI);
}
- // A scalar wider than 32 bits built from s16 pieces (with true16 a scalar
- // s16 is a register type)
- if (SrcSize == 16 && DstTy.getSizeInBits() > 32 &&
- DstTy.getSizeInBits() % 32 == 0) {
- // SGPRs have no 16-bit subregisters, so pack pairs of s16 with S_PACK.
- if (RBI.getRegBank(DstReg, *MRI, TRI)->getID() != AMDGPU::VGPRRegBankID)
- return selectS16MergeToWide(MI);
- } else {
+ // With true16 a scalar s16 is a register type, so a scalar wider than 32
+ // bits can be built from s16 pieces.
+ bool IsWideS16Merge = SrcSize == 16 && DstTy.getSizeInBits() > 32 &&
+ DstTy.getSizeInBits() % 32 == 0;
+
+ // SGPRs have no 16-bit subregisters, so pack pairs of s16 with S_PACK.
+ if (IsWideS16Merge &&
+ RBI.getRegBank(DstReg, *MRI, TRI)->getID() != AMDGPU::VGPRRegBankID)
+ return selectS16MergeToWide(MI);
+
+ // A VGPR wide s16 merge falls through to the generic path below.
+ if (!IsWideS16Merge)
return selectImpl(MI, *CoverageInfo);
- }
}
const DebugLoc &DL = MI.getDebugLoc();
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
new file mode 100644
index 0000000000000..ef877d7ba269a
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
@@ -0,0 +1,60 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1150 < %s | FileCheck -check-prefix=GFX1150 %s
+
+; With real true16 a scalar s16 is a register type, so lowering a wide/odd
+; integer store produces s64 = G_MERGE_VALUES(4 x s16). This previously failed
+; instruction selection with "cannot select". Check it now compiles: a uniform
+; value packs pairs of s16 with s_pack_ll_b32_b16 (SGPR), while a divergent
+; value uses 16-bit subregister copies (VGPR).
+
+declare i32 @llvm.amdgcn.workitem.id.x()
+
+define amdgpu_kernel void @store_i136_zero(ptr %p) {
+; GFX1150-LABEL: store_i136_zero:
+; GFX1150: ; %bb.0:
+; GFX1150-NEXT: s_load_b64 s[4:5], s[4:5], 0x0
+; GFX1150-NEXT: s_pack_ll_b32_b16 s0, 0, 0
+; GFX1150-NEXT: v_mov_b32_e32 v6, 0
+; GFX1150-NEXT: s_mov_b32 s1, s0
+; GFX1150-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1150-NEXT: s_mov_b64 s[2:3], s[0:1]
+; GFX1150-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX1150-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX1150-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1150-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
+; GFX1150-NEXT: s_clause 0x1
+; GFX1150-NEXT: flat_store_b128 v[4:5], v[0:3]
+; GFX1150-NEXT: flat_store_b8 v[4:5], v6 offset:16
+; GFX1150-NEXT: s_endpgm
+ store i136 0, ptr %p, align 8
+ ret void
+}
+
+define amdgpu_kernel void @store_i136_divergent(ptr %p) {
+; GFX1150-LABEL: store_i136_divergent:
+; GFX1150: ; %bb.0:
+; GFX1150-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX1150-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
+; GFX1150-NEXT: v_mov_b32_e32 v2, 0
+; GFX1150-NEXT: v_mov_b32_e32 v6, 0
+; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX1150-NEXT: v_lshrrev_b32_e32 v1, 8, v0
+; GFX1150-NEXT: v_and_b16 v0.l, 0xff, v0.l
+; GFX1150-NEXT: v_mov_b16_e32 v0.h, 0
+; GFX1150-NEXT: v_lshlrev_b16 v4.l, 8, v1.l
+; GFX1150-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
+; GFX1150-NEXT: v_mov_b16_e32 v1.l, v0.h
+; GFX1150-NEXT: v_mov_b16_e32 v1.h, v0.h
+; GFX1150-NEXT: v_or_b16 v0.l, v0.l, v4.l
+; GFX1150-NEXT: s_waitcnt lgkmcnt(0)
+; GFX1150-NEXT: v_dual_mov_b32 v5, s1 :: v_dual_mov_b32 v4, s0
+; GFX1150-NEXT: s_clause 0x1
+; GFX1150-NEXT: flat_store_b128 v[4:5], v[0:3]
+; GFX1150-NEXT: flat_store_b8 v[4:5], v6 offset:16
+; GFX1150-NEXT: s_endpgm
+ %tid = call i32 @llvm.amdgcn.workitem.id.x()
+ %v = trunc i32 %tid to i16
+ %z = zext i16 %v to i136
+ store i136 %z, ptr %p, align 8
+ ret void
+}
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