[llvm] [AMDGPU] Do not generate illegal vector TRUNCATE after legalization in `performShlCombine` (PR #207761)

[Matt Arsenault via llvm-commits]

Juan Manuel Martinez =?utf-8?q?Caamaño?=,
Juan Manuel Martinez =?utf-8?q?Caamaño?=,
Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/207761 at github.com>


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@@ -4416,6 +4416,12 @@ SDValue AMDGPUTargetLowering::performShlCombine(SDNode *N,
   }
 
   SDValue Lo = DAG.getNode(ISD::TRUNCATE, SL, TargetType, LHS);
+
+  // Unroll illegal vector truncate: This is normally done by the legalizer,
+  // but we might reintroduce the illegal pattern here.
+  if (DCI.isAfterLegalizeDAG() && TargetType.isVector())
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arsenm wrote:

Given that the good codegen is the dual_mov, I'm wondering if we should just make this truncate legal. 

https://github.com/llvm/llvm-project/pull/207761