[llvm] 060f128 - [RISCV] Map spacemit uarch strings to CPU names in host detection (#207636)

[via llvm-commits]

Author: Mark Zhuang
Date: 2026-07-09T09:01:22+08:00
New Revision: 060f128beedd8a6fa0bbab137dae9c4c82200a23

URL: https://github.com/llvm/llvm-project/commit/060f128beedd8a6fa0bbab137dae9c4c82200a23
DIFF: https://github.com/llvm/llvm-project/commit/060f128beedd8a6fa0bbab137dae9c4c82200a23.diff

LOG: [RISCV] Map spacemit uarch strings to CPU names in host detection (#207636)

-mcpu/-mtune=native first tries hwprobe;
when that yields no usable CPU model it falls back to the
cpuinfo uarch line. Add spacemit,x60/x100/a100 there.

Added: 
    

Modified: 
    llvm/lib/TargetParser/Host.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 4337a7d2dc2c9..269c8d6400590 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -567,6 +567,9 @@ StringRef sys::detail::getHostCPUNameForRISCV(StringRef ProcCpuinfoContent) {
       .Case("eswin,eic770x", "sifive-p550")
       .Case("sifive,u74-mc", "sifive-u74")
       .Case("sifive,bullet0", "sifive-u74")
+      .Case("spacemit,x60", "spacemit-x60")
+      .Case("spacemit,x100", "spacemit-x100")
+      .Case("spacemit,a100", "spacemit-a100")
       .Default("");
 }