[llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)

[Lukas Sommer via llvm-commits]

================
@@ -763,13 +795,105 @@ MachineInstrBuilder SIPreEmitPeephole::createUnpackedMI(MachineInstr &I,
   return NewMI;
 }
 
+std::optional<Register> SIPreEmitPeephole::checkCopy(MachineInstr &TwoAddress,
+                                                     MachineInstr &MaybeCopy,
+                                                     Register Src) {
+  if (MaybeCopy.isBundle())
+    return std::nullopt;
+
+  switch (MaybeCopy.getOpcode()) {
+  case AMDGPU::COPY:
+  case AMDGPU::V_MOV_B32_e32:
----------------
sommerlukas wrote:

`isCopyInstr` for AMD GPU only returns `WWM_COPY` in addition to the generic `COPY`. `isCopyLikeInstr` isn't implemented for the AMD backend, so it falls back to the `isCopyInstr` implementation. `isFullCopyInstr` is also based on `isCopyInstr`, so would not catch the cases interesting for us. 

https://github.com/llvm/llvm-project/pull/207731