[clang] [llvm] [Clang][P-ext] Support packed zip/unzip intrinsics (PR #208245)
Hongyu Chen via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 8 08:44:52 PDT 2026
https://github.com/XChy created https://github.com/llvm/llvm-project/pull/208245
This patch implements packed zip/unzip intrinsics with general shuffles.
The following patch will improve the codegen for such zip-style shuffles.
>From 7b832c6f00004162c87b67c284c4985ae4db2f18 Mon Sep 17 00:00:00 2001
From: XChy <xxs_chy at outlook.com>
Date: Wed, 8 Jul 2026 23:39:11 +0800
Subject: [PATCH] [Clang][P-ext] Support packed zip/unzip intrinsics
---
clang/lib/Headers/riscv_packed_simd.h | 49 +++++
clang/test/CodeGen/RISCV/rvp-intrinsics.c | 250 ++++++++++++++++++++++
llvm/test/CodeGen/RISCV/rvp-zip.ll | 147 +++++++++++++
3 files changed, 446 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/rvp-zip.ll
diff --git a/clang/lib/Headers/riscv_packed_simd.h b/clang/lib/Headers/riscv_packed_simd.h
index aca82f298ef21..cc0cafd352389 100644
--- a/clang/lib/Headers/riscv_packed_simd.h
+++ b/clang/lib/Headers/riscv_packed_simd.h
@@ -130,6 +130,33 @@ typedef uint32_t uint32x2_t __attribute__((__vector_size__(8)));
return __builtin_shufflevector(__rs1, __rs1, 7, 6, 5, 4, 3, 2, 1, 0); \
}
+#define __packed_zip2(name, rty, ty) \
+ static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1, \
+ ty __rs2) { \
+ return __builtin_shufflevector(__rs1, __rs2, 0, 2, 1, 3); \
+ }
+#define __packed_zip4(name, rty, ty) \
+ static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1, \
+ ty __rs2) { \
+ return __builtin_shufflevector(__rs1, __rs2, 0, 4, 1, 5, 2, 6, 3, 7); \
+ }
+#define __packed_unzipe2(name, rty, ty) \
+ static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1) { \
+ return __builtin_shufflevector(__rs1, __rs1, 0, 2); \
+ }
+#define __packed_unzipe4(name, rty, ty) \
+ static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1) { \
+ return __builtin_shufflevector(__rs1, __rs1, 0, 2, 4, 6); \
+ }
+#define __packed_unzipo2(name, rty, ty) \
+ static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1) { \
+ return __builtin_shufflevector(__rs1, __rs1, 1, 3); \
+ }
+#define __packed_unzipo4(name, rty, ty) \
+ static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1) { \
+ return __builtin_shufflevector(__rs1, __rs1, 1, 3, 5, 7); \
+ }
+
#define __packed_abdsum(name, rty, ty, builtin) \
static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1, \
ty __rs2) { \
@@ -437,6 +464,22 @@ __packed_reverse4(prev_u16x4, uint16x4_t)
__packed_reverse2(prev_i32x2, int32x2_t)
__packed_reverse2(prev_u32x2, uint32x2_t)
+/* Packed Zip */
+__packed_zip4(pzip_i8x8, int8x8_t, int8x4_t)
+__packed_zip4(pzip_u8x8, uint8x8_t, uint8x4_t)
+__packed_zip2(pzip_i16x4, int16x4_t, int16x2_t)
+__packed_zip2(pzip_u16x4, uint16x4_t, uint16x2_t)
+
+/* Packed Unzip */
+__packed_unzipe4(punzipe_i8x4, int8x4_t, int8x8_t)
+__packed_unzipo4(punzipo_i8x4, int8x4_t, int8x8_t)
+__packed_unzipe4(punzipe_u8x4, uint8x4_t, uint8x8_t)
+__packed_unzipo4(punzipo_u8x4, uint8x4_t, uint8x8_t)
+__packed_unzipe2(punzipe_i16x2, int16x2_t, int16x4_t)
+__packed_unzipo2(punzipo_i16x2, int16x2_t, int16x4_t)
+__packed_unzipe2(punzipe_u16x2, uint16x2_t, uint16x4_t)
+__packed_unzipo2(punzipo_u16x2, uint16x2_t, uint16x4_t)
+
/* Packed Averaging Addition and Subtraction (32-bit) */
__packed_binary_builtin(paadd_i8x4, int8x4_t, __builtin_riscv_paadd_i8x4)
__packed_binary_builtin(paadd_i16x2, int16x2_t, __builtin_riscv_paadd_i16x2)
@@ -543,6 +586,12 @@ __packed_abdsum_acc(pabdsumau_u8x8_u64, uint64_t, uint8x8_t, __builtin_riscv_pab
#undef __packed_reverse2
#undef __packed_reverse4
#undef __packed_reverse8
+#undef __packed_zip2
+#undef __packed_zip4
+#undef __packed_unzipe2
+#undef __packed_unzipe4
+#undef __packed_unzipo2
+#undef __packed_unzipo4
#undef __packed_abdsum
#undef __packed_abdsum_acc
#undef __DEFAULT_FN_ATTRS
diff --git a/clang/test/CodeGen/RISCV/rvp-intrinsics.c b/clang/test/CodeGen/RISCV/rvp-intrinsics.c
index e0398aa5b19ba..b295f656d78bc 100644
--- a/clang/test/CodeGen/RISCV/rvp-intrinsics.c
+++ b/clang/test/CodeGen/RISCV/rvp-intrinsics.c
@@ -6576,6 +6576,256 @@ uint32x2_t test_prev_u32x2(uint32x2_t rs1) {
return __riscv_prev_u32x2(rs1);
}
+/* Packed Zip */
+// RV32-LABEL: define dso_local i64 @test_pzip_i8x8(
+// RV32-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <4 x i8>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <4 x i8>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i8> [[TMP0]], <4 x i8> [[TMP1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
+// RV32-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[SHUFFLE_I]] to i64
+// RV32-NEXT: ret i64 [[TMP2]]
+//
+// RV64-LABEL: define dso_local i64 @test_pzip_i8x8(
+// RV64-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <4 x i8>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <4 x i8>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i8> [[TMP0]], <4 x i8> [[TMP1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
+// RV64-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[SHUFFLE_I]] to i64
+// RV64-NEXT: ret i64 [[TMP2]]
+//
+int8x8_t test_pzip_i8x8(int8x4_t rs1, int8x4_t rs2) {
+ return __riscv_pzip_i8x8(rs1, rs2);
+}
+
+// RV32-LABEL: define dso_local i64 @test_pzip_u8x8(
+// RV32-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <4 x i8>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <4 x i8>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i8> [[TMP0]], <4 x i8> [[TMP1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
+// RV32-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[SHUFFLE_I]] to i64
+// RV32-NEXT: ret i64 [[TMP2]]
+//
+// RV64-LABEL: define dso_local i64 @test_pzip_u8x8(
+// RV64-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <4 x i8>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <4 x i8>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i8> [[TMP0]], <4 x i8> [[TMP1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
+// RV64-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[SHUFFLE_I]] to i64
+// RV64-NEXT: ret i64 [[TMP2]]
+//
+uint8x8_t test_pzip_u8x8(uint8x4_t rs1, uint8x4_t rs2) {
+ return __riscv_pzip_u8x8(rs1, rs2);
+}
+
+// RV32-LABEL: define dso_local i64 @test_pzip_i16x4(
+// RV32-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <2 x i16>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <2 x i16>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i16> [[TMP0]], <2 x i16> [[TMP1]], <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[SHUFFLE_I]] to i64
+// RV32-NEXT: ret i64 [[TMP2]]
+//
+// RV64-LABEL: define dso_local i64 @test_pzip_i16x4(
+// RV64-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <2 x i16>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <2 x i16>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i16> [[TMP0]], <2 x i16> [[TMP1]], <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[SHUFFLE_I]] to i64
+// RV64-NEXT: ret i64 [[TMP2]]
+//
+int16x4_t test_pzip_i16x4(int16x2_t rs1, int16x2_t rs2) {
+ return __riscv_pzip_i16x4(rs1, rs2);
+}
+
+// RV32-LABEL: define dso_local i64 @test_pzip_u16x4(
+// RV32-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <2 x i16>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <2 x i16>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i16> [[TMP0]], <2 x i16> [[TMP1]], <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[SHUFFLE_I]] to i64
+// RV32-NEXT: ret i64 [[TMP2]]
+//
+// RV64-LABEL: define dso_local i64 @test_pzip_u16x4(
+// RV64-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[RS1_COERCE]] to <2 x i16>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[RS2_COERCE]] to <2 x i16>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <2 x i16> [[TMP0]], <2 x i16> [[TMP1]], <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[SHUFFLE_I]] to i64
+// RV64-NEXT: ret i64 [[TMP2]]
+//
+uint16x4_t test_pzip_u16x4(uint16x2_t rs1, uint16x2_t rs2) {
+ return __riscv_pzip_u16x4(rs1, rs2);
+}
+
+/* Packed Unzip */
+// RV32-LABEL: define dso_local i32 @test_punzipe_i8x4(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipe_i8x4(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+int8x4_t test_punzipe_i8x4(int8x8_t rs1) {
+ return __riscv_punzipe_i8x4(rs1);
+}
+
+// RV32-LABEL: define dso_local i32 @test_punzipo_i8x4(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipo_i8x4(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+int8x4_t test_punzipo_i8x4(int8x8_t rs1) {
+ return __riscv_punzipo_i8x4(rs1);
+}
+
+// RV32-LABEL: define dso_local i32 @test_punzipe_u8x4(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipe_u8x4(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+uint8x4_t test_punzipe_u8x4(uint8x8_t rs1) {
+ return __riscv_punzipe_u8x4(rs1);
+}
+
+// RV32-LABEL: define dso_local i32 @test_punzipo_u8x4(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipo_u8x4(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <8 x i8>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[TMP0]], <8 x i8> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <4 x i8> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+uint8x4_t test_punzipo_u8x4(uint8x8_t rs1) {
+ return __riscv_punzipo_u8x4(rs1);
+}
+
+// RV32-LABEL: define dso_local i32 @test_punzipe_i16x2(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 0, i32 2>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipe_i16x2(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 0, i32 2>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+int16x2_t test_punzipe_i16x2(int16x4_t rs1) {
+ return __riscv_punzipe_i16x2(rs1);
+}
+
+// RV32-LABEL: define dso_local i32 @test_punzipo_i16x2(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 1, i32 3>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipo_i16x2(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 1, i32 3>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+int16x2_t test_punzipo_i16x2(int16x4_t rs1) {
+ return __riscv_punzipo_i16x2(rs1);
+}
+
+// RV32-LABEL: define dso_local i32 @test_punzipe_u16x2(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 0, i32 2>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipe_u16x2(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 0, i32 2>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+uint16x2_t test_punzipe_u16x2(uint16x4_t rs1) {
+ return __riscv_punzipe_u16x2(rs1);
+}
+
+// RV32-LABEL: define dso_local i32 @test_punzipo_u16x2(
+// RV32-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV32-NEXT: [[ENTRY:.*:]]
+// RV32-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV32-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 1, i32 3>
+// RV32-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV32-NEXT: ret i32 [[TMP1]]
+//
+// RV64-LABEL: define dso_local i32 @test_punzipo_u16x2(
+// RV64-SAME: i64 noundef [[RS1_COERCE:%.*]]) #[[ATTR0]] {
+// RV64-NEXT: [[ENTRY:.*:]]
+// RV64-NEXT: [[TMP0:%.*]] = bitcast i64 [[RS1_COERCE]] to <4 x i16>
+// RV64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 1, i32 3>
+// RV64-NEXT: [[TMP1:%.*]] = bitcast <2 x i16> [[SHUFFLE_I]] to i32
+// RV64-NEXT: ret i32 [[TMP1]]
+//
+uint16x2_t test_punzipo_u16x2(uint16x4_t rs1) {
+ return __riscv_punzipo_u16x2(rs1);
+}
+
/* Packed Absolute Difference Sum (32-bit) */
// RV32-LABEL: define dso_local i32 @test_pabdsumu_u8x4_u32(
// RV32-SAME: i32 noundef [[RS1_COERCE:%.*]], i32 noundef [[RS2_COERCE:%.*]]) #[[ATTR0]] {
diff --git a/llvm/test/CodeGen/RISCV/rvp-zip.ll b/llvm/test/CodeGen/RISCV/rvp-zip.ll
new file mode 100644
index 0000000000000..d639269c21eab
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvp-zip.ll
@@ -0,0 +1,147 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-p,+m,+zbb \
+; RUN: -verify-machineinstrs < %s | \
+; RUN: FileCheck %s --check-prefixes=CHECK,RV32
+; RUN: llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb \
+; RUN: -verify-machineinstrs < %s | \
+; RUN: FileCheck %s --check-prefixes=CHECK,RV64
+
+define <8 x i8> @test_pzip_v8i8(<4 x i8> %a, <4 x i8> %b) {
+; RV32-LABEL: test_pzip_v8i8:
+; RV32: # %bb.0:
+; RV32-NEXT: srli a2, a1, 24
+; RV32-NEXT: srli a3, a0, 24
+; RV32-NEXT: srli a4, a1, 16
+; RV32-NEXT: srli a5, a0, 16
+; RV32-NEXT: ppaire.b a2, a3, a2
+; RV32-NEXT: ppaire.b a3, a5, a4
+; RV32-NEXT: srli a4, a1, 8
+; RV32-NEXT: srli a5, a0, 8
+; RV32-NEXT: ppaire.b a0, a0, a1
+; RV32-NEXT: ppaire.b a4, a5, a4
+; RV32-NEXT: pack a1, a3, a2
+; RV32-NEXT: pack a0, a0, a4
+; RV32-NEXT: ret
+;
+; RV64-LABEL: test_pzip_v8i8:
+; RV64: # %bb.0:
+; RV64-NEXT: srli a2, a1, 24
+; RV64-NEXT: srli a3, a0, 24
+; RV64-NEXT: srli a4, a1, 16
+; RV64-NEXT: srli a5, a0, 16
+; RV64-NEXT: ppaire.b a2, a3, a2
+; RV64-NEXT: ppaire.b a3, a5, a4
+; RV64-NEXT: srli a4, a1, 8
+; RV64-NEXT: srli a5, a0, 8
+; RV64-NEXT: ppaire.b a0, a0, a1
+; RV64-NEXT: ppaire.b a1, a5, a4
+; RV64-NEXT: ppaire.h a2, a3, a2
+; RV64-NEXT: ppaire.h a0, a0, a1
+; RV64-NEXT: pack a0, a0, a2
+; RV64-NEXT: ret
+ %r = shufflevector <4 x i8> %a, <4 x i8> %b, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
+ ret <8 x i8> %r
+}
+
+define <4 x i16> @test_pzip_v4i16(<2 x i16> %a, <2 x i16> %b) {
+; RV32-LABEL: test_pzip_v4i16:
+; RV32: # %bb.0:
+; RV32-NEXT: srli a2, a1, 16
+; RV32-NEXT: srli a3, a0, 16
+; RV32-NEXT: pack a0, a0, a1
+; RV32-NEXT: pack a1, a3, a2
+; RV32-NEXT: ret
+;
+; RV64-LABEL: test_pzip_v4i16:
+; RV64: # %bb.0:
+; RV64-NEXT: srli a2, a1, 16
+; RV64-NEXT: srli a3, a0, 16
+; RV64-NEXT: ppaire.h a0, a0, a1
+; RV64-NEXT: ppaire.h a1, a3, a2
+; RV64-NEXT: pack a0, a0, a1
+; RV64-NEXT: ret
+ %r = shufflevector <2 x i16> %a, <2 x i16> %b, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
+ ret <4 x i16> %r
+}
+
+define <4 x i8> @test_punzipe_v4i8(<8 x i8> %a) {
+; RV32-LABEL: test_punzipe_v4i8:
+; RV32: # %bb.0:
+; RV32-NEXT: srli a3, a1, 16
+; RV32-NEXT: srli a2, a0, 16
+; RV32-NEXT: ppaire.db a0, a0, a2
+; RV32-NEXT: pack a0, a0, a1
+; RV32-NEXT: ret
+;
+; RV64-LABEL: test_punzipe_v4i8:
+; RV64: # %bb.0:
+; RV64-NEXT: srli a1, a0, 48
+; RV64-NEXT: srli a2, a0, 32
+; RV64-NEXT: srli a3, a0, 16
+; RV64-NEXT: ppaire.b a1, a2, a1
+; RV64-NEXT: ppaire.b a0, a0, a3
+; RV64-NEXT: ppaire.h a0, a0, a1
+; RV64-NEXT: ret
+ %r = shufflevector <8 x i8> %a, <8 x i8> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+ ret <4 x i8> %r
+}
+
+define <4 x i8> @test_punzipo_v4i8(<8 x i8> %a) {
+; RV32-LABEL: test_punzipo_v4i8:
+; RV32: # %bb.0:
+; RV32-NEXT: srli a3, a1, 24
+; RV32-NEXT: srli a1, a1, 8
+; RV32-NEXT: srli a2, a0, 24
+; RV32-NEXT: srli a0, a0, 8
+; RV32-NEXT: ppaire.db a0, a0, a2
+; RV32-NEXT: pack a0, a0, a1
+; RV32-NEXT: ret
+;
+; RV64-LABEL: test_punzipo_v4i8:
+; RV64: # %bb.0:
+; RV64-NEXT: srli a1, a0, 56
+; RV64-NEXT: srli a2, a0, 40
+; RV64-NEXT: srli a3, a0, 24
+; RV64-NEXT: srli a0, a0, 8
+; RV64-NEXT: ppaire.b a1, a2, a1
+; RV64-NEXT: ppaire.b a0, a0, a3
+; RV64-NEXT: ppaire.h a0, a0, a1
+; RV64-NEXT: ret
+ %r = shufflevector <8 x i8> %a, <8 x i8> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
+ ret <4 x i8> %r
+}
+
+define <2 x i16> @test_punzipe_v2i16(<4 x i16> %a) {
+; RV32-LABEL: test_punzipe_v2i16:
+; RV32: # %bb.0:
+; RV32-NEXT: pack a0, a0, a1
+; RV32-NEXT: ret
+;
+; RV64-LABEL: test_punzipe_v2i16:
+; RV64: # %bb.0:
+; RV64-NEXT: srli a1, a0, 32
+; RV64-NEXT: ppaire.h a0, a0, a1
+; RV64-NEXT: ret
+ %r = shufflevector <4 x i16> %a, <4 x i16> poison, <2 x i32> <i32 0, i32 2>
+ ret <2 x i16> %r
+}
+
+define <2 x i16> @test_punzipo_v2i16(<4 x i16> %a) {
+; RV32-LABEL: test_punzipo_v2i16:
+; RV32: # %bb.0:
+; RV32-NEXT: srli a1, a1, 16
+; RV32-NEXT: srli a0, a0, 16
+; RV32-NEXT: pack a0, a0, a1
+; RV32-NEXT: ret
+;
+; RV64-LABEL: test_punzipo_v2i16:
+; RV64: # %bb.0:
+; RV64-NEXT: srli a1, a0, 48
+; RV64-NEXT: srli a0, a0, 16
+; RV64-NEXT: ppaire.h a0, a0, a1
+; RV64-NEXT: ret
+ %r = shufflevector <4 x i16> %a, <4 x i16> poison, <2 x i32> <i32 1, i32 3>
+ ret <2 x i16> %r
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
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