[llvm] 6008f67 - [AArch64][GlobalISel] Update scalar types in knownbits tests. NFC (#208199)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 8 04:35:49 PDT 2026
Author: David Green
Date: 2026-07-08T12:35:43+01:00
New Revision: 6008f6735309d3efafa8680df04f486b0819d34d
URL: https://github.com/llvm/llvm-project/commit/6008f6735309d3efafa8680df04f486b0819d34d
DIFF: https://github.com/llvm/llvm-project/commit/6008f6735309d3efafa8680df04f486b0819d34d.diff
LOG: [AArch64][GlobalISel] Update scalar types in knownbits tests. NFC (#208199)
Added:
Modified:
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abds.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abdu.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-concat.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-const.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-cttz.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-saddo.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shuffle.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-smulh.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-srem.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sve-splat.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uaddo.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-umulh.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-unmerge.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abds.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abds.mir
index 02cbc98af950a..f5e57d668ffd6 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abds.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abds.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00001010 SignBits:4
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:00000111 SignBits:5
- %0:_(s8) = G_CONSTANT i8 10
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_ABDS %0, %1
+ %0:_(i8) = G_CONSTANT i8 10
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_ABDS %0, %1
...
---
name: PartialKnown
@@ -23,11 +23,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:0000???? SignBits:4
- %0:_(s8) = G_IMPLICIT_DEF
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 4
- %4:_(s8) = G_ABDS %2, %3
+ %0:_(i8) = G_IMPLICIT_DEF
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 4
+ %4:_(i8) = G_ABDS %2, %3
...
---
@@ -40,11 +40,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %4:_ KnownBits:000000000000000000000000???????? SignBits:24
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_SEXT_INREG %0, 8
- %3:_(s32) = G_SEXT_INREG %1, 8
- %4:_(s32) = G_ABDS %2, %3
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_SEXT_INREG %0, 8
+ %3:_(i32) = G_SEXT_INREG %1, 8
+ %4:_(i32) = G_ABDS %2, %3
...
---
name: SignBitsAsymmetric
@@ -56,11 +56,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:17
; CHECK-NEXT: %4:_ KnownBits:0000000000000000???????????????? SignBits:16
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_SEXT_INREG %0, 8
- %3:_(s32) = G_SEXT_INREG %1, 16
- %4:_(s32) = G_ABDS %2, %3
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_SEXT_INREG %0, 8
+ %3:_(i32) = G_SEXT_INREG %1, 16
+ %4:_(i32) = G_ABDS %2, %3
...
---
name: Unknown
@@ -70,7 +70,7 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_ABDS %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_ABDS %0, %1
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abdu.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abdu.mir
index aa624bf377e46..864b4986b0498 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abdu.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abdu.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000101 SignBits:5
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:00000010 SignBits:6
- %0:_(s8) = G_CONSTANT i8 5
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_ABDU %0, %1
+ %0:_(i8) = G_CONSTANT i8 5
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_ABDU %0, %1
...
---
name: CstZero
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11111111 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:11111111 SignBits:8
- %0:_(s8) = G_CONSTANT i8 255
- %1:_(s8) = G_CONSTANT i8 0
- %2:_(s8) = G_ABDU %0, %1
+ %0:_(i8) = G_CONSTANT i8 255
+ %1:_(i8) = G_CONSTANT i8 0
+ %2:_(i8) = G_ABDU %0, %1
...
---
name: ScalarZero
@@ -33,9 +33,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 0
- %2:_(s8) = G_ABDU %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 0
+ %2:_(i8) = G_ABDU %0, %1
...
---
name: PartialKnown
@@ -48,11 +48,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:0000???? SignBits:4
- %0:_(s8) = G_IMPLICIT_DEF
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 4
- %4:_(s8) = G_ABDU %2, %3
+ %0:_(i8) = G_IMPLICIT_DEF
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 4
+ %4:_(i8) = G_ABDU %2, %3
...
---
name: NoSignBitsPath
@@ -64,11 +64,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????? SignBits:1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_SEXT_INREG %0, 8
- %3:_(s32) = G_SEXT_INREG %1, 8
- %4:_(s32) = G_ABDU %2, %3
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_SEXT_INREG %0, 8
+ %3:_(i32) = G_SEXT_INREG %1, 8
+ %4:_(i32) = G_ABDU %2, %3
...
---
name: VecCst
@@ -80,9 +80,9 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:00000??1 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:00000??1 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:00000??0 SignBits:5
- %0:_(s8) = G_CONSTANT i8 5
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
- %3:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
- %4:_(<2 x s8>) = G_ABDU %2, %3
+ %0:_(i8) = G_CONSTANT i8 5
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0, %1
+ %3:_(<2 x i8>) = G_BUILD_VECTOR %0, %1
+ %4:_(<2 x i8>) = G_ABDU %2, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir
index b4ac62cd992cf..42937b62be963 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir
@@ -8,8 +8,8 @@ body: |
; CHECK-LABEL: name: @Cst
; CHECK-NEXT: %0:_ KnownBits:00010011 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:00010011 SignBits:3
- %0:_(s8) = G_CONSTANT i8 19
- %1:_(s8) = G_ABS %0
+ %0:_(i8) = G_CONSTANT i8 19
+ %1:_(i8) = G_ABS %0
...
---
name: CstNeg
@@ -18,8 +18,8 @@ body: |
; CHECK-LABEL: name: @CstNeg
; CHECK-NEXT: %0:_ KnownBits:11101110 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:00010010 SignBits:3
- %0:_(s8) = G_CONSTANT i8 238
- %1:_(s8) = G_ABS %0
+ %0:_(i8) = G_CONSTANT i8 238
+ %1:_(i8) = G_ABS %0
...
---
name: SplatVecCst
@@ -29,9 +29,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11111010 SignBits:5
; CHECK-NEXT: %1:_ KnownBits:11111010 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:00000110 SignBits:5
- %0:_(s8) = G_CONSTANT i8 250
- %1:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %0(s8)
- %2:_(<vscale x 16 x s8>) = G_ABS %1
+ %0:_(i8) = G_CONSTANT i8 250
+ %1:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %0(i8)
+ %2:_(<vscale x 16 x i8>) = G_ABS %1
...
---
name: VecCst
@@ -42,10 +42,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:11100001 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:?????001 SignBits:3
; CHECK-NEXT: %3:_ KnownBits:00?????1 SignBits:2
- %0:_(s8) = G_CONSTANT i8 25
- %1:_(s8) = G_CONSTANT i8 225
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %1:_(s8)
- %3:_(<2 x s8>) = G_ABS %2
+ %0:_(i8) = G_CONSTANT i8 25
+ %1:_(i8) = G_CONSTANT i8 225
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %1:_(i8)
+ %3:_(<2 x i8>) = G_ABS %2
...
---
name: ImplicitDef
@@ -54,8 +54,8 @@ body: |
; CHECK-LABEL: name: @ImplicitDef
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
- %0:_(s8) = G_IMPLICIT_DEF
- %1:_(s8) = G_ABS %0
+ %0:_(i8) = G_IMPLICIT_DEF
+ %1:_(i8) = G_ABS %0
...
---
name: CstSext
@@ -65,9 +65,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11000111 SignBits:2
; CHECK-NEXT: %1:_ KnownBits:1111111111000111 SignBits:10
; CHECK-NEXT: %2:_ KnownBits:0000000000111001 SignBits:10
- %0:_(s8) = G_CONSTANT i8 199
- %1:_(s16) = G_SEXT %0
- %2:_(s16) = G_ABS %1
+ %0:_(i8) = G_CONSTANT i8 199
+ %1:_(i16) = G_SEXT %0
+ %2:_(i16) = G_ABS %1
...
---
name: ImplicitDefSext
@@ -77,7 +77,7 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %2:_ KnownBits:00000000???????? SignBits:8
- %0:_(s8) = G_IMPLICIT_DEF
- %1:_(s16) = G_SEXT %0
- %2:_(s16) = G_ABS %1
+ %0:_(i8) = G_IMPLICIT_DEF
+ %1:_(i16) = G_SEXT %0
+ %2:_(i16) = G_ABS %1
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
index 824ada1cf4a05..ca67dbbd701cd 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %1:_ KnownBits:00011000 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:00011010 SignBits:3
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 24
- %2:_(s8) = G_ADD %0, %1
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 24
+ %2:_(i8) = G_ADD %0, %1
...
---
name: CstZero
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000001 SignBits:7
; CHECK-NEXT: %1:_ KnownBits:11111111 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = G_CONSTANT i8 1
- %1:_(s8) = G_CONSTANT i8 255
- %2:_(s8) = G_ADD %0, %1
+ %0:_(i8) = G_CONSTANT i8 1
+ %1:_(i8) = G_CONSTANT i8 255
+ %2:_(i8) = G_ADD %0, %1
...
---
name: CstNegOne
@@ -33,9 +33,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:11111111 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:11111111 SignBits:8
- %0:_(s8) = G_CONSTANT i8 0
- %1:_(s8) = G_CONSTANT i8 255
- %2:_(s8) = G_ADD %0, %1
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CONSTANT i8 255
+ %2:_(i8) = G_ADD %0, %1
...
---
name: CstSeven
@@ -45,9 +45,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00001000 SignBits:4
; CHECK-NEXT: %1:_ KnownBits:11111111 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:00000111 SignBits:5
- %0:_(s8) = G_CONSTANT i8 8
- %1:_(s8) = G_CONSTANT i8 255
- %2:_(s8) = G_ADD %0, %1
+ %0:_(i8) = G_CONSTANT i8 8
+ %1:_(i8) = G_CONSTANT i8 255
+ %2:_(i8) = G_ADD %0, %1
...
---
name: CstNeg
@@ -57,9 +57,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:11100010 SignBits:3
- %0:_(s8) = G_CONSTANT i8 224
- %1:_(s8) = G_CONSTANT i8 2
- %2:_(s8) = G_ADD %0, %1
+ %0:_(i8) = G_CONSTANT i8 224
+ %1:_(i8) = G_CONSTANT i8 2
+ %2:_(i8) = G_ADD %0, %1
...
---
name: ScalarVar
@@ -69,9 +69,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_ADD %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_ADD %0, %1
...
---
name: ScalarRhsEarlyOut
@@ -81,9 +81,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_ADD %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_ADD %0, %1
...
---
name: ScalarNonNegative
@@ -95,11 +95,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:11111111 SignBits:8
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:4
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 255
- %4:_(s8) = G_ADD %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 255
+ %4:_(i8) = G_ADD %2, %3
...
---
name: ScalarLhsEarlyOut
@@ -109,9 +109,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_ADD %1, %0
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_ADD %1, %0
...
---
name: ScalarPartKnown
@@ -123,11 +123,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00000101 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:000????? SignBits:3
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 5
- %4:_(s8) = G_ADD %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 5
+ %4:_(i8) = G_ADD %2, %3
...
---
name: VectorCstZero
@@ -139,11 +139,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000001 SignBits:15
; CHECK-NEXT: %3:_ KnownBits:1111111111111111 SignBits:16
; CHECK-NEXT: %4:_ KnownBits:0000000000000000 SignBits:16
- %0:_(s16) = G_CONSTANT i16 1
- %1:_(s16) = G_CONSTANT i16 65535
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>) = G_ADD %2, %3
+ %0:_(i16) = G_CONSTANT i16 1
+ %1:_(i16) = G_CONSTANT i16 65535
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>) = G_ADD %2, %3
...
---
name: VectorCstNegOne
@@ -155,11 +155,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %3:_ KnownBits:1111111111111111 SignBits:16
; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(s16) = G_CONSTANT i16 65535
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>) = G_ADD %2, %3
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(i16) = G_CONSTANT i16 65535
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>) = G_ADD %2, %3
...
---
name: VectorVar
@@ -169,9 +169,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>) = G_ADD %0, %1
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>) = G_ADD %0, %1
...
---
name: VectorRhsEarlyOut
@@ -182,10 +182,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_ADD %2, %0
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_ADD %2, %0
...
---
name: VectorNonNegative
@@ -199,13 +199,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
; CHECK-NEXT: %5:_ KnownBits:1111111111111111 SignBits:16
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:8
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 65535
- %5:_(<4 x s16>) = G_BUILD_VECTOR %4, %4, %4, %4
- %6:_(<4 x s16>) = G_ADD %3, %5
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 65535
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %4, %4, %4, %4
+ %6:_(<4 x i16>) = G_ADD %3, %5
...
---
name: VectorLhsEarlyOut
@@ -216,10 +216,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_ADD %0, %2
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_ADD %0, %2
...
---
name: VectorPartKnown
@@ -234,14 +234,14 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:0000000001001010 SignBits:9
; CHECK-NEXT: %6:_ KnownBits:000000000??01010 SignBits:9
; CHECK-NEXT: %7:_ KnownBits:0000000????????? SignBits:7
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 42
- %5:_(s16) = G_CONSTANT i16 74
- %6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
- %7:_(<4 x s16>) = G_ADD %6, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 42
+ %5:_(i16) = G_CONSTANT i16 74
+ %6:_(<4 x i16>) = G_BUILD_VECTOR %4, %5, %5, %4
+ %7:_(<4 x i16>) = G_ADD %6, %3
...
---
name: VectorCst36
@@ -253,11 +253,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:000000000000???? SignBits:12
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %4:_(<4 x s16>) = G_ADD %2, %3
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x i16>) = G_ADD %2, %3
...
---
@@ -270,9 +270,9 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>) = G_ADD %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>) = G_ADD %0, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
index ee354479d603c..0350489c73dfa 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:10000000 SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:11110000 SignBits:4
- %0:_(s8) = G_CONSTANT i8 128
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_ASHR %0, %1
+ %0:_(i8) = G_CONSTANT i8 128
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_ASHR %0, %1
...
---
name: CstBig
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11111000 SignBits:5
; CHECK-NEXT: %1:_ KnownBits:00000110 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:11111111 SignBits:8
- %0:_(s8) = G_CONSTANT i8 248
- %1:_(s8) = G_CONSTANT i8 6
- %2:_(s8) = G_ASHR %0, %1
+ %0:_(i8) = G_CONSTANT i8 248
+ %1:_(i8) = G_CONSTANT i8 6
+ %2:_(i8) = G_ASHR %0, %1
...
---
name: ScalarVar
@@ -33,9 +33,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_ASHR %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_ASHR %0, %1
...
---
name: ScalarCst
@@ -45,9 +45,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:4
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_ASHR %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_ASHR %0, %1
...
---
name: VectorVar
@@ -57,9 +57,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>) = G_ASHR %0, %1
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>) = G_ASHR %0, %1
...
---
name: VectorCst
@@ -70,10 +70,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:4
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_ASHR %0, %2
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_ASHR %0, %2
...
---
name: VectorCst36
@@ -85,11 +85,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000110 SignBits:13
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:4
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(s16) = G_CONSTANT i16 6
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>) = G_ASHR %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(i16) = G_CONSTANT i16 6
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>) = G_ASHR %0, %3
...
---
name: VectorCst3unknown
@@ -101,9 +101,9 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>) = G_ASHR %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>) = G_ASHR %0, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir
index 9b2089f17dea4..3507638dc8991 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir
@@ -8,8 +8,8 @@ body: |
; CHECK-LABEL: name: @ScalarConst
; CHECK-NEXT: %0:_ KnownBits:00000000000000000000000001111000 SignBits:25
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000001111000 SignBits:25
- %0:_(s32) = G_CONSTANT i32 120
- %1:_(s32) = G_ASSERT_ZEXT %0(s32), 16
+ %0:_(i32) = G_CONSTANT i32 120
+ %1:_(i32) = G_ASSERT_ZEXT %0(i32), 16
...
---
name: ScalarVar
@@ -18,8 +18,8 @@ body: |
; CHECK-LABEL: name: @ScalarVar
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000000???????????????? SignBits:16
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_ASSERT_ZEXT %0(s32), 16
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = G_ASSERT_ZEXT %0(i32), 16
...
---
name: VectorCst
@@ -29,9 +29,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000000000000000000000001111000 SignBits:25
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000001111000 SignBits:25
; CHECK-NEXT: %2:_ KnownBits:00000000000000000000000001111000 SignBits:25
- %0:_(s32) = G_CONSTANT i32 120
- %1:_(<4 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0
- %2:_(<4 x s32>) = G_ASSERT_ZEXT %1(<4 x s32>), 16
+ %0:_(i32) = G_CONSTANT i32 120
+ %1:_(<4 x i32>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %2:_(<4 x i32>) = G_ASSERT_ZEXT %1(<4 x i32>), 16
...
---
name: VectorVar
@@ -40,8 +40,8 @@ body: |
; CHECK-LABEL: name: @VectorVar
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000000???????????????? SignBits:16
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s32>) = G_ASSERT_ZEXT %0(<4 x s32>), 16
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i32>) = G_ASSERT_ZEXT %0(<4 x i32>), 16
...
---
name: ScalableCst
@@ -51,9 +51,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000000000000000000000001111000 SignBits:25
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000001111000 SignBits:25
; CHECK-NEXT: %2:_ KnownBits:00000000000000000000000001111000 SignBits:25
- %0:_(s32) = G_CONSTANT i32 120
- %1:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR %0
- %2:_(<vscale x 4 x s32>) = G_ASSERT_ZEXT %1(<vscale x 4 x s32>), 16
+ %0:_(i32) = G_CONSTANT i32 120
+ %1:_(<vscale x 4 x i32>) = G_SPLAT_VECTOR %0
+ %2:_(<vscale x 4 x i32>) = G_ASSERT_ZEXT %1(<vscale x 4 x i32>), 16
...
---
name: ScalableVar
@@ -62,6 +62,6 @@ body: |
; CHECK-LABEL: name: @ScalableVar
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000000???????????????? SignBits:16
- %0:_(<vscale x 4 x s32>) = COPY $z0
- %1:_(<vscale x 4 x s32>) = G_ASSERT_ZEXT %0(<vscale x 4 x s32>), 16
+ %0:_(<vscale x 4 x i32>) = COPY $z0
+ %1:_(<vscale x 4 x i32>) = G_ASSERT_ZEXT %0(<vscale x 4 x i32>), 16
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
index 94ea12d3c66d9..c2a29afee203f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %1:_ KnownBits:00001010 SignBits:4
; CHECK-NEXT: %2:_ KnownBits:0000?01? SignBits:4
- %0:_(s8) = G_CONSTANT i8 3
- %1:_(s8) = G_CONSTANT i8 10
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
+ %0:_(i8) = G_CONSTANT i8 3
+ %1:_(i8) = G_CONSTANT i8 10
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0, %1
...
---
name: const_lane1
@@ -23,11 +23,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000?01? SignBits:4
; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
; CHECK-NEXT: %4:_ KnownBits:00001010 SignBits:4
- %0:_(s8) = G_CONSTANT i8 3
- %1:_(s8) = G_CONSTANT i8 10
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
- %idx:_(s64) = G_CONSTANT i64 1
- %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %idx
+ %0:_(i8) = G_CONSTANT i8 3
+ %1:_(i8) = G_CONSTANT i8 10
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0, %1
+ %idx:_(i64) = G_CONSTANT i64 1
+ %3:_(i8) = G_EXTRACT_VECTOR_ELT %2, %idx
...
---
name: sextsignbits
@@ -39,11 +39,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:17
; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????? SignBits:17
- %0:_(s8) = COPY $b0
- %1:_(s16) = COPY $h1
- %2:_(s32) = G_SEXT %0
- %3:_(s32) = G_SEXT %1
- %4:_(<2 x s32>) = G_BUILD_VECTOR %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = COPY $h1
+ %2:_(i32) = G_SEXT %0
+ %3:_(i32) = G_SEXT %1
+ %4:_(<2 x i32>) = G_BUILD_VECTOR %2, %3
...
---
name: sextsignbits_lane1
@@ -57,11 +57,11 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????? SignBits:17
; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
; CHECK-NEXT: %6:_ KnownBits:???????????????????????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s16) = COPY $h1
- %2:_(s32) = G_SEXT %0
- %3:_(s32) = G_SEXT %1
- %4:_(<2 x s32>) = G_BUILD_VECTOR %2, %3
- %idx:_(s64) = G_CONSTANT i64 1
- %5:_(s32) = G_EXTRACT_VECTOR_ELT %4, %idx
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = COPY $h1
+ %2:_(i32) = G_SEXT %0
+ %3:_(i32) = G_SEXT %1
+ %4:_(<2 x i32>) = G_BUILD_VECTOR %2, %3
+ %idx:_(i64) = G_CONSTANT i64 1
+ %5:_(i32) = G_EXTRACT_VECTOR_ELT %4, %idx
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-concat.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-concat.mir
index 03f7533c7d604..cb8ae3eba75e5 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-concat.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-concat.mir
@@ -10,9 +10,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s8>) = COPY $h1
- %2:_(<4 x s8>) = G_CONCAT_VECTORS %0, %1
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i8>) = COPY $h1
+ %2:_(<4 x i8>) = G_CONCAT_VECTORS %0, %1
...
---
name: zext_concat
@@ -25,11 +25,11 @@ body: |
; CHECK-NEXT: %zext0:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %zext1:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %res:_ KnownBits:00000000???????? SignBits:8
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s8>) = COPY $h1
- %zext0:_(<2 x s16>) = G_ZEXT %0
- %zext1:_(<2 x s16>) = G_ZEXT %1
- %res:_(<4 x s16>) = G_CONCAT_VECTORS %zext0, %zext1
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i8>) = COPY $h1
+ %zext0:_(<2 x i16>) = G_ZEXT %0
+ %zext1:_(<2 x i16>) = G_ZEXT %1
+ %res:_(<4 x i16>) = G_CONCAT_VECTORS %zext0, %zext1
...
---
@@ -43,11 +43,11 @@ body: |
; CHECK-NEXT: %sext0:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %sext1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %res:_ KnownBits:???????????????? SignBits:9
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s8>) = COPY $h1
- %sext0:_(<2 x s16>) = G_SEXT %0
- %sext1:_(<2 x s16>) = G_SEXT %1
- %res:_(<4 x s16>) = G_CONCAT_VECTORS %sext0, %sext1
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i8>) = COPY $h1
+ %sext0:_(<2 x i16>) = G_SEXT %0
+ %sext1:_(<2 x i16>) = G_SEXT %1
+ %res:_(<4 x i16>) = G_CONCAT_VECTORS %sext0, %sext1
...
---
@@ -61,9 +61,9 @@ body: |
; CHECK-NEXT: %zext0:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %sext1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %res:_ KnownBits:???????????????? SignBits:8
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s8>) = COPY $h1
- %zext0:_(<2 x s16>) = G_ZEXT %0
- %sext1:_(<2 x s16>) = G_SEXT %1
- %res:_(<4 x s16>) = G_CONCAT_VECTORS %zext0, %sext1
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i8>) = COPY $h1
+ %zext0:_(<2 x i16>) = G_ZEXT %0
+ %sext1:_(<2 x i16>) = G_SEXT %1
+ %res:_(<4 x i16>) = G_CONCAT_VECTORS %zext0, %sext1
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-const.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-const.mir
index 00af98cc504c3..07833c38d38fb 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-const.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-const.mir
@@ -9,8 +9,8 @@ body: |
; CHECK-LABEL: name: @Cst
; CHECK-NEXT: %0:_ KnownBits:00000001 SignBits:7
; CHECK-NEXT: %1:_ KnownBits:00000001 SignBits:7
- %0:_(s8) = G_CONSTANT i8 1
- %1:_(s8) = COPY %0
+ %0:_(i8) = G_CONSTANT i8 1
+ %1:_(i8) = COPY %0
...
---
name: CstWithClass
@@ -23,5 +23,5 @@ body: |
; CHECK-LABEL: name: @CstWithClass
; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
%0:gpr32 = MOVi32imm 1
- %1:_(s32) = COPY %0
+ %1:_(i32) = COPY %0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir
index 4bb2b3d5bc205..3b3e6f423efa1 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir
@@ -15,12 +15,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:00??0000 SignBits:2
; CHECK-NEXT: %4:_ KnownBits:00??1000 SignBits:2
; CHECK-NEXT: %5:_ KnownBits:00000??? SignBits:5
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 48
- %2:_(s8) = G_CONSTANT i8 8
- %3:_(s8) = G_AND %0, %1
- %4:_(s8) = G_OR %3, %2
- %5:_(s8) = G_CTLS %4
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 48
+ %2:_(i8) = G_CONSTANT i8 8
+ %3:_(i8) = G_AND %0, %1
+ %4:_(i8) = G_OR %3, %2
+ %5:_(i8) = G_CTLS %4
...
---
@@ -30,8 +30,8 @@ body: |
; CHECK-LABEL: name: @CTLSNoKnown8
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000??? SignBits:13
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_CTLS %0
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_CTLS %0
...
---
@@ -41,8 +41,8 @@ body: |
; CHECK-LABEL: name: @CTLSNoKnown16
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:000000000000???? SignBits:12
- %0:_(s16) = COPY $h0
- %1:_(s16) = G_CTLS %0
+ %0:_(i16) = COPY $h0
+ %1:_(i16) = G_CTLS %0
...
---
@@ -52,8 +52,8 @@ body: |
; CHECK-LABEL: name: @CTLSNoKnown32
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000000????? SignBits:11
- %0:_(s32) = COPY $s0
- %1:_(s16) = G_CTLS %0
+ %0:_(i32) = COPY $s0
+ %1:_(i16) = G_CTLS %0
...
@@ -66,10 +66,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:00000?00 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:000001?? SignBits:5
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CTLS %2
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CTLS %2
...
---
@@ -81,10 +81,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000001000000 SignBits:9
; CHECK-NEXT: %2:_ KnownBits:000000000?000000 SignBits:9
; CHECK-NEXT: %3:_ KnownBits:0000000000001??? SignBits:12
- %0:_(s16) = COPY $h0
- %1:_(s16) = G_CONSTANT i16 64
- %2:_(s16) = G_AND %0, %1
- %3:_(s16) = G_CTLS %2
+ %0:_(i16) = COPY $h0
+ %1:_(i16) = G_CONSTANT i16 64
+ %2:_(i16) = G_AND %0, %1
+ %3:_(i16) = G_CTLS %2
...
---
@@ -94,8 +94,8 @@ body: |
; CHECK-LABEL: name: @CTLSHalfConst8Zero
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000111 SignBits:5
- %0:_(s8) = G_CONSTANT i8 0
- %1:_(s8) = G_CTLS %0
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CTLS %0
...
---
@@ -105,8 +105,8 @@ body: |
; CHECK-LABEL: name: @CTLSHalfConst16Zero
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %1:_ KnownBits:0000000000001111 SignBits:12
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(s16) = G_CTLS %0
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(i16) = G_CTLS %0
...
---
@@ -117,9 +117,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %1:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %2:_ KnownBits:0000000000001111 SignBits:12
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_CTLS %1
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_CTLS %1
...
---
@@ -133,12 +133,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:000000000000???? SignBits:12
- %0:_(s16) = COPY $h0
- %1:_(s16) = G_CONSTANT i16 8
- %2:_(s16) = G_ASHR %0, %1
- %3:_(s16) = COPY $h1
- %4:_(<4 x s16>) = G_BUILD_VECTOR %2, %3, %2, %3
- %5:_(<4 x s16>) = G_CTLS %4
+ %0:_(i16) = COPY $h0
+ %1:_(i16) = G_CONSTANT i16 8
+ %2:_(i16) = G_ASHR %0, %1
+ %3:_(i16) = COPY $h1
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %2, %3, %2, %3
+ %5:_(<4 x i16>) = G_CTLS %4
...
---
@@ -154,14 +154,14 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %7:_ KnownBits:0000000000001??? SignBits:12
- %0:_(s16) = COPY $h0
- %1:_(s16) = G_CONSTANT i16 8
- %2:_(s16) = G_ASHR %0, %1
- %3:_(s16) = COPY $h1
- %4:_(s16) = G_CONSTANT i16 10
- %5:_(s16) = G_ASHR %4, %5
- %6:_(<4 x s16>) = G_BUILD_VECTOR %2, %5, %2, %4
- %7:_(<4 x s16>) = G_CTLS %6
+ %0:_(i16) = COPY $h0
+ %1:_(i16) = G_CONSTANT i16 8
+ %2:_(i16) = G_ASHR %0, %1
+ %3:_(i16) = COPY $h1
+ %4:_(i16) = G_CONSTANT i16 10
+ %5:_(i16) = G_ASHR %4, %5
+ %6:_(<4 x i16>) = G_BUILD_VECTOR %2, %5, %2, %4
+ %7:_(<4 x i16>) = G_CTLS %6
...
---
@@ -173,10 +173,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000000010000 SignBits:27
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:17
; CHECK-NEXT: %3:_ KnownBits:0000000000000000000000000001???? SignBits:27
- %0:_(s32) = COPY $s0
- %1:_(s32) = G_CONSTANT i32 16
- %2:_(s32) = G_ASHR %0, %1
- %3:_(s32) = G_CTLS %2
+ %0:_(i32) = COPY $s0
+ %1:_(i32) = G_CONSTANT i32 16
+ %2:_(i32) = G_ASHR %0, %1
+ %3:_(i32) = G_CTLS %2
...
---
@@ -188,8 +188,8 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000000001111 SignBits:28
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:16
; CHECK-NEXT: %3:_ KnownBits:000000000000000000000000000????? SignBits:27
- %0:_(s32) = COPY $s0
- %1:_(s32) = G_CONSTANT i32 15
- %2:_(s32) = G_ASHR %0, %1
- %3:_(s32) = G_CTLS %2
+ %0:_(i32) = COPY $s0
+ %1:_(i32) = G_CONSTANT i32 15
+ %2:_(i32) = G_ASHR %0, %1
+ %3:_(i32) = G_CTLS %2
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-cttz.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-cttz.mir
index 0c66517f31bd7..b5b5b81b4a222 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-cttz.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-cttz.mir
@@ -8,8 +8,8 @@ body: |
; CHECK-LABEL: name: @CTTZNoKnown8
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:000000000000???? SignBits:12
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_CTTZ %0
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_CTTZ %0
...
---
@@ -19,8 +19,8 @@ body: |
; CHECK-LABEL: name: @CTTZNoKnown16
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000000????? SignBits:11
- %0:_(s16) = COPY $h0
- %1:_(s16) = G_CTTZ %0
+ %0:_(i16) = COPY $h0
+ %1:_(i16) = G_CTTZ %0
...
---
@@ -30,8 +30,8 @@ body: |
; CHECK-LABEL: name: @CTTZNoKnown32
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000?????? SignBits:10
- %0:_(s32) = COPY $s0
- %1:_(s16) = G_CTTZ %0
+ %0:_(i32) = COPY $s0
+ %1:_(i16) = G_CTTZ %0
...
@@ -44,10 +44,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:?????1?? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:000000?? SignBits:6
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_OR %0, %1
- %3:_(s8) = G_CTTZ %2
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_OR %0, %1
+ %3:_(i8) = G_CTTZ %2
...
---
@@ -59,10 +59,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000001000000 SignBits:9
; CHECK-NEXT: %2:_ KnownBits:?????????1?????? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:0000000000000??? SignBits:13
- %0:_(s16) = COPY $h0
- %1:_(s16) = G_CONSTANT i16 64
- %2:_(s16) = G_OR %0, %1
- %3:_(s16) = G_CTTZ %2
+ %0:_(i16) = COPY $h0
+ %1:_(i16) = G_CONSTANT i16 64
+ %2:_(i16) = G_OR %0, %1
+ %3:_(i16) = G_CTTZ %2
...
---
@@ -72,8 +72,8 @@ body: |
; CHECK-LABEL: name: @CTTZHalfConst8Zero
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:0000???? SignBits:4
- %0:_(s8) = G_CONSTANT i8 0
- %1:_(s8) = G_CTTZ %0
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CTTZ %0
...
---
@@ -83,8 +83,8 @@ body: |
; CHECK-LABEL: name: @CTTZHalfConst16Zero
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %1:_ KnownBits:00000000000????? SignBits:11
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(s16) = G_CTTZ %0
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(i16) = G_CTTZ %0
...
---
@@ -94,8 +94,8 @@ body: |
; CHECK-LABEL: name: @CTTZHalfConst8
; CHECK-NEXT: %0:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %1:_ KnownBits:000000?? SignBits:6
- %0:_(s8) = G_CONSTANT i8 4
- %1:_(s8) = G_CTTZ %0
+ %0:_(i8) = G_CONSTANT i8 4
+ %1:_(i8) = G_CTTZ %0
...
---
@@ -105,7 +105,7 @@ body: |
; CHECK-LABEL: name: @CTTZHalfConst16
; CHECK-NEXT: %0:_ KnownBits:0000000000000100 SignBits:13
; CHECK-NEXT: %1:_ KnownBits:00000000000000?? SignBits:14
- %0:_(s16) = G_CONSTANT i16 4
- %1:_(s16) = G_CTTZ %0
+ %0:_(i16) = G_CONSTANT i16 4
+ %1:_(i16) = G_CTTZ %0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir
index ab576dfccc40c..7ff593f18adc9 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir
@@ -11,11 +11,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000?01? SignBits:4
; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
; CHECK-NEXT: %4:_ KnownBits:00001010 SignBits:4
- %0:_(s8) = G_CONSTANT i8 3
- %1:_(s8) = G_CONSTANT i8 10
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
- %idx:_(s64) = G_CONSTANT i64 1
- %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %idx
+ %0:_(i8) = G_CONSTANT i8 3
+ %1:_(i8) = G_CONSTANT i8 10
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0, %1
+ %idx:_(i64) = G_CONSTANT i64 1
+ %3:_(i8) = G_EXTRACT_VECTOR_ELT %2, %idx
...
---
name: all_knownbits
@@ -27,11 +27,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000?01? SignBits:4
; CHECK-NEXT: %idx:_ KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:0000?01? SignBits:4
- %0:_(s8) = G_CONSTANT i8 3
- %1:_(s8) = G_CONSTANT i8 10
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
- %idx:_(s64) = COPY $d0
- %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %idx
+ %0:_(i8) = G_CONSTANT i8 3
+ %1:_(i8) = G_CONSTANT i8 10
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0, %1
+ %idx:_(i64) = COPY $d0
+ %3:_(i8) = G_EXTRACT_VECTOR_ELT %2, %idx
...
---
name: no_knownbits_const_idx
@@ -41,9 +41,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %idx:_(s64) = G_CONSTANT i64 1
- %1:_(s8) = G_EXTRACT_VECTOR_ELT %0, %idx
+ %0:_(<2 x i8>) = COPY $h0
+ %idx:_(i64) = G_CONSTANT i64 1
+ %1:_(i8) = G_EXTRACT_VECTOR_ELT %0, %idx
...
---
name: no_knownbits
@@ -53,9 +53,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %idx:_ KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %idx:_(s64) = COPY $d1
- %1:_(s8) = G_EXTRACT_VECTOR_ELT %0, %idx
+ %0:_(<2 x i8>) = COPY $h0
+ %idx:_(i64) = COPY $d1
+ %1:_(i8) = G_EXTRACT_VECTOR_ELT %0, %idx
...
---
name: zext_const_idx
@@ -66,10 +66,10 @@ body: |
; CHECK-NEXT: %zext0:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
- %0:_(<2 x s8>) = COPY $h0
- %zext0:_(<2 x s16>) = G_ZEXT %0
- %idx:_(s64) = G_CONSTANT i64 1
- %1:_(s16) = G_EXTRACT_VECTOR_ELT %zext0, %idx
+ %0:_(<2 x i8>) = COPY $h0
+ %zext0:_(<2 x i16>) = G_ZEXT %0
+ %idx:_(i64) = G_CONSTANT i64 1
+ %1:_(i16) = G_EXTRACT_VECTOR_ELT %zext0, %idx
...
---
name: zext
@@ -81,10 +81,10 @@ body: |
; CHECK-NEXT: %zext0:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %idx:_ KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
- %0:_(<2 x s8>) = COPY $h0
- %zext0:_(<2 x s16>) = G_ZEXT %0
- %idx:_(s64) = COPY $d1
- %1:_(s16) = G_EXTRACT_VECTOR_ELT %zext0, %idx
+ %0:_(<2 x i8>) = COPY $h0
+ %zext0:_(<2 x i16>) = G_ZEXT %0
+ %idx:_(i64) = COPY $d1
+ %1:_(i16) = G_EXTRACT_VECTOR_ELT %zext0, %idx
...
---
name: sext_const_idx
@@ -95,10 +95,10 @@ body: |
; CHECK-NEXT: %sext0:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %sext0:_(<2 x s16>) = G_SEXT %0
- %idx:_(s64) = G_CONSTANT i64 1
- %1:_(s16) = G_EXTRACT_VECTOR_ELT %sext0, %idx
+ %0:_(<2 x i8>) = COPY $h0
+ %sext0:_(<2 x i16>) = G_SEXT %0
+ %idx:_(i64) = G_CONSTANT i64 1
+ %1:_(i16) = G_EXTRACT_VECTOR_ELT %sext0, %idx
...
---
name: sext
@@ -109,10 +109,10 @@ body: |
; CHECK-NEXT: %sext0:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %idx:_ KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %sext0:_(<2 x s16>) = G_SEXT %0
- %idx:_(s64) = COPY $d1
- %1:_(s16) = G_EXTRACT_VECTOR_ELT %sext0, %idx
+ %0:_(<2 x i8>) = COPY $h0
+ %sext0:_(<2 x i16>) = G_SEXT %0
+ %idx:_(i64) = COPY $d1
+ %1:_(i16) = G_EXTRACT_VECTOR_ELT %sext0, %idx
...
---
# Verifies known bit computation bails if return type
diff ers from vector
@@ -126,8 +126,8 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000?01? SignBits:4
; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 3
- %1:_(s8) = G_CONSTANT i8 10
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
- %idx:_(s64) = G_CONSTANT i64 1
- %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %idx
+ %0:_(i8) = G_CONSTANT i8 3
+ %1:_(i8) = G_CONSTANT i8 10
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0, %1
+ %idx:_(i64) = G_CONSTANT i64 1
+ %3:_(i16) = G_EXTRACT_VECTOR_ELT %2, %idx
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
index 202a40831145e..685e22461e110 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
@@ -10,10 +10,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
; CHECK-NEXT: %2:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %3:_ KnownBits:10000000 SignBits:1
- %0:_(s8) = G_CONSTANT i8 224
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_CONSTANT i8 2
- %3:_(s8) = G_FSHL %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 224
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_CONSTANT i8 2
+ %3:_(i8) = G_FSHL %0, %1, %2
...
---
name: CstBig
@@ -24,10 +24,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:00000110 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:01111000 SignBits:1
- %0:_(s8) = G_CONSTANT i8 249
- %1:_(s8) = G_CONSTANT i8 224
- %2:_(s8) = G_CONSTANT i8 6
- %3:_(s8) = G_FSHL %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 249
+ %1:_(i8) = G_CONSTANT i8 224
+ %2:_(i8) = G_CONSTANT i8 6
+ %3:_(i8) = G_FSHL %0, %1, %2
...
---
name: CstSext
@@ -40,12 +40,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %5:_ KnownBits:11000111 SignBits:2
- %0:_(s8) = G_CONSTANT i8 129
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s8) = G_CONSTANT i8 224
- %4:_(s8) = G_CONSTANT i8 3
- %5:_(s8) = G_FSHL %2, %3, %4
+ %0:_(i8) = G_CONSTANT i8 129
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i8) = G_CONSTANT i8 224
+ %4:_(i8) = G_CONSTANT i8 3
+ %5:_(i8) = G_FSHL %2, %3, %4
...
---
name: CstSextBig
@@ -58,12 +58,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:00000110 SignBits:5
; CHECK-NEXT: %5:_ KnownBits:00111000 SignBits:2
- %0:_(s8) = G_CONSTANT i8 129
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s8) = G_CONSTANT i8 224
- %4:_(s8) = G_CONSTANT i8 6
- %5:_(s8) = G_FSHL %2, %3, %4
+ %0:_(i8) = G_CONSTANT i8 129
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i8) = G_CONSTANT i8 224
+ %4:_(i8) = G_CONSTANT i8 6
+ %5:_(i8) = G_FSHL %2, %3, %4
...
---
name: ScalarVar
@@ -73,9 +73,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_FSHL %0, %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_FSHL %0, %0, %1
...
---
name: ScalarCst
@@ -86,10 +86,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %3:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_CONSTANT i8 3
- %3:_(s8) = G_FSHL %0, %1, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_CONSTANT i8 3
+ %3:_(i8) = G_FSHL %0, %1, %2
...
---
name: VectorSimple
@@ -103,13 +103,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:1111111100000000 SignBits:8
; CHECK-NEXT: %5:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %6:_ KnownBits:0000000010011111 SignBits:8
- %0:_(s16) = G_CONSTANT i16 19
- %1:_(s16) = G_CONSTANT i16 65280
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s16>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>) = G_FSHL %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 19
+ %1:_(i16) = G_CONSTANT i16 65280
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>) = G_FSHL %3, %4, %5
...
---
name: VectorCst
@@ -121,11 +121,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %2, %2, %2, %2
- %4:_(<4 x s16>) = G_FSHL %0, %1, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %4:_(<4 x i16>) = G_FSHL %0, %1, %3
...
---
name: VectorCst36
@@ -137,11 +137,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %4:_(<4 x s16>) = G_FSHL %2, %2, %3
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x i16>) = G_FSHL %2, %2, %3
...
---
name: VectorCst3unknown
@@ -154,12 +154,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(s16) = COPY $h0
- %3:_(s16) = G_CONSTANT i16 3
- %4:_(<4 x s16>) = G_BUILD_VECTOR %2, %3, %3, %2
- %5:_(<4 x s16>) = G_FSHL %0, %1, %4
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(i16) = COPY $h0
+ %3:_(i16) = G_CONSTANT i16 3
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %2, %3, %3, %2
+ %5:_(<4 x i16>) = G_FSHL %0, %1, %4
...
---
name: VectorSext
@@ -176,16 +176,16 @@ body: |
; CHECK-NEXT: %7:_ KnownBits:0000000000000110 SignBits:13
; CHECK-NEXT: %8:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %9:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 238
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s16) = G_SEXT %0(s8)
- %3:_(s16) = G_SEXT %1(s8)
- %4:_(<4 x s16>) = G_BUILD_VECTOR %2, %2, %2, %2
- %5:_(<4 x s16>) = G_BUILD_VECTOR %3, %3, %3, %3
- %6:_(s16) = G_CONSTANT i16 3
- %7:_(s16) = G_CONSTANT i16 6
- %8:_(<4 x s16>) = G_BUILD_VECTOR %6, %7, %7, %6
- %9:_(<4 x s16>) = G_FSHL %4, %5, %8
+ %0:_(i8) = G_CONSTANT i8 238
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i16) = G_SEXT %0(i8)
+ %3:_(i16) = G_SEXT %1(i8)
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %3, %3, %3, %3
+ %6:_(i16) = G_CONSTANT i16 3
+ %7:_(i16) = G_CONSTANT i16 6
+ %8:_(<4 x i16>) = G_BUILD_VECTOR %6, %7, %7, %6
+ %9:_(<4 x i16>) = G_FSHL %4, %5, %8
...
---
name: FSHLless
@@ -198,12 +198,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %4:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %5:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s16) = G_SEXT %0(s8)
- %3:_(s16) = G_SEXT %1(s8)
- %4:_(s16) = G_CONSTANT i16 3
- %5:_(s16) = G_FSHL %2, %3, %4
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i16) = G_SEXT %0(i8)
+ %3:_(i16) = G_SEXT %1(i8)
+ %4:_(i16) = G_CONSTANT i16 3
+ %5:_(i16) = G_FSHL %2, %3, %4
...
---
name: FSHLeq
@@ -216,12 +216,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %4:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %5:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s16) = G_SEXT %0(s8)
- %3:_(s16) = G_SEXT %1(s8)
- %4:_(s16) = G_CONSTANT i16 8
- %5:_(s16) = G_FSHL %2, %3, %4
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i16) = G_SEXT %0(i8)
+ %3:_(i16) = G_SEXT %1(i8)
+ %4:_(i16) = G_CONSTANT i16 8
+ %5:_(i16) = G_FSHL %2, %3, %4
...
---
name: FSHLmore
@@ -234,12 +234,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %4:_ KnownBits:0000000000001101 SignBits:12
; CHECK-NEXT: %5:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s16) = G_SEXT %0(s8)
- %3:_(s16) = G_SEXT %1(s8)
- %4:_(s16) = G_CONSTANT i16 13
- %5:_(s16) = G_FSHL %2, %3, %4
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i16) = G_SEXT %0(i8)
+ %3:_(i16) = G_SEXT %1(i8)
+ %4:_(i16) = G_CONSTANT i16 13
+ %5:_(i16) = G_FSHL %2, %3, %4
...
---
name: SignBitsThroughZext
@@ -255,15 +255,15 @@ body: |
; CHECK-NEXT: %6:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %7:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %8:_ KnownBits:????????00000000 SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(s8) = G_ASHR %0, %2
- %4:_(s8) = G_ASHR %1, %2
- %5:_(s16) = G_ZEXT %3
- %6:_(s16) = G_ZEXT %4
- %7:_(s16) = G_CONSTANT i16 8
- %8:_(s16) = G_FSHL %5, %6, %7
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(i8) = G_ASHR %0, %2
+ %4:_(i8) = G_ASHR %1, %2
+ %5:_(i16) = G_ZEXT %3
+ %6:_(i16) = G_ZEXT %4
+ %7:_(i16) = G_CONSTANT i16 8
+ %8:_(i16) = G_FSHL %5, %6, %7
...
---
name: FSHLZeroAmt
@@ -274,10 +274,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %3:_ KnownBits:11100010 SignBits:3
- %0:_(s8) = G_CONSTANT i8 226
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_CONSTANT i8 0
- %3:_(s8) = G_FSHL %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 226
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_CONSTANT i8 0
+ %3:_(i8) = G_FSHL %0, %1, %2
...
---
name: FSHRZeroAmt
@@ -288,8 +288,8 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %3:_ KnownBits:00001111 SignBits:4
- %0:_(s8) = G_CONSTANT i8 226
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_CONSTANT i8 0
- %3:_(s8) = G_FSHR %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 226
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_CONSTANT i8 0
+ %3:_(i8) = G_FSHR %0, %1, %2
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
index d468c84ce899f..004484ff1f5ac 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11100010 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:10111000 SignBits:1
- %0:_(s8) = G_CONSTANT i8 226
- %1:_(s8) = G_CONSTANT i8 2
- %2:_(s8) = G_ROTR %0, %1
+ %0:_(i8) = G_CONSTANT i8 226
+ %1:_(i8) = G_CONSTANT i8 2
+ %2:_(i8) = G_ROTR %0, %1
...
---
name: CstBig
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11111001 SignBits:5
; CHECK-NEXT: %1:_ KnownBits:00000110 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:11100111 SignBits:3
- %0:_(s8) = G_CONSTANT i8 249
- %1:_(s8) = G_CONSTANT i8 6
- %2:_(s8) = G_ROTR %0, %1
+ %0:_(i8) = G_CONSTANT i8 249
+ %1:_(i8) = G_CONSTANT i8 6
+ %2:_(i8) = G_ROTR %0, %1
...
---
name: CstSext
@@ -35,11 +35,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:11111000 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:10001111 SignBits:1
- %0:_(s8) = G_CONSTANT i8 129
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s8) = G_CONSTANT i8 4
- %4:_(s8) = G_ROTR %2, %3
+ %0:_(i8) = G_CONSTANT i8 129
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i8) = G_CONSTANT i8 4
+ %4:_(i8) = G_ROTR %2, %3
...
---
name: CstSextBig
@@ -51,11 +51,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:11111000 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:00000110 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:11100011 SignBits:3
- %0:_(s8) = G_CONSTANT i8 129
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s8) = G_CONSTANT i8 6
- %4:_(s8) = G_ROTR %2, %3
+ %0:_(i8) = G_CONSTANT i8 129
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i8) = G_CONSTANT i8 6
+ %4:_(i8) = G_ROTR %2, %3
...
---
name: ScalarVar
@@ -65,9 +65,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_ROTR %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_ROTR %0, %1
...
---
name: ScalarCst
@@ -77,9 +77,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_ROTR %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_ROTR %0, %1
...
---
name: VectorVar
@@ -89,9 +89,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>) = G_ROTR %0, %1
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>) = G_ROTR %0, %1
...
---
name: VectorSimple
@@ -103,11 +103,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000010011 SignBits:11
; CHECK-NEXT: %3:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %4:_ KnownBits:0110000000000010 SignBits:1
- %0:_(s16) = G_CONSTANT i16 19
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>) = G_ROTR %2, %3
+ %0:_(i16) = G_CONSTANT i16 19
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>) = G_ROTR %2, %3
...
---
name: VectorCst
@@ -118,10 +118,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_ROTR %0, %2
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_ROTR %0, %2
...
---
name: VectorCst36
@@ -133,11 +133,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %4:_(<4 x s16>) = G_ROTR %2, %3
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x i16>) = G_ROTR %2, %3
...
---
@@ -150,11 +150,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>) = G_ROTR %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>) = G_ROTR %0, %3
...
---
name: VectorSext
@@ -168,13 +168,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000000000000110 SignBits:13
; CHECK-NEXT: %5:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 238
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(s16) = G_CONSTANT i16 3
- %4:_(s16) = G_CONSTANT i16 6
- %5:_(<4 x s16>) = G_BUILD_VECTOR %3, %4, %4, %3
- %6:_(<4 x s16>) = G_ROTR %2, %5
+ %0:_(i8) = G_CONSTANT i8 238
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(i16) = G_CONSTANT i16 3
+ %4:_(i16) = G_CONSTANT i16 6
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %3, %4, %4, %3
+ %6:_(<4 x i16>) = G_ROTR %2, %5
...
---
name: VectorSextBig
@@ -188,13 +188,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000000000001001 SignBits:12
; CHECK-NEXT: %5:_ KnownBits:000000000000100? SignBits:12
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 238
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(s16) = G_CONSTANT i16 8
- %4:_(s16) = G_CONSTANT i16 9
- %5:_(<4 x s16>) = G_BUILD_VECTOR %3, %4, %4, %3
- %6:_(<4 x s16>) = G_ROTR %2, %5
+ %0:_(i8) = G_CONSTANT i8 238
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(i16) = G_CONSTANT i16 8
+ %4:_(i16) = G_CONSTANT i16 9
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %3, %4, %4, %3
+ %6:_(<4 x i16>) = G_ROTR %2, %5
...
---
name: ROTRless
@@ -205,10 +205,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(s16) = G_ROTR %1, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(i16) = G_ROTR %1, %2
...
---
name: ROTReq
@@ -219,10 +219,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %2:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(s16) = G_CONSTANT i16 8
- %3:_(s16) = G_ROTR %1, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(i16) = G_CONSTANT i16 8
+ %3:_(i16) = G_ROTR %1, %2
...
---
name: ROTRmore
@@ -233,10 +233,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %2:_ KnownBits:0000000000001101 SignBits:12
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(s16) = G_CONSTANT i16 13
- %3:_(s16) = G_ROTR %1, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(i16) = G_CONSTANT i16 13
+ %3:_(i16) = G_ROTR %1, %2
...
---
name: SignBitsThroughZext
@@ -249,12 +249,12 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %4:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %5:_ KnownBits:????????00000000 SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s16) = G_ZEXT %2
- %4:_(s16) = G_CONSTANT i16 8
- %5:_(s16) = G_ROTR %3, %4
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i16) = G_ZEXT %2
+ %4:_(i16) = G_CONSTANT i16 8
+ %5:_(i16) = G_ROTR %3, %4
...
---
name: ROTRCanonicalize
@@ -264,7 +264,7 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:10000011 SignBits:1
- %0:_(s8) = G_CONSTANT i8 224
- %1:_(s8) = G_CONSTANT i8 2
- %2:_(s8) = G_ROTL %0, %1
+ %0:_(i8) = G_CONSTANT i8 224
+ %1:_(i8) = G_CONSTANT i8 2
+ %2:_(i8) = G_ROTL %0, %1
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
index 90c3395264de5..d8b91ec972efc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
@@ -11,10 +11,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:00011010 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 24
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(s8), %4:_(s1) = G_SADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 24
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(i8), %4:_(i1) = G_SADDE %0, %1, %2
...
---
name: CstCarryInOneOutZero
@@ -26,10 +26,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:00011011 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 24
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s8), %4:_(s1) = G_SADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 24
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i8), %4:_(i1) = G_SADDE %0, %1, %2
...
---
name: CstCarryInZeroOutOne
@@ -41,10 +41,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:10000001 SignBits:1
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 127
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(s8), %4:_(s1) = G_SADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 127
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(i8), %4:_(i1) = G_SADDE %0, %1, %2
...
---
name: CstCarryInOneOutOne
@@ -56,10 +56,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:10000010 SignBits:1
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 127
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s8), %4:_(s1) = G_SADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 127
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i8), %4:_(i1) = G_SADDE %0, %1, %2
...
---
name: ScalarVar
@@ -72,11 +72,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = COPY $b2
- %3:_(s1) = G_TRUNC %2
- %4:_(s8), %5:_(s1) = G_SADDE %0, %1, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = COPY $b2
+ %3:_(i1) = G_TRUNC %2
+ %4:_(i8), %5:_(i1) = G_SADDE %0, %1, %3
...
---
name: ScalarPartKnown
@@ -91,13 +91,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
; CHECK-NEXT: %6:_ KnownBits:000????? SignBits:3
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 5
- %4:_(s8) = COPY $b1
- %5:_(s1) = G_TRUNC %4
- %6:_(s8), %7:_(s1) = G_SADDE %2, %3, %5
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 5
+ %4:_(i8) = COPY $b1
+ %5:_(i1) = G_TRUNC %4
+ %6:_(i8), %7:_(i1) = G_SADDE %2, %3, %5
...
---
name: VectorCstCarryInZeroOutZero
@@ -112,13 +112,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:0111110100000010 SignBits:1
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 32000
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_SADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 32000
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_SADDE %3, %4, %5
...
---
name: VectorCstCarryInOneOutZero
@@ -133,13 +133,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:0111110100000011 SignBits:1
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 32000
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_SADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 32000
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_SADDE %3, %4, %5
...
---
name: VectorCstCarryInZeroOutOne
@@ -154,13 +154,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:1000000000000001 SignBits:1
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 32767
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_SADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 32767
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_SADDE %3, %4, %5
...
---
name: VectorCstCarryInOneOutOne
@@ -175,13 +175,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:1000000000000000 SignBits:1
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(s16) = G_CONSTANT i16 32767
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_SADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(i16) = G_CONSTANT i16 32767
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_SADDE %3, %4, %5
...
---
name: VectorVar
@@ -194,11 +194,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>) = COPY $d2
- %3:_(<4 x s1>) = G_TRUNC %2
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_SADDE %0, %1, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>) = COPY $d2
+ %3:_(<4 x i1>) = G_TRUNC %2
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_SADDE %0, %1, %3
...
---
name: VectorPartKnown
@@ -216,16 +216,16 @@ body: |
; CHECK-NEXT: %8:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %9:_ KnownBits:0000000????????? SignBits:7
; CHECK-NEXT: %10:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 42
- %5:_(s16) = G_CONSTANT i16 74
- %6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
- %7:_(<4 x s16>) = COPY $d2
- %8:_(<4 x s1>) = G_TRUNC %2
- %9:_(<4 x s16>), %10:_(<4 x s1>) = G_SADDE %6, %3, %8
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 42
+ %5:_(i16) = G_CONSTANT i16 74
+ %6:_(<4 x i16>) = G_BUILD_VECTOR %4, %5, %5, %4
+ %7:_(<4 x i16>) = COPY $d2
+ %8:_(<4 x i1>) = G_TRUNC %2
+ %9:_(<4 x i16>), %10:_(<4 x i1>) = G_SADDE %6, %3, %8
...
---
name: VectorCst36
@@ -241,14 +241,14 @@ body: |
; CHECK-NEXT: %6:_ KnownBits:? SignBits:1
; CHECK-NEXT: %7:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %8:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(s1) = G_CONSTANT i1 1
- %4:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %5:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %6:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %3, %3
- %7:_(<4 x s16>), %8:_(<4 x s1>) = G_SADDE %4, %5, %6
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(i1) = G_CONSTANT i1 1
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %6:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %3, %3
+ %7:_(<4 x i16>), %8:_(<4 x i1>) = G_SADDE %4, %5, %6
...
---
name: VectorCst3unknown
@@ -264,12 +264,12 @@ body: |
; CHECK-NEXT: %6:_ KnownBits:? SignBits:1
; CHECK-NEXT: %7:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %8:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(s1) = G_CONSTANT i1 0
- %4:_(s1) = G_CONSTANT i1 1
- %5:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %6:_(<4 x s1>) = G_BUILD_VECTOR %3, %3, %4, %4
- %7:_(<4 x s16>), %8:_(<4 x s1>) = G_SADDE %0, %5, %6
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(i1) = G_CONSTANT i1 0
+ %4:_(i1) = G_CONSTANT i1 1
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %6:_(<4 x i1>) = G_BUILD_VECTOR %3, %3, %4, %4
+ %7:_(<4 x i16>), %8:_(<4 x i1>) = G_SADDE %0, %5, %6
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-saddo.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-saddo.mir
index 9fac33e341c13..1350b53b48cfc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-saddo.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-saddo.mir
@@ -10,9 +10,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00011000 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:00011010 SignBits:3
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 24
- %2:_(s8), %3:_(s1) = G_SADDO %0, %1
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 24
+ %2:_(i8), %3:_(i1) = G_SADDO %0, %1
...
---
name: CstCarryOutOne
@@ -23,9 +23,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:01111110 SignBits:1
; CHECK-NEXT: %2:_ KnownBits:10000000 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 126
- %2:_(s8), %3:_(s1) = G_SADDO %0, %1
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 126
+ %2:_(i8), %3:_(i1) = G_SADDO %0, %1
...
---
name: ScalarVar
@@ -36,9 +36,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8), %3:_(s1) = G_SADDO %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8), %3:_(i1) = G_SADDO %0, %1
...
---
name: ScalarPartKnown
@@ -51,11 +51,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:00000101 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:000????? SignBits:3
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 5
- %4:_(s8), %5:_(s1) = G_SADDO %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 5
+ %4:_(i8), %5:_(i1) = G_SADDO %2, %3
...
---
name: VectorCstCarryOutZero
@@ -68,11 +68,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:0111110100000000 SignBits:1
; CHECK-NEXT: %4:_ KnownBits:0111110100000010 SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 32000
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_SADDO %2, %3
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 32000
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_SADDO %2, %3
...
---
name: VectorCstCarryOutOne
@@ -85,11 +85,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:0111111111111111 SignBits:1
; CHECK-NEXT: %4:_ KnownBits:1000000000000001 SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 32767
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_SADDO %2, %3
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 32767
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_SADDO %2, %3
...
---
name: VectorVar
@@ -100,9 +100,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>), %3:_(<4 x s1>) = G_SADDO %0, %1
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>), %3:_(<4 x i1>) = G_SADDO %0, %1
...
---
name: VectorPartKnown
@@ -118,14 +118,14 @@ body: |
; CHECK-NEXT: %6:_ KnownBits:000000000??01010 SignBits:9
; CHECK-NEXT: %7:_ KnownBits:0000000????????? SignBits:7
; CHECK-NEXT: %8:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 42
- %5:_(s16) = G_CONSTANT i16 74
- %6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
- %7:_(<4 x s16>), %8:_(<4 x s1>) = G_SADDO %6, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 42
+ %5:_(i16) = G_CONSTANT i16 74
+ %6:_(<4 x i16>) = G_BUILD_VECTOR %4, %5, %5, %4
+ %7:_(<4 x i16>), %8:_(<4 x i1>) = G_SADDO %6, %3
...
---
name: VectorCst36
@@ -138,11 +138,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_SADDO %2, %3
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_SADDO %2, %3
...
---
name: VectorCst3unknown
@@ -155,9 +155,9 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_SADDO %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_SADDO %0, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir
index 7b315205bc2e8..8b7a9b6bb2cb6 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:01100100 SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:000????? SignBits:3
- %0:_(s8) = G_CONSTANT i8 100
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_SDIV %0, %1
+ %0:_(i8) = G_CONSTANT i8 100
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_SDIV %0, %1
...
---
name: PartialKnown
@@ -23,11 +23,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:000000?? SignBits:6
- %0:_(s8) = G_IMPLICIT_DEF
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 4
- %4:_(s8) = G_SDIV %2, %3
+ %0:_(i8) = G_IMPLICIT_DEF
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 4
+ %4:_(i8) = G_SDIV %2, %3
...
---
name: Exact
@@ -37,9 +37,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00001100 SignBits:4
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:000000?1 SignBits:6
- %0:_(s8) = G_CONSTANT i8 12
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = exact G_SDIV %0, %1
+ %0:_(i8) = G_CONSTANT i8 12
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = exact G_SDIV %0, %1
...
---
name: NegDividend
@@ -49,9 +49,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11110000 SignBits:4
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:111111?? SignBits:6
- %0:_(s8) = G_CONSTANT i8 -16
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_SDIV %0, %1
+ %0:_(i8) = G_CONSTANT i8 -16
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_SDIV %0, %1
...
---
name: Unknown
@@ -61,7 +61,7 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_SDIV %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_SDIV %0, %1
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
index 97bcb80503d8d..af8f3758e598b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:10000000 SignBits:1
- %0:_(s8) = G_CONSTANT i8 224
- %1:_(s8) = G_CONSTANT i8 2
- %2:_(s8) = G_SHL %0, %1
+ %0:_(i8) = G_CONSTANT i8 224
+ %1:_(i8) = G_CONSTANT i8 2
+ %2:_(i8) = G_SHL %0, %1
...
---
name: CstBig
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11111001 SignBits:5
; CHECK-NEXT: %1:_ KnownBits:00000110 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:01000000 SignBits:1
- %0:_(s8) = G_CONSTANT i8 249
- %1:_(s8) = G_CONSTANT i8 6
- %2:_(s8) = G_SHL %0, %1
+ %0:_(i8) = G_CONSTANT i8 249
+ %1:_(i8) = G_CONSTANT i8 6
+ %2:_(i8) = G_SHL %0, %1
...
---
name: CstSext
@@ -35,11 +35,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:11111000 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %4:_ KnownBits:11000000 SignBits:2
- %0:_(s8) = G_CONSTANT i8 129
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s8) = G_CONSTANT i8 3
- %4:_(s8) = G_SHL %2, %3
+ %0:_(i8) = G_CONSTANT i8 129
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i8) = G_CONSTANT i8 3
+ %4:_(i8) = G_SHL %2, %3
...
---
name: CstSextBig
@@ -51,11 +51,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:11111000 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:00000110 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = G_CONSTANT i8 129
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s8) = G_CONSTANT i8 6
- %4:_(s8) = G_SHL %2, %3
+ %0:_(i8) = G_CONSTANT i8 129
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i8) = G_CONSTANT i8 6
+ %4:_(i8) = G_SHL %2, %3
...
---
name: ScalarVar
@@ -65,9 +65,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_SHL %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_SHL %0, %1
...
---
name: ScalarCst
@@ -77,9 +77,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:?????000 SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_SHL %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_SHL %0, %1
...
---
name: VectorVar
@@ -89,9 +89,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>) = G_SHL %0, %1
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>) = G_SHL %0, %1
...
---
name: VectorCst
@@ -102,10 +102,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:?????????????000 SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_SHL %0, %2
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_SHL %0, %2
...
---
name: VectorCst36
@@ -117,11 +117,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:000000????????00 SignBits:7
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %4:_(<4 x s16>) = G_SHL %2, %3
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x i16>) = G_SHL %2, %3
...
---
@@ -134,11 +134,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>) = G_SHL %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>) = G_SHL %0, %3
...
---
name: VectorSext
@@ -152,13 +152,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000000000000110 SignBits:13
; CHECK-NEXT: %5:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %6:_ KnownBits:1111??11?????000 SignBits:5
- %0:_(s8) = G_CONSTANT i8 238
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(s16) = G_CONSTANT i16 3
- %4:_(s16) = G_CONSTANT i16 6
- %5:_(<4 x s16>) = G_BUILD_VECTOR %3, %4, %4, %3
- %6:_(<4 x s16>) = G_SHL %2, %5
+ %0:_(i8) = G_CONSTANT i8 238
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(i16) = G_CONSTANT i16 3
+ %4:_(i16) = G_CONSTANT i16 6
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %3, %4, %4, %3
+ %6:_(<4 x i16>) = G_SHL %2, %5
...
---
name: VectorSextBig
@@ -172,13 +172,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000000000001001 SignBits:12
; CHECK-NEXT: %5:_ KnownBits:000000000000100? SignBits:12
; CHECK-NEXT: %6:_ KnownBits:11??11?000000000 SignBits:2
- %0:_(s8) = G_CONSTANT i8 238
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(s16) = G_CONSTANT i16 8
- %4:_(s16) = G_CONSTANT i16 9
- %5:_(<4 x s16>) = G_BUILD_VECTOR %3, %4, %4, %3
- %6:_(<4 x s16>) = G_SHL %2, %5
+ %0:_(i8) = G_CONSTANT i8 238
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(i16) = G_CONSTANT i16 8
+ %4:_(i16) = G_CONSTANT i16 9
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %3, %4, %4, %3
+ %6:_(<4 x i16>) = G_SHL %2, %5
...
---
name: SHLless
@@ -189,10 +189,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:?????????????000 SignBits:6
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(s16) = G_SHL %1, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(i16) = G_SHL %1, %2
...
---
name: SHLeq
@@ -203,10 +203,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %2:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %3:_ KnownBits:????????00000000 SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(s16) = G_CONSTANT i16 8
- %3:_(s16) = G_SHL %1, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(i16) = G_CONSTANT i16 8
+ %3:_(i16) = G_SHL %1, %2
...
---
name: SHLmore
@@ -217,10 +217,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %2:_ KnownBits:0000000000001101 SignBits:12
; CHECK-NEXT: %3:_ KnownBits:???0000000000000 SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_SEXT %0(s8)
- %2:_(s16) = G_CONSTANT i16 13
- %3:_(s16) = G_SHL %1, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_SEXT %0(i8)
+ %2:_(i16) = G_CONSTANT i16 13
+ %3:_(i16) = G_SHL %1, %2
...
---
name: SignBitsThroughZext
@@ -233,10 +233,10 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %4:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %5:_ KnownBits:????????00000000 SignBits:4
- %0:_(s8) = COPY $b0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(s8) = G_ASHR %0, %1
- %3:_(s16) = G_ZEXT %2
- %4:_(s16) = G_CONSTANT i16 8
- %5:_(s16) = G_SHL %3, %4
+ %0:_(i8) = COPY $b0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(i8) = G_ASHR %0, %1
+ %3:_(i16) = G_ZEXT %2
+ %4:_(i16) = G_CONSTANT i16 8
+ %5:_(i16) = G_SHL %3, %4
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shuffle.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shuffle.mir
index 69286384acbe0..efc007a4d8c3c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shuffle.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shuffle.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s8>) = COPY $h1
- %2:_(<2 x s8>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 0)
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i8>) = COPY $h1
+ %2:_(<2 x i8>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 0)
...
---
name: zext_known
@@ -22,10 +22,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s16>) = COPY $s1
- %2:_(<2 x s16>) = G_ZEXT %0
- %3:_(<2 x s16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 0)
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i16>) = COPY $s1
+ %2:_(<2 x i16>) = G_ZEXT %0
+ %3:_(<2 x i16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 0)
...
---
name: zext_unknown
@@ -36,10 +36,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:00000000???????? SignBits:8
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s16>) = COPY $s1
- %2:_(<2 x s16>) = G_ZEXT %0
- %3:_(<2 x s16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 2)
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i16>) = COPY $s1
+ %2:_(<2 x i16>) = G_ZEXT %0
+ %3:_(<2 x i16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 2)
...
---
name: sext_known
@@ -50,10 +50,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:9
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s16>) = COPY $s1
- %2:_(<2 x s16>) = G_SEXT %0
- %3:_(<2 x s16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 0)
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i16>) = COPY $s1
+ %2:_(<2 x i16>) = G_SEXT %0
+ %3:_(<2 x i16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 0)
...
---
name: sext_unknown
@@ -64,8 +64,8 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<2 x s8>) = COPY $h0
- %1:_(<2 x s16>) = COPY $s1
- %2:_(<2 x s16>) = G_SEXT %0
- %3:_(<2 x s16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 2)
+ %0:_(<2 x i8>) = COPY $h0
+ %1:_(<2 x i16>) = COPY $s1
+ %2:_(<2 x i16>) = G_SEXT %0
+ %3:_(<2 x i16>) = G_SHUFFLE_VECTOR %2, %1, shufflemask(0, 2)
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-smulh.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-smulh.mir
index b9cde9587c78c..5d1b0b8e54f21 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-smulh.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-smulh.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00010011 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:11111101 SignBits:6
- %0:_(s8) = G_CONSTANT i8 19
- %1:_(s8) = G_CONSTANT i8 224
- %2:_(s8) = G_SMULH %0, %1
+ %0:_(i8) = G_CONSTANT i8 19
+ %1:_(i8) = G_CONSTANT i8 224
+ %2:_(i8) = G_SMULH %0, %1
...
---
name: CstZero
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11111111 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = G_CONSTANT i8 255
- %1:_(s8) = G_CONSTANT i8 0
- %2:_(s8) = G_SMULH %0, %1
+ %0:_(i8) = G_CONSTANT i8 255
+ %1:_(i8) = G_CONSTANT i8 0
+ %2:_(i8) = G_SMULH %0, %1
...
---
name: ScalarVar
@@ -33,9 +33,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_SMULH %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_SMULH %0, %1
...
---
name: ScalarZero
@@ -45,9 +45,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 0
- %2:_(s8) = G_SMULH %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 0
+ %2:_(i8) = G_SMULH %0, %1
...
---
name: ScalarVarAbs
@@ -59,11 +59,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %3:_ KnownBits:0000000000000001 SignBits:15
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_ABS %0
- %2:_(s16) = G_SEXT %1
- %3:_(s16) = G_CONSTANT i16 1
- %4:_(s16) = G_SMULH %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_ABS %0
+ %2:_(i16) = G_SEXT %1
+ %3:_(i16) = G_CONSTANT i16 1
+ %4:_(i16) = G_SMULH %2, %3
...
---
name: SplatVecCst
@@ -74,10 +74,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:11111010 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:11111010 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = G_CONSTANT i8 250
- %1:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %0(s8)
- %2:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %0(s8)
- %3:_(<vscale x 16 x s8>) = G_SMULH %1, %2
+ %0:_(i8) = G_CONSTANT i8 250
+ %1:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %0(i8)
+ %2:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %0(i8)
+ %3:_(<vscale x 16 x i8>) = G_SMULH %1, %2
...
---
name: SplatVecPartScalar
@@ -91,13 +91,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %5:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %6:_ KnownBits:???????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 250
- %1:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %0(s8)
- %2:_(s8) = G_IMPLICIT_DEF
- %3:_(s8) = G_CONSTANT i8 15
- %4:_(s8) = G_AND %2, %3
- %5:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %4(s8)
- %6:_(<vscale x 16 x s8>) = G_SMULH %1, %5
+ %0:_(i8) = G_CONSTANT i8 250
+ %1:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %0(i8)
+ %2:_(i8) = G_IMPLICIT_DEF
+ %3:_(i8) = G_CONSTANT i8 15
+ %4:_(i8) = G_AND %2, %3
+ %5:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %4(i8)
+ %6:_(<vscale x 16 x i8>) = G_SMULH %1, %5
...
---
name: VecCst
@@ -109,11 +109,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:?????001 SignBits:3
; CHECK-NEXT: %3:_ KnownBits:?????001 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 25
- %1:_(s8) = G_CONSTANT i8 225
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %1:_(s8)
- %3:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %1:_(s8)
- %4:_(<2 x s8>) = G_SMULH %2, %3
+ %0:_(i8) = G_CONSTANT i8 25
+ %1:_(i8) = G_CONSTANT i8 225
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %1:_(i8)
+ %3:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %1:_(i8)
+ %4:_(<2 x i8>) = G_SMULH %2, %3
...
---
name: VecPartScalar
@@ -127,11 +127,11 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %5:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %6:_ KnownBits:???????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 250
- %1:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %0:_(s8)
- %2:_(s8) = G_IMPLICIT_DEF
- %3:_(s8) = G_CONSTANT i8 15
- %4:_(s8) = G_AND %2, %3
- %5:_(<2 x s8>) = G_BUILD_VECTOR %4:_(s8), %4:_(s8)
- %6:_(<2 x s8>) = G_SMULH %1, %5
+ %0:_(i8) = G_CONSTANT i8 250
+ %1:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %0:_(i8)
+ %2:_(i8) = G_IMPLICIT_DEF
+ %3:_(i8) = G_CONSTANT i8 15
+ %4:_(i8) = G_AND %2, %3
+ %5:_(<2 x i8>) = G_BUILD_VECTOR %4:_(i8), %4:_(i8)
+ %6:_(<2 x i8>) = G_SMULH %1, %5
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-srem.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-srem.mir
index cc7684952a946..be13af3d94e77 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-srem.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-srem.mir
@@ -11,10 +11,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_CONSTANT i32 8
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = G_CONSTANT i32 8
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -29,10 +29,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_CONSTANT i32 10
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = G_CONSTANT i32 10
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -47,10 +47,10 @@ body: |
bb.1:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -65,10 +65,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_CONSTANT i32 8
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_IMPLICIT_DEF
+ %1:_(i32) = G_CONSTANT i32 8
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -82,10 +82,10 @@ name: srem_both_implicit_def
body: |
bb.1:
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_IMPLICIT_DEF
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -99,10 +99,10 @@ name: srem_const_const
body: |
bb.1:
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_CONSTANT i32 3
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_CONSTANT i32 3
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -118,10 +118,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_CONSTANT i32 8
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = G_CONSTANT i32 8
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -136,10 +136,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_CONSTANT i32 -8
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = G_CONSTANT i32 -8
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -153,9 +153,9 @@ name: numsignbits_srem_const_const
body: |
bb.1:
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_CONSTANT i32 3
- %2:_(s32) = G_SREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_CONSTANT i32 3
+ %2:_(i32) = G_SREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
index 0547ea829598a..aa42631acd9d2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
@@ -24,7 +24,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_One
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
- %0:_(<vscale x 4 x s32>) = G_STEP_VECTOR i32 1
+ %0:_(<vscale x 4 x i32>) = G_STEP_VECTOR i32 1
...
---
name: StepVector_Pow2
@@ -32,7 +32,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_Pow2
; CHECK-NEXT: %0:_ KnownBits:????????????????????????????0000 SignBits:1
- %0:_(<vscale x 4 x s32>) = G_STEP_VECTOR i32 16
+ %0:_(<vscale x 4 x i32>) = G_STEP_VECTOR i32 16
...
---
name: StepVector_NonPow2
@@ -40,7 +40,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_NonPow2
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
- %0:_(<vscale x 4 x s32>) = G_STEP_VECTOR i32 3
+ %0:_(<vscale x 4 x i32>) = G_STEP_VECTOR i32 3
...
---
name: StepVector_s8
@@ -48,7 +48,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_s8
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
- %0:_(<vscale x 8 x s8>) = G_STEP_VECTOR i8 1
+ %0:_(<vscale x 8 x i8>) = G_STEP_VECTOR i8 1
...
---
name: StepVector_s8_Pow2
@@ -56,7 +56,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_s8_Pow2
; CHECK-NEXT: %0:_ KnownBits:??????00 SignBits:1
- %0:_(<vscale x 8 x s8>) = G_STEP_VECTOR i8 4
+ %0:_(<vscale x 8 x i8>) = G_STEP_VECTOR i8 4
...
---
name: StepVector_s64
@@ -64,7 +64,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_s64
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
- %0:_(<vscale x 2 x s64>) = G_STEP_VECTOR i64 1
+ %0:_(<vscale x 2 x i64>) = G_STEP_VECTOR i64 1
...
---
name: StepVector_s64_Pow2
@@ -72,7 +72,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_s64_Pow2
; CHECK-NEXT: %0:_ KnownBits:?????????????????????????????????????????????????????????????000 SignBits:1
- %0:_(<vscale x 2 x s64>) = G_STEP_VECTOR i64 8
+ %0:_(<vscale x 2 x i64>) = G_STEP_VECTOR i64 8
...
---
name: StepVector_s128
@@ -80,7 +80,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_s128
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????? SignBits:1
- %0:_(<vscale x 2 x s128>) = G_STEP_VECTOR i128 1
+ %0:_(<vscale x 2 x i128>) = G_STEP_VECTOR i128 1
...
---
name: StepVector_s128_Pow2
@@ -88,7 +88,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_s128_Pow2
; CHECK-NEXT: %0:_ KnownBits:?????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????000 SignBits:1
- %0:_(<vscale x 2 x s128>) = G_STEP_VECTOR i128 8
+ %0:_(<vscale x 2 x i128>) = G_STEP_VECTOR i128 8
...
---
name: StepVector_ElementCountOverflowsBitWidth
@@ -96,7 +96,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_ElementCountOverflowsBitWidth
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
- %0:_(<vscale x 1024 x s8>) = G_STEP_VECTOR i8 3
+ %0:_(<vscale x 1024 x i8>) = G_STEP_VECTOR i8 3
...
---
name: StepVector_Overflow_MaxNumElts
@@ -104,7 +104,7 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_Overflow_MaxNumElts
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
- %0:_(<vscale x 32 x s8>) = G_STEP_VECTOR i8 3
+ %0:_(<vscale x 32 x i8>) = G_STEP_VECTOR i8 3
...
---
name: StepVector_Overflow_MaxValue
@@ -112,5 +112,5 @@ body: |
bb.0:
; CHECK-LABEL: name: @StepVector_Overflow_MaxValue
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
- %0:_(<vscale x 4 x s32>) = G_STEP_VECTOR i32 1073741825
+ %0:_(<vscale x 4 x i32>) = G_STEP_VECTOR i32 1073741825
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir
index 332049d95b41b..4e5937f4c2dac 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %1:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:00100010 SignBits:2
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 224
- %2:_(s8) = G_SUB %0, %1
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 224
+ %2:_(i8) = G_SUB %0, %1
...
---
name: CstZero
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = G_CONSTANT i8 0
- %1:_(s8) = G_CONSTANT i8 0
- %2:_(s8) = G_SUB %0, %1
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CONSTANT i8 0
+ %2:_(i8) = G_SUB %0, %1
...
---
name: CstNegOne
@@ -33,9 +33,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000001 SignBits:7
; CHECK-NEXT: %2:_ KnownBits:11111111 SignBits:8
- %0:_(s8) = G_CONSTANT i8 0
- %1:_(s8) = G_CONSTANT i8 1
- %2:_(s8) = G_SUB %0, %1
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CONSTANT i8 1
+ %2:_(i8) = G_SUB %0, %1
...
---
name: CstNegFour
@@ -45,9 +45,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:11111100 SignBits:6
- %0:_(s8) = G_CONSTANT i8 0
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_SUB %0, %1
+ %0:_(i8) = G_CONSTANT i8 0
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_SUB %0, %1
...
---
name: CstNeg
@@ -57,9 +57,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:11011110 SignBits:2
- %0:_(s8) = G_CONSTANT i8 224
- %1:_(s8) = G_CONSTANT i8 2
- %2:_(s8) = G_SUB %0, %1
+ %0:_(i8) = G_CONSTANT i8 224
+ %1:_(i8) = G_CONSTANT i8 2
+ %2:_(i8) = G_SUB %0, %1
...
---
name: ScalarVar
@@ -69,9 +69,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_SUB %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_SUB %0, %1
...
---
name: ScalarRhsEarlyOut
@@ -81,9 +81,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_SUB %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_SUB %0, %1
...
---
name: ScalarNonNegative
@@ -95,11 +95,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:4
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 0
- %4:_(s8) = G_SUB %3, %2
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 0
+ %4:_(i8) = G_SUB %3, %2
...
---
name: ScalarLhsEarlyOut
@@ -109,9 +109,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 3
- %2:_(s8) = G_SUB %1, %0
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 3
+ %2:_(i8) = G_SUB %1, %0
...
---
name: ScalarPartKnown
@@ -123,11 +123,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00000101 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:3
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 5
- %4:_(s8) = G_SUB %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 5
+ %4:_(i8) = G_SUB %2, %3
...
---
name: VectorCstZero
@@ -138,10 +138,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %3:_ KnownBits:0000000000000000 SignBits:16
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_SUB %1, %2
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_SUB %1, %2
...
---
name: VectorCstNegOne
@@ -153,11 +153,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %3:_ KnownBits:0000000000000001 SignBits:15
; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(s16) = G_CONSTANT i16 1
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>) = G_SUB %2, %3
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(i16) = G_CONSTANT i16 1
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>) = G_SUB %2, %3
...
---
name: VectorVar
@@ -167,9 +167,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>) = G_SUB %0, %1
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>) = G_SUB %0, %1
...
---
name: VectorRhsEarlyOut
@@ -180,10 +180,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_SUB %2, %0
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_SUB %2, %0
...
---
name: VectorNonNegative
@@ -197,13 +197,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %5:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:8
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 0
- %5:_(<4 x s16>) = G_BUILD_VECTOR %4, %4, %4, %4
- %6:_(<4 x s16>) = G_SUB %5, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 0
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %4, %4, %4, %4
+ %6:_(<4 x i16>) = G_SUB %5, %3
...
---
name: VectorLhsEarlyOut
@@ -214,10 +214,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 3
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_SUB %0, %2
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 3
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_SUB %0, %2
...
---
name: VectorPartKnown
@@ -232,14 +232,14 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:0000000001001010 SignBits:9
; CHECK-NEXT: %6:_ KnownBits:000000000??01010 SignBits:9
; CHECK-NEXT: %7:_ KnownBits:???????????????? SignBits:7
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 42
- %5:_(s16) = G_CONSTANT i16 74
- %6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
- %7:_(<4 x s16>) = G_SUB %6, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 42
+ %5:_(i16) = G_CONSTANT i16 74
+ %6:_(<4 x i16>) = G_BUILD_VECTOR %4, %5, %5, %4
+ %7:_(<4 x i16>) = G_SUB %6, %3
...
---
name: VectorCst36
@@ -251,11 +251,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:12
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %4:_(<4 x s16>) = G_SUB %2, %3
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x i16>) = G_SUB %2, %3
...
---
@@ -268,9 +268,9 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>) = G_SUB %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>) = G_SUB %0, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sve-splat.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sve-splat.mir
index 27c11ee1641e9..3cb7fcfda2282 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sve-splat.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sve-splat.mir
@@ -8,8 +8,8 @@ body: |
; CHECK-LABEL: name: @Scalable
; CHECK-NEXT: %0:_ KnownBits:0000000000001010 SignBits:12
; CHECK-NEXT: %1:_ KnownBits:0000000000001010 SignBits:12
- %0:_(s16) = G_CONSTANT i16 10
- %1:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR %0(s16)
+ %0:_(i16) = G_CONSTANT i16 10
+ %1:_(<vscale x 8 x i16>) = G_SPLAT_VECTOR %0(i16)
...
---
name: Scalable_trunc
@@ -18,8 +18,8 @@ body: |
; CHECK-LABEL: name: @Scalable_trunc
; CHECK-NEXT: %0:_ KnownBits:00000000000000000000000000001010 SignBits:28
; CHECK-NEXT: %1:_ KnownBits:0000000000001010 SignBits:12
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR %0(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(<vscale x 8 x i16>) = G_SPLAT_VECTOR %0(i32)
...
---
name: Scalable_signbits
@@ -29,7 +29,7 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:17
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:17
- %0:_(s16) = COPY $h0
- %1:_(s32) = G_SEXT %0(s16)
- %2:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR %1(s32)
+ %0:_(i16) = COPY $h0
+ %1:_(i32) = G_SEXT %0(i16)
+ %2:_(<vscale x 4 x i32>) = G_SPLAT_VECTOR %1(i32)
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir
index f680196a4225e..1bc6cbdb9a652 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir
@@ -8,8 +8,8 @@ body: |
; CHECK-LABEL: name: @ScalarConst
; CHECK-NEXT: %0:_ KnownBits:10101001100001110110010101000011 SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0110010101000011 SignBits:1
- %0:_(s32) = G_CONSTANT i32 2844222787
- %1:_(s16) = G_TRUNC %0(s32)
+ %0:_(i32) = G_CONSTANT i32 2844222787
+ %1:_(i16) = G_TRUNC %0(i32)
...
---
name: ScalarVar
@@ -18,8 +18,8 @@ body: |
; CHECK-LABEL: name: @ScalarVar
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
- %0:_(s32) = COPY $w0
- %1:_(s16) = G_TRUNC %0(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i16) = G_TRUNC %0(i32)
...
---
name: VectorCst
@@ -29,9 +29,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:10101001100001110110010101000011 SignBits:1
; CHECK-NEXT: %1:_ KnownBits:10101001100001110110010101000011 SignBits:1
; CHECK-NEXT: %2:_ KnownBits:0110010101000011 SignBits:1
- %0:_(s32) = G_CONSTANT i32 2844222787
- %1:_(<4 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0
- %2:_(<4 x s16>) = G_TRUNC %1(<4 x s32>)
+ %0:_(i32) = G_CONSTANT i32 2844222787
+ %1:_(<4 x i32>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %2:_(<4 x i16>) = G_TRUNC %1(<4 x i32>)
...
---
name: VectorVar
@@ -40,8 +40,8 @@ body: |
; CHECK-LABEL: name: @VectorVar
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
- %0:_(<4 x s32>) = COPY $q0
- %1:_(<4 x s16>) = G_TRUNC %0(<4 x s32>)
+ %0:_(<4 x i32>) = COPY $q0
+ %1:_(<4 x i16>) = G_TRUNC %0(<4 x i32>)
...
---
name: ScalableCst
@@ -51,9 +51,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:10101001100001110110010101000011 SignBits:1
; CHECK-NEXT: %1:_ KnownBits:10101001100001110110010101000011 SignBits:1
; CHECK-NEXT: %2:_ KnownBits:0110010101000011 SignBits:1
- %0:_(s32) = G_CONSTANT i32 2844222787
- %1:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR %0
- %2:_(<vscale x 4 x s16>) = G_TRUNC %1(<vscale x 4 x s32>)
+ %0:_(i32) = G_CONSTANT i32 2844222787
+ %1:_(<vscale x 4 x i32>) = G_SPLAT_VECTOR %0
+ %2:_(<vscale x 4 x i16>) = G_TRUNC %1(<vscale x 4 x i32>)
...
---
name: ScalableVar
@@ -62,6 +62,6 @@ body: |
; CHECK-LABEL: name: @ScalableVar
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
- %0:_(<vscale x 4 x s32>) = COPY $z0
- %1:_(<vscale x 4 x s16>) = G_TRUNC %0(<vscale x 4 x s32>)
+ %0:_(<vscale x 4 x i32>) = COPY $z0
+ %1:_(<vscale x 4 x i16>) = G_TRUNC %0(<vscale x 4 x i32>)
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
index 9fcbfdf0ae311..45aa80c8d26a5 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
@@ -11,10 +11,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:00011010 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 24
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(s8), %4:_(s1) = G_UADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 24
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(i8), %4:_(i1) = G_UADDE %0, %1, %2
...
---
name: CstCarryInOneOutZero
@@ -26,10 +26,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:00011011 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 24
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s8), %4:_(s1) = G_UADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 24
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i8), %4:_(i1) = G_UADDE %0, %1, %2
...
---
name: CstCarryInZeroOutOne
@@ -41,10 +41,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:00000001 SignBits:7
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 255
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(s8), %4:_(s1) = G_UADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 255
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(i8), %4:_(i1) = G_UADDE %0, %1, %2
...
---
name: CstCarryInOneOutOne
@@ -56,10 +56,10 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %3:_ KnownBits:00000010 SignBits:6
; CHECK-NEXT: %4:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 255
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(s8), %4:_(s1) = G_UADDE %0, %1, %2
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 255
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(i8), %4:_(i1) = G_UADDE %0, %1, %2
...
---
name: ScalarVar
@@ -72,11 +72,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = COPY $b2
- %3:_(s1) = G_TRUNC %2
- %4:_(s8), %5:_(s1) = G_UADDE %0, %1, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = COPY $b2
+ %3:_(i1) = G_TRUNC %2
+ %4:_(i8), %5:_(i1) = G_UADDE %0, %1, %3
...
---
name: ScalarPartKnown
@@ -91,13 +91,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
; CHECK-NEXT: %6:_ KnownBits:000????? SignBits:3
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 5
- %4:_(s8) = COPY $b1
- %5:_(s1) = G_TRUNC %4
- %6:_(s8), %7:_(s1) = G_UADDE %2, %3, %5
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 5
+ %4:_(i8) = COPY $b1
+ %5:_(i1) = G_TRUNC %4
+ %6:_(i8), %7:_(i1) = G_UADDE %2, %3, %5
...
---
name: VectorCstCarryInZeroOutZero
@@ -112,13 +112,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:1111110111101010 SignBits:6
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 65000
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_UADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 65000
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_UADDE %3, %4, %5
...
---
name: VectorCstCarryInOneOutZero
@@ -133,13 +133,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:1111110111101011 SignBits:6
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 65000
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_UADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 65000
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_UADDE %3, %4, %5
...
---
name: VectorCstCarryInZeroOutOne
@@ -154,13 +154,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:0 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:0000000000000001 SignBits:15
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 65535
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_UADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 65535
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_UADDE %3, %4, %5
...
---
name: VectorCstCarryInOneOutOne
@@ -175,13 +175,13 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %6:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %7:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 0
- %1:_(s16) = G_CONSTANT i16 65535
- %2:_(s1) = G_CONSTANT i1 1
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %4:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %5:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %2, %2
- %6:_(<4 x s16>), %7:_(<4 x s1>) = G_UADDE %3, %4, %5
+ %0:_(i16) = G_CONSTANT i16 0
+ %1:_(i16) = G_CONSTANT i16 65535
+ %2:_(i1) = G_CONSTANT i1 1
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %5:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %2, %2
+ %6:_(<4 x i16>), %7:_(<4 x i1>) = G_UADDE %3, %4, %5
...
---
name: VectorVar
@@ -194,11 +194,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>) = COPY $d2
- %3:_(<4 x s1>) = G_TRUNC %2
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_UADDE %0, %1, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>) = COPY $d2
+ %3:_(<4 x i1>) = G_TRUNC %2
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_UADDE %0, %1, %3
...
---
name: VectorPartKnown
@@ -216,16 +216,16 @@ body: |
; CHECK-NEXT: %8:_ KnownBits:1 SignBits:1
; CHECK-NEXT: %9:_ KnownBits:0000000????????? SignBits:7
; CHECK-NEXT: %10:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 42
- %5:_(s16) = G_CONSTANT i16 74
- %6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
- %7:_(<4 x s16>) = COPY $d2
- %8:_(<4 x s1>) = G_TRUNC %2
- %9:_(<4 x s16>), %10:_(<4 x s1>) = G_UADDE %6, %3, %8
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 42
+ %5:_(i16) = G_CONSTANT i16 74
+ %6:_(<4 x i16>) = G_BUILD_VECTOR %4, %5, %5, %4
+ %7:_(<4 x i16>) = COPY $d2
+ %8:_(<4 x i1>) = G_TRUNC %2
+ %9:_(<4 x i16>), %10:_(<4 x i1>) = G_UADDE %6, %3, %8
...
---
name: VectorCst36
@@ -241,14 +241,14 @@ body: |
; CHECK-NEXT: %6:_ KnownBits:? SignBits:1
; CHECK-NEXT: %7:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %8:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(s1) = G_CONSTANT i1 0
- %3:_(s1) = G_CONSTANT i1 1
- %4:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %5:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %6:_(<4 x s1>) = G_BUILD_VECTOR %2, %2, %3, %3
- %7:_(<4 x s16>), %8:_(<4 x s1>) = G_UADDE %4, %5, %6
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(i1) = G_CONSTANT i1 0
+ %3:_(i1) = G_CONSTANT i1 1
+ %4:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %6:_(<4 x i1>) = G_BUILD_VECTOR %2, %2, %3, %3
+ %7:_(<4 x i16>), %8:_(<4 x i1>) = G_UADDE %4, %5, %6
...
---
name: VectorCst3unknown
@@ -264,12 +264,12 @@ body: |
; CHECK-NEXT: %6:_ KnownBits:? SignBits:1
; CHECK-NEXT: %7:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %8:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(s1) = G_CONSTANT i1 0
- %4:_(s1) = G_CONSTANT i1 1
- %5:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %6:_(<4 x s1>) = G_BUILD_VECTOR %3, %3, %4, %4
- %7:_(<4 x s16>), %8:_(<4 x s1>) = G_UADDE %0, %5, %6
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(i1) = G_CONSTANT i1 0
+ %4:_(i1) = G_CONSTANT i1 1
+ %5:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %6:_(<4 x i1>) = G_BUILD_VECTOR %3, %3, %4, %4
+ %7:_(<4 x i16>), %8:_(<4 x i1>) = G_UADDE %0, %5, %6
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uaddo.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uaddo.mir
index 28dc998c8fb87..0682e5a8456b3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uaddo.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uaddo.mir
@@ -10,9 +10,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:00011000 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:00011010 SignBits:3
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 24
- %2:_(s8), %4:_(s1) = G_UADDO %0, %1
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 24
+ %2:_(i8), %4:_(i1) = G_UADDO %0, %1
...
---
name: CstCarryOutOne
@@ -23,9 +23,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:11111110 SignBits:7
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(s8) = G_CONSTANT i8 2
- %1:_(s8) = G_CONSTANT i8 254
- %2:_(s8), %4:_(s1) = G_UADDO %0, %1
+ %0:_(i8) = G_CONSTANT i8 2
+ %1:_(i8) = G_CONSTANT i8 254
+ %2:_(i8), %4:_(i1) = G_UADDO %0, %1
...
---
name: ScalarVar
@@ -36,9 +36,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8), %3:_(s1) = G_UADDO %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8), %3:_(i1) = G_UADDO %0, %1
...
---
name: ScalarPartKnown
@@ -51,11 +51,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:00000101 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:000????? SignBits:3
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 5
- %4:_(s8), %5:_(s1) = G_UADDO %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 5
+ %4:_(i8), %5:_(i1) = G_UADDO %2, %3
...
---
name: VectorCstCarryOutZero
@@ -68,11 +68,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:1111110111101000 SignBits:6
; CHECK-NEXT: %4:_ KnownBits:1111110111101010 SignBits:6
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 65000
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_UADDO %2, %3
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 65000
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_UADDO %2, %3
...
---
name: VectorCstCarryOutOne
@@ -85,11 +85,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:1111111111111111 SignBits:16
; CHECK-NEXT: %4:_ KnownBits:0000000000000001 SignBits:15
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 2
- %1:_(s16) = G_CONSTANT i16 65535
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_UADDO %2, %3
+ %0:_(i16) = G_CONSTANT i16 2
+ %1:_(i16) = G_CONSTANT i16 65535
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_UADDO %2, %3
...
---
name: VectorVar
@@ -100,9 +100,9 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %3:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s16>) = COPY $d1
- %2:_(<4 x s16>), %3:_(<4 x s1>) = G_UADDO %0, %1
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i16>) = COPY $d1
+ %2:_(<4 x i16>), %3:_(<4 x i1>) = G_UADDO %0, %1
...
---
name: VectorPartKnown
@@ -118,14 +118,14 @@ body: |
; CHECK-NEXT: %6:_ KnownBits:000000000??01010 SignBits:9
; CHECK-NEXT: %7:_ KnownBits:0000000????????? SignBits:7
; CHECK-NEXT: %8:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = G_CONSTANT i16 255
- %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
- %3:_(<4 x s16>) = G_AND %0, %2
- %4:_(s16) = G_CONSTANT i16 42
- %5:_(s16) = G_CONSTANT i16 74
- %6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
- %7:_(<4 x s16>), %8:_(<4 x s1>) = G_UADDO %6, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = G_CONSTANT i16 255
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %1, %1, %1, %1
+ %3:_(<4 x i16>) = G_AND %0, %2
+ %4:_(i16) = G_CONSTANT i16 42
+ %5:_(i16) = G_CONSTANT i16 74
+ %6:_(<4 x i16>) = G_BUILD_VECTOR %4, %5, %5, %4
+ %7:_(<4 x i16>), %8:_(<4 x i1>) = G_UADDO %6, %3
...
---
name: VectorCst36
@@ -138,11 +138,11 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
; CHECK-NEXT: %4:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(s16) = G_CONSTANT i16 3
- %1:_(s16) = G_CONSTANT i16 6
- %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_UADDO %2, %3
+ %0:_(i16) = G_CONSTANT i16 3
+ %1:_(i16) = G_CONSTANT i16 6
+ %2:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %0, %1, %1, %0
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_UADDO %2, %3
...
---
name: VectorCst3unknown
@@ -155,9 +155,9 @@ body: |
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:? SignBits:1
- %0:_(<4 x s16>) = COPY $d0
- %1:_(s16) = COPY $h0
- %2:_(s16) = G_CONSTANT i16 3
- %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
- %4:_(<4 x s16>), %5:_(<4 x s1>) = G_UADDO %0, %3
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(i16) = COPY $h0
+ %2:_(i16) = G_CONSTANT i16 3
+ %3:_(<4 x i16>) = G_BUILD_VECTOR %1, %2, %2, %1
+ %4:_(<4 x i16>), %5:_(<4 x i1>) = G_UADDO %0, %3
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir
index dfbcd3f3c6188..81f7c0e4f0ca0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:01100100 SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:000????? SignBits:3
- %0:_(s8) = G_CONSTANT i8 100
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = G_UDIV %0, %1
+ %0:_(i8) = G_CONSTANT i8 100
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = G_UDIV %0, %1
...
---
name: PartialKnown
@@ -23,11 +23,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %4:_ KnownBits:000000?? SignBits:6
- %0:_(s8) = G_IMPLICIT_DEF
- %1:_(s8) = G_CONSTANT i8 15
- %2:_(s8) = G_AND %0, %1
- %3:_(s8) = G_CONSTANT i8 4
- %4:_(s8) = G_UDIV %2, %3
+ %0:_(i8) = G_IMPLICIT_DEF
+ %1:_(i8) = G_CONSTANT i8 15
+ %2:_(i8) = G_AND %0, %1
+ %3:_(i8) = G_CONSTANT i8 4
+ %4:_(i8) = G_UDIV %2, %3
...
---
name: Exact
@@ -37,9 +37,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00001100 SignBits:4
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:000000?1 SignBits:6
- %0:_(s8) = G_CONSTANT i8 12
- %1:_(s8) = G_CONSTANT i8 4
- %2:_(s8) = exact G_UDIV %0, %1
+ %0:_(i8) = G_CONSTANT i8 12
+ %1:_(i8) = G_CONSTANT i8 4
+ %2:_(i8) = exact G_UDIV %0, %1
...
---
name: Unknown
@@ -49,7 +49,7 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_UDIV %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_UDIV %0, %1
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-umulh.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-umulh.mir
index debdbaaeecf5c..8fdad4ccadc23 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-umulh.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-umulh.mir
@@ -9,9 +9,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:00010011 SignBits:3
; CHECK-NEXT: %1:_ KnownBits:11100000 SignBits:3
; CHECK-NEXT: %2:_ KnownBits:00010000 SignBits:3
- %0:_(s8) = G_CONSTANT i8 19
- %1:_(s8) = G_CONSTANT i8 224
- %2:_(s8) = G_UMULH %0, %1
+ %0:_(i8) = G_CONSTANT i8 19
+ %1:_(i8) = G_CONSTANT i8 224
+ %2:_(i8) = G_UMULH %0, %1
...
---
name: CstZero
@@ -21,9 +21,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:11111111 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = G_CONSTANT i8 255
- %1:_(s8) = G_CONSTANT i8 0
- %2:_(s8) = G_UMULH %0, %1
+ %0:_(i8) = G_CONSTANT i8 255
+ %1:_(i8) = G_CONSTANT i8 0
+ %2:_(i8) = G_UMULH %0, %1
...
---
name: ScalarVar
@@ -33,9 +33,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
- %0:_(s8) = COPY $b0
- %1:_(s8) = COPY $b1
- %2:_(s8) = G_UMULH %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = COPY $b1
+ %2:_(i8) = G_UMULH %0, %1
...
---
name: ScalarZero
@@ -45,9 +45,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_CONSTANT i8 0
- %2:_(s8) = G_UMULH %0, %1
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_CONSTANT i8 0
+ %2:_(i8) = G_UMULH %0, %1
...
---
name: ScalarVarAbs
@@ -59,11 +59,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %3:_ KnownBits:0000000000000001 SignBits:15
; CHECK-NEXT: %4:_ KnownBits:0000000000000000 SignBits:16
- %0:_(s8) = COPY $b0
- %1:_(s8) = G_ABS %0
- %2:_(s16) = G_SEXT %1
- %3:_(s16) = G_CONSTANT i16 1
- %4:_(s16) = G_UMULH %2, %3
+ %0:_(i8) = COPY $b0
+ %1:_(i8) = G_ABS %0
+ %2:_(i16) = G_SEXT %1
+ %3:_(i16) = G_CONSTANT i16 1
+ %4:_(i16) = G_UMULH %2, %3
...
---
name: SplatVecCst
@@ -74,10 +74,10 @@ body: |
; CHECK-NEXT: %1:_ KnownBits:11111010 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:11111010 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:11110100 SignBits:4
- %0:_(s8) = G_CONSTANT i8 250
- %1:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %0(s8)
- %2:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %0(s8)
- %3:_(<vscale x 16 x s8>) = G_UMULH %1, %2
+ %0:_(i8) = G_CONSTANT i8 250
+ %1:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %0(i8)
+ %2:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %0(i8)
+ %3:_(<vscale x 16 x i8>) = G_UMULH %1, %2
...
---
name: SplatVecPartScalar
@@ -91,13 +91,13 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %5:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %6:_ KnownBits:0000???? SignBits:4
- %0:_(s8) = G_CONSTANT i8 250
- %1:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %0(s8)
- %2:_(s8) = G_IMPLICIT_DEF
- %3:_(s8) = G_CONSTANT i8 15
- %4:_(s8) = G_AND %2, %3
- %5:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %4(s8)
- %6:_(<vscale x 16 x s8>) = G_UMULH %1, %5
+ %0:_(i8) = G_CONSTANT i8 250
+ %1:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %0(i8)
+ %2:_(i8) = G_IMPLICIT_DEF
+ %3:_(i8) = G_CONSTANT i8 15
+ %4:_(i8) = G_AND %2, %3
+ %5:_(<vscale x 16 x i8>) = G_SPLAT_VECTOR %4(i8)
+ %6:_(<vscale x 16 x i8>) = G_UMULH %1, %5
...
---
name: VecCst
@@ -109,11 +109,11 @@ body: |
; CHECK-NEXT: %2:_ KnownBits:?????001 SignBits:3
; CHECK-NEXT: %3:_ KnownBits:?????001 SignBits:3
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:1
- %0:_(s8) = G_CONSTANT i8 25
- %1:_(s8) = G_CONSTANT i8 225
- %2:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %1:_(s8)
- %3:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %1:_(s8)
- %4:_(<2 x s8>) = G_UMULH %2, %3
+ %0:_(i8) = G_CONSTANT i8 25
+ %1:_(i8) = G_CONSTANT i8 225
+ %2:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %1:_(i8)
+ %3:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %1:_(i8)
+ %4:_(<2 x i8>) = G_UMULH %2, %3
...
---
name: VecPartScalar
@@ -127,11 +127,11 @@ body: |
; CHECK-NEXT: %4:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %5:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %6:_ KnownBits:0000???? SignBits:4
- %0:_(s8) = G_CONSTANT i8 250
- %1:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %0:_(s8)
- %2:_(s8) = G_IMPLICIT_DEF
- %3:_(s8) = G_CONSTANT i8 15
- %4:_(s8) = G_AND %2, %3
- %5:_(<2 x s8>) = G_BUILD_VECTOR %4:_(s8), %4:_(s8)
- %6:_(<2 x s8>) = G_UMULH %1, %5
+ %0:_(i8) = G_CONSTANT i8 250
+ %1:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %0:_(i8)
+ %2:_(i8) = G_IMPLICIT_DEF
+ %3:_(i8) = G_CONSTANT i8 15
+ %4:_(i8) = G_AND %2, %3
+ %5:_(<2 x i8>) = G_BUILD_VECTOR %4:_(i8), %4:_(i8)
+ %6:_(<2 x i8>) = G_UMULH %1, %5
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-unmerge.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-unmerge.mir
index a8334dbeee052..c0fbeab3402ee 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-unmerge.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-unmerge.mir
@@ -13,12 +13,12 @@ body: |
; CHECK-NEXT: %x0_0:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %x0_1:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %result:_ KnownBits:000000000000???? SignBits:12
- %copy_x0:_(<2 x s16>) = COPY $w0
- %maskf:_(s16) = G_CONSTANT i16 15
- %x0_x1:_(<2 x s16>) = G_BUILD_VECTOR %maskf, %maskf
- %and:_(<2 x s16>) = G_AND %copy_x0, %x0_x1
- %x0_0:_(s16), %x0_1:_(s16) = G_UNMERGE_VALUES %and
- %result:_(s16) = COPY %x0_0
+ %copy_x0:_(<2 x i16>) = COPY $w0
+ %maskf:_(i16) = G_CONSTANT i16 15
+ %x0_x1:_(<2 x i16>) = G_BUILD_VECTOR %maskf, %maskf
+ %and:_(<2 x i16>) = G_AND %copy_x0, %x0_x1
+ %x0_0:_(i16), %x0_1:_(i16) = G_UNMERGE_VALUES %and
+ %result:_(i16) = COPY %x0_0
...
---
name: Vector
@@ -34,12 +34,12 @@ body: |
; CHECK-NEXT: %x0_1:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %result1:_ KnownBits:0000???? SignBits:4
; CHECK-NEXT: %result2:_ KnownBits:???????? SignBits:1
- %copy_x0:_(<4 x s8>) = COPY $w0
- %maskff:_(s8) = G_CONSTANT i8 255
- %maskf:_(s8) = G_CONSTANT i8 15
- %x0_x1:_(<4 x s8>) = G_BUILD_VECTOR %maskf, %maskf, %maskff, %maskff
- %and:_(<4 x s8>) = G_AND %copy_x0, %x0_x1
- %x0_0:_(<2 x s8>), %x0_1:_(<2 x s8>) = G_UNMERGE_VALUES %and
- %result1:_(<2 x s8>) = COPY %x0_0
- %result2:_(<2 x s8>) = COPY %x0_1
+ %copy_x0:_(<4 x i8>) = COPY $w0
+ %maskff:_(i8) = G_CONSTANT i8 255
+ %maskf:_(i8) = G_CONSTANT i8 15
+ %x0_x1:_(<4 x i8>) = G_BUILD_VECTOR %maskf, %maskf, %maskff, %maskff
+ %and:_(<4 x i8>) = G_AND %copy_x0, %x0_x1
+ %x0_0:_(<2 x i8>), %x0_1:_(<2 x i8>) = G_UNMERGE_VALUES %and
+ %result1:_(<2 x i8>) = COPY %x0_0
+ %result2:_(<2 x i8>) = COPY %x0_1
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
index c6146d4d1b271..6aa1415d30f45 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
@@ -10,10 +10,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_CONSTANT i32 8
- %2:_(s32) = G_UREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = G_CONSTANT i32 8
+ %2:_(i32) = G_UREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -27,10 +27,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = COPY $w0
- %1:_(s32) = G_CONSTANT i32 10
- %2:_(s32) = G_UREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = G_CONSTANT i32 10
+ %2:_(i32) = G_UREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -44,10 +44,10 @@ body: |
bb.1:
liveins: $w0, $w1
- %0:_(s32) = COPY $w0
- %1:_(s32) = COPY $w1
- %2:_(s32) = G_UREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = COPY $w0
+ %1:_(i32) = COPY $w1
+ %2:_(i32) = G_UREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -61,10 +61,10 @@ body: |
bb.1:
liveins: $w0
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_CONSTANT i32 8
- %2:_(s32) = G_UREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_IMPLICIT_DEF
+ %1:_(i32) = G_CONSTANT i32 8
+ %2:_(i32) = G_UREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -77,10 +77,10 @@ name: urem_both_implicit_def
body: |
bb.1:
- %0:_(s32) = G_IMPLICIT_DEF
- %1:_(s32) = G_IMPLICIT_DEF
- %2:_(s32) = G_UREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_IMPLICIT_DEF
+ %1:_(i32) = G_IMPLICIT_DEF
+ %2:_(i32) = G_UREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
@@ -93,9 +93,9 @@ name: urem_const_const
body: |
bb.1:
- %0:_(s32) = G_CONSTANT i32 10
- %1:_(s32) = G_CONSTANT i32 3
- %2:_(s32) = G_UREM %0, %1
- $w0 = COPY %2(s32)
+ %0:_(i32) = G_CONSTANT i32 10
+ %1:_(i32) = G_CONSTANT i32 3
+ %2:_(i32) = G_UREM %0, %1
+ $w0 = COPY %2(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
index aaa0cb1d72fb0..66909f53a68f9 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
@@ -24,17 +24,17 @@ body: |
; CHECK-NEXT: %vector:_ KnownBits:??1????0 SignBits:1
; CHECK-NEXT: %copy_vector:_ KnownBits:??1????0 SignBits:1
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(s8) = G_LOAD %ptr(p0) :: (load (s8))
- %mask0:_(s8) = G_CONSTANT i8 24
- %mask1:_(s8) = G_CONSTANT i8 224
- %tmp0:_(s8) = G_AND %unknown, %mask0
- %val0:_(s8) = G_OR %tmp0, %mask1
- %mask2:_(s8) = G_CONSTANT i8 146
- %mask3:_(s8) = G_CONSTANT i8 36
- %tmp1:_(s8) = G_AND %unknown, %mask2
- %val1:_(s8) = G_OR %tmp1, %mask3
- %vector:_(<2 x s8>) = G_BUILD_VECTOR %val0, %val1
- %copy_vector:_(<2 x s8>) = COPY %vector
+ %unknown:_(i8) = G_LOAD %ptr(p0) :: (load (i8))
+ %mask0:_(i8) = G_CONSTANT i8 24
+ %mask1:_(i8) = G_CONSTANT i8 224
+ %tmp0:_(i8) = G_AND %unknown, %mask0
+ %val0:_(i8) = G_OR %tmp0, %mask1
+ %mask2:_(i8) = G_CONSTANT i8 146
+ %mask3:_(i8) = G_CONSTANT i8 36
+ %tmp1:_(i8) = G_AND %unknown, %mask2
+ %val1:_(i8) = G_OR %tmp1, %mask3
+ %vector:_(<2 x i8>) = G_BUILD_VECTOR %val0, %val1
+ %copy_vector:_(<2 x i8>) = COPY %vector
...
---
name: TestKnownBitsVectorCstPHI
@@ -49,20 +49,20 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:0000001? SignBits:6
; CHECK-NEXT: %6:_ KnownBits:0000001? SignBits:6
bb.0:
- %0:_(s8) = G_CONSTANT i8 3
- %1:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %0:_(s8)
- %2:_(s1) = G_IMPLICIT_DEF
- G_BRCOND %2(s1), %bb.1
+ %0:_(i8) = G_CONSTANT i8 3
+ %1:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %0:_(i8)
+ %2:_(i1) = G_IMPLICIT_DEF
+ G_BRCOND %2(i1), %bb.1
G_BR %bb.2
bb.1:
- %3:_(s8) = G_CONSTANT i8 2
- %4:_(<2 x s8>) = G_BUILD_VECTOR %3:_(s8), %3:_(s8)
+ %3:_(i8) = G_CONSTANT i8 2
+ %4:_(<2 x i8>) = G_BUILD_VECTOR %3:_(i8), %3:_(i8)
G_BR %bb.2
bb.2:
- %5:_(<2 x s8>) = PHI %1(<2 x s8>), %bb.0, %4(<2 x s8>), %bb.1
- %6:_(<2 x s8>) = COPY %5
+ %5:_(<2 x i8>) = PHI %1(<2 x i8>), %bb.0, %4(<2 x i8>), %bb.1
+ %6:_(<2 x i8>) = COPY %5
...
---
name: TestKnownBitsVectorCstPHIToNonGenericReg
@@ -76,18 +76,18 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:???????????????? SignBits:1
bb.0:
%0:gpr32 = MOVi32imm 771
- %1:_(s1) = G_IMPLICIT_DEF
- G_BRCOND %1(s1), %bb.1
+ %1:_(i1) = G_IMPLICIT_DEF
+ G_BRCOND %1(i1), %bb.1
G_BR %bb.2
bb.1:
- %2:_(s16) = G_CONSTANT i16 2
- %3:_(<2 x s16>) = G_BUILD_VECTOR %2:_(s16), %2:_(s16)
+ %2:_(i16) = G_CONSTANT i16 2
+ %3:_(<2 x i16>) = G_BUILD_VECTOR %2:_(i16), %2:_(i16)
G_BR %bb.2
bb.2:
- %4:_(<2 x s16>) = PHI %0, %bb.0, %3(<2 x s16>), %bb.1
- %5:_(<2 x s16>) = COPY %4
+ %4:_(<2 x i16>) = PHI %0, %bb.0, %3(<2 x i16>), %bb.1
+ %5:_(<2 x i16>) = COPY %4
...
---
name: TestKnownBitsVectorUnknownPHI
@@ -102,19 +102,19 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:???????????????????????????????? SignBits:1
bb.0:
liveins: $d0
- %0:_(<2 x s32>) = COPY $d0
- %1:_(s1) = G_IMPLICIT_DEF
- G_BRCOND %1(s1), %bb.1
+ %0:_(<2 x i32>) = COPY $d0
+ %1:_(i1) = G_IMPLICIT_DEF
+ G_BRCOND %1(i1), %bb.1
G_BR %bb.2
bb.1:
- %2:_(s32) = G_CONSTANT i32 2
- %3:_(<2 x s32>) = G_BUILD_VECTOR %2:_(s32), %2:_(s32)
+ %2:_(i32) = G_CONSTANT i32 2
+ %3:_(<2 x i32>) = G_BUILD_VECTOR %2:_(i32), %2:_(i32)
G_BR %bb.2
bb.2:
- %4:_(<2 x s32>) = PHI %0(<2 x s32>), %bb.0, %3(<2 x s32>), %bb.1
- %5:_(<2 x s32>) = COPY %4
+ %4:_(<2 x i32>) = PHI %0(<2 x i32>), %bb.0, %3(<2 x i32>), %bb.1
+ %5:_(<2 x i32>) = COPY %4
...
---
name: TestKnownBitsVectorCstPHIWithLoop
@@ -129,20 +129,20 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %6:_ KnownBits:???????? SignBits:1
bb.0:
- %0:_(s8) = G_CONSTANT i8 3
- %1:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %0:_(s8)
- %2:_(s1) = G_IMPLICIT_DEF
- G_BRCOND %2(s1), %bb.1
+ %0:_(i8) = G_CONSTANT i8 3
+ %1:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %0:_(i8)
+ %2:_(i1) = G_IMPLICIT_DEF
+ G_BRCOND %2(i1), %bb.1
G_BR %bb.2
bb.1:
- %3:_(s8) = G_CONSTANT i8 2
- %4:_(<2 x s8>) = G_BUILD_VECTOR %3:_(s8), %3:_(s8)
+ %3:_(i8) = G_CONSTANT i8 2
+ %4:_(<2 x i8>) = G_BUILD_VECTOR %3:_(i8), %3:_(i8)
G_BR %bb.2
bb.2:
- %5:_(<2 x s8>) = PHI %1(<2 x s8>), %bb.0, %4(<2 x s8>), %bb.1, %6(<2 x s8>), %bb.2
- %6:_(<2 x s8>) = COPY %5
+ %5:_(<2 x i8>) = PHI %1(<2 x i8>), %bb.0, %4(<2 x i8>), %bb.1, %6(<2 x i8>), %bb.2
+ %6:_(<2 x i8>) = COPY %5
G_BR %bb.2
...
---
@@ -158,15 +158,15 @@ body: |
; CHECK-NEXT: %5:_ KnownBits:00?????? SignBits:2
; CHECK-NEXT: %6:_ KnownBits:00?????? SignBits:2
bb.0:
- %0:_(s8) = G_CONSTANT i8 5
- %1:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %0:_(s8)
- %2:_(s8) = G_CONSTANT i8 1
- %3:_(<2 x s8>) = G_BUILD_VECTOR %2:_(s8), %2:_(s8)
+ %0:_(i8) = G_CONSTANT i8 5
+ %1:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %0:_(i8)
+ %2:_(i8) = G_CONSTANT i8 1
+ %3:_(<2 x i8>) = G_BUILD_VECTOR %2:_(i8), %2:_(i8)
bb.1:
- %4:_(<2 x s8>) = PHI %1(<2 x s8>), %bb.0, %5(<2 x s8>), %bb.1
- %5:_(<2 x s8>) = G_LSHR %4, %3
- %6:_(<2 x s8>) = COPY %5
+ %4:_(<2 x i8>) = PHI %1(<2 x i8>), %bb.0, %5(<2 x i8>), %bb.1
+ %5:_(<2 x i8>) = G_LSHR %4, %3
+ %6:_(<2 x i8>) = COPY %5
G_BR %bb.1
...
---
@@ -192,21 +192,21 @@ body: |
; CHECK-NEXT: %and:_ KnownBits:00??1000 SignBits:2
; CHECK-NEXT: %copy_and:_ KnownBits:00??1000 SignBits:2
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 52
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 10
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 32
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 24
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %and:_(<2 x s8>) = G_AND %val0, %val1
- %copy_and:_(<2 x s8>) = COPY %and
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 52
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 10
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 32
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 24
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %and:_(<2 x i8>) = G_AND %val0, %val1
+ %copy_and:_(<2 x i8>) = COPY %and
...
---
name: TestKnownBitsVectorOR
@@ -231,21 +231,21 @@ body: |
; CHECK-NEXT: %or:_ KnownBits:00?11?10 SignBits:2
; CHECK-NEXT: %copy_or:_ KnownBits:00?11?10 SignBits:2
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 52
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 10
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 32
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 24
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %or:_(<2 x s8>) = G_OR %val0, %val1
- %copy_or:_(<2 x s8>) = COPY %or
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 52
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 10
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 32
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 24
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %or:_(<2 x i8>) = G_OR %val0, %val1
+ %copy_or:_(<2 x i8>) = COPY %or
...
---
name: TestKnownBitsVectorXOR
@@ -270,21 +270,21 @@ body: |
; CHECK-NEXT: %xor:_ KnownBits:00??0?10 SignBits:2
; CHECK-NEXT: %copy_xor:_ KnownBits:00??0?10 SignBits:2
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 52
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 10
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 32
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 24
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %xor:_(<2 x s8>) = G_XOR %val0, %val1
- %copy_xor:_(<2 x s8>) = COPY %xor
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 52
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 10
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 32
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 24
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %xor:_(<2 x i8>) = G_XOR %val0, %val1
+ %copy_xor:_(<2 x i8>) = COPY %xor
...
---
name: TestKnownBitsVectorXORConstant
@@ -302,17 +302,17 @@ body: |
; CHECK-NEXT: %7:_ KnownBits:0000?100 SignBits:4
; CHECK-NEXT: %8:_ KnownBits:0000?011 SignBits:4
; CHECK-NEXT: %9:_ KnownBits:0000?011 SignBits:4
- %0:_(s8) = G_CONSTANT i8 4
- %1:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %0:_(s8)
- %2:_(s8) = G_CONSTANT i8 7
- %3:_(<2 x s8>) = G_BUILD_VECTOR %2:_(s8), %2:_(s8)
- %4:_(<2 x s8>) = G_XOR %1, %3
- %5:_(<2 x s8>) = COPY %4
-
- %6:_(s8) = G_CONSTANT i8 12
- %7:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %6:_(s8)
- %8:_(<2 x s8>) = G_XOR %7, %3
- %9:_(<2 x s8>) = COPY %8
+ %0:_(i8) = G_CONSTANT i8 4
+ %1:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %0:_(i8)
+ %2:_(i8) = G_CONSTANT i8 7
+ %3:_(<2 x i8>) = G_BUILD_VECTOR %2:_(i8), %2:_(i8)
+ %4:_(<2 x i8>) = G_XOR %1, %3
+ %5:_(<2 x i8>) = COPY %4
+
+ %6:_(i8) = G_CONSTANT i8 12
+ %7:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %6:_(i8)
+ %8:_(<2 x i8>) = G_XOR %7, %3
+ %9:_(<2 x i8>) = COPY %8
...
---
name: TestKnownBitsVectorASHR
@@ -341,26 +341,26 @@ body: |
; CHECK-NEXT: %ashr1:_ KnownBits:????01?? SignBits:3
; CHECK-NEXT: %copy_ashr1:_ KnownBits:????01?? SignBits:3
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 38
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 202
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %cst0:_(s8) = G_CONSTANT i8 2
- %cst0_splat:_(<2 x s8>) = G_BUILD_VECTOR %cst0, %cst0
- %ashr0:_(<2 x s8>) = G_ASHR %val0, %cst0_splat
- %copy_ashr0:_(<2 x s8>) = COPY %ashr0
-
- %mask2:_(s8) = G_CONSTANT i8 204
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 18
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %ashr1:_(<2 x s8>) = G_ASHR %val1, %cst0_splat
- %copy_ashr1:_(<2 x s8>) = COPY %ashr1
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 38
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 202
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %cst0:_(i8) = G_CONSTANT i8 2
+ %cst0_splat:_(<2 x i8>) = G_BUILD_VECTOR %cst0, %cst0
+ %ashr0:_(<2 x i8>) = G_ASHR %val0, %cst0_splat
+ %copy_ashr0:_(<2 x i8>) = COPY %ashr0
+
+ %mask2:_(i8) = G_CONSTANT i8 204
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 18
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %ashr1:_(<2 x i8>) = G_ASHR %val1, %cst0_splat
+ %copy_ashr1:_(<2 x i8>) = COPY %ashr1
...
---
name: TestKnownBitsVectorLSHR
@@ -389,26 +389,26 @@ body: |
; CHECK-NEXT: %lshr1:_ KnownBits:00??01?? SignBits:2
; CHECK-NEXT: %copy_lshr1:_ KnownBits:00??01?? SignBits:2
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 38
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 202
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %cst0:_(s8) = G_CONSTANT i8 2
- %cst0_splat:_(<2 x s8>) = G_BUILD_VECTOR %cst0, %cst0
- %lshr0:_(<2 x s8>) = G_LSHR %val0, %cst0_splat
- %copy_lshr0:_(<2 x s8>) = COPY %lshr0
-
- %mask2:_(s8) = G_CONSTANT i8 204
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 18
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %lshr1:_(<2 x s8>) = G_LSHR %val1, %cst0_splat
- %copy_lshr1:_(<2 x s8>) = COPY %lshr1
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 38
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 202
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %cst0:_(i8) = G_CONSTANT i8 2
+ %cst0_splat:_(<2 x i8>) = G_BUILD_VECTOR %cst0, %cst0
+ %lshr0:_(<2 x i8>) = G_LSHR %val0, %cst0_splat
+ %copy_lshr0:_(<2 x i8>) = COPY %lshr0
+
+ %mask2:_(i8) = G_CONSTANT i8 204
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 18
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %lshr1:_(<2 x i8>) = G_LSHR %val1, %cst0_splat
+ %copy_lshr1:_(<2 x i8>) = COPY %lshr1
...
---
name: TestKnownBitsVectorSHL
@@ -429,17 +429,17 @@ body: |
; CHECK-NEXT: %shl:_ KnownBits:?10??000 SignBits:1
; CHECK-NEXT: %copy_shl:_ KnownBits:?10??000 SignBits:1
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 51
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 72
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val:_(<2 x s8>) = G_OR %tmp, %mask1_splat
- %cst:_(s8) = G_CONSTANT i8 3
- %cst_splat:_(<2 x s8>) = G_BUILD_VECTOR %cst, %cst
- %shl:_(<2 x s8>) = G_SHL %val, %cst_splat
- %copy_shl:_(<2 x s8>) = COPY %shl
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 51
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 72
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val:_(<2 x i8>) = G_OR %tmp, %mask1_splat
+ %cst:_(i8) = G_CONSTANT i8 3
+ %cst_splat:_(<2 x i8>) = G_BUILD_VECTOR %cst, %cst
+ %shl:_(<2 x i8>) = G_SHL %val, %cst_splat
+ %copy_shl:_(<2 x i8>) = COPY %shl
...
---
name: TestKnownBitsVectorADD
@@ -464,21 +464,21 @@ body: |
; CHECK-NEXT: %add:_ KnownBits:0??????01??10??1 SignBits:1
; CHECK-NEXT: %copy_add:_ KnownBits:0??????01??10??1 SignBits:1
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s16>) = G_LOAD %ptr(p0) :: (load (<2 x s16>))
- %mask0:_(s16) = G_CONSTANT i16 4642
- %mask0_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s16) = G_CONSTANT i16 9536
- %mask1_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s16>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s16>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s16) = G_CONSTANT i16 4096
- %mask2_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s16) = G_CONSTANT i16 371
- %mask3_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s16>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s16>) = G_OR %tmp1, %mask3_splat
- %add:_(<2 x s16>) = G_ADD %val0, %val1
- %copy_add:_(<2 x s16>) = COPY %add
+ %unknown:_(<2 x i16>) = G_LOAD %ptr(p0) :: (load (<2 x i16>))
+ %mask0:_(i16) = G_CONSTANT i16 4642
+ %mask0_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i16) = G_CONSTANT i16 9536
+ %mask1_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i16>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i16>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i16) = G_CONSTANT i16 4096
+ %mask2_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i16) = G_CONSTANT i16 371
+ %mask3_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i16>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i16>) = G_OR %tmp1, %mask3_splat
+ %add:_(<2 x i16>) = G_ADD %val0, %val1
+ %copy_add:_(<2 x i16>) = COPY %add
...
---
name: TestKnownBitsVectorSUB
@@ -503,21 +503,21 @@ body: |
; CHECK-NEXT: %sub:_ KnownBits:00??0??111?011?1 SignBits:2
; CHECK-NEXT: %copy_sub:_ KnownBits:00??0??111?011?1 SignBits:2
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s16>) = G_LOAD %ptr(p0) :: (load (<2 x s16>))
- %mask0:_(s16) = G_CONSTANT i16 4642
- %mask0_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s16) = G_CONSTANT i16 9536
- %mask1_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s16>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s16>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s16) = G_CONSTANT i16 4096
- %mask2_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s16) = G_CONSTANT i16 371
- %mask3_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s16>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s16>) = G_OR %tmp1, %mask3_splat
- %sub:_(<2 x s16>) = G_SUB %val0, %val1
- %copy_sub:_(<2 x s16>) = COPY %sub
+ %unknown:_(<2 x i16>) = G_LOAD %ptr(p0) :: (load (<2 x i16>))
+ %mask0:_(i16) = G_CONSTANT i16 4642
+ %mask0_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i16) = G_CONSTANT i16 9536
+ %mask1_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i16>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i16>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i16) = G_CONSTANT i16 4096
+ %mask2_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i16) = G_CONSTANT i16 371
+ %mask3_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i16>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i16>) = G_OR %tmp1, %mask3_splat
+ %sub:_(<2 x i16>) = G_SUB %val0, %val1
+ %copy_sub:_(<2 x i16>) = COPY %sub
...
---
name: TestKnownBitsVectorMUL
@@ -538,17 +538,17 @@ body: |
; CHECK-NEXT: %mul:_ KnownBits:0000000?????1000 SignBits:7
; CHECK-NEXT: %copy_mul:_ KnownBits:0000000?????1000 SignBits:7
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s16>) = G_LOAD %ptr(p0) :: (load (<2 x s16>))
- %mask0:_(s16) = G_CONSTANT i16 4
- %mask0_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s16) = G_CONSTANT i16 18
- %mask1_splat:_(<2 x s16>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp:_(<2 x s16>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s16>) = G_OR %tmp, %mask1_splat
- %cst:_(s16) = G_CONSTANT i16 12
- %cst_splat:_(<2 x s16>) = G_BUILD_VECTOR %cst, %cst
- %mul:_(<2 x s16>) = G_MUL %val0, %cst_splat
- %copy_mul:_(<2 x s16>) = COPY %mul
+ %unknown:_(<2 x i16>) = G_LOAD %ptr(p0) :: (load (<2 x i16>))
+ %mask0:_(i16) = G_CONSTANT i16 4
+ %mask0_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i16) = G_CONSTANT i16 18
+ %mask1_splat:_(<2 x i16>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp:_(<2 x i16>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i16>) = G_OR %tmp, %mask1_splat
+ %cst:_(i16) = G_CONSTANT i16 12
+ %cst_splat:_(<2 x i16>) = G_BUILD_VECTOR %cst, %cst
+ %mul:_(<2 x i16>) = G_MUL %val0, %cst_splat
+ %copy_mul:_(<2 x i16>) = COPY %mul
...
---
name: TestKnownBitsVectorSelect
@@ -575,23 +575,23 @@ body: |
; CHECK-NEXT: %select:_ KnownBits:??1????0 SignBits:1
; CHECK-NEXT: %copy_select:_ KnownBits:??1????0 SignBits:1
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 24
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 224
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 146
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 36
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %cond:_(s1) = G_CONSTANT i1 false
- %cond_splat:_(<2 x s1>) = G_BUILD_VECTOR %cond, %cond
- %select:_(<2 x s8>) = G_SELECT %cond_splat, %val0, %val1
- %copy_select:_(<2 x s8>) = COPY %select
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 24
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 224
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 146
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 36
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %cond:_(i1) = G_CONSTANT i1 false
+ %cond_splat:_(<2 x i1>) = G_BUILD_VECTOR %cond, %cond
+ %select:_(<2 x i8>) = G_SELECT %cond_splat, %val0, %val1
+ %copy_select:_(<2 x i8>) = COPY %select
...
---
name: TestVectorNumSignBitsConstant
@@ -622,31 +622,31 @@ body: |
; CHECK-NEXT: %16:_ KnownBits:111????? SignBits:3
; CHECK-NEXT: %17:_ KnownBits:??100000 SignBits:2
; CHECK-NEXT: %18:_ KnownBits:??100000 SignBits:2
- %0:_(s8) = G_CONSTANT i8 1
- %1:_(<2 x s8>) = G_BUILD_VECTOR %0:_(s8), %0:_(s8)
- %2:_(<2 x s8>) = COPY %1
+ %0:_(i8) = G_CONSTANT i8 1
+ %1:_(<2 x i8>) = G_BUILD_VECTOR %0:_(i8), %0:_(i8)
+ %2:_(<2 x i8>) = COPY %1
- %3:_(s8) = G_CONSTANT i8 -1
- %4:_(<2 x s8>) = G_BUILD_VECTOR %3:_(s8), %3:_(s8)
- %5:_(<2 x s8>) = COPY %4
+ %3:_(i8) = G_CONSTANT i8 -1
+ %4:_(<2 x i8>) = G_BUILD_VECTOR %3:_(i8), %3:_(i8)
+ %5:_(<2 x i8>) = COPY %4
- %6:_(s8) = G_CONSTANT i8 127
- %7:_(<2 x s8>) = G_BUILD_VECTOR %6:_(s8), %6:_(s8)
- %8:_(<2 x s8>) = COPY %7
+ %6:_(i8) = G_CONSTANT i8 127
+ %7:_(<2 x i8>) = G_BUILD_VECTOR %6:_(i8), %6:_(i8)
+ %8:_(<2 x i8>) = COPY %7
- %9:_(s8) = G_CONSTANT i8 32
- %10:_(<2 x s8>) = G_BUILD_VECTOR %9:_(s8), %9:_(s8)
- %11:_(<2 x s8>) = COPY %10
+ %9:_(i8) = G_CONSTANT i8 32
+ %10:_(<2 x i8>) = G_BUILD_VECTOR %9:_(i8), %9:_(i8)
+ %11:_(<2 x i8>) = COPY %10
- %12:_(s8) = G_CONSTANT i8 -32
- %13:_(<2 x s8>) = G_BUILD_VECTOR %12:_(s8), %12:_(s8)
- %14:_(<2 x s8>) = COPY %13
+ %12:_(i8) = G_CONSTANT i8 -32
+ %13:_(<2 x i8>) = G_BUILD_VECTOR %12:_(i8), %12:_(i8)
+ %14:_(<2 x i8>) = COPY %13
- %15:_(<2 x s8>) = G_BUILD_VECTOR %3:_(s8), %12:_(s8)
- %16:_(<2 x s8>) = COPY %15
+ %15:_(<2 x i8>) = G_BUILD_VECTOR %3:_(i8), %12:_(i8)
+ %16:_(<2 x i8>) = COPY %15
- %17:_(<2 x s8>) = G_BUILD_VECTOR %9:_(s8), %12:_(s8)
- %18:_(<2 x s8>) = COPY %17
+ %17:_(<2 x i8>) = G_BUILD_VECTOR %9:_(i8), %12:_(i8)
+ %18:_(<2 x i8>) = COPY %17
...
---
name: TestVectorNumSignBitsSext
@@ -667,19 +667,19 @@ body: |
; CHECK-NEXT: %10:_ KnownBits:1111111111111111111111111111?11? SignBits:28
; CHECK-NEXT: %11:_ KnownBits:1111111111111111111111111111?11? SignBits:28
%0:_(p0) = G_IMPLICIT_DEF
- %1:_(<2 x s8>) = G_LOAD %0 :: (load (<2 x s8>))
- %2:_(<2 x s32>) = G_SEXT %1
- %3:_(<2 x s32>) = COPY %2
-
- %4:_(s8) = G_CONSTANT i8 -1
- %5:_(<2 x s8>) = G_BUILD_VECTOR %4:_(s8), %4:_(s8)
- %6:_(<2 x s32>) = G_SEXT %5
- %7:_(<2 x s32>) = COPY %6
-
- %8:_(s8) = G_CONSTANT i8 -10
- %9:_(<2 x s8>) = G_BUILD_VECTOR %4:_(s8), %8:_(s8)
- %10:_(<2 x s32>) = G_SEXT %9
- %11:_(<2 x s32>) = COPY %10
+ %1:_(<2 x i8>) = G_LOAD %0 :: (load (<2 x i8>))
+ %2:_(<2 x i32>) = G_SEXT %1
+ %3:_(<2 x i32>) = COPY %2
+
+ %4:_(i8) = G_CONSTANT i8 -1
+ %5:_(<2 x i8>) = G_BUILD_VECTOR %4:_(i8), %4:_(i8)
+ %6:_(<2 x i32>) = G_SEXT %5
+ %7:_(<2 x i32>) = COPY %6
+
+ %8:_(i8) = G_CONSTANT i8 -10
+ %9:_(<2 x i8>) = G_BUILD_VECTOR %4:_(i8), %8:_(i8)
+ %10:_(<2 x i32>) = G_SEXT %9
+ %11:_(<2 x i32>) = COPY %10
...
---
name: TestVectorNumSignBitsSextInReg
@@ -710,37 +710,37 @@ body: |
; CHECK-NEXT: %inreg31_sext:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %copy_inreg31_sext:_ KnownBits:???????????????????????????????? SignBits:25
%ptr:_(p0) = G_IMPLICIT_DEF
- %load2x4:_(<2 x s32>) = G_LOAD %ptr :: (load (<2 x s32>))
+ %load2x4:_(<2 x i32>) = G_LOAD %ptr :: (load (<2 x i32>))
- %inreg7:_(<2 x s32>) = G_SEXT_INREG %load2x4, 7
- %copy_inreg7:_(<2 x s32>) = COPY %inreg7
+ %inreg7:_(<2 x i32>) = G_SEXT_INREG %load2x4, 7
+ %copy_inreg7:_(<2 x i32>) = COPY %inreg7
- %inreg8:_(<2 x s32>) = G_SEXT_INREG %load2x4, 8
- %copy_inreg8:_(<2 x s32>) = COPY %inreg8
+ %inreg8:_(<2 x i32>) = G_SEXT_INREG %load2x4, 8
+ %copy_inreg8:_(<2 x i32>) = COPY %inreg8
- %inreg9:_(<2 x s32>) = G_SEXT_INREG %load2x4, 9
- %copy_inreg9:_(<2 x s32>) = COPY %inreg9
+ %inreg9:_(<2 x i32>) = G_SEXT_INREG %load2x4, 9
+ %copy_inreg9:_(<2 x i32>) = COPY %inreg9
- %inreg31:_(<2 x s32>) = G_SEXT_INREG %load2x4, 31
- %copy_inreg31:_(<2 x s32>) = COPY %inreg31
+ %inreg31:_(<2 x i32>) = G_SEXT_INREG %load2x4, 31
+ %copy_inreg31:_(<2 x i32>) = COPY %inreg31
- %load2x1:_(<2 x s8>) = G_LOAD %ptr :: (load (<2 x s8>))
- %sext_load2x1:_(<2 x s32>) = G_SEXT %load2x1
+ %load2x1:_(<2 x i8>) = G_LOAD %ptr :: (load (<2 x i8>))
+ %sext_load2x1:_(<2 x i32>) = G_SEXT %load2x1
- %inreg6_sext:_(<2 x s32>) = G_SEXT_INREG %sext_load2x1, 6
- %copy_inreg6_sext:_(<2 x s32>) = COPY %inreg6_sext
+ %inreg6_sext:_(<2 x i32>) = G_SEXT_INREG %sext_load2x1, 6
+ %copy_inreg6_sext:_(<2 x i32>) = COPY %inreg6_sext
- %inreg7_sext:_(<2 x s32>) = G_SEXT_INREG %sext_load2x1, 7
- %copy_inreg7_sext:_(<2 x s32>) = COPY %inreg7_sext
+ %inreg7_sext:_(<2 x i32>) = G_SEXT_INREG %sext_load2x1, 7
+ %copy_inreg7_sext:_(<2 x i32>) = COPY %inreg7_sext
- %inreg8_sext:_(<2 x s32>) = G_SEXT_INREG %sext_load2x1, 8
- %copy_inreg8_sext:_(<2 x s32>) = COPY %inreg8_sext
+ %inreg8_sext:_(<2 x i32>) = G_SEXT_INREG %sext_load2x1, 8
+ %copy_inreg8_sext:_(<2 x i32>) = COPY %inreg8_sext
- %inreg9_sext:_(<2 x s32>) = G_SEXT_INREG %sext_load2x1, 9
- %copy_inreg9_sext:_(<2 x s32>) = COPY %inreg9_sext
+ %inreg9_sext:_(<2 x i32>) = G_SEXT_INREG %sext_load2x1, 9
+ %copy_inreg9_sext:_(<2 x i32>) = COPY %inreg9_sext
- %inreg31_sext:_(<2 x s32>) = G_SEXT_INREG %sext_load2x1, 31
- %copy_inreg31_sext:_(<2 x s32>) = COPY %inreg31_sext
+ %inreg31_sext:_(<2 x i32>) = G_SEXT_INREG %sext_load2x1, 31
+ %copy_inreg31_sext:_(<2 x i32>) = COPY %inreg31_sext
...
---
name: TestNumSignBitsVectorAssertSext
@@ -773,40 +773,40 @@ body: |
; CHECK-NEXT: %assert_sext31_sext:_ KnownBits:???????????????????????????????? SignBits:25
; CHECK-NEXT: %copy_assert_sext31_sext:_ KnownBits:???????????????????????????????? SignBits:25
%ptr:_(p0) = G_IMPLICIT_DEF
- %load2x4:_(<2 x s32>) = G_LOAD %ptr :: (load (<2 x s32>))
+ %load2x4:_(<2 x i32>) = G_LOAD %ptr :: (load (<2 x i32>))
- %assert_sext1:_(<2 x s32>) = G_ASSERT_SEXT %load2x4, 1
- %copy_assert_sext1:_(<2 x s32>) = COPY %assert_sext1
+ %assert_sext1:_(<2 x i32>) = G_ASSERT_SEXT %load2x4, 1
+ %copy_assert_sext1:_(<2 x i32>) = COPY %assert_sext1
- %assert_sext7:_(<2 x s32>) = G_ASSERT_SEXT %load2x4, 7
- %copy_assert_sext7:_(<2 x s32>) = COPY %assert_sext7
+ %assert_sext7:_(<2 x i32>) = G_ASSERT_SEXT %load2x4, 7
+ %copy_assert_sext7:_(<2 x i32>) = COPY %assert_sext7
- %assert_sext8:_(<2 x s32>) = G_ASSERT_SEXT %load2x4, 8
- %copy_assert_sext8:_(<2 x s32>) = COPY %assert_sext8
+ %assert_sext8:_(<2 x i32>) = G_ASSERT_SEXT %load2x4, 8
+ %copy_assert_sext8:_(<2 x i32>) = COPY %assert_sext8
- %assert_sext9:_(<2 x s32>) = G_ASSERT_SEXT %load2x4, 9
- %copy_assert_sext9:_(<2 x s32>) = COPY %assert_sext9
+ %assert_sext9:_(<2 x i32>) = G_ASSERT_SEXT %load2x4, 9
+ %copy_assert_sext9:_(<2 x i32>) = COPY %assert_sext9
- %assert_sext31:_(<2 x s32>) = G_ASSERT_SEXT %load2x4, 31
- %copy_assert_sext31:_(<2 x s32>) = COPY %assert_sext31
+ %assert_sext31:_(<2 x i32>) = G_ASSERT_SEXT %load2x4, 31
+ %copy_assert_sext31:_(<2 x i32>) = COPY %assert_sext31
- %load2x1:_(<2 x s8>) = G_LOAD %ptr :: (load (<2 x s8>))
- %sext_load2x1:_(<2 x s32>) = G_SEXT %load2x1
+ %load2x1:_(<2 x i8>) = G_LOAD %ptr :: (load (<2 x i8>))
+ %sext_load2x1:_(<2 x i32>) = G_SEXT %load2x1
- %assert_sext6_sext:_(<2 x s32>) = G_ASSERT_SEXT %sext_load2x1, 6
- %copy_assert_sext6_sext:_(<2 x s32>) = COPY %assert_sext6_sext
+ %assert_sext6_sext:_(<2 x i32>) = G_ASSERT_SEXT %sext_load2x1, 6
+ %copy_assert_sext6_sext:_(<2 x i32>) = COPY %assert_sext6_sext
- %assert_sext7_sext:_(<2 x s32>) = G_ASSERT_SEXT %sext_load2x1, 7
- %copy_assert_sext7_sext:_(<2 x s32>) = COPY %assert_sext7_sext
+ %assert_sext7_sext:_(<2 x i32>) = G_ASSERT_SEXT %sext_load2x1, 7
+ %copy_assert_sext7_sext:_(<2 x i32>) = COPY %assert_sext7_sext
- %assert_sext8_sext:_(<2 x s32>) = G_ASSERT_SEXT %sext_load2x1, 8
- %copy_assert_sext8_sext:_(<2 x s32>) = COPY %assert_sext8_sext
+ %assert_sext8_sext:_(<2 x i32>) = G_ASSERT_SEXT %sext_load2x1, 8
+ %copy_assert_sext8_sext:_(<2 x i32>) = COPY %assert_sext8_sext
- %assert_sext9_sext:_(<2 x s32>) = G_ASSERT_SEXT %sext_load2x1, 9
- %copy_assert_sext9_sext:_(<2 x s32>) = COPY %assert_sext9_sext
+ %assert_sext9_sext:_(<2 x i32>) = G_ASSERT_SEXT %sext_load2x1, 9
+ %copy_assert_sext9_sext:_(<2 x i32>) = COPY %assert_sext9_sext
- %assert_sext31_sext:_(<2 x s32>) = G_ASSERT_SEXT %sext_load2x1, 31
- %copy_assert_sext31_sext:_(<2 x s32>) = COPY %assert_sext31_sext
+ %assert_sext31_sext:_(<2 x i32>) = G_ASSERT_SEXT %sext_load2x1, 31
+ %copy_assert_sext31_sext:_(<2 x i32>) = COPY %assert_sext31_sext
...
---
name: TestVectorNumSignBitsTrunc
@@ -827,19 +827,19 @@ body: |
; CHECK-NEXT: %10:_ KnownBits:00000111 SignBits:5
; CHECK-NEXT: %11:_ KnownBits:00000111 SignBits:5
%0:_(p0) = G_IMPLICIT_DEF
- %1:_(<2 x s32>) = G_LOAD %0 :: (load (<2 x s32>))
- %2:_(<2 x s8>) = G_TRUNC %1
- %3:_(<2 x s8>) = COPY %2
-
- %4:_(s32) = G_CONSTANT i32 -1
- %5:_(<2 x s32>) = G_BUILD_VECTOR %4:_(s32), %4:_(s32)
- %6:_(<2 x s8>) = G_TRUNC %5
- %7:_(<2 x s8>) = COPY %6
-
- %8:_(s32) = G_CONSTANT i32 7
- %9:_(<2 x s32>) = G_BUILD_VECTOR %8:_(s32), %8:_(s32)
- %10:_(<2 x s8>) = G_TRUNC %9
- %11:_(<2 x s8>) = COPY %10
+ %1:_(<2 x i32>) = G_LOAD %0 :: (load (<2 x i32>))
+ %2:_(<2 x i8>) = G_TRUNC %1
+ %3:_(<2 x i8>) = COPY %2
+
+ %4:_(i32) = G_CONSTANT i32 -1
+ %5:_(<2 x i32>) = G_BUILD_VECTOR %4:_(i32), %4:_(i32)
+ %6:_(<2 x i8>) = G_TRUNC %5
+ %7:_(<2 x i8>) = COPY %6
+
+ %8:_(i32) = G_CONSTANT i32 7
+ %9:_(<2 x i32>) = G_BUILD_VECTOR %8:_(i32), %8:_(i32)
+ %10:_(<2 x i8>) = G_TRUNC %9
+ %11:_(<2 x i8>) = COPY %10
...
---
name: TestVectorKnownBitsExt
@@ -857,16 +857,16 @@ body: |
; CHECK-NEXT: %r2:_ KnownBits:0000000000000000000000000000000? SignBits:31
; CHECK-NEXT: %sext:_ KnownBits:0000000000000000000000000000000? SignBits:31
; CHECK-NEXT: %r3:_ KnownBits:0000000000000000000000000000000? SignBits:31
- %c1:_(s16) = G_CONSTANT i16 1
- %c1_splat:_(<2 x s16>) = G_BUILD_VECTOR %c1:_(s16), %c1:_(s16)
- %x:_(<2 x s16>) = G_IMPLICIT_DEF
- %y:_(<2 x s16>) = G_AND %x, %c1_splat
- %anyext:_(<2 x s32>) = G_ANYEXT %y(<2 x s16>)
- %r1:_(<2 x s32>) = COPY %anyext
- %zext:_(<2 x s32>) = G_ZEXT %y(<2 x s16>)
- %r2:_(<2 x s32>) = COPY %zext
- %sext:_(<2 x s32>) = G_SEXT %y(<2 x s16>)
- %r3:_(<2 x s32>) = COPY %sext
+ %c1:_(i16) = G_CONSTANT i16 1
+ %c1_splat:_(<2 x i16>) = G_BUILD_VECTOR %c1:_(i16), %c1:_(i16)
+ %x:_(<2 x i16>) = G_IMPLICIT_DEF
+ %y:_(<2 x i16>) = G_AND %x, %c1_splat
+ %anyext:_(<2 x i32>) = G_ANYEXT %y(<2 x i16>)
+ %r1:_(<2 x i32>) = COPY %anyext
+ %zext:_(<2 x i32>) = G_ZEXT %y(<2 x i16>)
+ %r2:_(<2 x i32>) = COPY %zext
+ %sext:_(<2 x i32>) = G_SEXT %y(<2 x i16>)
+ %r3:_(<2 x i32>) = COPY %sext
...
---
name: TestKnownBitsVectorSextInReg
@@ -892,40 +892,40 @@ body: |
; CHECK-NEXT: %copy_inreg3:_ KnownBits:1111111111111111111111111111111? SignBits:31
; CHECK-NEXT: %inreg4:_ KnownBits:11111111111111111111111111111110 SignBits:31
; CHECK-NEXT: %copy_inreg4:_ KnownBits:11111111111111111111111111111110 SignBits:31
- %one:_(s32) = G_CONSTANT i32 1
- %one_splat:_(<2 x s32>) = G_BUILD_VECTOR %one:_(s32), %one:_(s32)
+ %one:_(i32) = G_CONSTANT i32 1
+ %one_splat:_(<2 x i32>) = G_BUILD_VECTOR %one:_(i32), %one:_(i32)
; 000...0010
- %two:_(s32) = G_CONSTANT i32 2
- %two_splat:_(<2 x s32>) = G_BUILD_VECTOR %two:_(s32), %two:_(s32)
+ %two:_(i32) = G_CONSTANT i32 2
+ %two_splat:_(<2 x i32>) = G_BUILD_VECTOR %two:_(i32), %two:_(i32)
; 000...1010
- %ten:_(s32) = G_CONSTANT i32 10
- %ten_splat:_(<2 x s32>) = G_BUILD_VECTOR %ten:_(s32), %ten:_(s32)
+ %ten:_(i32) = G_CONSTANT i32 10
+ %ten_splat:_(<2 x i32>) = G_BUILD_VECTOR %ten:_(i32), %ten:_(i32)
; ???...????
- %x0:_(<2 x s32>) = COPY $x0
+ %x0:_(<2 x i32>) = COPY $x0
; ???...?1?
- %or:_(<2 x s32>) = G_OR %x0, %two_splat
+ %or:_(<2 x i32>) = G_OR %x0, %two_splat
; All bits are known.
- %inreg1:_(<2 x s32>) = G_SEXT_INREG %one_splat, 1
- %copy_inreg1:_(<2 x s32>) = COPY %inreg1
+ %inreg1:_(<2 x i32>) = G_SEXT_INREG %one_splat, 1
+ %copy_inreg1:_(<2 x i32>) = COPY %inreg1
; All bits unknown
- %inreg2:_(<2 x s32>) = G_SEXT_INREG %or, 1
- %copy_inreg2:_(<2 x s32>) = COPY %inreg2
+ %inreg2:_(<2 x i32>) = G_SEXT_INREG %or, 1
+ %copy_inreg2:_(<2 x i32>) = COPY %inreg2
; Extending from the only (known) set bit
; 111...11?
- %inreg3:_(<2 x s32>) = G_SEXT_INREG %or, 2
- %copy_inreg3:_(<2 x s32>) = COPY %inreg3
+ %inreg3:_(<2 x i32>) = G_SEXT_INREG %or, 2
+ %copy_inreg3:_(<2 x i32>) = COPY %inreg3
; Extending from a known set bit, overwriting all of the high set bits.
; 111...1110
- %inreg4:_(<2 x s32>) = G_SEXT_INREG %ten_splat, 2
- %copy_inreg4:_(<2 x s32>) = COPY %inreg4
+ %inreg4:_(<2 x i32>) = G_SEXT_INREG %ten_splat, 2
+ %copy_inreg4:_(<2 x i32>) = COPY %inreg4
...
---
name: TestKnownBitsVectorAssertSext
@@ -951,40 +951,40 @@ body: |
; CHECK-NEXT: %copy_assert_sext3:_ KnownBits:1111111111111111111111111111111? SignBits:31
; CHECK-NEXT: %assert_sext4:_ KnownBits:11111111111111111111111111111110 SignBits:31
; CHECK-NEXT: %copy_assert_sext4:_ KnownBits:11111111111111111111111111111110 SignBits:31
- %one:_(s32) = G_CONSTANT i32 1
- %one_splat:_(<2 x s32>) = G_BUILD_VECTOR %one, %one
+ %one:_(i32) = G_CONSTANT i32 1
+ %one_splat:_(<2 x i32>) = G_BUILD_VECTOR %one, %one
; 000...0010
- %two:_(s32) = G_CONSTANT i32 2
- %two_splat:_(<2 x s32>) = G_BUILD_VECTOR %two, %two
+ %two:_(i32) = G_CONSTANT i32 2
+ %two_splat:_(<2 x i32>) = G_BUILD_VECTOR %two, %two
; 000...1010
- %ten:_(s32) = G_CONSTANT i32 10
- %ten_splat:_(<2 x s32>) = G_BUILD_VECTOR %ten, %ten
+ %ten:_(i32) = G_CONSTANT i32 10
+ %ten_splat:_(<2 x i32>) = G_BUILD_VECTOR %ten, %ten
; ???...????
- %x0:_(<2 x s32>) = COPY $x0
+ %x0:_(<2 x i32>) = COPY $x0
; ???...?1?
- %or:_(<2 x s32>) = G_OR %x0, %two_splat
+ %or:_(<2 x i32>) = G_OR %x0, %two_splat
; All bits are known.
- %assert_sext1:_(<2 x s32>) = G_ASSERT_SEXT %one_splat, 1
- %copy_assert_sext1:_(<2 x s32>) = COPY %assert_sext1
+ %assert_sext1:_(<2 x i32>) = G_ASSERT_SEXT %one_splat, 1
+ %copy_assert_sext1:_(<2 x i32>) = COPY %assert_sext1
; All bits unknown
- %assert_sext2:_(<2 x s32>) = G_ASSERT_SEXT %or, 1
- %copy_assert_sext2:_(<2 x s32>) = COPY %assert_sext2
+ %assert_sext2:_(<2 x i32>) = G_ASSERT_SEXT %or, 1
+ %copy_assert_sext2:_(<2 x i32>) = COPY %assert_sext2
; Extending from the only (known) set bit
; 111...11?
- %assert_sext3:_(<2 x s32>) = G_ASSERT_SEXT %or, 2
- %copy_assert_sext3:_(<2 x s32>) = COPY %assert_sext3
+ %assert_sext3:_(<2 x i32>) = G_ASSERT_SEXT %or, 2
+ %copy_assert_sext3:_(<2 x i32>) = COPY %assert_sext3
; Extending from a known set bit, overwriting all of the high set bits.
; 111...1110
- %assert_sext4:_(<2 x s32>) = G_ASSERT_SEXT %ten_splat, 2
- %copy_assert_sext4:_(<2 x s32>) = COPY %assert_sext4
+ %assert_sext4:_(<2 x i32>) = G_ASSERT_SEXT %ten_splat, 2
+ %copy_assert_sext4:_(<2 x i32>) = COPY %assert_sext4
...
---
name: TestVectorKnownBitsBSwapBitReverse
@@ -998,12 +998,12 @@ body: |
; CHECK-NEXT: %bitreverse:_ KnownBits:00100010110011000100010010001000 SignBits:2
; CHECK-NEXT: %copy_bswap:_ KnownBits:01000100001100110010001000010001 SignBits:1
; CHECK-NEXT: %copy_bitreverse:_ KnownBits:00100010110011000100010010001000 SignBits:2
- %const:_(s32) = G_CONSTANT i32 287454020
- %const_splat:_(<2 x s32>) = G_BUILD_VECTOR %const:_(s32), %const:_(s32)
- %bswap:_(<2 x s32>) = G_BSWAP %const_splat
- %bitreverse:_(<2 x s32>) = G_BITREVERSE %const_splat
- %copy_bswap:_(<2 x s32>) = COPY %bswap
- %copy_bitreverse:_(<2 x s32>) = COPY %bitreverse
+ %const:_(i32) = G_CONSTANT i32 287454020
+ %const_splat:_(<2 x i32>) = G_BUILD_VECTOR %const:_(i32), %const:_(i32)
+ %bswap:_(<2 x i32>) = G_BSWAP %const_splat
+ %bitreverse:_(<2 x i32>) = G_BITREVERSE %const_splat
+ %copy_bswap:_(<2 x i32>) = COPY %bswap
+ %copy_bitreverse:_(<2 x i32>) = COPY %bitreverse
...
---
name: TestKnownBitsVectorUMAX
@@ -1042,36 +1042,36 @@ body: |
; CHECK-NEXT: %umax1:_ KnownBits:00001?1? SignBits:4
; CHECK-NEXT: %copy_umax1:_ KnownBits:00001?1? SignBits:4
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 10
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 1
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 3
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 12
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %umax0:_(<2 x s8>) = G_UMAX %val0, %val1
- %copy_umax0:_(<2 x s8>) = COPY %umax0
-
- %mask4:_(s8) = G_CONSTANT i8 14
- %mask4_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask4, %mask4
- %mask5:_(s8) = G_CONSTANT i8 2
- %mask5_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask5, %mask5
- %tmp3:_(<2 x s8>) = G_AND %unknown, %mask4_splat
- %val3:_(<2 x s8>) = G_OR %tmp3, %mask5_splat
- %mask6:_(s8) = G_CONSTANT i8 4
- %mask6_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask6, %mask6
- %mask7:_(s8) = G_CONSTANT i8 11
- %mask7_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask7, %mask7
- %tmp4:_(<2 x s8>) = G_AND %unknown, %mask6_splat
- %val4:_(<2 x s8>) = G_OR %tmp4, %mask7_splat
- %umax1:_(<2 x s8>) = G_UMAX %val3, %val4
- %copy_umax1:_(<2 x s8>) = COPY %umax1
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 10
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 1
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 3
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 12
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %umax0:_(<2 x i8>) = G_UMAX %val0, %val1
+ %copy_umax0:_(<2 x i8>) = COPY %umax0
+
+ %mask4:_(i8) = G_CONSTANT i8 14
+ %mask4_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask4, %mask4
+ %mask5:_(i8) = G_CONSTANT i8 2
+ %mask5_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask5, %mask5
+ %tmp3:_(<2 x i8>) = G_AND %unknown, %mask4_splat
+ %val3:_(<2 x i8>) = G_OR %tmp3, %mask5_splat
+ %mask6:_(i8) = G_CONSTANT i8 4
+ %mask6_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask6, %mask6
+ %mask7:_(i8) = G_CONSTANT i8 11
+ %mask7_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask7, %mask7
+ %tmp4:_(<2 x i8>) = G_AND %unknown, %mask6_splat
+ %val4:_(<2 x i8>) = G_OR %tmp4, %mask7_splat
+ %umax1:_(<2 x i8>) = G_UMAX %val3, %val4
+ %copy_umax1:_(<2 x i8>) = COPY %umax1
...
---
name: TestVectorKnownBitsUMax
@@ -1086,12 +1086,12 @@ body: |
; CHECK-NEXT: %const_splat:_ KnownBits:1111111111111111111111111111111111111111111111111111111100000000 SignBits:56
; CHECK-NEXT: %umax:_ KnownBits:1111111111111111111111111111111111111111111111111111111100000000 SignBits:32
; CHECK-NEXT: %copy_umax:_ KnownBits:1111111111111111111111111111111111111111111111111111111100000000 SignBits:32
- %val:_(<2 x s32>) = COPY $x0
- %zext:_(<2 x s64>) = G_ZEXT %val
- %const:_(s64) = G_CONSTANT i64 -256
- %const_splat:_(<2 x s64>) = G_BUILD_VECTOR %const:_(s64), %const:_(s64)
- %umax:_(<2 x s64>) = G_UMAX %zext, %const_splat
- %copy_umax:_(<2 x s64>) = COPY %umax
+ %val:_(<2 x i32>) = COPY $x0
+ %zext:_(<2 x i64>) = G_ZEXT %val
+ %const:_(i64) = G_CONSTANT i64 -256
+ %const_splat:_(<2 x i64>) = G_BUILD_VECTOR %const:_(i64), %const:_(i64)
+ %umax:_(<2 x i64>) = G_UMAX %zext, %const_splat
+ %copy_umax:_(<2 x i64>) = COPY %umax
...
---
name: TestKnownBitsVectorUMIN
@@ -1116,21 +1116,21 @@ body: |
; CHECK-NEXT: %umin:_ KnownBits:0000?0?1 SignBits:4
; CHECK-NEXT: %copy_umin:_ KnownBits:0000?0?1 SignBits:4
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 10
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 1
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 3
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 12
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %umin:_(<2 x s8>) = G_UMIN %val0, %val1
- %copy_umin:_(<2 x s8>) = COPY %umin
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 10
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 1
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 3
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 12
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %umin:_(<2 x i8>) = G_UMIN %val0, %val1
+ %copy_umin:_(<2 x i8>) = COPY %umin
...
---
name: TestKnownBitsVectorSMAX
@@ -1155,21 +1155,21 @@ body: |
; CHECK-NEXT: %smax:_ KnownBits:?1000000 SignBits:1
; CHECK-NEXT: %copy_smax:_ KnownBits:?1000000 SignBits:1
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 128
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 64
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 1
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 128
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %smax:_(<2 x s8>) = G_SMAX %val0, %val1
- %copy_smax:_(<2 x s8>) = COPY %smax
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 128
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 64
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 1
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 128
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %smax:_(<2 x i8>) = G_SMAX %val0, %val1
+ %copy_smax:_(<2 x i8>) = COPY %smax
...
---
name: TestKnownBitsVectorSMIN
@@ -1194,21 +1194,21 @@ body: |
; CHECK-NEXT: %smin:_ KnownBits:1000000? SignBits:1
; CHECK-NEXT: %copy_smin:_ KnownBits:1000000? SignBits:1
%ptr:_(p0) = G_IMPLICIT_DEF
- %unknown:_(<2 x s8>) = G_LOAD %ptr(p0) :: (load (<2 x s8>))
- %mask0:_(s8) = G_CONSTANT i8 128
- %mask0_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask0, %mask0
- %mask1:_(s8) = G_CONSTANT i8 64
- %mask1_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask1, %mask1
- %tmp0:_(<2 x s8>) = G_AND %unknown, %mask0_splat
- %val0:_(<2 x s8>) = G_OR %tmp0, %mask1_splat
- %mask2:_(s8) = G_CONSTANT i8 1
- %mask2_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask2, %mask2
- %mask3:_(s8) = G_CONSTANT i8 128
- %mask3_splat:_(<2 x s8>) = G_BUILD_VECTOR %mask3, %mask3
- %tmp1:_(<2 x s8>) = G_AND %unknown, %mask2_splat
- %val1:_(<2 x s8>) = G_OR %tmp1, %mask3_splat
- %smin:_(<2 x s8>) = G_SMIN %val0, %val1
- %copy_smin:_(<2 x s8>) = COPY %smin
+ %unknown:_(<2 x i8>) = G_LOAD %ptr(p0) :: (load (<2 x i8>))
+ %mask0:_(i8) = G_CONSTANT i8 128
+ %mask0_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask0, %mask0
+ %mask1:_(i8) = G_CONSTANT i8 64
+ %mask1_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask1, %mask1
+ %tmp0:_(<2 x i8>) = G_AND %unknown, %mask0_splat
+ %val0:_(<2 x i8>) = G_OR %tmp0, %mask1_splat
+ %mask2:_(i8) = G_CONSTANT i8 1
+ %mask2_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask2, %mask2
+ %mask3:_(i8) = G_CONSTANT i8 128
+ %mask3_splat:_(<2 x i8>) = G_BUILD_VECTOR %mask3, %mask3
+ %tmp1:_(<2 x i8>) = G_AND %unknown, %mask2_splat
+ %val1:_(<2 x i8>) = G_OR %tmp1, %mask3_splat
+ %smin:_(<2 x i8>) = G_SMIN %val0, %val1
+ %copy_smin:_(<2 x i8>) = COPY %smin
...
---
name: TestVectorInvalidQueries
@@ -1226,15 +1226,15 @@ body: |
; CHECK-NEXT: %thirty3_splat:_ KnownBits:00000000000000000000000000100001 SignBits:26
; CHECK-NEXT: %biggerSized:_ KnownBits:00000000000000000000000000000000 SignBits:32
; CHECK-NEXT: %copy2:_ KnownBits:00000000000000000000000000000000 SignBits:32
- %src:_(<2 x s32>) = COPY $x0
- %thirty2:_(s32) = G_CONSTANT i32 32
- %thirty2_splat:_(<2 x s32>) = G_BUILD_VECTOR %thirty2:_(s32), %thirty2:_(s32)
- %equalSized:_(<2 x s32>) = G_SHL %src, %thirty2_splat
- %copy1:_(<2 x s32>) = COPY %equalSized
- %thirty3:_(s32) = G_CONSTANT i32 33
- %thirty3_splat:_(<2 x s32>) = G_BUILD_VECTOR %thirty3:_(s32), %thirty3:_(s32)
- %biggerSized:_(<2 x s32>) = G_SHL %src, %thirty3_splat
- %copy2:_(<2 x s32>) = COPY %biggerSized
+ %src:_(<2 x i32>) = COPY $x0
+ %thirty2:_(i32) = G_CONSTANT i32 32
+ %thirty2_splat:_(<2 x i32>) = G_BUILD_VECTOR %thirty2:_(i32), %thirty2:_(i32)
+ %equalSized:_(<2 x i32>) = G_SHL %src, %thirty2_splat
+ %copy1:_(<2 x i32>) = COPY %equalSized
+ %thirty3:_(i32) = G_CONSTANT i32 33
+ %thirty3_splat:_(<2 x i32>) = G_BUILD_VECTOR %thirty3:_(i32), %thirty3:_(i32)
+ %biggerSized:_(<2 x i32>) = G_SHL %src, %thirty3_splat
+ %copy2:_(<2 x i32>) = COPY %biggerSized
...
---
name: TestKnownBitsVectorAssertZext
@@ -1254,21 +1254,21 @@ body: |
; CHECK-NEXT: %copy_assert63:_ KnownBits:0??????????????????????????????????????????????????????????????? SignBits:1
; CHECK-NEXT: %assert3:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000??? SignBits:61
; CHECK-NEXT: %copy_assert3:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000??? SignBits:61
- %copy_x0:_(s64) = COPY $x0
- %copy_x1:_(s64) = COPY $x1
- %x0_x1:_(<2 x s64>) = G_BUILD_VECTOR %copy_x0, %copy_x1
+ %copy_x0:_(i64) = COPY $x0
+ %copy_x1:_(i64) = COPY $x1
+ %x0_x1:_(<2 x i64>) = G_BUILD_VECTOR %copy_x0, %copy_x1
- %assert8:_(<2 x s64>) = G_ASSERT_ZEXT %x0_x1, 8
- %copy_assert8:_(<2 x s64>) = COPY %assert8
+ %assert8:_(<2 x i64>) = G_ASSERT_ZEXT %x0_x1, 8
+ %copy_assert8:_(<2 x i64>) = COPY %assert8
- %assert1:_(<2 x s64>) = G_ASSERT_ZEXT %x0_x1, 1
- %copy_assert1:_(<2 x s64>) = COPY %assert1
+ %assert1:_(<2 x i64>) = G_ASSERT_ZEXT %x0_x1, 1
+ %copy_assert1:_(<2 x i64>) = COPY %assert1
- %assert63:_(<2 x s64>) = G_ASSERT_ZEXT %x0_x1, 63
- %copy_assert63:_(<2 x s64>) = COPY %assert63
+ %assert63:_(<2 x i64>) = G_ASSERT_ZEXT %x0_x1, 63
+ %copy_assert63:_(<2 x i64>) = COPY %assert63
- %assert3:_(<2 x s64>) = G_ASSERT_ZEXT %x0_x1, 3
- %copy_assert3:_(<2 x s64>) = COPY %assert3
+ %assert3:_(<2 x i64>) = G_ASSERT_ZEXT %x0_x1, 3
+ %copy_assert3:_(<2 x i64>) = COPY %assert3
...
---
name: TestNumSignBitsUAddoOverflow
@@ -1283,9 +1283,9 @@ body: |
; CHECK-NEXT: %uaddo:_ KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
; CHECK-NEXT: %overflow:_ KnownBits:???????????????????????????????? SignBits:32
; CHECK-NEXT: %result:_ KnownBits:???????????????????????????????? SignBits:32
- %copy_x0:_(s64) = COPY $x0
- %copy_x1:_(s64) = COPY $x1
- %x0_x1:_(<2 x s64>) = G_BUILD_VECTOR %copy_x0, %copy_x1
- %uaddo:_(<2 x s64>), %overflow:_(<2 x s32>) = G_UADDO %x0_x1, %x0_x1
- %result:_(<2 x s32>) = COPY %overflow
+ %copy_x0:_(i64) = COPY $x0
+ %copy_x1:_(i64) = COPY $x1
+ %x0_x1:_(<2 x i64>) = G_BUILD_VECTOR %copy_x0, %copy_x1
+ %uaddo:_(<2 x i64>), %overflow:_(<2 x i32>) = G_UADDO %x0_x1, %x0_x1
+ %result:_(<2 x i32>) = COPY %overflow
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir
index a420ff669b3d3..4fbff6d70f495 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir
@@ -8,8 +8,8 @@ body: |
; CHECK-LABEL: name: @ScalarConst
; CHECK-NEXT: %0:_ KnownBits:0000000000001010 SignBits:12
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000000001010 SignBits:28
- %0:_(s16) = G_CONSTANT i16 10
- %1:_(s32) = G_ZEXT %0(s16)
+ %0:_(i16) = G_CONSTANT i16 10
+ %1:_(i32) = G_ZEXT %0(i16)
...
---
name: ScalarVar
@@ -18,8 +18,8 @@ body: |
; CHECK-LABEL: name: @ScalarVar
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000000???????????????? SignBits:16
- %0:_(s16) = COPY $h0
- %1:_(s32) = G_ZEXT %0(s16)
+ %0:_(i16) = COPY $h0
+ %1:_(i32) = G_ZEXT %0(i16)
...
---
name: VectorCst
@@ -29,9 +29,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:0000000000001010 SignBits:12
; CHECK-NEXT: %1:_ KnownBits:0000000000001010 SignBits:12
; CHECK-NEXT: %2:_ KnownBits:00000000000000000000000000001010 SignBits:28
- %0:_(s16) = G_CONSTANT i16 10
- %1:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
- %2:_(<4 x s32>) = G_ZEXT %1(<4 x s16>)
+ %0:_(i16) = G_CONSTANT i16 10
+ %1:_(<4 x i16>) = G_BUILD_VECTOR %0, %0, %0, %0
+ %2:_(<4 x i32>) = G_ZEXT %1(<4 x i16>)
...
---
name: VectorVar
@@ -40,8 +40,8 @@ body: |
; CHECK-LABEL: name: @VectorVar
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000000???????????????? SignBits:16
- %0:_(<4 x s16>) = COPY $d0
- %1:_(<4 x s32>) = G_ZEXT %0(<4 x s16>)
+ %0:_(<4 x i16>) = COPY $d0
+ %1:_(<4 x i32>) = G_ZEXT %0(<4 x i16>)
...
---
name: ScalableCst
@@ -51,9 +51,9 @@ body: |
; CHECK-NEXT: %0:_ KnownBits:0000000000001010 SignBits:12
; CHECK-NEXT: %1:_ KnownBits:0000000000001010 SignBits:1
; CHECK-NEXT: %2:_ KnownBits:00000000000000000000000000001010 SignBits:28
- %0:_(s16) = G_CONSTANT i16 10
- %1:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR %0
- %2:_(<vscale x 4 x s32>) = G_ZEXT %1(<vscale x 4 x s16>)
+ %0:_(i16) = G_CONSTANT i16 10
+ %1:_(<vscale x 4 x i16>) = G_SPLAT_VECTOR %0
+ %2:_(<vscale x 4 x i32>) = G_ZEXT %1(<vscale x 4 x i16>)
...
---
name: ScalableVar
@@ -62,6 +62,6 @@ body: |
; CHECK-LABEL: name: @ScalableVar
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000000???????????????? SignBits:16
- %0:_(<vscale x 4 x s16>) = COPY $z0
- %1:_(<vscale x 4 x s32>) = G_ZEXT %0(<vscale x 4 x s16>)
+ %0:_(<vscale x 4 x i16>) = COPY $z0
+ %1:_(<vscale x 4 x i32>) = G_ZEXT %0(<vscale x 4 x i16>)
...
More information about the llvm-commits
mailing list