[llvm] 293a55c - [GlobalISel][AArch64] Remove IRs from inline-{memcpy,memmove} tests (NFC) (#208066)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 8 02:54:05 PDT 2026
Author: Ömer Sinan Ağacan
Date: 2026-07-08T10:53:59+01:00
New Revision: 293a55ce46a56accc10965712e77f4ba09f15322
URL: https://github.com/llvm/llvm-project/commit/293a55ce46a56accc10965712e77f4ba09f15322
DIFF: https://github.com/llvm/llvm-project/commit/293a55ce46a56accc10965712e77f4ba09f15322.diff
LOG: [GlobalISel][AArch64] Remove IRs from inline-{memcpy,memmove} tests (NFC) (#208066)
Added:
Modified:
llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
index 48a6088e41f0e..75380895d8064 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
@@ -4,63 +4,15 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-darwin"
- define void @test_memcpy1(ptr nocapture %dst, ptr nocapture readonly %src, i64 %len) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 %len, i1 false)
- ret void
- }
+ define void @test_memcpy1() #0 { entry: unreachable }
+ define void @test_memcpy2_const() #1 { entry: unreachable }
+ define void @test_memcpy2_const_optsize() #2 { entry: unreachable }
+ define void @test_memcpy2_const_minsize() #3 { entry: unreachable }
+ define void @test_memcpy3_const_arrays_unaligned() #4 { entry: unreachable }
+ define void @test_memcpy_addrspace() #5 { entry: unreachable }
- declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1
- declare void @llvm.memcpy.p1.p2.i64(ptr addrspace(1) nocapture writeonly, ptr addrspace(2) nocapture readonly, i64, i1 immarg) #1
-
- define void @test_memcpy2_const(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 72, i1 false)
- ret void
- }
-
- define void @test_memcpy2_const_optsize(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #2 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 72, i1 false)
- ret void
- }
-
- define void @test_memcpy2_const_minsize(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #3 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 72, i1 false)
- ret void
- }
-
- define void @test_memcpy3_const_arrays_unaligned(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 143, i1 false)
- ret void
- }
-
- define void @test_memcpy_addrspace(ptr addrspace(1) nocapture %dst, ptr addrspace(2) nocapture readonly %src) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr addrspace(1) %dst to ptr addrspace(1)
- %1 = bitcast ptr addrspace(2) %src to ptr addrspace(2)
- tail call void @llvm.memcpy.p1.p2.i64(ptr addrspace(1) align 4 %0, ptr addrspace(2) align 4 %1, i64 72, i1 false)
- ret void
- }
-
-
- attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" "use-soft-float"="false" }
- attributes #1 = { argmemonly nounwind }
attributes #2 = { optsize }
attributes #3 = { minsize }
-
...
---
name: test_memcpy1
@@ -81,12 +33,12 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
- ; CHECK-NEXT: G_MEMCPY [[COPY]](p0), [[COPY1]](p0), [[COPY2]](s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ ; CHECK-NEXT: G_MEMCPY [[COPY]](p0), [[COPY1]](p0), [[COPY2]](s64), 1 :: (store (s8), align 4), (load (s8), align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = COPY $x2
- G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -108,33 +60,33 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128) from %ir.1, align 4)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128) into %ir.0, align 4)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128), align 4)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](i64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from %ir.1 + 16, align 4)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from unknown-address + 16, align 4)
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p0) :: (store (s128) into %ir.0 + 16, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p0) :: (store (s128) into unknown-address + 16, align 4)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](i64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from %ir.1 + 32, align 4)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from unknown-address + 32, align 4)
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into %ir.0 + 32, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into unknown-address + 32, align 4)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C2]](i64)
- ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from %ir.1 + 48, align 4)
+ ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from unknown-address + 48, align 4)
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p0) :: (store (s128) into %ir.0 + 48, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p0) :: (store (s128) into unknown-address + 48, align 4)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C3]](i64)
- ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p0) :: (load (s64) from %ir.1 + 64, align 4)
+ ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p0) :: (load (s64) from unknown-address + 64, align 4)
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD4]](i64), [[PTR_ADD7]](p0) :: (store (s64) into %ir.0 + 64, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD4]](i64), [[PTR_ADD7]](p0) :: (store (s64) into unknown-address + 64, align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = G_CONSTANT i64 72
- G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -156,33 +108,33 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128) from %ir.1, align 4)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128) into %ir.0, align 4)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128), align 4)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](i64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from %ir.1 + 16, align 4)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from unknown-address + 16, align 4)
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p0) :: (store (s128) into %ir.0 + 16, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p0) :: (store (s128) into unknown-address + 16, align 4)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](i64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from %ir.1 + 32, align 4)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from unknown-address + 32, align 4)
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into %ir.0 + 32, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into unknown-address + 32, align 4)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C2]](i64)
- ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from %ir.1 + 48, align 4)
+ ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from unknown-address + 48, align 4)
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p0) :: (store (s128) into %ir.0 + 48, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p0) :: (store (s128) into unknown-address + 48, align 4)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C3]](i64)
- ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p0) :: (load (s64) from %ir.1 + 64, align 4)
+ ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p0) :: (load (s64) from unknown-address + 64, align 4)
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD4]](i64), [[PTR_ADD7]](p0) :: (store (s64) into %ir.0 + 64, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD4]](i64), [[PTR_ADD7]](p0) :: (store (s64) into unknown-address + 64, align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = G_CONSTANT i64 72
- G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -205,12 +157,12 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 72
- ; CHECK-NEXT: G_MEMCPY [[COPY]](p0), [[COPY1]](p0), [[C]](s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ ; CHECK-NEXT: G_MEMCPY [[COPY]](p0), [[COPY1]](p0), [[C]](s64), 1 :: (store (s8), align 4), (load (s8), align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = G_CONSTANT i64 72
- G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -232,53 +184,53 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128) from %ir.1, align 4)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128) into %ir.0, align 4)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128), align 4)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](i64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from %ir.1 + 16, align 4)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from unknown-address + 16, align 4)
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p0) :: (store (s128) into %ir.0 + 16, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p0) :: (store (s128) into unknown-address + 16, align 4)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](i64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from %ir.1 + 32, align 4)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from unknown-address + 32, align 4)
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into %ir.0 + 32, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into unknown-address + 32, align 4)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C2]](i64)
- ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from %ir.1 + 48, align 4)
+ ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from unknown-address + 48, align 4)
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p0) :: (store (s128) into %ir.0 + 48, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p0) :: (store (s128) into unknown-address + 48, align 4)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C3]](i64)
- ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD6]](p0) :: (load (s128) from %ir.1 + 64, align 4)
+ ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD6]](p0) :: (load (s128) from unknown-address + 64, align 4)
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD4]](f128), [[PTR_ADD7]](p0) :: (store (s128) into %ir.0 + 64, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD4]](f128), [[PTR_ADD7]](p0) :: (store (s128) into unknown-address + 64, align 4)
; CHECK-NEXT: [[C4:%[0-9]+]]:_(i64) = G_CONSTANT i64 80
; CHECK-NEXT: [[PTR_ADD8:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C4]](i64)
- ; CHECK-NEXT: [[LOAD5:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD8]](p0) :: (load (s128) from %ir.1 + 80, align 4)
+ ; CHECK-NEXT: [[LOAD5:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD8]](p0) :: (load (s128) from unknown-address + 80, align 4)
; CHECK-NEXT: [[PTR_ADD9:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C4]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD5]](f128), [[PTR_ADD9]](p0) :: (store (s128) into %ir.0 + 80, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD5]](f128), [[PTR_ADD9]](p0) :: (store (s128) into unknown-address + 80, align 4)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(i64) = G_CONSTANT i64 96
; CHECK-NEXT: [[PTR_ADD10:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C5]](i64)
- ; CHECK-NEXT: [[LOAD6:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD10]](p0) :: (load (s128) from %ir.1 + 96, align 4)
+ ; CHECK-NEXT: [[LOAD6:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD10]](p0) :: (load (s128) from unknown-address + 96, align 4)
; CHECK-NEXT: [[PTR_ADD11:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C5]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD6]](f128), [[PTR_ADD11]](p0) :: (store (s128) into %ir.0 + 96, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD6]](f128), [[PTR_ADD11]](p0) :: (store (s128) into unknown-address + 96, align 4)
; CHECK-NEXT: [[C6:%[0-9]+]]:_(i64) = G_CONSTANT i64 112
; CHECK-NEXT: [[PTR_ADD12:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C6]](i64)
- ; CHECK-NEXT: [[LOAD7:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD12]](p0) :: (load (s128) from %ir.1 + 112, align 4)
+ ; CHECK-NEXT: [[LOAD7:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD12]](p0) :: (load (s128) from unknown-address + 112, align 4)
; CHECK-NEXT: [[PTR_ADD13:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C6]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD7]](f128), [[PTR_ADD13]](p0) :: (store (s128) into %ir.0 + 112, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD7]](f128), [[PTR_ADD13]](p0) :: (store (s128) into unknown-address + 112, align 4)
; CHECK-NEXT: [[C7:%[0-9]+]]:_(i64) = G_CONSTANT i64 127
; CHECK-NEXT: [[PTR_ADD14:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C7]](i64)
- ; CHECK-NEXT: [[LOAD8:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD14]](p0) :: (load (s128) from %ir.1 + 127, align 1, basealign 4)
+ ; CHECK-NEXT: [[LOAD8:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD14]](p0) :: (load (s128) from unknown-address + 127, align 1)
; CHECK-NEXT: [[PTR_ADD15:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C7]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD8]](f128), [[PTR_ADD15]](p0) :: (store (s128) into %ir.0 + 127, align 1, basealign 4)
+ ; CHECK-NEXT: G_STORE [[LOAD8]](f128), [[PTR_ADD15]](p0) :: (store (s128) into unknown-address + 127, align 1)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = G_CONSTANT i64 143
- G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -300,34 +252,33 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p2) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p2) :: (load (s128) from %ir.1, align 4, addrspace 2)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p1) :: (store (s128) into %ir.0, align 4, addrspace 1)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p2) :: (load (s128), align 4, addrspace 2)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p1) :: (store (s128), align 4, addrspace 1)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p2) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](i64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p2) :: (load (s128) from %ir.1 + 16, align 4, addrspace 2)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p2) :: (load (s128) from unknown-address + 16, align 4, addrspace 2)
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p1) :: (store (s128) into %ir.0 + 16, align 4, addrspace 1)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD1]](p1) :: (store (s128) into unknown-address + 16, align 4, addrspace 1)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p2) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](i64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p2) :: (load (s128) from %ir.1 + 32, align 4, addrspace 2)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p2) :: (load (s128) from unknown-address + 32, align 4, addrspace 2)
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p1) :: (store (s128) into %ir.0 + 32, align 4, addrspace 1)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p1) :: (store (s128) into unknown-address + 32, align 4, addrspace 1)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p2) = nuw inbounds G_PTR_ADD [[COPY1]], [[C2]](i64)
- ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p2) :: (load (s128) from %ir.1 + 48, align 4, addrspace 2)
+ ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p2) :: (load (s128) from unknown-address + 48, align 4, addrspace 2)
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p1) :: (store (s128) into %ir.0 + 48, align 4, addrspace 1)
+ ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD5]](p1) :: (store (s128) into unknown-address + 48, align 4, addrspace 1)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p2) = nuw inbounds G_PTR_ADD [[COPY1]], [[C3]](i64)
- ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p2) :: (load (s64) from %ir.1 + 64, align 4, addrspace 2)
+ ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p2) :: (load (s64) from unknown-address + 64, align 4, addrspace 2)
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](i64)
- ; CHECK-NEXT: G_STORE [[LOAD4]](i64), [[PTR_ADD7]](p1) :: (store (s64) into %ir.0 + 64, align 4, addrspace 1)
+ ; CHECK-NEXT: G_STORE [[LOAD4]](i64), [[PTR_ADD7]](p1) :: (store (s64) into unknown-address + 64, align 4, addrspace 1)
; CHECK-NEXT: RET_ReallyLR
%0:_(p1) = COPY $x0
%1:_(p2) = COPY $x1
%2:_(s64) = G_CONSTANT i64 72
- G_MEMCPY %0(p1), %1(p2), %2(s64), 1 :: (store (s8) into %ir.0, align 4, addrspace 1), (load (s8) from %ir.1, align 4, addrspace 2)
+ G_MEMCPY %0(p1), %1(p2), %2(s64), 1 :: (store (s8), align 4, addrspace 1), (load (s8), align 4, addrspace 2)
RET_ReallyLR
-
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
index 1613fe255f044..bbdaa97aeac5b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
@@ -4,52 +4,11 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64"
- define void @test_memmove1(ptr nocapture %dst, ptr nocapture readonly %src, i64 %len) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 %len, i1 false)
- ret void
- }
-
- declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1 immarg) #1
- declare void @llvm.memmove.p1.p2.i64(ptr addrspace(1) nocapture, ptr addrspace(2) nocapture readonly, i64, i1 immarg) #1
-
- define void @test_memmove2_const(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 48, i1 false)
- ret void
- }
-
- define void @test_memmove3_const_toolarge(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 96, i1 false)
- ret void
- }
-
- define void @test_memmove4_const_unaligned(ptr nocapture %dst, ptr nocapture readonly %src) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr %dst to ptr
- %1 = bitcast ptr %src to ptr
- tail call void @llvm.memmove.p0.p0.i64(ptr align 4 %0, ptr align 4 %1, i64 52, i1 false)
- ret void
- }
-
- define void @test_memmove_addrspace(ptr addrspace(1) nocapture %dst, ptr addrspace(2) nocapture readonly %src) local_unnamed_addr #0 {
- entry:
- %0 = bitcast ptr addrspace(1) %dst to ptr addrspace(1)
- %1 = bitcast ptr addrspace(2) %src to ptr addrspace(2)
- tail call void @llvm.memmove.p1.p2.i64(ptr addrspace(1) align 4 %0, ptr addrspace(2) align 4 %1, i64 8, i1 false)
- ret void
- }
-
- attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" "use-soft-float"="false" }
- attributes #1 = { argmemonly nounwind }
-
+ define void @test_memmove1() { entry: unreachable }
+ define void @test_memmove2_const() { entry: unreachable }
+ define void @test_memmove3_const_toolarge() { entry: unreachable }
+ define void @test_memmove4_const_unaligned() { entry: unreachable }
+ define void @test_memmove_addrspace() { entry: unreachable }
...
---
name: test_memmove1
@@ -65,12 +24,12 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
- ; CHECK-NEXT: G_MEMMOVE [[COPY]](p0), [[COPY1]](p0), [[COPY2]](s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ ; CHECK-NEXT: G_MEMMOVE [[COPY]](p0), [[COPY1]](p0), [[COPY2]](s64), 1 :: (store (s8), align 4), (load (s8), align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = COPY $x2
- G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -87,25 +46,25 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128) from %ir.1, align 4)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 4)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](s64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from %ir.1 + 16, align 4)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from unknown-address + 16, align 4)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](s64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p0) :: (load (s128) from %ir.1 + 32, align 4)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128) into %ir.0, align 4)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p0) :: (load (s128) from unknown-address + 32, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128), align 4)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD2]](p0) :: (store (s128) into %ir.0 + 16, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD2]](p0) :: (store (s128) into unknown-address + 16, align 4)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into %ir.0 + 32, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p0) :: (store (s128) into unknown-address + 32, align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = G_CONSTANT i64 48
- G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -122,43 +81,43 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128) from %ir.1, align 4)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 4)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](s64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from %ir.1 + 16, align 4)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from unknown-address + 16, align 4)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](s64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p0) :: (load (s128) from %ir.1 + 32, align 4)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p0) :: (load (s128) from unknown-address + 32, align 4)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C2]](s64)
- ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from %ir.1 + 48, align 4)
+ ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD2]](p0) :: (load (s128) from unknown-address + 48, align 4)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C3]](s64)
- ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD3]](p0) :: (load (s128) from %ir.1 + 64, align 4)
+ ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD3]](p0) :: (load (s128) from unknown-address + 64, align 4)
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 80
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C4]](s64)
- ; CHECK-NEXT: [[LOAD5:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from %ir.1 + 80, align 4)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128) into %ir.0, align 4)
+ ; CHECK-NEXT: [[LOAD5:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD4]](p0) :: (load (s128) from unknown-address + 80, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128), align 4)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C5]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD5]](p0) :: (store (s128) into %ir.0 + 16, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD5]](p0) :: (store (s128) into unknown-address + 16, align 4)
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C6]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD6]](p0) :: (store (s128) into %ir.0 + 32, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD6]](p0) :: (store (s128) into unknown-address + 32, align 4)
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C7]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD7]](p0) :: (store (s128) into %ir.0 + 48, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD3]](f128), [[PTR_ADD7]](p0) :: (store (s128) into unknown-address + 48, align 4)
; CHECK-NEXT: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD8:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C8]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD4]](f128), [[PTR_ADD8]](p0) :: (store (s128) into %ir.0 + 64, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD4]](f128), [[PTR_ADD8]](p0) :: (store (s128) into unknown-address + 64, align 4)
; CHECK-NEXT: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 80
; CHECK-NEXT: [[PTR_ADD9:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C9]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD5]](f128), [[PTR_ADD9]](p0) :: (store (s128) into %ir.0 + 80, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD5]](f128), [[PTR_ADD9]](p0) :: (store (s128) into unknown-address + 80, align 4)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = G_CONSTANT i64 96
- G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -175,31 +134,31 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128) from %ir.1, align 4)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 4)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](s64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from %ir.1 + 16, align 4)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p0) :: (load (s128) from unknown-address + 16, align 4)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](s64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p0) :: (load (s128) from %ir.1 + 32, align 4)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p0) :: (load (s128) from unknown-address + 32, align 4)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C2]](s64)
- ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %ir.1 + 48)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128) into %ir.0, align 4)
+ ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from unknown-address + 48)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p0) :: (store (s128), align 4)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD3]](p0) :: (store (s128) into %ir.0 + 16, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD3]](p0) :: (store (s128) into unknown-address + 16, align 4)
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C4]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD4]](p0) :: (store (s128) into %ir.0 + 32, align 4)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD4]](p0) :: (store (s128) into unknown-address + 32, align 4)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C5]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD3]](i32), [[PTR_ADD5]](p0) :: (store (s32) into %ir.0 + 48)
+ ; CHECK-NEXT: G_STORE [[LOAD3]](i32), [[PTR_ADD5]](p0) :: (store (s32) into unknown-address + 48)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%1:_(p0) = COPY $x1
%2:_(s64) = G_CONSTANT i64 52
- G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMMOVE %0(p0), %1(p0), %2(s64), 1 :: (store (s8), align 4), (load (s8), align 4)
RET_ReallyLR
...
@@ -216,26 +175,25 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p2) = COPY $x1
- ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p2) :: (load (s128) from %ir.1, align 4, addrspace 2)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(f128) = G_LOAD [[COPY1]](p2) :: (load (s128), align 4, addrspace 2)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p2) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](s64)
- ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p2) :: (load (s128) from %ir.1 + 16, align 4, addrspace 2)
+ ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD]](p2) :: (load (s128) from unknown-address + 16, align 4, addrspace 2)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p2) = nuw inbounds G_PTR_ADD [[COPY1]], [[C1]](s64)
- ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p2) :: (load (s128) from %ir.1 + 32, align 4, addrspace 2)
- ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p1) :: (store (s128) into %ir.0, align 4, addrspace 1)
+ ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(f128) = G_LOAD [[PTR_ADD1]](p2) :: (load (s128) from unknown-address + 32, align 4, addrspace 2)
+ ; CHECK-NEXT: G_STORE [[LOAD]](f128), [[COPY]](p1) :: (store (s128), align 4, addrspace 1)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD2]](p1) :: (store (s128) into %ir.0 + 16, align 4, addrspace 1)
+ ; CHECK-NEXT: G_STORE [[LOAD1]](f128), [[PTR_ADD2]](p1) :: (store (s128) into unknown-address + 16, align 4, addrspace 1)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](s64)
- ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p1) :: (store (s128) into %ir.0 + 32, align 4, addrspace 1)
+ ; CHECK-NEXT: G_STORE [[LOAD2]](f128), [[PTR_ADD3]](p1) :: (store (s128) into unknown-address + 32, align 4, addrspace 1)
; CHECK-NEXT: RET_ReallyLR
%0:_(p1) = COPY $x0
%1:_(p2) = COPY $x1
%2:_(s64) = G_CONSTANT i64 48
- G_MEMMOVE %0(p1), %1(p2), %2(s64), 1 :: (store (s8) into %ir.0, align 4), (load (s8) from %ir.1, align 4)
+ G_MEMMOVE %0(p1), %1(p2), %2(s64), 1 :: (store (s8), align 4, addrspace 1), (load (s8), align 4, addrspace 2)
RET_ReallyLR
-
...
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