[llvm] [AMDGPU] Clear DS aggregate in inverted sched_barrier mask when LDSDMA allowed (PR #207779)

[Arseniy Obolenskiy via llvm-commits]

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@@ -2,112 +2,32 @@
 
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx600 < %s -debug-only=igrouplp 2>&1 | FileCheck --check-prefixes=GCN %s
 
-
-
-
-; Inverted 3056: 101111110000
+; Barriers are processed in reverse order
+; GCN: After Inverting, SchedGroup Mask: 1903
+; GCN: After Inverting, SchedGroup Mask: 3070
+; GCN: After Inverting, SchedGroup Mask: 3455
+; GCN: After Inverting, SchedGroup Mask: 3711
+; GCN: After Inverting, SchedGroup Mask: 1151
+; GCN: After Inverting, SchedGroup Mask: 4015
+; GCN: After Inverting, SchedGroup Mask: 4047
+; GCN: After Inverting, SchedGroup Mask: 1807
+; GCN: After Inverting, SchedGroup Mask: 4086
+; GCN: After Inverting, SchedGroup Mask: 4090
+; GCN: After Inverting, SchedGroup Mask: 4092
 ; GCN: After Inverting, SchedGroup Mask: 3056
-define amdgpu_kernel void @invert1() #0 {
+define amdgpu_kernel void @invert() #0 {
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aobolensk wrote:

I misinterpreted your comment about the test. Returned back to the approach with multiple functions

https://github.com/llvm/llvm-project/pull/207779