[llvm] [AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (PR #207896)

[Arseniy Obolenskiy via llvm-commits]

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@@ -8730,7 +8730,7 @@ SITargetLowering::lowerFMINIMUMNUM_FMAXIMUMNUM(SDValue Op,
     return expandFMINIMUMNUM_FMAXIMUMNUM(Op.getNode(), DAG);
 
   if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
-      VT == MVT::v16bf16)
+      VT == MVT::v32f16)
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aobolensk wrote:

Hm, no, this was unreachable at this point. They are being tested already (so far it is ok): https://github.com/llvm/llvm-project/blob/7cb8692cc1455e983bdd7312d3bcc2f2f5222760/llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll#L5279 and https://github.com/llvm/llvm-project/blob/e0093262487e101d3c13773bf313cd3641544cd8/llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll#L5251

https://github.com/llvm/llvm-project/pull/207896