[llvm] [AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (PR #207896)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,23 @@
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck %s
+
+; v32f16 FMINIMUMNUM/FMAXIMUMNUM is marked Custom, so in non-IEEE mode it
+; must be split by lowerFMINIMUMNUM_FMAXIMUMNUM instead of falling through
+; to selection, which previously failed with "Cannot select".
+
+; CHECK-LABEL: min_v32f16_no_ieee:
+; CHECK-COUNT-16: v_pk_min_f16
+define amdgpu_kernel void @min_v32f16_no_ieee(ptr addrspace(1) %p, <32 x half> %a, <32 x half> %b) #0 {
+  %r = call <32 x half> @llvm.minimumnum.v32f16(<32 x half> %a, <32 x half> %b)
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arsenm wrote:

These should go into existing tests for minimumnum/maximumnum 

https://github.com/llvm/llvm-project/pull/207896