[llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)

[Carl Ritson via llvm-commits]

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@@ -763,13 +795,105 @@ MachineInstrBuilder SIPreEmitPeephole::createUnpackedMI(MachineInstr &I,
   return NewMI;
 }
 
+std::optional<Register> SIPreEmitPeephole::checkCopy(MachineInstr &TwoAddress,
+                                                     MachineInstr &MaybeCopy,
+                                                     Register Src) {
+  if (MaybeCopy.isBundle())
+    return std::nullopt;
+
+  switch (MaybeCopy.getOpcode()) {
+  case AMDGPU::COPY:
+  case AMDGPU::V_MOV_B32_e32:
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perlfu wrote:

I suspect in general there could be other opcodes here?

https://github.com/llvm/llvm-project/pull/207731