[llvm] [X86] Widen zero-extended narrow lshr before isel (PR #207919)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86ISelLowering.cpp --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c86dadbf2..5ab7855ae 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -57665,8 +57665,7 @@ static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
 
       if (WideVT == VT && Wide.getOpcode() == ISD::AssertZext && ShiftAmt &&
           *ShiftAmt < NarrowBits) {
-        APInt HighBits =
-            APInt::getHighBitsSet(WideBits, WideBits - NarrowBits);
+        APInt HighBits = APInt::getHighBitsSet(WideBits, WideBits - NarrowBits);
         if (DAG.MaskedValueIsZero(Wide, HighBits)) {
           SDValue WideShiftAmt =
               DAG.getShiftAmountConstant(*ShiftAmt, VT, SDLoc(N0));

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https://github.com/llvm/llvm-project/pull/207919