[llvm] [AMDGPU] Model RepeatRate in SearchableTables (PR #207862)

[Matt Arsenault via llvm-commits]

================
@@ -59,3 +72,118 @@ body: |
 
     S_ENDPGM 0, implicit %10, implicit %11, implicit %12, implicit %13, implicit %14, implicit %15, implicit %20, implicit %21, implicit %30, implicit %31, implicit %32, implicit %33, implicit %40, implicit %41
 ...
+
+# CHECK-LABEL: repeat_rate_arith_i64:
+# CHECK: VALU(Nc): 32 cycles, 1 instrs
+
+---
+name: repeat_rate_arith_i64
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %0:vreg_64_align2 = IMPLICIT_DEF
+    %1:vreg_64_align2 = V_MIN_I64_e64 %0, %0, implicit $exec
+
+    S_ENDPGM 0
+...
+
+# CHECK-LABEL: repeat_rate_cvt_scale_pk8:
+# CHECK: VALU(Nc): 4 cycles, 1 instrs
+
+---
+name: repeat_rate_cvt_scale_pk8
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %2:vreg_256_align2 = IMPLICIT_DEF
+    %3:vgpr_32 = IMPLICIT_DEF
+    %4:vreg_64_align2 = V_CVT_SCALEF32_PK8_FP8_F32_e64 %2, %3, implicit $mode, implicit $exec
+
+    S_ENDPGM 0
+...
+
+# CHECK-LABEL: repeat_rate_cvt_f64:
+# CHECK: VALU(Nc): 32 cycles, 1 instrs
+
+---
+name: repeat_rate_cvt_f64
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %0:vreg_64_align2 = IMPLICIT_DEF
+    %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 %0, implicit $exec, implicit $mode, implicit-def $m0
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arsenm wrote:

compact register number 

https://github.com/llvm/llvm-project/pull/207862