[llvm] [AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (PR #207896)

[Arseniy Obolenskiy via llvm-commits]

https://github.com/aobolensk created https://github.com/llvm/llvm-project/pull/207896

v32f16 was marked Custom but omitted from the handler split-list, so it fell through to selection and failed with "Cannot select"

The dead v16bf16 branch (never marked Custom) is dropped in the same change

>From e3ff6ba19706de8ef173594033082ec77b1e6085 Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Tue, 7 Jul 2026 06:57:48 +0200
Subject: [PATCH] [AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in
 non-IEEE mode

v32f16 was marked Custom but omitted from the handler split-list, so it fell through to selection and failed with "Cannot select"

The dead v16bf16 branch (never marked Custom) is dropped in the same change
---
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp     |  2 +-
 .../fminimumnum-fmaximumnum-v32f16-no-ieee.ll | 23 +++++++++++++++++++
 2 files changed, 24 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/AMDGPU/fminimumnum-fmaximumnum-v32f16-no-ieee.ll

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index a29070953ee38..7585a3b775be0 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -8730,7 +8730,7 @@ SITargetLowering::lowerFMINIMUMNUM_FMAXIMUMNUM(SDValue Op,
     return expandFMINIMUMNUM_FMAXIMUMNUM(Op.getNode(), DAG);
 
   if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
-      VT == MVT::v16bf16)
+      VT == MVT::v32f16)
     return splitBinaryVectorOp(Op, DAG);
   return Op;
 }
diff --git a/llvm/test/CodeGen/AMDGPU/fminimumnum-fmaximumnum-v32f16-no-ieee.ll b/llvm/test/CodeGen/AMDGPU/fminimumnum-fmaximumnum-v32f16-no-ieee.ll
new file mode 100644
index 0000000000000..1b6731f234bbd
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/fminimumnum-fmaximumnum-v32f16-no-ieee.ll
@@ -0,0 +1,23 @@
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck %s
+
+; v32f16 FMINIMUMNUM/FMAXIMUMNUM is marked Custom, so in non-IEEE mode it
+; must be split by lowerFMINIMUMNUM_FMAXIMUMNUM instead of falling through
+; to selection, which previously failed with "Cannot select".
+
+; CHECK-LABEL: min_v32f16_no_ieee:
+; CHECK-COUNT-16: v_pk_min_f16
+define amdgpu_kernel void @min_v32f16_no_ieee(ptr addrspace(1) %p, <32 x half> %a, <32 x half> %b) #0 {
+  %r = call <32 x half> @llvm.minimumnum.v32f16(<32 x half> %a, <32 x half> %b)
+  store <32 x half> %r, ptr addrspace(1) %p, align 64
+  ret void
+}
+
+; CHECK-LABEL: max_v32f16_no_ieee:
+; CHECK-COUNT-16: v_pk_max_f16
+define amdgpu_kernel void @max_v32f16_no_ieee(ptr addrspace(1) %p, <32 x half> %a, <32 x half> %b) #0 {
+  %r = call <32 x half> @llvm.maximumnum.v32f16(<32 x half> %a, <32 x half> %b)
+  store <32 x half> %r, ptr addrspace(1) %p, align 64
+  ret void
+}
+
+attributes #0 = { "amdgpu-ieee"="false" }