[clang] [llvm] [LFI][X86] Add X86 LFI target and system instruction rewrites (PR #189569)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 6 21:49:26 PDT 2026 

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `mlir-nvidia-gcc7` running on `mlir-nvidia` while building `clang,llvm` at step 6 "build-check-mlir-build-only".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/116/builds/30154

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 6 (build-check-mlir-build-only) failure: build (failure)
...
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/X86TargetMachine.cpp:13:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGenTypes/LowLevelType.h:632:15: warning: ‘llvm::LLT::Info’ is too small to hold all values of ‘enum class llvm::LLT::Kind’
   Kind Info : 4;
               ^
In file included from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineScheduler.h:88:0,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/X86TargetMachine.cpp:35:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/ScheduleDAG.h:322:0: warning: ‘llvm::SUnit::SchedulingPref’ is too small to hold all values of ‘enum llvm::Sched::Preference’
     Sched::Preference SchedulingPref : 4; ///< Scheduling preference.
 
828.775 [2959/16/2381] Building CXX object lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86MCLFIRewriter.cpp.o
FAILED: lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86MCLFIRewriter.cpp.o 
CCACHE_CPP2=yes CCACHE_HASHDIR=yes CCACHE_SLOPPINESS=pch_defines,time_macros /usr/bin/ccache /usr/bin/g++-7 -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_EXTENSIVE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.obj/lib/Target/X86/MCTargetDesc -I/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/MCTargetDesc -I/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86 -I/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.obj/lib/Target/X86 -I/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.obj/include -I/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-uninitialized -Wno-nonnull -Wno-array-bounds -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -Wno-misleading-indentation -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -fvisibility=hidden -UNDEBUG -fno-exceptions -funwind-tables -fno-rtti -std=c++1z -MD -MT lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86MCLFIRewriter.cpp.o -MF lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86MCLFIRewriter.cpp.o.d -o lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86MCLFIRewriter.cpp.o -c /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp: In function ‘bool isGR64OrNone(llvm::MCRegister)’:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp:69:10: error: ‘X86MCRegisterClasses’ was not declared in this scope
          X86MCRegisterClasses[X86::GR64RegClassID].contains(Reg);
          ^~~~~~~~~~~~~~~~~~~~
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp: In member function ‘void llvm::X86::X86MCLFIRewriter::rewriteFSAccess(const llvm::MCInst&, llvm::MCStreamer&, const llvm::MCSubtargetInfo&)’:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp:176:9: error: ‘X86MCRegisterClasses’ was not declared in this scope
         X86MCRegisterClasses[X86::GR64RegClassID].contains(DestReg) &&
         ^~~~~~~~~~~~~~~~~~~~
829.812 [2959/15/2382] Building CXX object lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86MachObjectWriter.cpp.o
829.916 [2959/14/2383] Building CXX object lib/Target/X86/TargetInfo/CMakeFiles/LLVMX86Info.dir/X86TargetInfo.cpp.o
830.164 [2959/13/2384] Building CXX object lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86WinCOFFStreamer.cpp.o
830.384 [2959/12/2385] Building CXX object lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86ELFObjectWriter.cpp.o
830.412 [2959/11/2386] Building CXX object lib/Target/X86/MCTargetDesc/CMakeFiles/LLVMX86Desc.dir/X86WinCOFFObjectWriter.cpp.o
831.755 [2959/10/2387] Building CXX object lib/Target/X86/CMakeFiles/LLVMX86CodeGen.dir/GISel/X86InstructionSelector.cpp.o
In file included from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineMemOperand.h:22:0,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineInstr.h:26,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineBasicBlock.h:22,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineFunction.h:26,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineFunctionPass.h:21,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/SelectionDAGISel.h:18,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/X86.h:18,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp:15:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGenTypes/LowLevelType.h:632:15: warning: ‘llvm::LLT::Info’ is too small to hold all values of ‘enum class llvm::LLT::Kind’
   Kind Info : 4;
               ^
831.959 [2959/9/2388] Building CXX object lib/Target/X86/CMakeFiles/LLVMX86CodeGen.dir/GISel/X86PreLegalizerCombiner.cpp.o
In file included from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineMemOperand.h:22:0,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineInstr.h:26,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineBasicBlock.h:22,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineFunction.h:26,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/MachineFunctionPass.h:21,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGen/SelectionDAGISel.h:18,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/X86.h:18,
                 from /vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp:13:
/vol/worker/mlir-nvidia/mlir-nvidia-gcc7/llvm.src/llvm/include/llvm/CodeGenTypes/LowLevelType.h:632:15: warning: ‘llvm::LLT::Info’ is too small to hold all values of ‘enum class llvm::LLT::Kind’
   Kind Info : 4;
               ^

```

</details>

https://github.com/llvm/llvm-project/pull/189569

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