[llvm] [RISCV] Avoid let statements in RISCVSystemOperands. NFC (PR #207890)
Sam Elliott via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 6 20:59:51 PDT 2026
================
@@ -17,7 +17,7 @@ include "llvm/TableGen/SearchableTable.td"
// CSR (control and status register read/write) instruction options.
//===----------------------------------------------------------------------===//
-class SysReg<string name, bits<12> op> {
+class SysReg<string name, bits<12> op, bit RV32Only = 0> {
----------------
lenary wrote:
```suggestion
class SysReg<string name, bits<12> op, bit RV32Only = false> {
```
And everywhere else to `true`/`false` please.
https://github.com/llvm/llvm-project/pull/207890
More information about the llvm-commits
mailing list