[llvm] [CodeGen] Rename prologpeilog to prolog-epilog (PR #207870)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 6 16:50:27 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Aiden Grossman (boomanaiden154)
<details>
<summary>Changes</summary>
This is primarily to ensure consistenct with the new pass manager where the name of the pass is already prolog-epilog, which is more consistent with our existing naming scheme. This is necessary to be able to run existing llc invocations that explicitly specify prolog-epilog under the NewPM automatically.
Assisted by Gemini.
---
Patch is 230.02 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/207870.diff
279 Files Affected:
- (modified) llvm/docs/Remarks.rst (+2-2)
- (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+1-1)
- (modified) llvm/lib/CodeGen/PrologEpilogInserter.cpp (+1-1)
- (modified) llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/addg_subg.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/cfi_restore.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/chkstk.ll (+2-2)
- (modified) llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/emit-prologue-clobber-verification.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/extra-callee-save.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-fpr128-spill.mir (+2-2)
- (modified) llvm/test/CodeGen/AArch64/framelayout-frame-record.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-offset-immediate-change.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-scavengingslot-stack-hazard.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-split-sve.mir (+3-3)
- (modified) llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-sve-fixed-width-access.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir (+1-1)
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- (modified) llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir (+6-6)
- (modified) llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir (+6-6)
- (modified) llvm/test/CodeGen/RISCV/zcmp-prolog-epilog-crash.mir (+1-1)
- (modified) llvm/test/CodeGen/RISCV/zdinx-large-spill.mir (+1-1)
- (modified) llvm/test/CodeGen/RISCV/zdinx-spill.ll (+4-4)
- (modified) llvm/test/CodeGen/RISCV/zilsd-csr-duplicate.mir (+1-1)
- (modified) llvm/test/CodeGen/RISCV/zilsd-spill.ll (+4-4)
- (modified) llvm/test/CodeGen/SystemZ/frame-26.mir (+2-2)
- (modified) llvm/test/CodeGen/SystemZ/frame-27.mir (+2-2)
- (modified) llvm/test/CodeGen/SystemZ/frame-28.mir (+1-1)
- (modified) llvm/test/CodeGen/SystemZ/scavenge-clobbered-reg.mir (+1-1)
- (modified) llvm/test/CodeGen/SystemZ/tls-11.mir (+1-1)
- (modified) llvm/test/CodeGen/Thumb2/fp16-stacksplot.mir (+1-1)
- (modified) llvm/test/CodeGen/Thumb2/frame-index-addrmode-t2i8s4.mir (+1-1)
- (modified) llvm/test/CodeGen/Thumb2/mve-stacksplot.mir (+1-1)
- (modified) llvm/test/CodeGen/Thumb2/scavenge-lr.mir (+1-1)
- (modified) llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir (+1-1)
- (modified) llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir (+1-1)
- (modified) llvm/test/CodeGen/X86/cfi-xmm.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/epilogue-cfi-fp.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/ipra-inline-asm.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/ipra-reg-usage.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/prologepilog_deref_size.mir (+1-1)
- (modified) llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir (+4-4)
- (modified) llvm/test/CodeGen/X86/push-cfi.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/throws-cfi-fp.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll (+1-1)
- (modified) llvm/test/CodeGen/X86/win_coreclr_chkstk_liveins.mir (+1-1)
- (modified) llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir (+1-1)
- (modified) llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir (+1-1)
- (modified) llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir (+1-1)
- (modified) llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir (+1-1)
- (modified) llvm/test/DebugInfo/X86/prolog-params.mir (+1-1)
- (modified) llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/basic1.macho.remarks.arm64.opt.yaml (+1-1)
- (modified) llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/basic2.macho.remarks.arm64.opt.yaml (+2-2)
- (modified) llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/basic3.macho.remarks.arm64.opt.yaml (+2-2)
- (modified) llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/fat.macho.remarks.x86_64.opt.yaml (+1-1)
- (modified) llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/fat.macho.remarks.x86_64h.opt.yaml (+1-1)
- (modified) llvm/test/tools/llvm-remarkutil/Inputs/two-remarks.bitstream ()
- (modified) llvm/test/tools/llvm-remarkutil/Inputs/two-remarks.yaml (+1-1)
- (modified) llvm/test/tools/llvm-remarkutil/convert.test (+1-1)
- (modified) llvm/test/tools/llvm-remarkutil/size-diff/Inputs/1-func-1-instr-1-stack.yaml (+1-1)
- (modified) llvm/test/tools/llvm-remarkutil/size-diff/Inputs/1-func-2-instr-2-stack.yaml (+1-1)
- (modified) llvm/test/tools/llvm-remarkutil/size-diff/Inputs/2-identical-func-1-instr-1-stack.yaml (+2-2)
- (modified) llvm/test/tools/llvm-remarkutil/size-diff/Inputs/inconvertible-integer.yaml (+1-1)
- (modified) llvm/test/tools/llvm-remarkutil/size-diff/Inputs/no-instruction-count-remarks.yaml (+1-1)
- (modified) llvm/test/tools/llvm-remarkutil/size-diff/Inputs/unexpected-key.yaml (+1-1)
``````````diff
diff --git a/llvm/docs/Remarks.rst b/llvm/docs/Remarks.rst
index 67ed94d9740f4..a22e8c30dfa30 100644
--- a/llvm/docs/Remarks.rst
+++ b/llvm/docs/Remarks.rst
@@ -442,12 +442,12 @@ Output statistics about the optimization remarks in the input set.
Top 10 remarks by pass:
inline 33%
asm-printer 33%
- prologepilog 33%
+ prolog-epilog 33%
Top 10 remarks:
asm-printer/InstructionCount 33%
inline/NoDefinition 33%
- prologepilog/StackSize 33%
+ prolog-epilog/StackSize 33%
opt-diff.py
-----------
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index a37deee1e5ff9..0a6f19fdf24d7 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -247,7 +247,7 @@ DUMMY_MACHINE_FUNCTION_PASS("machine-combiner", MachineCombinerPass)
DUMMY_MACHINE_FUNCTION_PASS("machine-function-splitter", MachineFunctionSplitterPass)
DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
-DUMMY_MACHINE_FUNCTION_PASS("prologepilog-code", PrologEpilogCodeInserterPass)
+DUMMY_MACHINE_FUNCTION_PASS("prolog-epilog-code", PrologEpilogCodeInserterPass)
DUMMY_MACHINE_FUNCTION_PASS("ra-basic", RABasicPass)
DUMMY_MACHINE_FUNCTION_PASS("ra-pbqp", RAPBQPPass)
DUMMY_MACHINE_FUNCTION_PASS("regalloc", RegAllocPass)
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index d9557a3958978..54a77524add94 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -67,7 +67,7 @@
using namespace llvm;
-#define DEBUG_TYPE "prologepilog"
+#define DEBUG_TYPE "prolog-epilog"
using MBBVector = SmallVector<MachineBasicBlock *, 4>;
diff --git a/llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir b/llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
index 434a0e3c82a1d..79478ee843604 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
+++ b/llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64 -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64 -run-pass=prolog-epilog %s -o - | FileCheck %s
# RUN: llc -mtriple=aarch64 -passes='prolog-epilog' %s -o - | FileCheck %s
--- |
define i32 @_Z4funcv() {
diff --git a/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
index 15b8e759dec42..b684896ff700a 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
+++ b/llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=prolog-epilog %s -o - | FileCheck %s
# The tests below test the allocation of 128bit callee-saves
# on the stack, specifically their offsets.
diff --git a/llvm/test/CodeGen/AArch64/addg_subg.mir b/llvm/test/CodeGen/AArch64/addg_subg.mir
index 2a1ea4b723a7e..11a40a2f5b807 100644
--- a/llvm/test/CodeGen/AArch64/addg_subg.mir
+++ b/llvm/test/CodeGen/AArch64/addg_subg.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64 -mattr=+mte -run-pass=prologepilog,aarch64-expand-pseudo %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64 -mattr=+mte -run-pass=prolog-epilog,aarch64-expand-pseudo %s -o - | FileCheck %s
# CHECK: renamable $x8 = IRG $sp, $xzr
diff --git a/llvm/test/CodeGen/AArch64/cfi_restore.mir b/llvm/test/CodeGen/AArch64/cfi_restore.mir
index a68cdeb492804..07a07bb1159ab 100644
--- a/llvm/test/CodeGen/AArch64/cfi_restore.mir
+++ b/llvm/test/CodeGen/AArch64/cfi_restore.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-- -start-after prologepilog -o - %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-- -start-after prolog-epilog -o - %s | FileCheck %s
---
name: fun
# CHECK: .cfi_startproc
diff --git a/llvm/test/CodeGen/AArch64/chkstk.ll b/llvm/test/CodeGen/AArch64/chkstk.ll
index ea4c486aecaef..8a3dea9807a78 100644
--- a/llvm/test/CodeGen/AArch64/chkstk.ll
+++ b/llvm/test/CodeGen/AArch64/chkstk.ll
@@ -2,12 +2,12 @@
; RUN: | FileCheck -check-prefix CHECK-DEFAULT-CODE-MODEL %s
; RUN: llc -mtriple=aarch64-w64-mingw32 -verify-machineinstrs %s -o - \
; RUN: | FileCheck -check-prefix CHECK-DEFAULT-CODE-MODEL %s
-; RUN: llc < %s -mtriple=aarch64-windows -stop-after=prologepilog \
+; RUN: llc < %s -mtriple=aarch64-windows -stop-after=prolog-epilog \
; RUN: | FileCheck -check-prefix CHECK-REGSTATE %s
; RUN: llc -mtriple=aarch64-windows -verify-machineinstrs -code-model=large %s -o - \
; RUN: | FileCheck -check-prefix CHECK-LARGE-CODE-MODEL %s
-; RUN: llc < %s -mtriple=aarch64-windows -stop-after=prologepilog -code-model=large \
+; RUN: llc < %s -mtriple=aarch64-windows -stop-after=prolog-epilog -code-model=large \
; RUN: | FileCheck -check-prefix CHECK-REGSTATE-LARGE %s
define void @check_watermark() {
diff --git a/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir b/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir
index 7fd0cee068fd1..0551857cbc839 100644
--- a/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir
+++ b/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir
@@ -1,4 +1,4 @@
-# RUN: llc -o %t -filetype=obj -start-before=prologepilog %s
+# RUN: llc -o %t -filetype=obj -start-before=prolog-epilog %s
# RUN: llvm-dwarfdump --name="z0" %t | FileCheck %s --check-prefix=CHECKZ0
# RUN: llvm-dwarfdump --name="z1" %t | FileCheck %s --check-prefix=CHECKZ1
# RUN: llvm-dwarfdump --name="p0" %t | FileCheck %s --check-prefix=CHECKP0
diff --git a/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir b/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir
index 41ba5542150ab..029a695d4c983 100644
--- a/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir
+++ b/llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir
@@ -1,4 +1,4 @@
-# RUN: llc -o %t -filetype=obj -start-before=prologepilog %s
+# RUN: llc -o %t -filetype=obj -start-before=prolog-epilog %s
# RUN: llvm-dwarfdump --name="value0" %t | FileCheck %s --check-prefix=CHECK0
# RUN: llvm-dwarfdump --name="value1" %t | FileCheck %s --check-prefix=CHECK1
# RUN: llvm-dwarfdump --name="value2" %t | FileCheck %s --check-prefix=CHECK2
diff --git a/llvm/test/CodeGen/AArch64/emit-prologue-clobber-verification.mir b/llvm/test/CodeGen/AArch64/emit-prologue-clobber-verification.mir
index 4d651138465a1..474c835a12906 100644
--- a/llvm/test/CodeGen/AArch64/emit-prologue-clobber-verification.mir
+++ b/llvm/test/CodeGen/AArch64/emit-prologue-clobber-verification.mir
@@ -1,4 +1,4 @@
-# RUN: not --crash llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o -
+# RUN: not --crash llc -mtriple=aarch64-none-linux-gnu -run-pass=prolog-epilog %s -o -
#
# REQUIRES: asserts
#
diff --git a/llvm/test/CodeGen/AArch64/extra-callee-save.mir b/llvm/test/CodeGen/AArch64/extra-callee-save.mir
index f03dec0593845..61958914bb4b6 100644
--- a/llvm/test/CodeGen/AArch64/extra-callee-save.mir
+++ b/llvm/test/CodeGen/AArch64/extra-callee-save.mir
@@ -1,4 +1,4 @@
-#RUN: llc -mtriple=aarch64-- -run-pass prologepilog %s -o - | FileCheck %s
+#RUN: llc -mtriple=aarch64-- -run-pass prolog-epilog %s -o - | FileCheck %s
# Check that we spill a scratch register, but not also an additional
# emergency spill slot.
---
diff --git a/llvm/test/CodeGen/AArch64/framelayout-fpr128-spill.mir b/llvm/test/CodeGen/AArch64/framelayout-fpr128-spill.mir
index a6236bd917129..b17515722758b 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-fpr128-spill.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-fpr128-spill.mir
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
-# RUN: llc -mtriple=aarch64-windows-msvc -run-pass=prologepilog %s -o - | FileCheck %s --check-prefix=CHECK-WINDOWS
+# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=prolog-epilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-windows-msvc -run-pass=prolog-epilog %s -o - | FileCheck %s --check-prefix=CHECK-WINDOWS
--- |
; Tests Q8 is assigned a 16-byte aligned offset after X10 is assigned an offset.
diff --git a/llvm/test/CodeGen/AArch64/framelayout-frame-record.mir b/llvm/test/CodeGen/AArch64/framelayout-frame-record.mir
index 982a884730c75..4b7fff98f7c08 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-frame-record.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-frame-record.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-linux-gnu -start-before prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-linux-gnu -start-before prolog-epilog %s -o - | FileCheck %s
---
name: TestFrameRecordLocation
diff --git a/llvm/test/CodeGen/AArch64/framelayout-offset-immediate-change.mir b/llvm/test/CodeGen/AArch64/framelayout-offset-immediate-change.mir
index 59b04dd5052fd..c1e6c2d84666b 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-offset-immediate-change.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-offset-immediate-change.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prolog-epilog %s -o - | FileCheck %s
---
name: framelayout_offset_immediate_change
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/AArch64/framelayout-scavengingslot-stack-hazard.mir b/llvm/test/CodeGen/AArch64/framelayout-scavengingslot-stack-hazard.mir
index 5a75f540c60f6..d182dae3b40dd 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-scavengingslot-stack-hazard.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-scavengingslot-stack-hazard.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -aarch64-stack-hazard-size=1024 -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -aarch64-stack-hazard-size=1024 -run-pass=prolog-epilog %s -o - | FileCheck %s
--- |
define void @stack_hazard_streaming_compat() "aarch64_pstate_sm_compatible" { entry: unreachable }
diff --git a/llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir b/llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir
index 17ae97ba58077..5cf794e44a0cd 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prolog-epilog %s -o - | FileCheck %s
---
# This test verifies that the emergency scavenging slot is located near
# the SP when the stack is realigned.
diff --git a/llvm/test/CodeGen/AArch64/framelayout-split-sve.mir b/llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
index bb7ffb47d8dfe..21dd31f8e9ce7 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
@@ -1,6 +1,6 @@
-# RUN: llc -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
-# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -start-before=prologepilog %s -o - | FileCheck %s --check-prefix=ASM
-# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -start-before=prologepilog %s -filetype=obj -o %t
+# RUN: llc -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -mtriple=aarch64-none-linux-gnu -run-pass=prolog-epilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -start-before=prolog-epilog %s -o - | FileCheck %s --check-prefix=ASM
+# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -start-before=prolog-epilog %s -filetype=obj -o %t
# RUN: llvm-objdump --dwarf=frames %t | FileCheck %s --check-prefix=UNWINDINFO
# RUN: rm -rf %t
#
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir b/llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir
index 26b7ca3bf8c07..e794fe83c59a4 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prolog-epilog %s -o - | FileCheck %s
--- |
define void @hasBasepointer() #0 { ret void }
define void @hasBasepointer_sme_streaming() #1 { ret void }
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir b/llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
index a7bde2a9f1c92..ec3bfa94a9b7e 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -start-before=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -start-before=prolog-epilog %s -o - | FileCheck %s
--- |
define aarch64_sve_vector_pcs void @fix_restorepoint_p4() uwtable { entry: unreachable }
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve-fixed-width-access.mir b/llvm/test/CodeGen/AArch64/framelayout-sve-fixed-width-access.mir
index 35fd7ca77d5cf..57eaaa6b5094f 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve-fixed-width-access.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve-fixed-width-access.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -start-before=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -start-before=prolog-epilog %s -o - | FileCheck %s
--- |
define aarch64_sve_vector_pcs void @access_large_stack() nounwind { entry: unreachable }
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir b/llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir
index 680f9c335c250..0a979aa43de92 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog -mattr=+sve %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prolog-epilog -mattr=+sve %s -o - | FileCheck %s
---
# This test verifies that the emergency scavenging slot is located near the SP/BP.
name: LateScavengingSlot
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir b/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir
index 0d84fa14d8672..d4a64c8bc9dc9 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve-win.mir
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --print-fixed-stack --version 5
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 --print-fixed-stack
-# RUN: llc -mattr=+sve -mtriple=aarch64-windows-msvc -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mattr=+sve -mtriple=aarch64-windows-msvc -run-pass=prolog-epilog %s -o - | FileCheck %s
--- |
diff --git a/llvm/test/CodeGen/AArch64/framelayout-sve.mir b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
index 110141609a59e..f0ae337df925d 100644
--- a/llvm/test/CodeGen/AArch64/framelayout-sve.mir
+++ b/llvm/test/CodeGen/AArch64/framelayout-sve.mir
@@ -1,6 +1,6 @@
-# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
-# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -start-before=prologepilog %s -o - | FileCheck %s --check-prefix=ASM
-# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -start-before=prologepilog %s -filetype=obj -o %t
+# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -run-pass=prolog-epilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -start-before=prolog-epilog %s -o - | FileCheck %s --check-prefix=ASM
+# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -start-before=prolog-epilog %s -filetype=obj -o %t
# RUN: llvm-objdump --dwarf=frames %t | FileCheck %s --check-prefix=UNWINDINFO
# RUN: rm -rf %t
#
diff --git a/llvm/test/CodeGen/AArch64/large-stack-offset-calcs.mir b/llvm/test/CodeGen/AArch64/large-stack-offset-calcs.mir
index bae954a7ad3d8..78d8371b2e9dd 100644
--- a/llvm/test/CodeGen/AArch64/large-stack-offset-calcs.mir
+++ b/llvm/test/CodeGen/AArch64/large-stack-offset-calcs.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=arm64-apple-ios -run-pass=prologepilog %s -o - | FileCheck %s
+# RUN: llc -mtriple=arm64-apple-ios -run-pass=prolog-epilog %s -o - | FileCheck %s
---
name: large_stack_offset_calc
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir b/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir
index 1e14e7149817a..fa1da262fbd39 100644
--- a/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir
+++ b/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-before=prologepilog -stop-after=livedebugvalues -mattr=+sve -o - %s | FileCheck %s
+# RUN: llc -start-before=prolog-epilog -stop-after=livedebugvalues -mattr=+sve -o - %s | FileCheck %s
#
# FIXME: re-enable this run line when InstrRef LiveDebugValues is able to
# rely on the target spill/restore inst recognisers.
diff --git a/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll b/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
index 09107860c802b..b3c0c1b7c0beb 100644
--- a/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
+++ b/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -stop-after=prologepilog -simplify-mir -o - %s | FileCheck %s
+; RUN: llc -stop-after=prolog-epilog -simplify-mir -o - %s | FileCheck %s
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64e-apple-ios18.0"
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-bti.mir b/llvm/test/CodeGen/AArch64/machine-outliner-bti.mir
index 177954fb5ade4..6885be5eccda2 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-bti.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-bti.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64--- -run-pass=prologepilog -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64--- -run-pass=prolog-epilog -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
# AArch64 Branch Target Enforcement treats the BR and BLR indirect branch
# instructions differently. The BLR instruction can only target a BTI C
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-calls.mir b/llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
index ea995b002e976..eb858d532c51c 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
@@ -1,6 +1,6 @@
-# RUN: llc -mtriple=aarch64--- -run-pass=prologepilog -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
-# RUN: llc -mtriple=aarch64--- -run-pass=prologepilog -run-pass=machine-outliner -verify-machineinstrs %s -o - -debugify-and-strip-all-safe | FileCheck %s
-# RUN: llc -mtriple=aarch64-pc-windows-msvc -run-pass=prologepilog -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=WINDOWS
+# RUN: llc -mtriple=aarch64--- -run-pass=prolog-epilog -run-pass=machine-ou...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/207870
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