[llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)

[Lukas Sommer via llvm-commits]

sommerlukas wrote:

Most of the test updates to existing tests are caused by the pre-emit peephole pass now requiring the `ReachingDefAnalysis`, which will assert if the input IR doesn't have `tracksRegLiveness`.

The tests for the actual transformation in this PR can be found in `si-pre-emit-peephole-fmac.mir`.

https://github.com/llvm/llvm-project/pull/207731