[llvm] bed625b - [InstCombine] Propagate debuglocs when replacing insert->extract elts (#206026)

via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 6 06:12:04 PDT 2026


Author: Stephen Tozer
Date: 2026-07-06T14:11:59+01:00
New Revision: bed625b42eeeb854c297508e46d822b96693c671

URL: https://github.com/llvm/llvm-project/commit/bed625b42eeeb854c297508e46d822b96693c671
DIFF: https://github.com/llvm/llvm-project/commit/bed625b42eeeb854c297508e46d822b96693c671.diff

LOG: [InstCombine] Propagate debuglocs when replacing insert->extract elts (#206026)

InstCombine may replace an extractelement->insertelement chain, where
the insert vector is wider than the extract vector, with a pair of
shufflevectors - one to widen the extract vector, and one to perform the
extract+insert simultaneously. Currently the second shufflevector
correctly adopts the insertelement's debug location, since it replaces
the chain of instructions that culminates with the insert. The first
shufflevector however takes its debug location from its insert position,
if the extract vector was a PHI or non-instruction, and otherwise
receives no location.

Since the first shufflevector is really adapting the extract vector for
use by one or more other instructions, we can consider it an extension
of the extractvector. If the extract vector is an instruction, its debug
location should be used (even if it is a PHI - this likely defaults to a
CompilerGenerated debug location); otherwise, the extract vector is a
constant, and so the shufflevector represents a constant materialization
- so should receive a CompilerGenerated location.

Added: 
    llvm/test/Transforms/InstCombine/insert-element-shuffle-vector-debugloc.ll

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
index 6a3ee719db899..86f64363d4186 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
@@ -798,6 +798,15 @@ static bool replaceExtractElements(InsertElementInst *InsElt,
   else
     IC.InsertNewInstWith(WideVec, ExtElt->getParent()->getFirstInsertionPt());
 
+  // WideVec is an extension of ExtVecOp to produce a more useful value for
+  // ExtractElement instructions. If ExtVecOp is an instruction, adopt its
+  // DebugLoc; if it is not, then this is materializing a constant value, so set
+  // a CompilerGenerated location.
+  if (ExtVecOpInst)
+    WideVec->setDebugLoc(ExtVecOpInst->getDebugLoc());
+  else
+    WideVec->setDebugLoc(DebugLoc::getCompilerGenerated());
+
   // Replace extracts from the original narrow vector with extracts from the new
   // wide vector.
   for (User *U : ExtVecOp->users()) {

diff  --git a/llvm/test/Transforms/InstCombine/insert-element-shuffle-vector-debugloc.ll b/llvm/test/Transforms/InstCombine/insert-element-shuffle-vector-debugloc.ll
new file mode 100644
index 0000000000000..92b02ac16d018
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/insert-element-shuffle-vector-debugloc.ll
@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -passes=instcombine %s | FileCheck %s
+
+;; InstCombine replaces the extract->insert pair with a pair of shufflevector
+;; instructions, which first widen the %load vector and then replace the
+;; extract->insert with a shufflevector of the widened vector and the insert
+;; vector.
+;; The first shufflevector, since it is materializing the same value as the
+;; %load in a 
diff erent form, should use %load's debug location, and the
+;; second shufflevector, since it replaces a chain of instructions ending with
+;; the insert, should use the insert's debug location.
+
+define <4 x float> @widget(ptr %arg) !dbg !5 {
+; CHECK-LABEL: define <4 x float> @widget(
+; CHECK-SAME: ptr [[ARG:%.*]]) !dbg [[DBG5:![0-9]+]] {
+; CHECK-NEXT:  [[BB:.*:]]
+; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x float>, ptr [[ARG]], align 4, !dbg [[DBG8:![0-9]+]]
+; CHECK-NEXT:    [[TMP0:%.*]] = shufflevector <2 x float> [[LOAD]], <2 x float> poison, <4 x i32> <i32 0, i32 poison, i32 poison, i32 poison>, !dbg [[DBG8]]
+; CHECK-NEXT:    [[INSERTELEMENT:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> <float poison, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>, !dbg [[DBG9:![0-9]+]]
+; CHECK-NEXT:    ret <4 x float> [[INSERTELEMENT]], !dbg [[DBG10:![0-9]+]]
+;
+bb:
+  %load = load <2 x float>, ptr %arg, align 4, !dbg !8
+  %extractelement = extractelement <2 x float> %load, i32 0, !dbg !9
+  %insertelement = insertelement <4 x float> zeroinitializer, float %extractelement, i32 0, !dbg !10
+  ret <4 x float> %insertelement, !dbg !11
+}
+
+!llvm.dbg.cu = !{!0}
+!llvm.debugify = !{!2, !3}
+!llvm.module.flags = !{!4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!1 = !DIFile(filename: "reduced.ll", directory: "/")
+!2 = !{i32 4}
+!3 = !{i32 0}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = distinct !DISubprogram(name: "widget", linkageName: "widget", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!6 = !DISubroutineType(types: !7)
+!7 = !{}
+!8 = !DILocation(line: 1, column: 1, scope: !5)
+!9 = !DILocation(line: 2, column: 1, scope: !5)
+!10 = !DILocation(line: 3, column: 1, scope: !5)
+!11 = !DILocation(line: 4, column: 1, scope: !5)
+;.
+; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: [[META1:![0-9]+]], producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+; CHECK: [[META1]] = !DIFile(filename: "{{.*}}reduced.ll", directory: {{.*}})
+; CHECK: [[DBG5]] = distinct !DISubprogram(name: "widget", linkageName: "widget", scope: null, file: [[META1]], line: 1, type: [[META6:![0-9]+]], scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: [[META0]])
+; CHECK: [[META6]] = !DISubroutineType(types: [[META7:![0-9]+]])
+; CHECK: [[META7]] = !{}
+; CHECK: [[DBG8]] = !DILocation(line: 1, column: 1, scope: [[DBG5]])
+; CHECK: [[DBG9]] = !DILocation(line: 3, column: 1, scope: [[DBG5]])
+; CHECK: [[DBG10]] = !DILocation(line: 4, column: 1, scope: [[DBG5]])
+;.


        


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