[llvm] [AArch64] Expand FORM_TRANSPOSED_REG_TUPLE to copies before regalloc (PR #207205)

[Benjamin Maxwell via llvm-commits]

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@@ -21,9 +20,70 @@ using namespace llvm;
 
 namespace {
 
+/// Expands FORM_TRANSPOSED_REG_TUPLE_{X2|X4}_PSEUDO instructions into a
+/// copy sequences. Note: This expansion occurs immediately before greedy
+/// regalloc and after the pre-RA scheduler.
+///
+/// Example:
+///
+///   %v2:zpr2 = FORM_TRANSPOSED_REG_TUPLE_X2_PSEUDO %v0.zsub0, %v1.zsub0
+///
+/// Expands to:
+///
+///   undef %v2.zsub0:zpr2 = COPY_INTO_TRANSPOSED_TUPLE %v0.zsub0, 2
+///   %v2.zsub1:zpr2 = COPY_INTO_TRANSPOSED_TUPLE %v1.zsub0, 2
+static bool expandFormTransposedRegTuple(MachineBasicBlock &MBB,
+                                         MachineInstr &MI, LiveIntervals &LIS) {
+  const TargetInstrInfo *TII =
+      MBB.getParent()->getSubtarget<AArch64Subtarget>().getInstrInfo();
+  unsigned TupleSize =
+      MI.getOpcode() == AArch64::FORM_TRANSPOSED_REG_TUPLE_X2_PSEUDO ? 2 : 4;
+
+  DebugLoc DL = MI.getDebugLoc();
+  Register TupleReg = MI.getOperand(0).getReg();
+  SmallVector<Register, 5> OrigRegs{TupleReg};
+  MachineBasicBlock::iterator FirstCopyMBBI;
+
+  for (unsigned I = 0; I < TupleSize; ++I) {
+    MachineOperand &SrcOp = MI.getOperand(I + 1);
+    OrigRegs.push_back(SrcOp.getReg());
+
+    // Ensure that an if operand is killed the kill flag is placed on the final
+    // copy for that operand. TODO: Can we remove this? Requesting the live
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MacDue wrote:

When you run this pass alone `AU.addRequired<LiveIntervalsWrapperPass>();`, means it'll compute the live intervals (if they're not already available). Part of that resets the kill flags on instructions, which meant I couldn't write a test that actually hit this code (https://github.com/llvm/llvm-project/pull/207205#discussion_r3527534143). 

I wonder if it's okay to omit this entirely since this pass does not say it preserves LiveVariables?

https://github.com/llvm/llvm-project/pull/207205