[llvm] [LoongArch] Support ISD::GET_ROUNDING (llvm.get.rounding) (PR #207319)

[via llvm-commits]

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@@ -4025,6 +4028,31 @@ SDValue LoongArchTargetLowering::lowerATOMIC_FENCE(SDValue Op,
   return Op;
 }
 
+static SDValue convertRMEncoding(SelectionDAG &DAG, const SDLoc &DL,
+                                 MVT GRLenVT, SDValue RMValue) {
+  // LLVM rounding mode encoding differs from LoongArch FCSR encoding:
+  //   LLVM: 0=RTZ, 1=RNE, 2=RUP, 3=RDN
+  //   FCSR: 0=RNE, 1=RZ,  2=RP,  3=RN
+  //
+  // The conversion swaps encodings 0 and 1 while preserving 2 and 3.
+  // Since the transformation is self-inverse, it applies in both directions:
+  //   LLVM RM <-> LoongArch FCSR RM
+  //
+  // Transformation: RM ^ (~(RM >> 1) & 1)
+  SDValue ShiftRight1 = DAG.getNode(ISD::SRL, DL, GRLenVT, RMValue,
+                                    DAG.getConstant(1, DL, GRLenVT));
+
+  SDValue SwapMask = DAG.getNode(ISD::AND, DL, GRLenVT,
+                                 DAG.getNode(ISD::XOR, DL, GRLenVT, ShiftRight1,
+                                             DAG.getConstant(1, DL, GRLenVT)),
+                                 DAG.getConstant(1, DL, GRLenVT));
+
+  SDValue Converted = DAG.getNode(ISD::XOR, DL, GRLenVT, RMValue, SwapMask);
+
+  return DAG.getNode(ISD::AND, DL, GRLenVT, Converted,
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wangleiat wrote:

The `AND` seems unnecessary. Can we return `Converted` directly instead?

https://github.com/llvm/llvm-project/pull/207319