[llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)

[David Green via llvm-commits]

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davemgreen wrote:

What you have sounds like good stuff. I was expecting it to apply to when there are these else-compare-against-zero leafs, not when there are xor's (where we remove an instruction). And be based on the number of xors removed. Having less instructions is a benefit in itself, especially when we are front-end bound or there are a lot of other instructions in the mix.

Can the condition be tweaked for optsize so we produce the smaller codesize? And maybe be slightly higher if there are multiple removed xors?

https://github.com/llvm/llvm-project/pull/181822