[llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 5 16:56:57 PDT 2026
https://github.com/Shoreshen updated https://github.com/llvm/llvm-project/pull/203150
>From 65a9f62630c7e752113de5c649b5ff2380b2666d Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Thu, 11 Jun 2026 10:00:45 +0800
Subject: [PATCH 1/7] introduce fminmumnum/fmaximumnum into
fminmun/fmaxnum_like pattern
---
llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
index 11d8aef61c858..f34dbfe4a5b46 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
@@ -249,6 +249,8 @@ def umin_oneuse : HasOneUseBinOp<umin>;
def fminnum_oneuse : HasOneUseBinOp<fminnum>;
def fmaxnum_oneuse : HasOneUseBinOp<fmaxnum>;
+def fminimumnum_oneuse : HasOneUseBinOp<fminimumnum>;
+def fmaximumnum_oneuse : HasOneUseBinOp<fmaximumnum>;
def fminimum_oneuse : HasOneUseBinOp<fminimum>;
def fmaximum_oneuse : HasOneUseBinOp<fmaximum>;
@@ -847,13 +849,15 @@ class RcpPat<Instruction RcpInst, ValueType vt> : AMDGPUPat <
// Instructions which select to the same v_min_f*
def fminnum_like : PatFrags<(ops node:$src0, node:$src1),
[(fminnum_ieee node:$src0, node:$src1),
- (fminnum node:$src0, node:$src1)]
+ (fminnum node:$src0, node:$src1),
+ (fminimumnum node:$src0, node:$src1)]
>;
// Instructions which select to the same v_max_f*
def fmaxnum_like : PatFrags<(ops node:$src0, node:$src1),
[(fmaxnum_ieee node:$src0, node:$src1),
- (fmaxnum node:$src0, node:$src1)]
+ (fmaxnum node:$src0, node:$src1),
+ (fmaximumnum node:$src0, node:$src1)]
>;
class NeverNaNPats<dag ops, list<dag> frags> : PatFrags<ops, frags> {
@@ -867,22 +871,26 @@ class NeverNaNPats<dag ops, list<dag> frags> : PatFrags<ops, frags> {
def fminnum_like_nnan : NeverNaNPats<(ops node:$src0, node:$src1),
[(fminnum_ieee node:$src0, node:$src1),
- (fminnum node:$src0, node:$src1)]
+ (fminnum node:$src0, node:$src1),
+ (fminimumnum node:$src0, node:$src1)]
>;
def fmaxnum_like_nnan : NeverNaNPats<(ops node:$src0, node:$src1),
[(fmaxnum_ieee node:$src0, node:$src1),
- (fmaxnum node:$src0, node:$src1)]
+ (fmaxnum node:$src0, node:$src1),
+ (fmaximumnum node:$src0, node:$src1)]
>;
def fminnum_like_oneuse : PatFrags<(ops node:$src0, node:$src1),
[(fminnum_ieee_oneuse node:$src0, node:$src1),
- (fminnum_oneuse node:$src0, node:$src1)]
+ (fminnum_oneuse node:$src0, node:$src1),
+ (fminimumnum_oneuse node:$src0, node:$src1)]
>;
def fmaxnum_like_oneuse : PatFrags<(ops node:$src0, node:$src1),
[(fmaxnum_ieee_oneuse node:$src0, node:$src1),
- (fmaxnum_oneuse node:$src0, node:$src1)]
+ (fmaxnum_oneuse node:$src0, node:$src1),
+ (fmaximumnum_oneuse node:$src0, node:$src1)]
>;
def any_fmad : PatFrags<(ops node:$src0, node:$src1, node:$src2),
>From 27d23d3dd394cdc2ed87a99ac0775971cd184225 Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Mon, 22 Jun 2026 16:52:11 +0800
Subject: [PATCH 2/7] apply change for DAG first
---
llvm/lib/Target/AMDGPU/AMDGPU.td | 7 +-
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 143 +-
.../CodeGen/AMDGPU/atomics-system-scope.ll | 192 +--
.../buffer-fat-pointer-atomicrmw-fmax.ll | 288 ++--
.../buffer-fat-pointer-atomicrmw-fmin.ll | 288 ++--
llvm/test/CodeGen/AMDGPU/clamp.ll | 9 +-
.../CodeGen/AMDGPU/flat-atomicrmw-fmax.ll | 711 ++++----
.../CodeGen/AMDGPU/flat-atomicrmw-fmin.ll | 711 ++++----
.../test/CodeGen/AMDGPU/flat-saddr-atomics.ll | 82 +-
llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll | 60 +-
llvm/test/CodeGen/AMDGPU/fmaxnum.ll | 231 +--
llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll | 60 +-
llvm/test/CodeGen/AMDGPU/fmin3.ll | 74 +-
llvm/test/CodeGen/AMDGPU/fminnum.ll | 214 +--
.../CodeGen/AMDGPU/global-atomicrmw-fmax.ll | 575 +++----
.../CodeGen/AMDGPU/global-atomicrmw-fmin.ll | 575 +++----
.../CodeGen/AMDGPU/local-atomicrmw-fmax.ll | 96 +-
.../CodeGen/AMDGPU/local-atomicrmw-fmin.ll | 96 +-
llvm/test/CodeGen/AMDGPU/maximumnum.ll | 1454 ++++++-----------
llvm/test/CodeGen/AMDGPU/minimumnum.ll | 1424 ++++++----------
llvm/test/CodeGen/AMDGPU/minmax.ll | 60 +-
.../CodeGen/AMDGPU/minmax3-tree-reduction.ll | 34 +-
.../CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll | 52 +-
.../test/CodeGen/AMDGPU/vector-reduce-fmax.ll | 415 ++---
.../test/CodeGen/AMDGPU/vector-reduce-fmin.ll | 411 ++---
25 files changed, 3162 insertions(+), 5100 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index 2abb9c0154947..cf5a1b6f9efc7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -177,12 +177,13 @@ defm FmaMixBF16Insts : AMDGPUSubtargetFeature<"fma-mix-bf16-insts",
>;
defm IEEEMinimumMaximumInsts : AMDGPUSubtargetFeature<"ieee-minimum-maximum-insts",
- "Has v_minimum/maximum_f16/f32/f64, v_minimummaximum/maximumminimum_f16/f32 and"
- "v_pk_minimum/maximum_f16 instructions"
+ "Has v_minimum/maximum_f16/f32/f64, v_minimummaximum/maximumminimum_f16/f32,"
+ "v_pk_minmax/maxmin_num_f16, v_min/max_num_f16/f32/f64 and"
+ "v_pk_min/max_num_f16 instructions"
>;
defm SALUMinimumMaximumInsts : AMDGPUSubtargetFeature<"salu-minimum-maximum-insts",
- "Has s_minimum/maximum_f16/f32 instructions"
+ "Has s_minimum/maximum_f16/f32 and s_max/min_num_f16/f32 instructions"
>;
defm Minimum3Maximum3F32 : AMDGPUSubtargetFeature<"minimum3-maximum3-f32",
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 0267f696a8a93..924e062ee0207 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -539,15 +539,35 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
setOperationAction({ISD::SADDSAT, ISD::SSUBSAT}, {MVT::i16, MVT::i32},
Legal);
- setOperationAction(
- {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- {MVT::f32, MVT::f64}, Custom);
-
- // These are really only legal for ieee_mode functions. We should be avoiding
- // them for functions that don't have ieee_mode enabled, so just say they are
- // legal.
- setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE},
- {MVT::f32, MVT::f64}, Legal);
+ // Do not have s_{min|max}_*f64 instruction f64 will only be lowered to
+ // v_{min|max}_*f64
+ if (Subtarget->hasIEEEMinimumMaximumInsts()) {
+ setOperationAction(
+ {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::f64, Legal);
+ } else {
+ setOperationAction(
+ {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::f64, Custom);
+ // These are really only legal for ieee_mode functions. We should be
+ // avoiding them for functions that don't have ieee_mode enabled, so just
+ // say they are legal.
+ setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, MVT::f64, Legal);
+ }
+
+ // If has v_{min|max}_num_f32 but no s_{min|max}_num_f32, leave it for custom
+ // function
+ if (Subtarget->hasIEEEMinimumMaximumInsts() &&
+ Subtarget->hasSALUMinimumMaximumInsts()) {
+ setOperationAction(
+ {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::f32, Legal);
+ } else {
+ setOperationAction(
+ {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::f32, Custom);
+ setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, MVT::f32, Legal);
+ }
if (Subtarget->haveRoundOpsF64())
setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FROUNDEVEN}, MVT::f64,
@@ -816,20 +836,32 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
MVT::v8f16, MVT::v8bf16, MVT::v16f16, MVT::v16bf16,
MVT::v32f16, MVT::v32bf16},
Custom);
+ if (Subtarget->hasIEEEMinimumMaximumInsts() &&
+ Subtarget->hasSALUMinimumMaximumInsts()) {
+ setOperationAction(
+ {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::f16, Legal);
- setOperationAction(
- {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- MVT::f16, Custom);
- setOperationAction({ISD::FMAXNUM_IEEE, ISD::FMINNUM_IEEE}, MVT::f16, Legal);
+ setOperationAction(
+ {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ {MVT::v4f16, MVT::v8f16, MVT::v16f16, MVT::v32f16}, Custom);
+ } else {
+ setOperationAction(
+ {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::f16, Custom);
- setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, ISD::FMINIMUMNUM,
- ISD::FMAXIMUMNUM},
- {MVT::v4f16, MVT::v8f16, MVT::v16f16, MVT::v32f16},
- Custom);
+ setOperationAction({ISD::FMAXNUM_IEEE, ISD::FMINNUM_IEEE}, MVT::f16,
+ Legal);
- setOperationAction({ISD::FMINNUM, ISD::FMAXNUM},
- {MVT::v4f16, MVT::v8f16, MVT::v16f16, MVT::v32f16},
- Expand);
+ setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE,
+ ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ {MVT::v4f16, MVT::v8f16, MVT::v16f16, MVT::v32f16},
+ Custom);
+
+ setOperationAction({ISD::FMINNUM, ISD::FMAXNUM},
+ {MVT::v4f16, MVT::v8f16, MVT::v16f16, MVT::v32f16},
+ Expand);
+ }
for (MVT Vec16 :
{MVT::v8i16, MVT::v8f16, MVT::v8bf16, MVT::v16i16, MVT::v16f16,
@@ -848,7 +880,6 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
MVT::v2i16, Legal);
setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG, ISD::FABS,
- ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE,
ISD::FCANONICALIZE},
MVT::v2f16, Legal);
@@ -875,23 +906,33 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
ISD::FCANONICALIZE},
VT, Custom);
- setOperationAction(
- {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- {MVT::v2f16, MVT::v4f16}, Custom);
+ if (Subtarget->hasIEEEMinimumMaximumInsts()) {
+ setOperationAction(
+ {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::v2f16, Legal);
+ } else {
+ setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, MVT::v2f16,
+ Legal);
+ setOperationAction(
+ {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ {MVT::v2f16, MVT::v4f16}, Custom);
+ }
setOperationAction(ISD::FEXP, MVT::v2f16, Custom);
setOperationAction(ISD::SELECT, {MVT::v4i16, MVT::v4f16, MVT::v4bf16},
Custom);
if (Subtarget->hasBF16PackedInsts()) {
setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMAXNUM, ISD::FMINNUM,
- ISD::FMA, ISD::FNEG, ISD::FABS, ISD::FCANONICALIZE},
+ ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM, ISD::FMA,
+ ISD::FNEG, ISD::FABS, ISD::FCANONICALIZE},
MVT::v2bf16, Legal);
for (MVT VT : {MVT::v4bf16, MVT::v8bf16, MVT::v16bf16, MVT::v32bf16})
// Split vector operations.
setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FCANONICALIZE,
- ISD::FNEG, ISD::FABS},
+ ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM,
+ ISD::FMAXIMUMNUM, ISD::FNEG, ISD::FABS},
VT, Custom);
}
@@ -903,18 +944,32 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
Custom);
}
if (Subtarget->hasPackedFP64Ops()) {
- setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG,
- ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE,
- ISD::FCANONICALIZE},
- MVT::v2f64, Legal);
setOperationAction(
- {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- MVT::v2f64, Custom);
+ {ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG, ISD::FCANONICALIZE},
+ MVT::v2f64, Legal);
setOperationAction(
- {ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG, ISD::FMINNUM_IEEE,
- ISD::FMAXNUM_IEEE, ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM,
- ISD::FMAXIMUMNUM, ISD::FCANONICALIZE},
+ {ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG, ISD::FCANONICALIZE},
{MVT::v4f64, MVT::v8f64, MVT::v16f64, MVT::v32f64}, Custom);
+
+ if (Subtarget->hasIEEEMinimumMaximumInsts()) {
+ setOperationAction(
+ {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::v2f64, Legal);
+
+ setOperationAction(
+ {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ {MVT::v4f64, MVT::v8f64, MVT::v16f64, MVT::v32f64}, Custom);
+ } else {
+ setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, MVT::v2f64,
+ Legal);
+ setOperationAction(
+ {ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::v2f64, Custom);
+ setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE, ISD::FMINNUM,
+ ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ {MVT::v4f64, MVT::v8f64, MVT::v16f64, MVT::v32f64},
+ Custom);
+ }
}
if (Subtarget->hasPackedU64Ops()) {
@@ -8700,16 +8755,21 @@ SDValue SITargetLowering::lowerFMINNUM_FMAXNUM(SDValue Op,
const MachineFunction &MF = DAG.getMachineFunction();
const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
bool IsIEEEMode = Info->getMode().IEEE;
+ bool IsDivergent = Op.getNode()->isDivergent();
+ bool NeedExpand = (IsDivergent && !Subtarget->hasIEEEMinimumMaximumInsts()) ||
+ (!IsDivergent && !Subtarget->hasSALUMinimumMaximumInsts());
// FIXME: Assert during selection that this is only selected for
// ieee_mode. Currently a combine can produce the ieee version for non-ieee
// mode functions, but this happens to be OK since it's only done in cases
// where there is known no sNaN.
- if (IsIEEEMode)
+ if (IsIEEEMode && NeedExpand)
return expandFMINNUM_FMAXNUM(Op.getNode(), DAG);
if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
- VT == MVT::v16bf16)
+ VT == MVT::v32f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16 ||
+ VT == MVT::v16bf16 || VT == MVT::v32bf16 || VT == MVT::v4f64 ||
+ VT == MVT::v8f64 || VT == MVT::v16f64 || VT == MVT::v32f64)
return splitBinaryVectorOp(Op, DAG);
return Op;
}
@@ -8721,12 +8781,17 @@ SITargetLowering::lowerFMINIMUMNUM_FMAXIMUMNUM(SDValue Op,
const MachineFunction &MF = DAG.getMachineFunction();
const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
bool IsIEEEMode = Info->getMode().IEEE;
+ bool IsDivergent = Op.getNode()->isDivergent();
+ bool NeedExpand = (IsDivergent && !Subtarget->hasIEEEMinimumMaximumInsts()) ||
+ (!IsDivergent && !Subtarget->hasSALUMinimumMaximumInsts());
- if (IsIEEEMode)
+ if (IsIEEEMode && NeedExpand)
return expandFMINIMUMNUM_FMAXIMUMNUM(Op.getNode(), DAG);
if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
- VT == MVT::v16bf16)
+ VT == MVT::v32f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16 ||
+ VT == MVT::v16bf16 || VT == MVT::v32bf16 || VT == MVT::v4f64 ||
+ VT == MVT::v8f64 || VT == MVT::v16f64 || VT == MVT::v32f64)
return splitBinaryVectorOp(Op, DAG);
return Op;
}
diff --git a/llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll b/llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
index e3c375fae7386..57efa8b20b5d8 100644
--- a/llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
+++ b/llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
@@ -845,42 +845,36 @@ define double @flat_system_atomic_fmin_f64(ptr %ptr, double %val) {
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_xor_b32_e32 v0, src_flat_scratch_base_hi, v5
-; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v0
-; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX1250-NEXT: v_xor_b32_e32 v4, src_flat_scratch_base_hi, v1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4
+; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB38_3
-; GFX1250-NEXT: ; %bb.1: ; %Flow
-; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB38_4
-; GFX1250-NEXT: .LBB38_2: ; %atomicrmw.phi
-; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: s_set_pc_i64 s[30:31]
-; GFX1250-NEXT: .LBB38_3: ; %atomicrmw.global
-; GFX1250-NEXT: flat_atomic_min_num_f64 v[0:1], v[4:5], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX1250-NEXT: s_cbranch_execz .LBB38_2
+; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global
+; GFX1250-NEXT: flat_atomic_min_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX1250-NEXT: .LBB38_2: ; %Flow
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execz .LBB38_2
-; GFX1250-NEXT: .LBB38_4: ; %atomicrmw.private
-; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
+; GFX1250-NEXT: s_cbranch_execz .LBB38_4
+; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private
+; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_subrev_nc_u32_e32 v0, src_flat_scratch_base_lo, v4
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v0, vcc_lo
-; GFX1250-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, src_flat_scratch_base_lo, v0
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
+; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX1250-NEXT: s_wait_loadcnt 0x0
-; GFX1250-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX1250-NEXT: v_min_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX1250-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[2:3]
+; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off
+; GFX1250-NEXT: .LBB38_4: ; %atomicrmw.phi
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%result = atomicrmw fmin ptr %ptr, double %val monotonic
ret double %result
@@ -891,42 +885,36 @@ define double @flat_one_as_atomic_fmin_f64(ptr %ptr, double %val) {
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_xor_b32_e32 v0, src_flat_scratch_base_hi, v5
-; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v0
-; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX1250-NEXT: v_xor_b32_e32 v4, src_flat_scratch_base_hi, v1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4
+; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB39_3
-; GFX1250-NEXT: ; %bb.1: ; %Flow
-; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB39_4
-; GFX1250-NEXT: .LBB39_2: ; %atomicrmw.phi
-; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: s_set_pc_i64 s[30:31]
-; GFX1250-NEXT: .LBB39_3: ; %atomicrmw.global
-; GFX1250-NEXT: flat_atomic_min_num_f64 v[0:1], v[4:5], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX1250-NEXT: s_cbranch_execz .LBB39_2
+; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global
+; GFX1250-NEXT: flat_atomic_min_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX1250-NEXT: .LBB39_2: ; %Flow
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execz .LBB39_2
-; GFX1250-NEXT: .LBB39_4: ; %atomicrmw.private
-; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
+; GFX1250-NEXT: s_cbranch_execz .LBB39_4
+; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private
+; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_subrev_nc_u32_e32 v0, src_flat_scratch_base_lo, v4
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v0, vcc_lo
-; GFX1250-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, src_flat_scratch_base_lo, v0
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
+; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX1250-NEXT: s_wait_loadcnt 0x0
-; GFX1250-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX1250-NEXT: v_min_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX1250-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[2:3]
+; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off
+; GFX1250-NEXT: .LBB39_4: ; %atomicrmw.phi
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%result = atomicrmw fmin ptr %ptr, double %val syncscope("one-as") monotonic
ret double %result
@@ -961,42 +949,36 @@ define double @flat_system_atomic_fmax_f64(ptr %ptr, double %val) {
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_xor_b32_e32 v0, src_flat_scratch_base_hi, v5
-; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v0
-; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX1250-NEXT: v_xor_b32_e32 v4, src_flat_scratch_base_hi, v1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4
+; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB42_3
-; GFX1250-NEXT: ; %bb.1: ; %Flow
-; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB42_4
-; GFX1250-NEXT: .LBB42_2: ; %atomicrmw.phi
-; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: s_set_pc_i64 s[30:31]
-; GFX1250-NEXT: .LBB42_3: ; %atomicrmw.global
-; GFX1250-NEXT: flat_atomic_max_num_f64 v[0:1], v[4:5], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX1250-NEXT: s_cbranch_execz .LBB42_2
+; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global
+; GFX1250-NEXT: flat_atomic_max_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX1250-NEXT: .LBB42_2: ; %Flow
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execz .LBB42_2
-; GFX1250-NEXT: .LBB42_4: ; %atomicrmw.private
-; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
+; GFX1250-NEXT: s_cbranch_execz .LBB42_4
+; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private
+; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_subrev_nc_u32_e32 v0, src_flat_scratch_base_lo, v4
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v0, vcc_lo
-; GFX1250-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, src_flat_scratch_base_lo, v0
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
+; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX1250-NEXT: s_wait_loadcnt 0x0
-; GFX1250-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX1250-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[2:3]
+; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off
+; GFX1250-NEXT: .LBB42_4: ; %atomicrmw.phi
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%result = atomicrmw fmax ptr %ptr, double %val monotonic
ret double %result
@@ -1007,42 +989,36 @@ define double @flat_one_as_atomic_fmax_f64(ptr %ptr, double %val) {
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_xor_b32_e32 v0, src_flat_scratch_base_hi, v5
-; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v0
-; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX1250-NEXT: v_xor_b32_e32 v4, src_flat_scratch_base_hi, v1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4
+; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo
-; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB43_3
-; GFX1250-NEXT: ; %bb.1: ; %Flow
-; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execnz .LBB43_4
-; GFX1250-NEXT: .LBB43_2: ; %atomicrmw.phi
-; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: s_set_pc_i64 s[30:31]
-; GFX1250-NEXT: .LBB43_3: ; %atomicrmw.global
-; GFX1250-NEXT: flat_atomic_max_num_f64 v[0:1], v[4:5], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
-; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX1250-NEXT: s_cbranch_execz .LBB43_2
+; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global
+; GFX1250-NEXT: flat_atomic_max_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX1250-NEXT: .LBB43_2: ; %Flow
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0
-; GFX1250-NEXT: s_cbranch_execz .LBB43_2
-; GFX1250-NEXT: .LBB43_4: ; %atomicrmw.private
-; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
+; GFX1250-NEXT: s_cbranch_execz .LBB43_4
+; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private
+; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_subrev_nc_u32_e32 v0, src_flat_scratch_base_lo, v4
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v0, vcc_lo
-; GFX1250-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, src_flat_scratch_base_lo, v0
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
+; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX1250-NEXT: s_wait_loadcnt 0x0
-; GFX1250-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX1250-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[2:3]
+; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off
+; GFX1250-NEXT: .LBB43_4: ; %atomicrmw.phi
; GFX1250-NEXT: s_wait_xcnt 0x0
; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0
+; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%result = atomicrmw fmax ptr %ptr, double %val syncscope("one-as") monotonic
ret double %result
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
index 3d85bf7019426..bb4d388f169a0 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
@@ -1174,27 +1174,24 @@ define double @buffer_fat_ptr_agent_atomic_fmax_ret_f64__offset__amdgpu_no_fine_
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[0:1]
-; GFX12-NEXT: v_mov_b32_e32 v8, s16
+; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
+; GFX12-NEXT: v_mov_b32_e32 v10, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[8:9], v0, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB5_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[8:9], v[4:5]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[0:1], v[6:7]
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v2, v4
-; GFX12-NEXT: v_mov_b32_e32 v3, v5
-; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v8, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
+; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
+; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v10, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
+; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -1359,24 +1356,22 @@ define void @buffer_fat_ptr_agent_atomic_fmax_noret_f64__offset__amdgpu_no_fine_
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
; GFX12-NEXT: v_mov_b32_e32 v6, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[2:3], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[0:1]
+; GFX12-NEXT: v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v9, v4
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v10, v3 :: v_dual_mov_b32 v9, v2
-; GFX12-NEXT: v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v7, v0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX12-NEXT: v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[7:10], v6, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
-; GFX12-NEXT: v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -1560,17 +1555,15 @@ define double @buffer_fat_ptr_agent_atomic_fmax_ret_f64__offset__waterfall__amdg
; GFX12-NEXT: s_cbranch_execnz .LBB7_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-NEXT: v_max_num_f64_e32 v[5:6], v[5:6], v[5:6]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB7_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB7_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[13:14], v[13:14]
+; GFX12-NEXT: v_max_num_f64_e32 v[11:12], v[13:14], v[5:6]
; GFX12-NEXT: s_mov_b32 s2, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[11:12], v[0:1], v[5:6]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v1, v12
; GFX12-NEXT: v_dual_mov_b32 v2, v13 :: v_dual_mov_b32 v3, v14
; GFX12-NEXT: .LBB7_4: ; Parent Loop BB7_3 Depth=1
@@ -1958,27 +1951,24 @@ define double @buffer_fat_ptr_agent_atomic_fmax_ret_f64__offset__amdgpu_no_remot
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[0:1]
-; GFX12-NEXT: v_mov_b32_e32 v8, s16
+; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
+; GFX12-NEXT: v_mov_b32_e32 v10, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[8:9], v0, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[8:9], v[4:5]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[0:1], v[6:7]
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v2, v4
-; GFX12-NEXT: v_mov_b32_e32 v3, v5
-; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v8, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
+; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
+; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v10, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
+; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -2224,27 +2214,24 @@ define double @buffer_fat_ptr_agent_atomic_fmax_ret_f64__offset__amdgpu_no_fine_
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[0:1]
-; GFX12-NEXT: v_mov_b32_e32 v8, s16
+; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
+; GFX12-NEXT: v_mov_b32_e32 v10, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[8:9], v0, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[8:9], v[4:5]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[0:1], v[6:7]
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v2, v4
-; GFX12-NEXT: v_mov_b32_e32 v3, v5
-; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v8, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
+; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
+; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v10, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
+; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -2413,7 +2400,6 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2433,13 +2419,11 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v1, v2, s6, v1
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[3:4], v5, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
@@ -2463,46 +2447,44 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v0, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, s4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v5, s4
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s4, s4, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s5, 0xffff, s4
-; GFX12-FAKE16-NEXT: buffer_load_b32 v1, v4, s[0:3], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v2, v5, s[0:3], null offen
; GFX12-FAKE16-NEXT: s_not_b32 s6, s5
; GFX12-FAKE16-NEXT: s_mov_b32 s5, 0
; GFX12-FAKE16-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v1
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v1, s4, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s4, v0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v0
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v0, v1, s6, v0
-; GFX12-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], v4, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: v_and_or_b32 v1, v2, s6, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[3:4], v5, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v2
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, v3
; GFX12-FAKE16-NEXT: s_or_b32 s5, vcc_lo, s5
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s5
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB10_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s5
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v2
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v3
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__amdgpu_no_fine_grained_memory:
@@ -2868,7 +2850,6 @@ define void @buffer_fat_ptr_agent_atomic_fmax_noret_f16__offset__amdgpu_no_fine_
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2888,13 +2869,11 @@ define void @buffer_fat_ptr_agent_atomic_fmax_noret_f16__offset__amdgpu_no_fine_
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v1, v2, s6, v1
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v1
; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v3, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
@@ -2917,39 +2896,37 @@ define void @buffer_fat_ptr_agent_atomic_fmax_noret_f16__offset__amdgpu_no_fine_
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v0, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, s4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, s4
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s4, s4, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s5, 0xffff, s4
-; GFX12-FAKE16-NEXT: buffer_load_b32 v1, v2, s[0:3], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v2, v3, s[0:3], null offen
; GFX12-FAKE16-NEXT: s_not_b32 s6, s5
; GFX12-FAKE16-NEXT: s_mov_b32 s5, 0
; GFX12-FAKE16-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v1
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v1, s4, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s4, v0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v0
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v0, v1, s6, v0
-; GFX12-FAKE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v2, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: v_and_or_b32 v1, v2, s6, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v1
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v3, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v1
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v2
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, v4
; GFX12-FAKE16-NEXT: s_or_b32 s5, vcc_lo, s5
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s5
@@ -3311,15 +3288,15 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-TRUE16-NEXT: s_mov_b32 s1, exec_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 3, v4
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, -4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 3, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v4, 3, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, -4, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v9, 0xffff
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v11, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v7, v4, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v11, v7
; GFX12-TRUE16-NEXT: .LBB12_1: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
@@ -3333,29 +3310,26 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_load_b32 v6, v10, s[4:7], null offen
+; GFX12-TRUE16-NEXT: buffer_load_b32 v7, v10, s[4:7], null offen
; GFX12-TRUE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-TRUE16-NEXT: ; %bb.2:
; GFX12-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v5.l, v5.l
; GFX12-TRUE16-NEXT: s_mov_b32 s1, 0
; GFX12-TRUE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-TRUE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v9, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.h, 0
; GFX12-TRUE16-NEXT: s_mov_b32 s2, exec_lo
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v4.h, v4.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v6.l, v6.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v9, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v11, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-TRUE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-TRUE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
@@ -3370,14 +3344,14 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[7:8], v10, s[4:7], null offen th:TH_ATOMIC_RETURN
+; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[4:7], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-TRUE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
; GFX12-TRUE16-NEXT: s_mov_b32 exec_lo, s2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v7, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v7
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v8, v7
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v7, v8
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3385,7 +3359,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-TRUE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v9, v7
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -3395,15 +3369,15 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s1, exec_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v6, 3, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v8, -4, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 3, v6
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v6
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v10, -4, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v6, v7, 0xffff
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v9, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v7, v4, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v11, v7
; GFX12-FAKE16-NEXT: .LBB12_1: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s5, v1
@@ -3417,30 +3391,27 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_load_b32 v6, v8, s[4:7], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v7, v10, s[4:7], null offen
; GFX12-FAKE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-FAKE16-NEXT: ; %bb.2:
; GFX12-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v10, v5, v5
; GFX12-FAKE16-NEXT: s_mov_b32 s1, 0
; GFX12-FAKE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-FAKE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v7, v6
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
; GFX12-FAKE16-NEXT: s_mov_b32 s2, exec_lo
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v10
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v6, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v7, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v9, v4
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v5
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v5, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
+; GFX12-FAKE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-FAKE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-FAKE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
@@ -3455,14 +3426,14 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v8, s[4:7], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[4:7], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-FAKE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
; GFX12-FAKE16-NEXT: s_mov_b32 exec_lo, s2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v8, v7
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v7, v8
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3470,7 +3441,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-FAKE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v7, v4
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -6047,11 +6018,9 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__amdgpu_no
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v0, s16
-; GFX12-NEXT: v_mov_b32_e32 v3, s16
+; GFX12-NEXT: v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v3, s16
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v1, v1
; GFX12-NEXT: buffer_load_b32 v0, v0, s[0:3], null offen offset:1024
; GFX12-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -6059,9 +6028,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__amdgpu_no
; GFX12-NEXT: v_mov_b32_e32 v5, v0
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v5, v5
-; GFX12-NEXT: v_pk_max_num_f16 v4, v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v2
; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[0:1], v3, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -6353,23 +6320,22 @@ define void @buffer_fat_ptr_agent_atomic_fmax_noret_v2f16__offset__amdgpu_no_fin
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v1, s16
-; GFX12-NEXT: v_pk_max_num_f16 v2, v0, v0
; GFX12-NEXT: v_mov_b32_e32 v3, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b32 v1, v1, s[0:3], null offen offset:1024
+; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], null offen offset:1024
; GFX12-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v1, v1
+; GFX12-NEXT: v_pk_max_num_f16 v1, v2, v0
+; GFX12-NEXT: v_mov_b32_e32 v5, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX12-NEXT: v_mov_b32_e32 v4, v1
; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v3, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v1
-; GFX12-NEXT: v_mov_b32_e32 v1, v4
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v2
+; GFX12-NEXT: v_mov_b32_e32 v2, v4
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -6656,24 +6622,22 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_load_b32 v7, v4, s[4:7], null offen offset:1024
+; GFX12-NEXT: buffer_load_b32 v8, v4, s[4:7], null offen offset:1024
; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB18_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-NEXT: v_pk_max_num_f16 v8, v5, v5
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB18_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB18_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v5, v7, v7
+; GFX12-NEXT: v_pk_max_num_f16 v7, v8, v5
; GFX12-NEXT: s_mov_b32 s2, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v6, v5, v8
-; GFX12-NEXT: v_mov_b32_e32 v5, v6
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_mov_b32_e32 v6, v7
+; GFX12-NEXT: v_mov_b32_e32 v7, v8
; GFX12-NEXT: .LBB18_4: ; Parent Loop BB18_3 Depth=1
; GFX12-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-NEXT: v_readfirstlane_b32 s4, v0
@@ -6688,14 +6652,14 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[5:6], v4, s[4:7], null offen offset:1024 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[6:7], v4, s[4:7], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB18_4
; GFX12-NEXT: ; %bb.5: ; in Loop: Header=BB18_3 Depth=1
; GFX12-NEXT: s_mov_b32 exec_lo, s2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7
-; GFX12-NEXT: v_mov_b32_e32 v7, v5
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v6, v8
+; GFX12-NEXT: v_mov_b32_e32 v8, v6
; GFX12-NEXT: global_inv scope:SCOPE_DEV
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6703,7 +6667,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_cbranch_execnz .LBB18_3
; GFX12-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-NEXT: v_mov_b32_e32 v0, v5
+; GFX12-NEXT: v_mov_b32_e32 v0, v6
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall__amdgpu_no_fine_grained_memory:
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
index 3f15d35320573..e425479b80081 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
@@ -1174,27 +1174,24 @@ define double @buffer_fat_ptr_agent_atomic_fmin_ret_f64__offset__amdgpu_no_fine_
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[0:1]
-; GFX12-NEXT: v_mov_b32_e32 v8, s16
+; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
+; GFX12-NEXT: v_mov_b32_e32 v10, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[8:9], v0, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB5_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[8:9], v[4:5]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[0:1], v[6:7]
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v2, v4
-; GFX12-NEXT: v_mov_b32_e32 v3, v5
-; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v8, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
+; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
+; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v10, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
+; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -1359,24 +1356,22 @@ define void @buffer_fat_ptr_agent_atomic_fmin_noret_f64__offset__amdgpu_no_fine_
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
; GFX12-NEXT: v_mov_b32_e32 v6, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[2:3], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[4:5], v[0:1]
+; GFX12-NEXT: v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v9, v4
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v10, v3 :: v_dual_mov_b32 v9, v2
-; GFX12-NEXT: v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v7, v0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX12-NEXT: v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[7:10], v6, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
-; GFX12-NEXT: v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v4, v7 :: v_dual_mov_b32 v5, v8
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -1560,17 +1555,15 @@ define double @buffer_fat_ptr_agent_atomic_fmin_ret_f64__offset__waterfall__amdg
; GFX12-NEXT: s_cbranch_execnz .LBB7_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-NEXT: v_max_num_f64_e32 v[5:6], v[5:6], v[5:6]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB7_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB7_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[13:14], v[13:14]
+; GFX12-NEXT: v_min_num_f64_e32 v[11:12], v[13:14], v[5:6]
; GFX12-NEXT: s_mov_b32 s2, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[11:12], v[0:1], v[5:6]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v1, v12
; GFX12-NEXT: v_dual_mov_b32 v2, v13 :: v_dual_mov_b32 v3, v14
; GFX12-NEXT: .LBB7_4: ; Parent Loop BB7_3 Depth=1
@@ -1958,27 +1951,24 @@ define double @buffer_fat_ptr_agent_atomic_fmin_ret_f64__offset__amdgpu_no_remot
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[0:1]
-; GFX12-NEXT: v_mov_b32_e32 v8, s16
+; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
+; GFX12-NEXT: v_mov_b32_e32 v10, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[8:9], v0, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[8:9], v[4:5]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[0:1], v[6:7]
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v2, v4
-; GFX12-NEXT: v_mov_b32_e32 v3, v5
-; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v8, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
+; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
+; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v10, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
+; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -2224,27 +2214,24 @@ define double @buffer_fat_ptr_agent_atomic_fmin_ret_f64__offset__amdgpu_no_fine_
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, s16
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[0:1]
-; GFX12-NEXT: v_mov_b32_e32 v8, s16
+; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
+; GFX12-NEXT: v_mov_b32_e32 v10, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b64 v[4:5], v2, s[0:3], null offen offset:2048
+; GFX12-NEXT: buffer_load_b64 v[8:9], v0, s[0:3], null offen offset:2048
; GFX12-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[8:9], v[4:5]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[0:1], v[6:7]
-; GFX12-NEXT: v_mov_b32_e32 v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v2, v4
-; GFX12-NEXT: v_mov_b32_e32 v3, v5
-; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v8, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
+; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
+; GFX12-NEXT: buffer_atomic_cmpswap_b64 v[0:3], v10, s[0:3], null offen offset:2048 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
+; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -2413,7 +2400,6 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2433,13 +2419,11 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v1, v2, s6, v1
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[3:4], v5, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
@@ -2463,46 +2447,44 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v0, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, s4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v5, s4
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s4, s4, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s5, 0xffff, s4
-; GFX12-FAKE16-NEXT: buffer_load_b32 v1, v4, s[0:3], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v2, v5, s[0:3], null offen
; GFX12-FAKE16-NEXT: s_not_b32 s6, s5
; GFX12-FAKE16-NEXT: s_mov_b32 s5, 0
; GFX12-FAKE16-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v1
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v1, s4, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s4, v0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v0
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v0, v1, s6, v0
-; GFX12-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[2:3], v4, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: v_and_or_b32 v1, v2, s6, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[3:4], v5, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v1
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v2
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, v3
; GFX12-FAKE16-NEXT: s_or_b32 s5, vcc_lo, s5
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s5
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB10_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s5
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v2
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v3
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__amdgpu_no_fine_grained_memory:
@@ -2868,7 +2850,6 @@ define void @buffer_fat_ptr_agent_atomic_fmin_noret_f16__offset__amdgpu_no_fine_
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2888,13 +2869,11 @@ define void @buffer_fat_ptr_agent_atomic_fmin_noret_f16__offset__amdgpu_no_fine_
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v1, v2, s6, v1
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v1
; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v3, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
@@ -2917,39 +2896,37 @@ define void @buffer_fat_ptr_agent_atomic_fmin_noret_f16__offset__amdgpu_no_fine_
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_addk_co_i32 s16, 0x200
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v0, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, -4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, s4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, s4
; GFX12-FAKE16-NEXT: s_and_b32 s4, s16, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s4, s4, 3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_lshl_b32 s5, 0xffff, s4
-; GFX12-FAKE16-NEXT: buffer_load_b32 v1, v2, s[0:3], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v2, v3, s[0:3], null offen
; GFX12-FAKE16-NEXT: s_not_b32 s6, s5
; GFX12-FAKE16-NEXT: s_mov_b32 s5, 0
; GFX12-FAKE16-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, s4, v1
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v1, s4, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, s4, v0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v0
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, s4, v1
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v0, v1, s6, v0
-; GFX12-FAKE16-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v2, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: v_and_or_b32 v1, v2, s6, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v4, v1
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v3, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v1
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v2
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, v4
; GFX12-FAKE16-NEXT: s_or_b32 s5, vcc_lo, s5
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s5
@@ -3311,15 +3288,15 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-TRUE16-NEXT: s_mov_b32 s1, exec_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v6, 3, v4
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, -4, v4
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 3, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v4, 3, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v10, -4, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v9, 0xffff
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v11, v6
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v7, v4, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v11, v7
; GFX12-TRUE16-NEXT: .LBB12_1: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
@@ -3333,29 +3310,26 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_load_b32 v6, v10, s[4:7], null offen
+; GFX12-TRUE16-NEXT: buffer_load_b32 v7, v10, s[4:7], null offen
; GFX12-TRUE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-TRUE16-NEXT: ; %bb.2:
; GFX12-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v5.l, v5.l
; GFX12-TRUE16-NEXT: s_mov_b32 s1, 0
; GFX12-TRUE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-TRUE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v9, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.h, 0
; GFX12-TRUE16-NEXT: s_mov_b32 s2, exec_lo
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v4.h, v4.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v6.l, v6.l, v5.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v9, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v11, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-TRUE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-TRUE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s4, v0
@@ -3370,14 +3344,14 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[7:8], v10, s[4:7], null offen th:TH_ATOMIC_RETURN
+; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[4:7], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-TRUE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
; GFX12-TRUE16-NEXT: s_mov_b32 exec_lo, s2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v7, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v7
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v8, v7
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v7, v8
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3385,7 +3359,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-TRUE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v9, v7
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -3395,15 +3369,15 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s1, exec_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v6, 3, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v8, -4, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 3, v6
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v6
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v10, -4, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v6, v7, 0xffff
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v9, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v7, v4, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v11, v7
; GFX12-FAKE16-NEXT: .LBB12_1: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s5, v1
@@ -3417,30 +3391,27 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_load_b32 v6, v8, s[4:7], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v7, v10, s[4:7], null offen
; GFX12-FAKE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-FAKE16-NEXT: ; %bb.2:
; GFX12-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v10, v5, v5
; GFX12-FAKE16-NEXT: s_mov_b32 s1, 0
; GFX12-FAKE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-FAKE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v7, v6
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
; GFX12-FAKE16-NEXT: s_mov_b32 s2, exec_lo
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v4, v4, v10
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v6, v6, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v7, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v9, v4
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v5
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v5, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
+; GFX12-FAKE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-FAKE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-FAKE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s4, v0
@@ -3455,14 +3426,14 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v8, s[4:7], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[4:7], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-FAKE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
; GFX12-FAKE16-NEXT: s_mov_b32 exec_lo, s2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v8, v7
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v7, v8
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3470,7 +3441,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-FAKE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v7, v4
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -6047,11 +6018,9 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__amdgpu_no
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v0, s16
-; GFX12-NEXT: v_mov_b32_e32 v3, s16
+; GFX12-NEXT: v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v3, s16
+; GFX12-NEXT: v_mov_b32_e32 v0, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v1, v1
; GFX12-NEXT: buffer_load_b32 v0, v0, s[0:3], null offen offset:1024
; GFX12-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -6059,9 +6028,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__amdgpu_no
; GFX12-NEXT: v_mov_b32_e32 v5, v0
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v5, v5
-; GFX12-NEXT: v_pk_min_num_f16 v4, v0, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v4, v5, v2
; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[0:1], v3, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -6353,23 +6320,22 @@ define void @buffer_fat_ptr_agent_atomic_fmin_noret_v2f16__offset__amdgpu_no_fin
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v1, s16
-; GFX12-NEXT: v_pk_max_num_f16 v2, v0, v0
; GFX12-NEXT: v_mov_b32_e32 v3, s16
; GFX12-NEXT: s_mov_b32 s4, 0
-; GFX12-NEXT: buffer_load_b32 v1, v1, s[0:3], null offen offset:1024
+; GFX12-NEXT: buffer_load_b32 v2, v1, s[0:3], null offen offset:1024
; GFX12-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v1, v1
+; GFX12-NEXT: v_pk_min_num_f16 v1, v2, v0
+; GFX12-NEXT: v_mov_b32_e32 v5, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX12-NEXT: v_mov_b32_e32 v4, v1
; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v3, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v1
-; GFX12-NEXT: v_mov_b32_e32 v1, v4
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v2
+; GFX12-NEXT: v_mov_b32_e32 v2, v4
; GFX12-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
@@ -6656,24 +6622,22 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_load_b32 v7, v4, s[4:7], null offen offset:1024
+; GFX12-NEXT: buffer_load_b32 v8, v4, s[4:7], null offen offset:1024
; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB18_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s1
-; GFX12-NEXT: v_pk_max_num_f16 v8, v5, v5
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB18_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB18_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v5, v7, v7
+; GFX12-NEXT: v_pk_min_num_f16 v7, v8, v5
; GFX12-NEXT: s_mov_b32 s2, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v6, v5, v8
-; GFX12-NEXT: v_mov_b32_e32 v5, v6
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_mov_b32_e32 v6, v7
+; GFX12-NEXT: v_mov_b32_e32 v7, v8
; GFX12-NEXT: .LBB18_4: ; Parent Loop BB18_3 Depth=1
; GFX12-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-NEXT: v_readfirstlane_b32 s4, v0
@@ -6688,14 +6652,14 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_saveexec_b32 s0, s0
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[5:6], v4, s[4:7], null offen offset:1024 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[6:7], v4, s[4:7], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB18_4
; GFX12-NEXT: ; %bb.5: ; in Loop: Header=BB18_3 Depth=1
; GFX12-NEXT: s_mov_b32 exec_lo, s2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7
-; GFX12-NEXT: v_mov_b32_e32 v7, v5
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v6, v8
+; GFX12-NEXT: v_mov_b32_e32 v8, v6
; GFX12-NEXT: global_inv scope:SCOPE_DEV
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6703,7 +6667,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_cbranch_execnz .LBB18_3
; GFX12-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-NEXT: v_mov_b32_e32 v0, v5
+; GFX12-NEXT: v_mov_b32_e32 v0, v6
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall__amdgpu_no_fine_grained_memory:
diff --git a/llvm/test/CodeGen/AMDGPU/clamp.ll b/llvm/test/CodeGen/AMDGPU/clamp.ll
index e566d6291624f..45a9abf4a595c 100644
--- a/llvm/test/CodeGen/AMDGPU/clamp.ll
+++ b/llvm/test/CodeGen/AMDGPU/clamp.ll
@@ -415,12 +415,11 @@ define amdgpu_kernel void @v_clamp_negzero_maybe_snan_f32(ptr addrspace(1) %out,
; GFX12: ; %bb.0:
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v1, v0, s[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
; GFX12-NEXT: v_maxmin_num_f32 v1, v1, 0x80000000, 1.0
; GFX12-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX12-NEXT: s_endpgm
@@ -520,9 +519,7 @@ define amdgpu_kernel void @v_clamp_multi_use_max_f32(ptr addrspace(1) %out, ptr
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v1, v0, s[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
; GFX12-NEXT: v_max_num_f32_e32 v1, 0, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f32_e32 v2, 1.0, v1
; GFX12-NEXT: global_store_b32 v0, v2, s[0:1]
; GFX12-NEXT: s_wait_storecnt 0x0
@@ -3267,9 +3264,7 @@ define amdgpu_kernel void @v_clamp_v2f16_not_zero(ptr addrspace(1) %out, ptr add
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v1, v0, s[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, 2.0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, 1.0 op_sel_hi:[1,0]
; GFX12-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX12-NEXT: s_endpgm
@@ -3374,9 +3369,7 @@ define amdgpu_kernel void @v_clamp_v2f16_not_one(ptr addrspace(1) %out, ptr addr
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v1, v0, s[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, 0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, 1.0 op_sel:[0,1] op_sel_hi:[1,0]
; GFX12-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX12-NEXT: s_endpgm
diff --git a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
index ba2cab39dc8e1..e628706e586bc 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
@@ -2802,29 +2802,27 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
-; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execz .LBB18_4
; GFX12-NEXT: ; %bb.1: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB18_2: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[8:9], v[8:9]
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[8:9]
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2833,7 +2831,7 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: ; %bb.3: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: .LBB18_4: ; %Flow2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -2842,16 +2840,14 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[2:3], v6, off
+; GFX12-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[2:3]
; GFX12-NEXT: scratch_store_b64 v6, v[0:1], off
; GFX12-NEXT: .LBB18_6: ; %atomicrmw.phi
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
+; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory:
@@ -3192,7 +3188,6 @@ define double @flat_agent_atomic_fmax_ret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: v_add_co_u32 v4, vcc_lo, 0x7f8, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v1, vcc_lo
@@ -3218,9 +3213,8 @@ define double @flat_agent_atomic_fmax_ret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[8:9], v[8:9]
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[8:9], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[4:5], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -3240,13 +3234,11 @@ define double @flat_agent_atomic_fmax_ret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: .LBB19_6: ; %atomicrmw.private
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX12-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[2:3], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -3604,7 +3596,6 @@ define double @flat_agent_atomic_fmax_ret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: v_add_co_u32 v4, vcc_lo, 0xfffff800, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_add_co_ci_u32_e64 v5, null, -1, v1, vcc_lo
@@ -3630,9 +3621,8 @@ define double @flat_agent_atomic_fmax_ret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[8:9], v[8:9]
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[0:1], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[8:9], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[4:5], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -3652,13 +3642,11 @@ define double @flat_agent_atomic_fmax_ret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: .LBB20_6: ; %atomicrmw.private
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX12-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[2:3], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -4017,7 +4005,6 @@ define void @flat_agent_atomic_fmax_noret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4033,20 +4020,18 @@ define void @flat_agent_atomic_fmax_noret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
; GFX12-NEXT: .LBB21_3: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[6:7], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB21_4: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4055,19 +4040,17 @@ define void @flat_agent_atomic_fmax_noret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: ; %bb.5: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr6_vgpr7
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX12-NEXT: s_cbranch_execz .LBB21_2
; GFX12-NEXT: .LBB21_6: ; %atomicrmw.private
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v2, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v2, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v0, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-NEXT: scratch_store_b64 v2, v[0:1], off
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[0:1], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -4403,14 +4386,13 @@ define void @flat_agent_atomic_fmax_noret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
-; GFX12-NEXT: v_add_co_u32 v6, vcc_lo, 0x7f8, v0
+; GFX12-NEXT: v_add_co_u32 v0, vcc_lo, 0x7f8, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v1, vcc_lo
+; GFX12-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v7
+; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB22_3
; GFX12-NEXT: ; %bb.1: ; %Flow2
@@ -4422,20 +4404,18 @@ define void @flat_agent_atomic_fmax_noret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
; GFX12-NEXT: .LBB22_3: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[6:7]
+; GFX12-NEXT: flat_load_b64 v[6:7], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB22_4: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[6:7], v[0:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
-; GFX12-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4443,20 +4423,18 @@ define void @flat_agent_atomic_fmax_noret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_cbranch_execnz .LBB22_4
; GFX12-NEXT: ; %bb.5: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-NEXT: ; implicit-def: $vgpr6_vgpr7
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX12-NEXT: s_cbranch_execz .LBB22_2
; GFX12-NEXT: .LBB22_6: ; %atomicrmw.private
-; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[6:7]
+; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v2, -1, v6, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v2, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v0, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: scratch_store_b64 v2, v[0:1], off
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[0:1], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -4808,14 +4786,13 @@ define void @flat_agent_atomic_fmax_noret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
-; GFX12-NEXT: v_add_co_u32 v6, vcc_lo, 0xfffff800, v0
+; GFX12-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_add_co_ci_u32_e64 v7, null, -1, v1, vcc_lo
+; GFX12-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v7
+; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB23_3
; GFX12-NEXT: ; %bb.1: ; %Flow2
@@ -4827,20 +4804,18 @@ define void @flat_agent_atomic_fmax_noret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
; GFX12-NEXT: .LBB23_3: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[6:7]
+; GFX12-NEXT: flat_load_b64 v[6:7], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB23_4: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[6:7], v[0:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
-; GFX12-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4848,20 +4823,18 @@ define void @flat_agent_atomic_fmax_noret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_cbranch_execnz .LBB23_4
; GFX12-NEXT: ; %bb.5: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-NEXT: ; implicit-def: $vgpr6_vgpr7
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX12-NEXT: s_cbranch_execz .LBB23_2
; GFX12-NEXT: .LBB23_6: ; %atomicrmw.private
-; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[6:7]
+; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v2, -1, v6, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v2, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v0, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: scratch_store_b64 v2, v[0:1], off
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[0:1], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -5214,29 +5187,27 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
-; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execz .LBB24_4
; GFX12-NEXT: ; %bb.1: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB24_2: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[8:9], v[8:9]
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[8:9]
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5245,7 +5216,7 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX12-NEXT: ; %bb.3: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: .LBB24_4: ; %Flow2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -5254,16 +5225,14 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[2:3], v6, off
+; GFX12-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[2:3]
; GFX12-NEXT: scratch_store_b64 v6, v[0:1], off
; GFX12-NEXT: .LBB24_6: ; %atomicrmw.phi
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
+; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory:
@@ -5638,29 +5607,27 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
-; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execz .LBB25_4
; GFX12-NEXT: ; %bb.1: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB25_2: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[8:9], v[8:9]
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[8:9]
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5669,7 +5636,7 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX12-NEXT: ; %bb.3: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: .LBB25_4: ; %Flow2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -5678,16 +5645,14 @@ define double @flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[2:3], v6, off
+; GFX12-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[2:3]
; GFX12-NEXT: scratch_store_b64 v6, v[0:1], off
; GFX12-NEXT: .LBB25_6: ; %atomicrmw.phi
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
+; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: flat_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
@@ -6033,9 +5998,8 @@ define half @flat_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
@@ -6050,11 +6014,9 @@ define half @flat_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v2.h, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6079,9 +6041,8 @@ define half @flat_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
@@ -6095,12 +6056,11 @@ define half @flat_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6421,35 +6381,30 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -6460,7 +6415,7 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB27_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: flat_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -6473,15 +6428,13 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -6489,12 +6442,11 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6827,35 +6779,30 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -6866,7 +6813,7 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB28_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: flat_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_grained_memory:
@@ -6879,15 +6826,13 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -6895,12 +6840,11 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7235,9 +7179,8 @@ define void @flat_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
@@ -7251,10 +7194,9 @@ define void @flat_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v3.l, v3.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7279,9 +7221,8 @@ define void @flat_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
@@ -7294,12 +7235,10 @@ define void @flat_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7611,37 +7550,33 @@ define void @flat_agent_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v6, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -7658,37 +7593,33 @@ define void @flat_agent_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8005,37 +7936,33 @@ define void @flat_agent_atomic_fmax_noret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v6, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8052,37 +7979,33 @@ define void @flat_agent_atomic_fmax_noret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0xfffff800, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8401,7 +8324,6 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_pos__align4__amdgpu_no_fi
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: flat_load_b32 v3, v[0:1] offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -8409,9 +8331,7 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_pos__align4__amdgpu_no_fi
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -8436,17 +8356,15 @@ define half @flat_agent_atomic_fmax_ret_f16__offset12b_pos__align4__amdgpu_no_fi
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1] offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -8702,15 +8620,13 @@ define void @flat_agent_atomic_fmax_noret_f16__offset12b__align4_pos__amdgpu_no_
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1] offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v2.h, v2.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -8734,24 +8650,21 @@ define void @flat_agent_atomic_fmax_noret_f16__offset12b__align4_pos__amdgpu_no_
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1] offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v2, v2
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1] offset:2046
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v3, v3
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8993,36 +8906,31 @@ define half @flat_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -9033,7 +8941,7 @@ define half @flat_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB34_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: flat_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -9046,15 +8954,13 @@ define half @flat_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -9062,12 +8968,11 @@ define half @flat_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
@@ -9404,38 +9309,34 @@ define void @flat_system_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v6, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -9452,38 +9353,34 @@ define void @flat_system_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14191,15 +14088,13 @@ define <2 x half> @flat_agent_atomic_fmax_ret_v2f16__amdgpu_no_fine_grained_memo
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB46_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -14422,15 +14317,13 @@ define <2 x half> @flat_agent_atomic_fmax_ret_v2f16__offset12b_pos__amdgpu_no_fi
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB47_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -14658,15 +14551,13 @@ define <2 x half> @flat_agent_atomic_fmax_ret_v2f16__offset12b_neg__amdgpu_no_fi
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB48_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -14908,21 +14799,18 @@ define void @flat_agent_atomic_fmax_noret_v2f16__amdgpu_no_fine_grained_memory(p
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB49_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15129,21 +15017,18 @@ define void @flat_agent_atomic_fmax_noret_v2f16__offset12b_pos__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1] offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB50_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15357,21 +15242,18 @@ define void @flat_agent_atomic_fmax_noret_v2f16__offset12b_neg__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1] offset:-2048
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB51_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15605,15 +15487,13 @@ define <2 x half> @flat_system_atomic_fmax_ret_v2f16__offset12b_pos__amdgpu_no_f
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB52_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -15844,22 +15724,19 @@ define void @flat_system_atomic_fmax_noret_v2f16__offset12b_pos__amdgpu_no_fine_
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1] offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB53_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
diff --git a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
index ea4bca8e32d6e..8d1d2b6822235 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
@@ -2802,29 +2802,27 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
-; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execz .LBB18_4
; GFX12-NEXT: ; %bb.1: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB18_2: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[8:9], v[8:9]
-; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[2:3], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[8:9]
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -2833,7 +2831,7 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: ; %bb.3: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: .LBB18_4: ; %Flow2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -2842,16 +2840,14 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[2:3], v6, off
+; GFX12-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[2:3]
; GFX12-NEXT: scratch_store_b64 v6, v[0:1], off
; GFX12-NEXT: .LBB18_6: ; %atomicrmw.phi
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
+; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory:
@@ -3192,7 +3188,6 @@ define double @flat_agent_atomic_fmin_ret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: v_add_co_u32 v4, vcc_lo, 0x7f8, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v1, vcc_lo
@@ -3218,9 +3213,8 @@ define double @flat_agent_atomic_fmin_ret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[8:9], v[8:9]
-; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[0:1], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[8:9], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[4:5], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -3240,13 +3234,11 @@ define double @flat_agent_atomic_fmin_ret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: .LBB19_6: ; %atomicrmw.private
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX12-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[2:3], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -3604,7 +3596,6 @@ define double @flat_agent_atomic_fmin_ret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: v_add_co_u32 v4, vcc_lo, 0xfffff800, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_add_co_ci_u32_e64 v5, null, -1, v1, vcc_lo
@@ -3630,9 +3621,8 @@ define double @flat_agent_atomic_fmin_ret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[8:9], v[8:9]
-; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[0:1], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[8:9], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[4:5], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -3652,13 +3642,11 @@ define double @flat_agent_atomic_fmin_ret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: .LBB20_6: ; %atomicrmw.private
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[4:5]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v6, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v4, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[4:5], v[2:3]
-; GFX12-NEXT: scratch_store_b64 v6, v[2:3], off
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[2:3], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -4017,7 +4005,6 @@ define void @flat_agent_atomic_fmin_noret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4033,20 +4020,18 @@ define void @flat_agent_atomic_fmin_noret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
; GFX12-NEXT: .LBB21_3: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[6:7], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB21_4: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4055,19 +4040,17 @@ define void @flat_agent_atomic_fmin_noret_f64__amdgpu_no_fine_grained_memory(ptr
; GFX12-NEXT: ; %bb.5: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr6_vgpr7
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX12-NEXT: s_cbranch_execz .LBB21_2
; GFX12-NEXT: .LBB21_6: ; %atomicrmw.private
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v2, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v2, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v0, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-NEXT: scratch_store_b64 v2, v[0:1], off
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[0:1], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -4403,14 +4386,13 @@ define void @flat_agent_atomic_fmin_noret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
-; GFX12-NEXT: v_add_co_u32 v6, vcc_lo, 0x7f8, v0
+; GFX12-NEXT: v_add_co_u32 v0, vcc_lo, 0x7f8, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v1, vcc_lo
+; GFX12-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v7
+; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB22_3
; GFX12-NEXT: ; %bb.1: ; %Flow2
@@ -4422,20 +4404,18 @@ define void @flat_agent_atomic_fmin_noret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
; GFX12-NEXT: .LBB22_3: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[6:7]
+; GFX12-NEXT: flat_load_b64 v[6:7], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB22_4: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[6:7], v[0:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
-; GFX12-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4443,20 +4423,18 @@ define void @flat_agent_atomic_fmin_noret_f64__offset12b_pos__amdgpu_no_fine_gra
; GFX12-NEXT: s_cbranch_execnz .LBB22_4
; GFX12-NEXT: ; %bb.5: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-NEXT: ; implicit-def: $vgpr6_vgpr7
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX12-NEXT: s_cbranch_execz .LBB22_2
; GFX12-NEXT: .LBB22_6: ; %atomicrmw.private
-; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[6:7]
+; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v2, -1, v6, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v2, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v0, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: scratch_store_b64 v2, v[0:1], off
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[0:1], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -4808,14 +4786,13 @@ define void @flat_agent_atomic_fmin_noret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
-; GFX12-NEXT: v_add_co_u32 v6, vcc_lo, 0xfffff800, v0
+; GFX12-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_add_co_ci_u32_e64 v7, null, -1, v1, vcc_lo
+; GFX12-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v7
+; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execnz .LBB23_3
; GFX12-NEXT: ; %bb.1: ; %Flow2
@@ -4827,20 +4804,18 @@ define void @flat_agent_atomic_fmin_noret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
; GFX12-NEXT: .LBB23_3: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[6:7]
+; GFX12-NEXT: flat_load_b64 v[6:7], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB23_4: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[0:1], v[6:7], v[0:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
-; GFX12-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4848,20 +4823,18 @@ define void @flat_agent_atomic_fmin_noret_f64__offset12b_neg__amdgpu_no_fine_gra
; GFX12-NEXT: s_cbranch_execnz .LBB23_4
; GFX12-NEXT: ; %bb.5: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
-; GFX12-NEXT: ; implicit-def: $vgpr6_vgpr7
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
; GFX12-NEXT: s_cbranch_execz .LBB23_2
; GFX12-NEXT: .LBB23_6: ; %atomicrmw.private
-; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[6:7]
+; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-NEXT: v_cndmask_b32_e32 v2, -1, v6, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[0:1], v2, off
+; GFX12-NEXT: v_cndmask_b32_e32 v4, -1, v0, vcc_lo
+; GFX12-NEXT: scratch_load_b64 v[0:1], v4, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: scratch_store_b64 v2, v[0:1], off
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: scratch_store_b64 v4, v[0:1], off
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-NEXT: s_setpc_b64 s[30:31]
@@ -5214,29 +5187,27 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
-; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execz .LBB24_4
; GFX12-NEXT: ; %bb.1: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB24_2: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[8:9], v[8:9]
-; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[2:3], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[8:9]
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5245,7 +5216,7 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX12-NEXT: ; %bb.3: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: .LBB24_4: ; %Flow2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -5254,16 +5225,14 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory(ptr %ptr,
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[2:3], v6, off
+; GFX12-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[2:3]
; GFX12-NEXT: scratch_store_b64 v6, v[0:1], off
; GFX12-NEXT: .LBB24_6: ; %atomicrmw.phi
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
+; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory:
@@ -5638,29 +5607,27 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b64 s[0:1], src_private_base
; GFX12-NEXT: s_mov_b32 s0, exec_lo
-; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_cmpx_ne_u32_e32 s1, v1
; GFX12-NEXT: s_xor_b32 s0, exec_lo, s0
; GFX12-NEXT: s_cbranch_execz .LBB25_4
; GFX12-NEXT: ; %bb.1: ; %atomicrmw.global
-; GFX12-NEXT: flat_load_b64 v[2:3], v[0:1]
+; GFX12-NEXT: flat_load_b64 v[4:5], v[0:1]
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: .LBB25_2: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[8:9], v[8:9]
-; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[2:3], v[4:5]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b64 v[2:3], v[0:1], v[6:9] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[8:9]
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s1, vcc_lo, s1
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -5669,7 +5636,7 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX12-NEXT: ; %bb.3: ; %Flow
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s1
; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1
-; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5
+; GFX12-NEXT: ; implicit-def: $vgpr2_vgpr3
; GFX12-NEXT: .LBB25_4: ; %Flow2
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_and_not1_saveexec_b32 s0, s0
@@ -5678,16 +5645,14 @@ define double @flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__am
; GFX12-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v6, -1, v0, vcc_lo
-; GFX12-NEXT: scratch_load_b64 v[2:3], v6, off
+; GFX12-NEXT: scratch_load_b64 v[4:5], v6, off
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[2:3]
; GFX12-NEXT: scratch_store_b64 v6, v[0:1], off
; GFX12-NEXT: .LBB25_6: ; %atomicrmw.phi
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-NEXT: v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
+; GFX12-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: flat_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
@@ -6033,9 +5998,8 @@ define half @flat_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
@@ -6050,11 +6014,9 @@ define half @flat_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v2.h, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6079,9 +6041,8 @@ define half @flat_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
@@ -6095,12 +6056,11 @@ define half @flat_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr %
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6421,35 +6381,30 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -6460,7 +6415,7 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB27_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: flat_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -6473,15 +6428,13 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -6489,12 +6442,11 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6827,35 +6779,30 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -6866,7 +6813,7 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB28_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: flat_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_grained_memory:
@@ -6879,15 +6826,13 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -6895,12 +6840,11 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_grain
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7235,9 +7179,8 @@ define void @flat_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
@@ -7251,10 +7194,9 @@ define void @flat_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v3.l, v3.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7279,9 +7221,8 @@ define void @flat_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
@@ -7294,12 +7235,10 @@ define void @flat_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7611,37 +7550,33 @@ define void @flat_agent_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v6, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -7658,37 +7593,33 @@ define void @flat_agent_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8005,37 +7936,33 @@ define void @flat_agent_atomic_fmin_noret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v6, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8052,37 +7979,33 @@ define void @flat_agent_atomic_fmin_noret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0xfffff800, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8401,7 +8324,6 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_pos__align4__amdgpu_no_fi
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: flat_load_b32 v3, v[0:1] offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -8409,9 +8331,7 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_pos__align4__amdgpu_no_fi
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -8436,17 +8356,15 @@ define half @flat_agent_atomic_fmin_ret_f16__offset12b_pos__align4__amdgpu_no_fi
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1] offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v4
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -8702,15 +8620,13 @@ define void @flat_agent_atomic_fmin_noret_f16__offset12b__align4_pos__amdgpu_no_
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1] offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v2.h, v2.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -8734,24 +8650,21 @@ define void @flat_agent_atomic_fmin_noret_f16__offset12b__align4_pos__amdgpu_no_
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1] offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v2, v2
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1] offset:2046
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v3, v3
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8993,36 +8906,31 @@ define half @flat_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v5, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -9033,7 +8941,7 @@ define half @flat_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB34_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: flat_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -9046,15 +8954,13 @@ define half @flat_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: flat_load_b32 v5, v[0:1]
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -9062,12 +8968,11 @@ define half @flat_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grai
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
@@ -9404,38 +9309,34 @@ define void @flat_system_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: flat_load_b32 v6, v[3:4]
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v5, v[3:4], v[5:6] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -9452,38 +9353,34 @@ define void @flat_system_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: flat_load_b32 v4, v[0:1]
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-FAKE16-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14191,15 +14088,13 @@ define <2 x half> @flat_agent_atomic_fmin_ret_v2f16__amdgpu_no_fine_grained_memo
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB46_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -14422,15 +14317,13 @@ define <2 x half> @flat_agent_atomic_fmin_ret_v2f16__offset12b_pos__amdgpu_no_fi
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB47_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -14658,15 +14551,13 @@ define <2 x half> @flat_agent_atomic_fmin_ret_v2f16__offset12b_neg__amdgpu_no_fi
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB48_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -14908,21 +14799,18 @@ define void @flat_agent_atomic_fmin_noret_v2f16__amdgpu_no_fine_grained_memory(p
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1]
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB49_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15129,21 +15017,18 @@ define void @flat_agent_atomic_fmin_noret_v2f16__offset12b_pos__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1] offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB50_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15357,21 +15242,18 @@ define void @flat_agent_atomic_fmin_noret_v2f16__offset12b_neg__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1] offset:-2048
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB51_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15605,15 +15487,13 @@ define <2 x half> @flat_system_atomic_fmin_ret_v2f16__offset12b_pos__amdgpu_no_f
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB52_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -15844,22 +15724,19 @@ define void @flat_system_atomic_fmin_noret_v2f16__offset12b_pos__amdgpu_no_fine_
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: flat_load_b32 v3, v[0:1] offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: flat_load_b32 v4, v[0:1] offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB53_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: flat_atomic_cmpswap_b32 v2, v[0:1], v[2:3] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
diff --git a/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll b/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
index 8f4a5bb3e6c40..e906ed51de1c0 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
@@ -12332,13 +12332,10 @@ define double @flat_atomic_fmax_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX1250-SDAG-NEXT: .LBB112_3: ; %atomicrmw.private
; GFX1250-SDAG-NEXT: s_sub_co_i32 s2, s0, src_flat_scratch_base_lo
; GFX1250-SDAG-NEXT: s_cmp_lg_u64 s[0:1], 0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX1250-SDAG-NEXT: s_cselect_b32 s0, s2, -1
; GFX1250-SDAG-NEXT: scratch_load_b64 v[2:3], off, s0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[0:1]
+; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX1250-SDAG-NEXT: scratch_store_b64 off, v[0:1], s0
; GFX1250-SDAG-NEXT: .LBB112_4: ; %atomicrmw.end
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
@@ -12483,12 +12480,9 @@ define void @flat_atomic_fmax_f64_saddr_nortn(ptr inreg %ptr, double %data) {
; GFX1250-SDAG-NEXT: .LBB113_4: ; %atomicrmw.private
; GFX1250-SDAG-NEXT: s_sub_co_i32 s2, s0, src_flat_scratch_base_lo
; GFX1250-SDAG-NEXT: s_cmp_lg_u64 s[0:1], 0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX1250-SDAG-NEXT: s_cselect_b32 s0, s2, -1
; GFX1250-SDAG-NEXT: scratch_load_b64 v[2:3], off, s0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX1250-SDAG-NEXT: scratch_store_b64 off, v[0:1], s0
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -12624,13 +12618,10 @@ define double @flat_atomic_fmin_f64_saddr_rtn(ptr inreg %ptr, double %data) {
; GFX1250-SDAG-NEXT: .LBB114_3: ; %atomicrmw.private
; GFX1250-SDAG-NEXT: s_sub_co_i32 s2, s0, src_flat_scratch_base_lo
; GFX1250-SDAG-NEXT: s_cmp_lg_u64 s[0:1], 0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX1250-SDAG-NEXT: s_cselect_b32 s0, s2, -1
; GFX1250-SDAG-NEXT: scratch_load_b64 v[2:3], off, s0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[2:3], v[2:3]
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[0:1]
+; GFX1250-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX1250-SDAG-NEXT: scratch_store_b64 off, v[0:1], s0
; GFX1250-SDAG-NEXT: .LBB114_4: ; %atomicrmw.end
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
@@ -12775,12 +12766,9 @@ define void @flat_atomic_fmin_f64_saddr_nortn(ptr inreg %ptr, double %data) {
; GFX1250-SDAG-NEXT: .LBB115_4: ; %atomicrmw.private
; GFX1250-SDAG-NEXT: s_sub_co_i32 s2, s0, src_flat_scratch_base_lo
; GFX1250-SDAG-NEXT: s_cmp_lg_u64 s[0:1], 0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
; GFX1250-SDAG-NEXT: s_cselect_b32 s0, s2, -1
; GFX1250-SDAG-NEXT: scratch_load_b64 v[2:3], off, s0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1250-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX1250-SDAG-NEXT: scratch_store_b64 off, v[0:1], s0
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -13176,29 +13164,27 @@ define <2 x half> @flat_atomic_fmax_v2f16_saddr_rtn(ptr inreg %ptr, <2 x half> %
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, 0
+; GFX1250-NEXT: v_mov_b32_e32 v2, 0
; GFX1250-NEXT: s_mov_b32 s2, 0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1250-NEXT: flat_load_b32 v0, v2, s[0:1] offset:40
+; GFX1250-NEXT: flat_load_b32 v1, v2, s[0:1] offset:40
; GFX1250-NEXT: .LBB124_1: ; %atomicrmw.start
; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_mov_b32_e32 v5, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_pk_max_num_f16 v0, v5, v5
-; GFX1250-NEXT: v_pk_max_num_f16 v4, v0, v1
+; GFX1250-NEXT: v_mov_b32_e32 v5, v1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_pk_max_num_f16 v4, v5, v0
; GFX1250-NEXT: s_wait_storecnt 0x0
; GFX1250-NEXT: s_wait_xcnt 0x0
-; GFX1250-NEXT: flat_atomic_cmpswap_b32 v0, v2, v[4:5], s[0:1] offset:40 th:TH_ATOMIC_RETURN
+; GFX1250-NEXT: flat_atomic_cmpswap_b32 v1, v2, v[4:5], s[0:1] offset:40 th:TH_ATOMIC_RETURN
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v5
+; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v5
; GFX1250-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1250-NEXT: s_cbranch_execnz .LBB124_1
; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s2
+; GFX1250-NEXT: v_mov_b32_e32 v0, v1
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
; GFX950-LABEL: flat_atomic_fmax_v2f16_saddr_rtn:
@@ -13235,22 +13221,19 @@ define void @flat_atomic_fmax_v2f16_saddr_nortn(ptr inreg %ptr, <2 x half> %data
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_mov_b32_e32 v2, 0
-; GFX1250-NEXT: v_pk_max_num_f16 v3, v0, v0
+; GFX1250-NEXT: v_mov_b32_e32 v1, 0
; GFX1250-NEXT: s_mov_b32 s2, 0
-; GFX1250-NEXT: flat_load_b32 v1, v2, s[0:1] offset:40
+; GFX1250-NEXT: flat_load_b32 v3, v1, s[0:1] offset:40
; GFX1250-NEXT: .LBB125_1: ; %atomicrmw.start
; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_pk_max_num_f16 v0, v1, v1
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1250-NEXT: v_pk_max_num_f16 v2, v3, v0
; GFX1250-NEXT: s_wait_storecnt 0x0
; GFX1250-NEXT: s_wait_xcnt 0x0
-; GFX1250-NEXT: flat_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:40 th:TH_ATOMIC_RETURN
+; GFX1250-NEXT: flat_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:40 th:TH_ATOMIC_RETURN
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
-; GFX1250-NEXT: v_mov_b32_e32 v1, v0
+; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX1250-NEXT: v_mov_b32_e32 v3, v2
; GFX1250-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
@@ -13293,29 +13276,27 @@ define <2 x half> @flat_atomic_fmin_v2f16_saddr_rtn(ptr inreg %ptr, <2 x half> %
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, 0
+; GFX1250-NEXT: v_mov_b32_e32 v2, 0
; GFX1250-NEXT: s_mov_b32 s2, 0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1250-NEXT: flat_load_b32 v0, v2, s[0:1] offset:40
+; GFX1250-NEXT: flat_load_b32 v1, v2, s[0:1] offset:40
; GFX1250-NEXT: .LBB126_1: ; %atomicrmw.start
; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_mov_b32_e32 v5, v0
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_pk_max_num_f16 v0, v5, v5
-; GFX1250-NEXT: v_pk_min_num_f16 v4, v0, v1
+; GFX1250-NEXT: v_mov_b32_e32 v5, v1
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_pk_min_num_f16 v4, v5, v0
; GFX1250-NEXT: s_wait_storecnt 0x0
; GFX1250-NEXT: s_wait_xcnt 0x0
-; GFX1250-NEXT: flat_atomic_cmpswap_b32 v0, v2, v[4:5], s[0:1] offset:40 th:TH_ATOMIC_RETURN
+; GFX1250-NEXT: flat_atomic_cmpswap_b32 v1, v2, v[4:5], s[0:1] offset:40 th:TH_ATOMIC_RETURN
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v5
+; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v5
; GFX1250-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX1250-NEXT: s_cbranch_execnz .LBB126_1
; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s2
+; GFX1250-NEXT: v_mov_b32_e32 v0, v1
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
; GFX950-LABEL: flat_atomic_fmin_v2f16_saddr_rtn:
@@ -13352,22 +13333,19 @@ define void @flat_atomic_fmin_v2f16_saddr_nortn(ptr inreg %ptr, <2 x half> %data
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_mov_b32_e32 v2, 0
-; GFX1250-NEXT: v_pk_max_num_f16 v3, v0, v0
+; GFX1250-NEXT: v_mov_b32_e32 v1, 0
; GFX1250-NEXT: s_mov_b32 s2, 0
-; GFX1250-NEXT: flat_load_b32 v1, v2, s[0:1] offset:40
+; GFX1250-NEXT: flat_load_b32 v3, v1, s[0:1] offset:40
; GFX1250-NEXT: .LBB127_1: ; %atomicrmw.start
; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_pk_max_num_f16 v0, v1, v1
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1250-NEXT: v_pk_min_num_f16 v2, v3, v0
; GFX1250-NEXT: s_wait_storecnt 0x0
; GFX1250-NEXT: s_wait_xcnt 0x0
-; GFX1250-NEXT: flat_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:40 th:TH_ATOMIC_RETURN
+; GFX1250-NEXT: flat_atomic_cmpswap_b32 v2, v1, v[2:3], s[0:1] offset:40 th:TH_ATOMIC_RETURN
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
-; GFX1250-NEXT: v_mov_b32_e32 v1, v0
+; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
+; GFX1250-NEXT: v_mov_b32_e32 v3, v2
; GFX1250-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
diff --git a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
index 1c4c59855ea98..c76d1742d99f4 100644
--- a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
@@ -1239,12 +1239,9 @@ define <2 x half> @v_max3_v2f16_maximumnum_maximumnum__v_v_v_0(<2 x half> %a, <2
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-NEXT: v_pk_max_num_f16 v1, v2, v2
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %a, <2 x half> %b)
%max3 = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %tmp0, <2 x half> %c)
@@ -1411,18 +1408,11 @@ define <3 x half> @v_max3_v3f16_maximumnum_maximumnum__v_v_v_0(<3 x half> %a, <3
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v5
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %a, <3 x half> %b)
%max3 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)
@@ -1621,18 +1611,11 @@ define <4 x half> @v_max3_v4f16_maximumnum_maximumnum__v_v_v_0(<4 x half> %a, <4
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v5
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)
%max3 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)
@@ -1718,11 +1701,8 @@ define double @v_max3_f64_maximumnum_maximumnum__v_v_v_0(double %a, double %b, d
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call double @llvm.maximumnum.f64(double %a, double %b)
@@ -3192,11 +3172,7 @@ define float @v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0(float %a, float %b,
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_minmax_num_f32 v0, v0, v1, v2
+; GFX12-NEXT: v_minmax_num_f32 v0, v0, -v1, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%neg.a = fneg float %a
%tmp0 = call float @llvm.maximumnum.f32(float %neg.a, float %b)
@@ -3280,13 +3256,9 @@ define float @v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0(float %a, float %b,
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v2
-; GFX12-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, v1
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: v_max_num_f32_e64 v0, |v0|, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%neg.a = fneg float %a
%tmp0 = call float @llvm.maximumnum.f32(float %neg.a, float %b)
@@ -3370,13 +3342,9 @@ define float @v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0(float %a, floa
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v2
-; GFX12-NEXT: v_or_b32_e32 v0, 0x80000000, v0
+; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, v1
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: v_max_num_f32_e64 v0, -|v0|, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%neg.a = fneg float %a
%tmp0 = call float @llvm.maximumnum.f32(float %neg.a, float %b)
diff --git a/llvm/test/CodeGen/AMDGPU/fmaxnum.ll b/llvm/test/CodeGen/AMDGPU/fmaxnum.ll
index 48b334233a075..15a1540103221 100644
--- a/llvm/test/CodeGen/AMDGPU/fmaxnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmaxnum.ll
@@ -62,12 +62,11 @@ define amdgpu_kernel void @test_fmax_f32_ieee_mode_on(ptr addrspace(1) %out, flo
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s2, s2
+; GFX12-SDAG-NEXT: s_max_num_f32 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -185,12 +184,10 @@ define amdgpu_kernel void @test_fmax_v2f32(ptr addrspace(1) %out, <2 x float> %a
; GFX12-SDAG-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s6, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v3, s0, s0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v0 :: v_dual_max_num_f32 v0, v3, v2
+; GFX12-SDAG-NEXT: s_max_num_f32 s0, s0, s2
+; GFX12-SDAG-NEXT: s_max_num_f32 s1, s1, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -306,18 +303,15 @@ define amdgpu_kernel void @test_fmax_v3f32(ptr addrspace(1) %out, <3 x float> %a
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b256 s[8:15], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_max_num_f32 s2, s8, s12
+; GFX12-SDAG-NEXT: s_max_num_f32 s3, s9, s13
+; GFX12-SDAG-NEXT: s_max_num_f32 s4, s10, s14
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2) | instskip(NEXT) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, s4
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s14, s14
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s10, s10
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v3, s13, s13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s9, s9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s12, s12
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s8, s8
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v1, v0 :: v_dual_max_num_f32 v1, v4, v3
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v6, v5
; GFX12-SDAG-NEXT: buffer_store_b96 v[0:2], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -448,20 +442,16 @@ define amdgpu_kernel void @test_fmax_v4f32(ptr addrspace(1) %out, <4 x float> %a
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b256 s[8:15], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_max_num_f32 s2, s8, s12
+; GFX12-SDAG-NEXT: s_max_num_f32 s3, s9, s13
+; GFX12-SDAG-NEXT: s_max_num_f32 s4, s10, s14
+; GFX12-SDAG-NEXT: s_max_num_f32 s5, s11, s15
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s15, s15
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s14, s14
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s13, s13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s12, s12
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s8, s8
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v1, v0 :: v_dual_max_num_f32 v2, v4, v2
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v6, v5 :: v_dual_max_num_f32 v0, v8, v7
; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -649,33 +639,24 @@ define amdgpu_kernel void @test_fmax_v8f32(ptr addrspace(1) %out, <8 x float> %a
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x44
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_max_num_f32 s4, s9, s17
+; GFX12-SDAG-NEXT: s_max_num_f32 s5, s8, s16
+; GFX12-SDAG-NEXT: s_max_num_f32 s6, s12, s20
+; GFX12-SDAG-NEXT: s_max_num_f32 s7, s13, s21
+; GFX12-SDAG-NEXT: s_max_num_f32 s8, s14, s22
+; GFX12-SDAG-NEXT: s_max_num_f32 s9, s15, s23
+; GFX12-SDAG-NEXT: s_max_num_f32 s2, s11, s19
+; GFX12-SDAG-NEXT: s_max_num_f32 s3, s10, s18
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v3, s9
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_mov_b32 v5, s4
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, s2
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s19, s19
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s18, s18
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s17, s17
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s23, s23
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v10, s15, s15
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v11, s22, s22
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s14, s14
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s21, s21
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v14, s13, s13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v15, s20, s20
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v16, s12, s12
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s16, s16
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s8, s8
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v1, v0 :: v_dual_max_num_f32 v2, v4, v2
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v6, v5 :: v_dual_max_num_f32 v6, v12, v11
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v7, v10, v7 :: v_dual_max_num_f32 v0, v9, v8
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v5, v14, v13 :: v_dual_max_num_f32 v4, v16, v15
; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
-; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
+; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null offset:16
+; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmax_v8f32:
@@ -992,63 +973,42 @@ define amdgpu_kernel void @test_fmax_v16f32(ptr addrspace(1) %out, <16 x float>
; GFX12-SDAG-LABEL: test_fmax_v16f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x2
-; GFX12-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4
; GFX12-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x64
+; GFX12-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s39, s39
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s38, s38
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s37, s37
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s43, s43
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s15, s15
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s42, s42
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v10, s14, s14
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v11, s41, s41
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s13, s13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s47, s47
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v14, s19, s19
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v1, v0 :: v_dual_max_num_f32 v2, v4, v2
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v7, v8, v7
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s46, s46
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s18, s18
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v6, v5
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v6, v10, v9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s45, s45
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s17, s17
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v5, v12, v11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v18, s40, s40
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v19, s12, s12
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v10, v4, v0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v9, v9, v8
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s51, s51
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s23, s23
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s50, s50
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v20, s49, s49
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v21, s21, s21
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v22, s48, s48
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v23, s20, s20
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v11, v14, v13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s22, s22
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s44, s44
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v24, s16, s16
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v16, s36, s36
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v17, s8, s8
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v15, v8, v4
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v14, v13, v12
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v13, v21, v20 :: v_dual_max_num_f32 v12, v23, v22
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v8, v24, v0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v4, v19, v18
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v17, v16
+; GFX12-SDAG-NEXT: s_max_num_f32 s4, s11, s39
+; GFX12-SDAG-NEXT: s_max_num_f32 s5, s10, s38
+; GFX12-SDAG-NEXT: s_max_num_f32 s6, s9, s37
+; GFX12-SDAG-NEXT: s_max_num_f32 s7, s8, s36
+; GFX12-SDAG-NEXT: s_max_num_f32 s8, s15, s43
+; GFX12-SDAG-NEXT: s_max_num_f32 s9, s14, s42
+; GFX12-SDAG-NEXT: s_max_num_f32 s10, s13, s41
+; GFX12-SDAG-NEXT: s_max_num_f32 s11, s12, s40
+; GFX12-SDAG-NEXT: s_max_num_f32 s12, s19, s47
+; GFX12-SDAG-NEXT: s_max_num_f32 s13, s18, s46
+; GFX12-SDAG-NEXT: s_max_num_f32 s14, s17, s45
+; GFX12-SDAG-NEXT: s_max_num_f32 s15, s16, s44
+; GFX12-SDAG-NEXT: s_max_num_f32 s16, s20, s48
+; GFX12-SDAG-NEXT: s_max_num_f32 s17, s21, s49
+; GFX12-SDAG-NEXT: s_max_num_f32 s18, s22, s50
+; GFX12-SDAG-NEXT: s_max_num_f32 s19, s23, s51
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s16 :: v_dual_mov_b32 v1, s17
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s18 :: v_dual_mov_b32 v3, s19
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v4, s15 :: v_dual_mov_b32 v5, s14
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v6, s13 :: v_dual_mov_b32 v7, s12
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v8, s11 :: v_dual_mov_b32 v9, s10
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v10, s9 :: v_dual_mov_b32 v11, s8
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v12, s7 :: v_dual_mov_b32 v13, s6
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v14, s5 :: v_dual_mov_b32 v15, s4
; GFX12-SDAG-NEXT: s_clause 0x3
-; GFX12-SDAG-NEXT: buffer_store_b128 v[12:15], off, s[0:3], null offset:48
-; GFX12-SDAG-NEXT: buffer_store_b128 v[8:11], off, s[0:3], null offset:32
-; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
-; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
+; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null offset:48
+; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:32
+; GFX12-SDAG-NEXT: buffer_store_b128 v[8:11], off, s[0:3], null offset:16
+; GFX12-SDAG-NEXT: buffer_store_b128 v[12:15], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmax_v16f32:
@@ -1832,10 +1792,6 @@ define <3 x float> @test_func_fmax_v3f32(<3 x float> %a, <3 x float> %b) #0 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -1920,12 +1876,11 @@ define amdgpu_kernel void @test_fmax_f16_v_ieee_on(ptr addrspace(1) %out, half %
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: s_max_num_f16 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2039,12 +1994,11 @@ define amdgpu_kernel void @test_fmax_f16_s_ieee_on(ptr addrspace(1) %out, half i
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: s_max_num_f16 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2152,12 +2106,11 @@ define amdgpu_kernel void @test_fmax_f32_s_ieee_on(ptr addrspace(1) %out, float
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s2, s2
+; GFX12-SDAG-NEXT: s_max_num_f32 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2281,12 +2234,9 @@ define amdgpu_kernel void @test_fmax_v2f16_v_ieee_on(ptr addrspace(1) %out, <2 x
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s3, s3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, s2, s2
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2409,14 +2359,13 @@ define amdgpu_kernel void @test_fmax_v2f16_s_ieee_on(ptr addrspace(1) %out, <2 x
; GFX12-SDAG-LABEL: test_fmax_v2f16_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_mov_b32 s7, 0x31016000
+; GFX12-SDAG-NEXT: s_mov_b32 s6, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s3, s3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, s2, s2
-; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
-; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v1, v0
-; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s2, s3
+; GFX12-SDAG-NEXT: s_mov_b32 s4, s0
+; GFX12-SDAG-NEXT: s_mov_b32 s5, s1
+; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[4:7], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmax_v2f16_s_ieee_on:
@@ -2536,15 +2485,12 @@ define amdgpu_kernel void @test_fmax_f64_v_ieee_on(ptr addrspace(1) %out, double
; GFX12-SDAG-LABEL: test_fmax_f64_v_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[6:7], s[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[4:5]
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2649,15 +2595,12 @@ define amdgpu_kernel void @test_fmax_f64_s_ieee_on(ptr addrspace(1) %out, double
; GFX12-SDAG-LABEL: test_fmax_f64_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[6:7], s[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[4:5]
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
index 6e124f6620b5e..bb34d552f6058 100644
--- a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
@@ -1239,12 +1239,9 @@ define <2 x half> @v_min3_v2f16_minimumnum_minimumnum__v_v_v_0(<2 x half> %a, <2
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-NEXT: v_pk_max_num_f16 v1, v2, v2
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %a, <2 x half> %b)
%min3 = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %tmp0, <2 x half> %c)
@@ -1411,18 +1408,11 @@ define <3 x half> @v_min3_v3f16_minimumnum_minimumnum__v_v_v_0(<3 x half> %a, <3
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v5
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %a, <3 x half> %b)
%min3 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)
@@ -1621,18 +1611,11 @@ define <4 x half> @v_min3_v4f16_minimumnum_minimumnum__v_v_v_0(<4 x half> %a, <4
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v5
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)
%min3 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)
@@ -1718,11 +1701,8 @@ define double @v_min3_f64_minimumnum_minimumnum__v_v_v_0(double %a, double %b, d
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call double @llvm.minimumnum.f64(double %a, double %b)
@@ -3197,11 +3177,7 @@ define float @v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0(float %a, float %b,
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_maxmin_num_f32 v0, v0, v1, v2
+; GFX12-NEXT: v_maxmin_num_f32 v0, v0, -v1, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%neg.a = fneg float %a
%tmp0 = call float @llvm.minimumnum.f32(float %neg.a, float %b)
@@ -3285,13 +3261,9 @@ define float @v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0(float %a, float %b,
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v2
-; GFX12-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; GFX12-NEXT: v_min_num_f32_e64 v0, -v0, v1
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: v_min_num_f32_e64 v0, |v0|, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%neg.a = fneg float %a
%tmp0 = call float @llvm.minimumnum.f32(float %neg.a, float %b)
@@ -3375,13 +3347,9 @@ define float @v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0(float %a, floa
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v2
-; GFX12-NEXT: v_or_b32_e32 v0, 0x80000000, v0
+; GFX12-NEXT: v_min_num_f32_e64 v0, -v0, v1
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: v_min_num_f32_e64 v0, -|v0|, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%neg.a = fneg float %a
%tmp0 = call float @llvm.minimumnum.f32(float %neg.a, float %b)
diff --git a/llvm/test/CodeGen/AMDGPU/fmin3.ll b/llvm/test/CodeGen/AMDGPU/fmin3.ll
index 0744b4cce087c..e23c47e26807b 100644
--- a/llvm/test/CodeGen/AMDGPU/fmin3.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmin3.ll
@@ -1413,18 +1413,17 @@ define amdgpu_kernel void @test_fmin3_olt_0_f64(ptr addrspace(1) %out, ptr addrs
; GFX1170-NEXT: s_waitcnt vmcnt(0)
; GFX1170-NEXT: buffer_load_b64 v[2:3], off, s[16:19], 0 glc dlc
; GFX1170-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-NEXT: s_mov_b32 s12, s6
-; GFX1170-NEXT: s_mov_b32 s13, s7
+; GFX1170-NEXT: s_mov_b32 s4, s6
+; GFX1170-NEXT: s_mov_b32 s5, s7
+; GFX1170-NEXT: s_mov_b32 s6, s10
+; GFX1170-NEXT: s_mov_b32 s7, s11
; GFX1170-NEXT: s_mov_b32 s8, s0
-; GFX1170-NEXT: buffer_load_b64 v[4:5], off, s[12:15], 0 glc dlc
+; GFX1170-NEXT: buffer_load_b64 v[4:5], off, s[4:7], 0 glc dlc
; GFX1170-NEXT: s_waitcnt vmcnt(0)
; GFX1170-NEXT: s_mov_b32 s9, s1
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[4:5], v[4:5]
; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX1170-NEXT: s_endpgm
;
@@ -1446,18 +1445,17 @@ define amdgpu_kernel void @test_fmin3_olt_0_f64(ptr addrspace(1) %out, ptr addrs
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: buffer_load_b64 v[2:3], off, s[16:19], null scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: s_mov_b32 s12, s6
-; GFX12-NEXT: s_mov_b32 s13, s7
+; GFX12-NEXT: s_mov_b32 s4, s6
+; GFX12-NEXT: s_mov_b32 s5, s7
+; GFX12-NEXT: s_mov_b32 s6, s10
+; GFX12-NEXT: s_mov_b32 s7, s11
; GFX12-NEXT: s_mov_b32 s8, s0
-; GFX12-NEXT: buffer_load_b64 v[4:5], off, s[12:15], null scope:SCOPE_SYS
+; GFX12-NEXT: buffer_load_b64 v[4:5], off, s[4:7], null scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_mov_b32 s9, s1
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-NEXT: s_endpgm
;
@@ -1486,12 +1484,9 @@ define amdgpu_kernel void @test_fmin3_olt_0_f64(ptr addrspace(1) %out, ptr addrs
; GFX1250-NEXT: buffer_load_b64 v[4:5], off, s[4:7], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: s_mov_b32 s1, s9
-; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX1250-NEXT: s_endpgm
%a = load volatile double, ptr addrspace(1) %aptr, align 4
@@ -1656,18 +1651,17 @@ define amdgpu_kernel void @test_fmin3_olt_1_f64(ptr addrspace(1) %out, ptr addrs
; GFX1170-NEXT: s_waitcnt vmcnt(0)
; GFX1170-NEXT: buffer_load_b64 v[2:3], off, s[16:19], 0 glc dlc
; GFX1170-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-NEXT: s_mov_b32 s12, s6
-; GFX1170-NEXT: s_mov_b32 s13, s7
+; GFX1170-NEXT: s_mov_b32 s4, s6
+; GFX1170-NEXT: s_mov_b32 s5, s7
+; GFX1170-NEXT: s_mov_b32 s6, s10
+; GFX1170-NEXT: s_mov_b32 s7, s11
; GFX1170-NEXT: s_mov_b32 s8, s0
-; GFX1170-NEXT: buffer_load_b64 v[4:5], off, s[12:15], 0 glc dlc
+; GFX1170-NEXT: buffer_load_b64 v[4:5], off, s[4:7], 0 glc dlc
; GFX1170-NEXT: s_waitcnt vmcnt(0)
; GFX1170-NEXT: s_mov_b32 s9, s1
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[4:5], v[4:5]
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[2:3], v[0:1]
+; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[4:5], v[0:1]
; GFX1170-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX1170-NEXT: s_endpgm
;
@@ -1689,18 +1683,17 @@ define amdgpu_kernel void @test_fmin3_olt_1_f64(ptr addrspace(1) %out, ptr addrs
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: buffer_load_b64 v[2:3], off, s[16:19], null scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: s_mov_b32 s12, s6
-; GFX12-NEXT: s_mov_b32 s13, s7
+; GFX12-NEXT: s_mov_b32 s4, s6
+; GFX12-NEXT: s_mov_b32 s5, s7
+; GFX12-NEXT: s_mov_b32 s6, s10
+; GFX12-NEXT: s_mov_b32 s7, s11
; GFX12-NEXT: s_mov_b32 s8, s0
-; GFX12-NEXT: buffer_load_b64 v[4:5], off, s[12:15], null scope:SCOPE_SYS
+; GFX12-NEXT: buffer_load_b64 v[4:5], off, s[4:7], null scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: s_mov_b32 s9, s1
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[0:1]
; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-NEXT: s_endpgm
;
@@ -1729,12 +1722,9 @@ define amdgpu_kernel void @test_fmin3_olt_1_f64(ptr addrspace(1) %out, ptr addrs
; GFX1250-NEXT: buffer_load_b64 v[4:5], off, s[4:7], null scope:SCOPE_SYS
; GFX1250-NEXT: s_wait_loadcnt 0x0
; GFX1250-NEXT: s_mov_b32 s1, s9
-; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[4:5], v[0:1]
; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX1250-NEXT: s_endpgm
%a = load volatile double, ptr addrspace(1) %aptr, align 4
diff --git a/llvm/test/CodeGen/AMDGPU/fminnum.ll b/llvm/test/CodeGen/AMDGPU/fminnum.ll
index 2444f7dee860b..3ffe68d767c06 100644
--- a/llvm/test/CodeGen/AMDGPU/fminnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fminnum.ll
@@ -62,12 +62,11 @@ define amdgpu_kernel void @test_fmin_f32_ieee_mode_on(ptr addrspace(1) %out, flo
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s2, s2
+; GFX12-SDAG-NEXT: s_min_num_f32 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -230,12 +229,10 @@ define amdgpu_kernel void @test_fmin_v2f32(ptr addrspace(1) %out, <2 x float> %a
; GFX12-SDAG-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s6, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v3, s0, s0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v1, v1, v0 :: v_dual_min_num_f32 v0, v3, v2
+; GFX12-SDAG-NEXT: s_min_num_f32 s0, s0, s2
+; GFX12-SDAG-NEXT: s_min_num_f32 s1, s1, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -363,20 +360,16 @@ define amdgpu_kernel void @test_fmin_v4f32(ptr addrspace(1) %out, <4 x float> %a
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b256 s[8:15], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_min_num_f32 s2, s8, s12
+; GFX12-SDAG-NEXT: s_min_num_f32 s3, s9, s13
+; GFX12-SDAG-NEXT: s_min_num_f32 s4, s10, s14
+; GFX12-SDAG-NEXT: s_min_num_f32 s5, s11, s15
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s15, s15
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s14, s14
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s13, s13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s12, s12
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s8, s8
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v3, v1, v0 :: v_dual_min_num_f32 v2, v4, v2
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v1, v6, v5 :: v_dual_min_num_f32 v0, v8, v7
; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -564,33 +557,24 @@ define amdgpu_kernel void @test_fmin_v8f32(ptr addrspace(1) %out, <8 x float> %a
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x44
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_min_num_f32 s4, s9, s17
+; GFX12-SDAG-NEXT: s_min_num_f32 s5, s8, s16
+; GFX12-SDAG-NEXT: s_min_num_f32 s6, s12, s20
+; GFX12-SDAG-NEXT: s_min_num_f32 s7, s13, s21
+; GFX12-SDAG-NEXT: s_min_num_f32 s8, s14, s22
+; GFX12-SDAG-NEXT: s_min_num_f32 s9, s15, s23
+; GFX12-SDAG-NEXT: s_min_num_f32 s2, s11, s19
+; GFX12-SDAG-NEXT: s_min_num_f32 s3, s10, s18
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v3, s9
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v4, s5 :: v_dual_mov_b32 v5, s4
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, s2
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s19, s19
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s18, s18
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s17, s17
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s23, s23
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v10, s15, s15
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v11, s22, s22
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s14, s14
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s21, s21
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v14, s13, s13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v15, s20, s20
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v16, s12, s12
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s16, s16
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s8, s8
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v3, v1, v0 :: v_dual_min_num_f32 v2, v4, v2
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v1, v6, v5 :: v_dual_min_num_f32 v6, v12, v11
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v7, v10, v7 :: v_dual_min_num_f32 v0, v9, v8
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v5, v14, v13 :: v_dual_min_num_f32 v4, v16, v15
; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
-; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
+; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null offset:16
+; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v8f32:
@@ -907,63 +891,42 @@ define amdgpu_kernel void @test_fmin_v16f32(ptr addrspace(1) %out, <16 x float>
; GFX12-SDAG-LABEL: test_fmin_v16f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x2
-; GFX12-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4
; GFX12-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x64
+; GFX12-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s39, s39
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s38, s38
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s37, s37
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s43, s43
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s15, s15
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s42, s42
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v10, s14, s14
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v11, s41, s41
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s13, s13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s47, s47
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v14, s19, s19
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v3, v1, v0 :: v_dual_min_num_f32 v2, v4, v2
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v7, v8, v7
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s46, s46
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s18, s18
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v1, v6, v5
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v6, v10, v9
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s45, s45
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s17, s17
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v5, v12, v11
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v18, s40, s40
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v19, s12, s12
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v10, v4, v0
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v9, v9, v8
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s51, s51
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s23, s23
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s50, s50
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v20, s49, s49
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v21, s21, s21
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v22, s48, s48
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v23, s20, s20
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v11, v14, v13
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s22, s22
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s44, s44
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v24, s16, s16
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v16, s36, s36
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v17, s8, s8
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v15, v8, v4
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v14, v13, v12
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v13, v21, v20 :: v_dual_min_num_f32 v12, v23, v22
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v8, v24, v0
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v4, v19, v18
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v17, v16
+; GFX12-SDAG-NEXT: s_min_num_f32 s4, s11, s39
+; GFX12-SDAG-NEXT: s_min_num_f32 s5, s10, s38
+; GFX12-SDAG-NEXT: s_min_num_f32 s6, s9, s37
+; GFX12-SDAG-NEXT: s_min_num_f32 s7, s8, s36
+; GFX12-SDAG-NEXT: s_min_num_f32 s8, s15, s43
+; GFX12-SDAG-NEXT: s_min_num_f32 s9, s14, s42
+; GFX12-SDAG-NEXT: s_min_num_f32 s10, s13, s41
+; GFX12-SDAG-NEXT: s_min_num_f32 s11, s12, s40
+; GFX12-SDAG-NEXT: s_min_num_f32 s12, s19, s47
+; GFX12-SDAG-NEXT: s_min_num_f32 s13, s18, s46
+; GFX12-SDAG-NEXT: s_min_num_f32 s14, s17, s45
+; GFX12-SDAG-NEXT: s_min_num_f32 s15, s16, s44
+; GFX12-SDAG-NEXT: s_min_num_f32 s16, s20, s48
+; GFX12-SDAG-NEXT: s_min_num_f32 s17, s21, s49
+; GFX12-SDAG-NEXT: s_min_num_f32 s18, s22, s50
+; GFX12-SDAG-NEXT: s_min_num_f32 s19, s23, s51
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, s16 :: v_dual_mov_b32 v1, s17
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, s18 :: v_dual_mov_b32 v3, s19
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v4, s15 :: v_dual_mov_b32 v5, s14
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v6, s13 :: v_dual_mov_b32 v7, s12
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v8, s11 :: v_dual_mov_b32 v9, s10
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v10, s9 :: v_dual_mov_b32 v11, s8
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v12, s7 :: v_dual_mov_b32 v13, s6
+; GFX12-SDAG-NEXT: v_dual_mov_b32 v14, s5 :: v_dual_mov_b32 v15, s4
; GFX12-SDAG-NEXT: s_clause 0x3
-; GFX12-SDAG-NEXT: buffer_store_b128 v[12:15], off, s[0:3], null offset:48
-; GFX12-SDAG-NEXT: buffer_store_b128 v[8:11], off, s[0:3], null offset:32
-; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
-; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
+; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null offset:48
+; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:32
+; GFX12-SDAG-NEXT: buffer_store_b128 v[8:11], off, s[0:3], null offset:16
+; GFX12-SDAG-NEXT: buffer_store_b128 v[12:15], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v16f32:
@@ -1745,10 +1708,6 @@ define <3 x float> @test_func_fmin_v3f32(<3 x float> %a, <3 x float> %b) nounwin
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -1833,12 +1792,11 @@ define amdgpu_kernel void @test_fmin_f16_v_ieee_on(ptr addrspace(1) %out, half %
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: s_min_num_f16 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -1952,12 +1910,11 @@ define amdgpu_kernel void @test_fmin_f16_s_ieee_on(ptr addrspace(1) %out, half i
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.h, s2, s2
-; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0.l, s3, s3
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: s_min_num_f16 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: v_mov_b16_e32 v0.l, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2065,12 +2022,11 @@ define amdgpu_kernel void @test_fmin_f32_s_ieee_on(ptr addrspace(1) %out, float
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s2, s2
+; GFX12-SDAG-NEXT: s_min_num_f32 s2, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2194,12 +2150,9 @@ define amdgpu_kernel void @test_fmin_v2f16_v_ieee_on(ptr addrspace(1) %out, <2 x
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s3, s3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, s2, s2
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, s2, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2322,14 +2275,13 @@ define amdgpu_kernel void @test_fmin_v2f16_s_ieee_on(ptr addrspace(1) %out, <2 x
; GFX12-SDAG-LABEL: test_fmin_v2f16_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_mov_b32 s7, 0x31016000
+; GFX12-SDAG-NEXT: s_mov_b32 s6, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s3, s3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, s2, s2
-; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
-; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v1, v0
-; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, s2, s3
+; GFX12-SDAG-NEXT: s_mov_b32 s4, s0
+; GFX12-SDAG-NEXT: s_mov_b32 s5, s1
+; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[4:7], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v2f16_s_ieee_on:
@@ -2449,15 +2401,12 @@ define amdgpu_kernel void @test_fmin_f64_v_ieee_on(ptr addrspace(1) %out, double
; GFX12-SDAG-LABEL: test_fmin_f64_v_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[6:7], s[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[2:3], s[4:5]
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
@@ -2562,15 +2511,12 @@ define amdgpu_kernel void @test_fmin_f64_s_ieee_on(ptr addrspace(1) %out, double
; GFX12-SDAG-LABEL: test_fmin_f64_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
-; GFX12-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
+; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[6:7], s[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[2:3], s[4:5]
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
index 93443914d3f97..170e6b3404d4d 100644
--- a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
@@ -3015,15 +3015,13 @@ define double @global_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory(p
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -3188,15 +3186,13 @@ define double @global_agent_atomic_fmax_ret_f64__offset12b_pos__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:2040
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB19_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:2040 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -3362,15 +3358,13 @@ define double @global_agent_atomic_fmax_ret_f64__offset12b_neg__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:-2048
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -3535,21 +3529,18 @@ define void @global_agent_atomic_fmax_noret_f64__amdgpu_no_fine_grained_memory(p
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
+; GFX12-NEXT: global_load_b64 v[6:7], v[0:1], off
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3698,21 +3689,18 @@ define void @global_agent_atomic_fmax_noret_f64__offset12b_pos__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:2040
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
+; GFX12-NEXT: global_load_b64 v[6:7], v[0:1], off offset:2040
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB22_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5], off offset:2040 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:2040 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3864,21 +3852,18 @@ define void @global_agent_atomic_fmax_noret_f64__offset12b_neg__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:-2048
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
+; GFX12-NEXT: global_load_b64 v[6:7], v[0:1], off offset:-2048
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB23_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4031,15 +4016,13 @@ define double @global_agent_atomic_fmax_ret_f64__amdgpu_no_remote_memory(ptr add
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB24_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -4279,15 +4262,13 @@ define double @global_agent_atomic_fmax_ret_f64__amdgpu_no_fine_grained_memory__
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB25_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -4456,9 +4437,8 @@ define half @global_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
@@ -4473,11 +4453,9 @@ define half @global_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v2.h, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -4502,9 +4480,8 @@ define half @global_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
@@ -4518,12 +4495,11 @@ define half @global_agent_atomic_fmax_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -4892,35 +4868,30 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v5, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -4931,7 +4902,7 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB27_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: global_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -4944,15 +4915,13 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -4960,12 +4929,11 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -5348,35 +5316,30 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v5, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -5387,7 +5350,7 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB28_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: global_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_grained_memory:
@@ -5400,15 +5363,13 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -5416,12 +5377,11 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -5806,9 +5766,8 @@ define void @global_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
@@ -5822,10 +5781,9 @@ define void @global_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v3.l, v3.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -5850,9 +5808,8 @@ define void @global_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
@@ -5865,12 +5822,10 @@ define void @global_agent_atomic_fmax_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6230,37 +6185,33 @@ define void @global_agent_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_g
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v6, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6277,37 +6228,33 @@ define void @global_agent_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_g
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6673,37 +6620,33 @@ define void @global_agent_atomic_fmax_noret_f16__offset12b_neg__amdgpu_no_fine_g
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v6, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6720,37 +6663,33 @@ define void @global_agent_atomic_fmax_noret_f16__offset12b_neg__amdgpu_no_fine_g
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0xfffff800, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -7118,7 +7057,6 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_pos__align4__amdgpu_no_
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: global_load_b32 v3, v[0:1], off offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -7126,9 +7064,7 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_pos__align4__amdgpu_no_
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7153,17 +7089,15 @@ define half @global_agent_atomic_fmax_ret_f16__offset12b_pos__align4__amdgpu_no_
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7458,15 +7392,13 @@ define void @global_agent_atomic_fmax_noret_f16__offset12b__align4_pos__amdgpu_n
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v2.h, v2.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7490,24 +7422,21 @@ define void @global_agent_atomic_fmax_noret_f16__offset12b__align4_pos__amdgpu_n
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v2, v2
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off offset:2046
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v3, v3
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -7785,36 +7714,31 @@ define half @global_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v5, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -7825,7 +7749,7 @@ define half @global_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB34_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: global_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -7838,15 +7762,13 @@ define half @global_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -7854,12 +7776,11 @@ define half @global_system_atomic_fmax_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
@@ -8246,38 +8167,34 @@ define void @global_system_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v6, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8294,38 +8211,34 @@ define void @global_system_atomic_fmax_noret_f16__offset12b_pos__amdgpu_no_fine_
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -13580,15 +13493,13 @@ define <2 x half> @global_agent_atomic_fmax_ret_v2f16__amdgpu_no_fine_grained_me
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB46_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -13862,15 +13773,13 @@ define <2 x half> @global_agent_atomic_fmax_ret_v2f16__offset12b_pos__amdgpu_no_
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB47_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -14146,15 +14055,13 @@ define <2 x half> @global_agent_atomic_fmax_ret_v2f16__offset12b_neg__amdgpu_no_
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB48_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -14437,21 +14344,18 @@ define void @global_agent_atomic_fmax_noret_v2f16__amdgpu_no_fine_grained_memory
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB49_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14706,21 +14610,18 @@ define void @global_agent_atomic_fmax_noret_v2f16__offset12b_pos__amdgpu_no_fine
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB50_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14978,21 +14879,18 @@ define void @global_agent_atomic_fmax_noret_v2f16__offset12b_neg__amdgpu_no_fine
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off offset:-2048
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB51_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15259,15 +15157,13 @@ define <2 x half> @global_system_atomic_fmax_ret_v2f16__offset12b_pos__amdgpu_no
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB52_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -15546,22 +15442,19 @@ define void @global_system_atomic_fmax_noret_v2f16__offset12b_pos__amdgpu_no_fin
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB53_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
diff --git a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
index b8217cf862b3a..6050a495b723d 100644
--- a/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
@@ -3015,15 +3015,13 @@ define double @global_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory(p
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -3188,15 +3186,13 @@ define double @global_agent_atomic_fmin_ret_f64__offset12b_pos__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:2040
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB19_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:2040 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -3362,15 +3358,13 @@ define double @global_agent_atomic_fmin_ret_f64__offset12b_neg__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:-2048
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -3535,21 +3529,18 @@ define void @global_agent_atomic_fmin_noret_f64__amdgpu_no_fine_grained_memory(p
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
+; GFX12-NEXT: global_load_b64 v[6:7], v[0:1], off
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3698,21 +3689,18 @@ define void @global_agent_atomic_fmin_noret_f64__offset12b_pos__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:2040
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
+; GFX12-NEXT: global_load_b64 v[6:7], v[0:1], off offset:2040
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB22_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5], off offset:2040 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:2040 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -3864,21 +3852,18 @@ define void @global_agent_atomic_fmin_noret_f64__offset12b_neg__amdgpu_no_fine_g
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off offset:-2048
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[2:3], v[2:3]
+; GFX12-NEXT: global_load_b64 v[6:7], v[0:1], off offset:-2048
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB23_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[4:5]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b64 v[2:3], v[0:1], v[2:5], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
-; GFX12-NEXT: v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
+; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -4031,15 +4016,13 @@ define double @global_agent_atomic_fmin_ret_f64__amdgpu_no_remote_memory(ptr add
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB24_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -4279,15 +4262,13 @@ define double @global_agent_atomic_fmin_ret_f64__amdgpu_no_fine_grained_memory__
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b64 v[4:5], v[0:1], off
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB25_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[6:7], v[6:7]
-; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[2:3]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[6:7], v[2:3]
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b64 v[4:5], v[0:1], v[4:7], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -4456,9 +4437,8 @@ define half @global_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
@@ -4473,11 +4453,9 @@ define half @global_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v2.h, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -4502,9 +4480,8 @@ define half @global_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
@@ -4518,12 +4495,11 @@ define half @global_agent_atomic_fmin_ret_f16__amdgpu_no_fine_grained_memory(ptr
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -4892,35 +4868,30 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v5, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -4931,7 +4902,7 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB27_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: global_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -4944,15 +4915,13 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -4960,12 +4929,11 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -5348,35 +5316,30 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v5, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -5387,7 +5350,7 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB28_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: global_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_grained_memory:
@@ -5400,15 +5363,13 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -5416,12 +5377,11 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_neg__amdgpu_no_fine_gra
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -5806,9 +5766,8 @@ define void @global_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
@@ -5822,10 +5781,9 @@ define void @global_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v3.l, v3.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -5850,9 +5808,8 @@ define void @global_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
@@ -5865,12 +5822,10 @@ define void @global_agent_atomic_fmin_noret_f16__amdgpu_no_fine_grained_memory(p
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -6230,37 +6185,33 @@ define void @global_agent_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_g
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v6, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6277,37 +6228,33 @@ define void @global_agent_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_g
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6673,37 +6620,33 @@ define void @global_agent_atomic_fmin_noret_f16__offset12b_neg__amdgpu_no_fine_g
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0xfffff800, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, -1, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v6, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -6720,37 +6663,33 @@ define void @global_agent_atomic_fmin_noret_f16__offset12b_neg__amdgpu_no_fine_g
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0xfffff800, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0xfffff800, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, -1, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -7118,7 +7057,6 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_pos__align4__amdgpu_no_
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: global_load_b32 v3, v[0:1], off offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -7126,9 +7064,7 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_pos__align4__amdgpu_no_
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v2.h, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7153,17 +7089,15 @@ define half @global_agent_atomic_fmin_ret_f16__offset12b_pos__align4__amdgpu_no_
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB32_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v4, v4
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7458,15 +7392,13 @@ define void @global_agent_atomic_fmin_noret_f16__offset12b__align4_pos__amdgpu_n
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off offset:2046
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v2.l, v2.l
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
; GFX12-TRUE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.h, v4.l, v4.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v4.l, v2.l
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v2.h, v2.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
@@ -7490,24 +7422,21 @@ define void @global_agent_atomic_fmin_noret_f16__offset12b__align4_pos__amdgpu_n
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off offset:2046
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v2, v2
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off offset:2046
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: .LBB33_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v3, v3
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2046 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -7785,36 +7714,31 @@ define half @global_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v5, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v6, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v6
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v5, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-TRUE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v5.l, v2.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
@@ -7825,7 +7749,7 @@ define half @global_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB34_1
; GFX12-TRUE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v1, v5
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v3, v5
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: global_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_grained_memory:
@@ -7838,15 +7762,13 @@ define half @global_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
-; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
; GFX12-FAKE16-NEXT: global_load_b32 v5, v[0:1], off
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_not_b32_e32 v4, v4
; GFX12-FAKE16-NEXT: .LBB34_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -7854,12 +7776,11 @@ define half @global_system_atomic_fmin_ret_f16__offset12b_pos__amdgpu_no_fine_gr
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v6
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v5, v5, v5
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v5, v5, v2
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v5
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, v3, v5
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v4, v5
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
@@ -8246,38 +8167,34 @@ define void @global_system_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_co_u32 v0, vcc_lo, 0x7fe, v0
+; GFX12-TRUE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)
-; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
+; GFX12-TRUE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX12-TRUE16-NEXT: s_mov_b32 s0, 0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, -4, v0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 3, v0
-; GFX12-TRUE16-NEXT: global_load_b32 v6, v[3:4], off
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 3, v0
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v5, v1, 0xffff
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v5
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-TRUE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-TRUE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-TRUE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v1, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v0.h, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v1, v5
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v2, v5
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, v3.l, v2.l
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-TRUE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
-; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v5, v[3:4], v[5:6], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-TRUE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v6
-; GFX12-TRUE16-NEXT: v_mov_b32_e32 v6, v5
+; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-TRUE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -8294,38 +8211,34 @@ define void @global_system_atomic_fmin_noret_f16__offset12b_pos__amdgpu_no_fine_
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_co_u32 v4, vcc_lo, 0x7fe, v0
+; GFX12-FAKE16-NEXT: v_add_co_u32 v3, vcc_lo, 0x7fe, v0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-FAKE16-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v2, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 3, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 3, v4
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v5, v4, 0xffff
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v5, v5
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, -4, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 3, v3
+; GFX12-FAKE16-NEXT: global_load_b32 v4, v[0:1], off
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v5, 0xffff
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v6, v3
; GFX12-FAKE16-NEXT: .LBB35_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v4, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v5, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, v2, v6
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, v3, v2
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v4, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v3, v5, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v5, v3
+; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v6, v3
; GFX12-FAKE16-NEXT: global_wb scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-FAKE16-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -13580,15 +13493,13 @@ define <2 x half> @global_agent_atomic_fmin_ret_v2f16__amdgpu_no_fine_grained_me
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB46_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -13862,15 +13773,13 @@ define <2 x half> @global_agent_atomic_fmin_ret_v2f16__offset12b_pos__amdgpu_no_
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB47_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -14146,15 +14055,13 @@ define <2 x half> @global_agent_atomic_fmin_ret_v2f16__offset12b_neg__amdgpu_no_
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB48_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
@@ -14437,21 +14344,18 @@ define void @global_agent_atomic_fmin_noret_v2f16__amdgpu_no_fine_grained_memory
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB49_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14706,21 +14610,18 @@ define void @global_agent_atomic_fmin_noret_v2f16__offset12b_pos__amdgpu_no_fine
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB50_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -14978,21 +14879,18 @@ define void @global_agent_atomic_fmin_noret_v2f16__offset12b_neg__amdgpu_no_fine
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:-2048
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off offset:-2048
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB51_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:-2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_DEV
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -15259,15 +15157,13 @@ define <2 x half> @global_system_atomic_fmin_ret_v2f16__offset12b_pos__amdgpu_no
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB52_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v4, v4
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v2
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
@@ -15546,22 +15442,19 @@ define void @global_system_atomic_fmin_noret_v2f16__offset12b_pos__amdgpu_no_fin
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v3, v[0:1], off offset:2044
-; GFX12-NEXT: v_pk_max_num_f16 v4, v2, v2
+; GFX12-NEXT: global_load_b32 v4, v[0:1], off offset:2044
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB53_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v4
+; GFX12-NEXT: v_pk_min_num_f16 v3, v4, v2
; GFX12-NEXT: global_wb scope:SCOPE_SYS
; GFX12-NEXT: s_wait_storecnt 0x0
-; GFX12-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
+; GFX12-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2044 th:TH_ATOMIC_RETURN scope:SCOPE_SYS
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: global_inv scope:SCOPE_SYS
-; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
-; GFX12-NEXT: v_mov_b32_e32 v3, v2
+; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-NEXT: v_mov_b32_e32 v4, v3
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
diff --git a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
index 43d77d0afa8c6..2af2849248a6a 100644
--- a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
@@ -790,11 +790,9 @@ define half @local_atomic_fmax_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v3.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, 4.0, v3.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
@@ -821,29 +819,28 @@ define half @local_atomic_fmax_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, -4, v0
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: ds_load_b32 v3, v1
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v0, 0xffff
+; GFX12-FAKE16-NEXT: ds_load_b32 v2, v1
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v0, 0xffff
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 24, v0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-FAKE16-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, 4.0, v3
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, 4.0, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
+; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v1, v2, v4
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -851,7 +848,7 @@ define half @local_atomic_fmax_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB8_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmax_ret_f16:
@@ -1182,11 +1179,9 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v3.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, 4.0, v3.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
@@ -1226,12 +1221,11 @@ define half @local_atomic_fmax_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, 4.0, v3
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
@@ -1585,11 +1579,9 @@ define void @local_atomic_fmax_noret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, v0, v2
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v4.l, v4.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, 4.0, v4.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, v0, v4
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v4, v2, v3, v4
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v4, v1, v4, v2
@@ -1626,12 +1618,11 @@ define void @local_atomic_fmax_noret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v0, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, 4.0, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v0, v4
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v4, v2, v3, v4
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v4, v1, v4, v2
@@ -1966,10 +1957,9 @@ define void @local_atomic_fmax_noret_f16__offset(ptr addrspace(3) %ptr) nounwind
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, v1, v3
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v4.l, v4.l
; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, 4.0, v4.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, v1, v4
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v4, v3, v2, v4
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v4, v0, v4, v3
@@ -2008,12 +1998,10 @@ define void @local_atomic_fmax_noret_f16__offset(ptr addrspace(3) %ptr) nounwind
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v1, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, 4.0, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v1, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v4, v3, v2, v4
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v4, v0, v4, v3
@@ -2351,9 +2339,7 @@ define half @local_atomic_fmax_ret_f16__offset__align4(ptr addrspace(3) %ptr) no
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, v1
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, 4.0, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, 4.0, v2.l
; GFX12-TRUE16-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2 offset:65534
@@ -2384,10 +2370,9 @@ define half @local_atomic_fmax_ret_f16__offset__align4(ptr addrspace(3) %ptr) no
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, v1
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v2, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, 4.0, v1
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, 4.0, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2 offset:65534
@@ -2656,10 +2641,9 @@ define void @local_atomic_fmax_noret_f16__offset__align4(ptr addrspace(3) %ptr)
; GFX12-TRUE16-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v1.l, v1.l
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, 4.0, v1.l
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, 4.0, v2.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v2, 0xffff0000, v1, v2
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v1 offset:65534
@@ -2688,11 +2672,9 @@ define void @local_atomic_fmax_noret_f16__offset__align4(ptr addrspace(3) %ptr)
; GFX12-FAKE16-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v1, v1
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, 4.0, v1
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, 4.0, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v1, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v1 offset:65534
@@ -5508,15 +5490,13 @@ define <2 x half> @local_atomic_fmax_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v3, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3
; GFX12-NEXT: s_wait_dscnt 0x0
@@ -5771,15 +5751,13 @@ define <2 x half> @local_atomic_fmax_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0 offset:65532
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v3, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
@@ -6036,14 +6014,11 @@ define void @local_atomic_fmax_noret_v2f16(ptr addrspace(3) %ptr, <2 x half> %va
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB22_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v2, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v1
+; GFX12-NEXT: v_pk_max_num_f16 v3, v2, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v2
; GFX12-NEXT: s_wait_dscnt 0x0
@@ -6285,14 +6260,11 @@ define void @local_atomic_fmax_noret_v2f16__offset(ptr addrspace(3) %ptr, <2 x h
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0 offset:65532
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB23_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v2, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v1
+; GFX12-NEXT: v_pk_max_num_f16 v3, v2, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v2 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
diff --git a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
index 1759a212c6ea3..56c15ba92c8ca 100644
--- a/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
@@ -790,11 +790,9 @@ define half @local_atomic_fmin_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v3.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, 4.0, v3.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
@@ -821,29 +819,28 @@ define half @local_atomic_fmin_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, -4, v0
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0
-; GFX12-FAKE16-NEXT: ds_load_b32 v3, v1
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v2, v0, 0xffff
+; GFX12-FAKE16-NEXT: ds_load_b32 v2, v1
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v0, 0xffff
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 24, v0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
-; GFX12-FAKE16-NEXT: v_not_b32_e32 v2, v2
+; GFX12-FAKE16-NEXT: v_not_b32_e32 v3, v3
; GFX12-FAKE16-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v0, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
+; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, 4.0, v3
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, v0, v4
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, 4.0, v2
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v0, v3
-; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v0, v2
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
-; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v1, v3, v4
+; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v1, v2, v4
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: global_inv scope:SCOPE_SE
-; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
+; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
@@ -851,7 +848,7 @@ define half @local_atomic_fmin_ret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB8_1
; GFX12-FAKE16-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v3
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v0, v2
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: local_atomic_fmin_ret_f16:
@@ -1182,11 +1179,9 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v3.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v3.l, v3.l, v3.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v3.l, 4.0, v3.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v3, v4, v2, v3
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
@@ -1226,12 +1221,11 @@ define half @local_atomic_fmin_ret_f16__offset(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, v1, v4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v3, v3, v3
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v3, 4.0, v3
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v1, v3
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v3, v4, v2, v3
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v4
@@ -1585,11 +1579,9 @@ define void @local_atomic_fmin_noret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, v0, v2
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v4.l, v4.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v4.l, 4.0, v4.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, v0, v4
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v4, v2, v3, v4
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v4, v1, v4, v2
@@ -1626,12 +1618,11 @@ define void @local_atomic_fmin_noret_f16(ptr addrspace(3) %ptr) nounwind {
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v0, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v4, 4.0, v4
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v0, v4
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v4, v2, v3, v4
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v4, v1, v4, v2
@@ -1966,10 +1957,9 @@ define void @local_atomic_fmin_noret_f16__offset(ptr addrspace(3) %ptr) nounwind
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v4, v1, v3
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v4.l, v4.l
; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v4.l, 4.0, v4.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v4, v1, v4
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v4, v3, v2, v4
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v4, v0, v4, v3
@@ -2008,12 +1998,10 @@ define void @local_atomic_fmin_noret_f16__offset(ptr addrspace(3) %ptr) nounwind
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v1, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v4, 4.0, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v1, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v4, v3, v2, v4
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v4, v0, v4, v3
@@ -2351,9 +2339,7 @@ define half @local_atomic_fmin_ret_f16__offset__align4(ptr addrspace(3) %ptr) no
; GFX12-TRUE16-NEXT: v_mov_b32_e32 v2, v1
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, 4.0, v1.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, 4.0, v2.l
; GFX12-TRUE16-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2 offset:65534
@@ -2384,10 +2370,9 @@ define half @local_atomic_fmin_ret_f16__offset__align4(ptr addrspace(3) %ptr) no
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
; GFX12-FAKE16-NEXT: v_mov_b32_e32 v2, v1
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v2, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v1, 4.0, v1
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v1, 4.0, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v1, v0, v1, v2 offset:65534
@@ -2656,10 +2641,9 @@ define void @local_atomic_fmin_noret_f16__offset__align4(ptr addrspace(3) %ptr)
; GFX12-TRUE16-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-TRUE16-NEXT: s_wait_dscnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v2.l, v1.l, v1.l
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v2.l, 4.0, v1.l
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v2.l, 4.0, v2.l
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v2, 0xffff0000, v1, v2
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v1 offset:65534
@@ -2688,11 +2672,9 @@ define void @local_atomic_fmin_noret_f16__offset__align4(ptr addrspace(3) %ptr)
; GFX12-FAKE16-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-FAKE16-NEXT: s_wait_dscnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v1, v1
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, 4.0, v1
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v2, 4.0, v2
; GFX12-FAKE16-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v2, 0xffff0000, v1, v2
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v1 offset:65534
@@ -5508,15 +5490,13 @@ define <2 x half> @local_atomic_fmin_ret_v2f16(ptr addrspace(3) %ptr, <2 x half>
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v3, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v2, v3, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3
; GFX12-NEXT: s_wait_dscnt 0x0
@@ -5771,15 +5751,13 @@ define <2 x half> @local_atomic_fmin_ret_v2f16__offset(ptr addrspace(3) %ptr, <2
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0 offset:65532
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v3, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_pk_max_num_f16 v2, v3, v3
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_pk_min_num_f16 v2, v3, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v2, v0, v2, v3 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
@@ -6036,14 +6014,11 @@ define void @local_atomic_fmin_noret_v2f16(ptr addrspace(3) %ptr, <2 x half> %va
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB22_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v2, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v1
+; GFX12-NEXT: v_pk_min_num_f16 v3, v2, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v2
; GFX12-NEXT: s_wait_dscnt 0x0
@@ -6285,14 +6260,11 @@ define void @local_atomic_fmin_noret_v2f16__offset(ptr addrspace(3) %ptr, <2 x h
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: ds_load_b32 v2, v0 offset:65532
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: .LBB23_1: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-NEXT: s_wait_dscnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v3, v2, v2
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v1
+; GFX12-NEXT: v_pk_min_num_f16 v3, v2, v1
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: ds_cmpstore_rtn_b32 v3, v0, v3, v2 offset:65532
; GFX12-NEXT: s_wait_dscnt 0x0
diff --git a/llvm/test/CodeGen/AMDGPU/maximumnum.ll b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
index 644d3e139b3dd..9f1bc3c2c16c1 100644
--- a/llvm/test/CodeGen/AMDGPU/maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
@@ -144,10 +144,7 @@ define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16:
@@ -162,9 +159,6 @@ define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -184,10 +178,7 @@ define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16:
@@ -210,9 +201,6 @@ define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -233,10 +221,7 @@ define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16:
@@ -253,9 +238,6 @@ define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -416,63 +398,109 @@ define half @v_maximumnum_f16_1.0(half %x) #1 {
; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, 1.0, v0
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_1.0:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_1.0:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half 1.0)
ret half %result
}
@@ -561,8 +589,6 @@ define float @v_maximumnum_f32(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -581,8 +607,6 @@ define float @v_maximumnum_f32(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -602,8 +626,6 @@ define float @v_maximumnum_f32(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -762,9 +784,6 @@ define double @v_maximumnum_f64(double %x, double %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -784,9 +803,6 @@ define double @v_maximumnum_f64(double %x, double %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -807,9 +823,6 @@ define double @v_maximumnum_f64(double %x, double %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -920,34 +933,57 @@ define float @v_maximumnum_f32_1.0(float %x) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, 1.0, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f32_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_f32_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_f32_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_f32_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -993,34 +1029,63 @@ define float @v_maximumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%canon.y = call float @llvm.canonicalize.f32(float %y)
%result = call float @llvm.maximumnum.f32(float %x, float %canon.y)
ret float %result
@@ -1067,34 +1132,63 @@ define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.maximumnum.f32(float %canon.x, float %y)
ret float %result
@@ -1212,34 +1306,57 @@ define double @v_maximumnum_f64_1.0(double %x) #1 {
; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f64_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_f64_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_f64_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_f64_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double 1.0)
ret double %result
}
@@ -1366,10 +1483,7 @@ define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
@@ -1384,10 +1498,7 @@ define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
@@ -1406,10 +1517,7 @@ define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
@@ -1432,10 +1540,7 @@ define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
@@ -1455,10 +1560,7 @@ define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
@@ -1475,10 +1577,7 @@ define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
@@ -1616,10 +1715,7 @@ define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
@@ -1634,10 +1730,7 @@ define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
@@ -1656,10 +1749,7 @@ define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
@@ -1682,10 +1772,7 @@ define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
@@ -1705,10 +1792,7 @@ define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
@@ -1725,10 +1809,7 @@ define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
@@ -1907,18 +1988,18 @@ define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX1170-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
; GFX12-TRUE16-GISEL: ; %bb.0:
@@ -1938,19 +2019,6 @@ define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
; GFX12-FAKE16-GISEL: ; %bb.0:
; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -1969,15 +2037,14 @@ define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: s_max_num_f16 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
; GFX1251-TRUE16-GISEL: ; %bb.0:
@@ -1989,16 +2056,6 @@ define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
; GFX1251-FAKE16-GISEL: ; %bb.0:
; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -2114,10 +2171,7 @@ define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32_s_v:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f32_s_v:
@@ -2136,10 +2190,7 @@ define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f32_s_v:
@@ -2159,10 +2210,7 @@ define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_v:
@@ -2280,10 +2328,7 @@ define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32_v_s:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f32_v_s:
@@ -2302,10 +2347,7 @@ define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f32_v_s:
@@ -2325,10 +2367,7 @@ define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f32_v_s:
@@ -2472,10 +2511,10 @@ define float @v_maximumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX12-SDAG-NEXT: s_max_num_f32 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f32_s_s:
@@ -2500,10 +2539,9 @@ define float @v_maximumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: s_max_num_f32 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_s:
@@ -2601,37 +2639,60 @@ define double @v_maximumnum_f64_s_v(double inreg %x, double %y) #1 {
; GFX11-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f64_s_v:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[2:3], v[0:1]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[0:1], v[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_f64_s_v:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[2:3], v[0:1]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_f64_s_v:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -2718,37 +2779,60 @@ define double @v_maximumnum_f64_v_s(double %x, double inreg %y) #1 {
; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f64_v_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], s[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_f64_v_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_f64_v_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -2855,10 +2939,7 @@ define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f64_s_s:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[2:3], s[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[2:3], v[0:1]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[0:1], s[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f64_s_s:
@@ -2877,10 +2958,7 @@ define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f64_s_s:
@@ -2900,10 +2978,7 @@ define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f64_s_s:
@@ -3005,10 +3080,7 @@ define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
@@ -3027,10 +3099,7 @@ define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
@@ -3050,10 +3119,7 @@ define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
@@ -3156,10 +3222,7 @@ define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
@@ -3178,10 +3241,7 @@ define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
@@ -3201,10 +3261,7 @@ define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
@@ -3308,10 +3365,7 @@ define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32_fabs:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f32_fabs:
@@ -3330,10 +3384,7 @@ define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f32_fabs:
@@ -3353,10 +3404,7 @@ define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs:
@@ -3460,10 +3508,7 @@ define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32_fneg:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f32_fneg:
@@ -3482,10 +3527,7 @@ define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f32_fneg:
@@ -3505,9 +3547,7 @@ define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, -v1, -v1 :: v_dual_max_num_f32 v0, -v0, -v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg:
@@ -3630,10 +3670,7 @@ define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
@@ -3648,10 +3685,7 @@ define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
@@ -3670,10 +3704,7 @@ define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
@@ -3696,10 +3727,7 @@ define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
@@ -3719,10 +3747,7 @@ define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
@@ -3739,10 +3764,7 @@ define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
@@ -3865,10 +3887,7 @@ define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
@@ -3883,10 +3902,7 @@ define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
@@ -3905,10 +3921,7 @@ define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
@@ -3931,10 +3944,7 @@ define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
@@ -3954,10 +3964,7 @@ define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
@@ -3974,10 +3981,7 @@ define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
@@ -4101,10 +4105,7 @@ define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
@@ -4119,10 +4120,7 @@ define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
@@ -4141,10 +4139,7 @@ define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
@@ -4167,10 +4162,7 @@ define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
@@ -4190,10 +4182,7 @@ define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
@@ -4210,10 +4199,7 @@ define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
@@ -4337,10 +4323,7 @@ define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
@@ -4355,10 +4338,7 @@ define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
@@ -4377,10 +4357,7 @@ define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
@@ -4403,10 +4380,7 @@ define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
@@ -4426,10 +4400,7 @@ define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
@@ -4446,10 +4417,7 @@ define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
@@ -4553,10 +4521,7 @@ define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_f64_fneg:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_f64_fneg:
@@ -4575,10 +4540,7 @@ define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_f64_fneg:
@@ -4598,10 +4560,7 @@ define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_f64_fneg:
@@ -4749,9 +4708,6 @@ define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v2f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -4771,9 +4727,6 @@ define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -4794,9 +4747,6 @@ define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -5064,11 +5014,6 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v3f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5092,11 +5037,6 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5121,11 +5061,6 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -5456,11 +5391,6 @@ define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v4f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5484,11 +5414,6 @@ define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5513,11 +5438,6 @@ define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -5923,14 +5843,7 @@ define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v6f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5957,14 +5870,7 @@ define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5992,14 +5898,7 @@ define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -6339,18 +6238,9 @@ define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v8f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -6379,18 +6269,9 @@ define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -6420,18 +6301,9 @@ define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -7019,30 +6891,14 @@ define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v16f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v11
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_v16f16:
@@ -7081,30 +6937,14 @@ define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v11
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_v16f16:
@@ -7144,30 +6984,14 @@ define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v11
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_v16f16:
@@ -8323,37 +8147,6 @@ define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
@@ -8370,9 +8163,7 @@ define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_v32f16:
@@ -8439,37 +8230,6 @@ define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
@@ -8486,9 +8246,7 @@ define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_v32f16:
@@ -8556,37 +8314,6 @@ define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
@@ -8603,16 +8330,14 @@ define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_v32f16:
; GFX1251-GISEL: ; %bb.0:
; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32 nv
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
@@ -8778,9 +8503,6 @@ define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v2f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -8800,9 +8522,6 @@ define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -8823,9 +8542,6 @@ define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -9041,10 +8757,6 @@ define <3 x float> @v_maximumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v3f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9067,10 +8779,6 @@ define <3 x float> @v_maximumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9094,10 +8802,6 @@ define <3 x float> @v_maximumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -9350,11 +9054,6 @@ define <4 x float> @v_maximumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v4f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9378,11 +9077,6 @@ define <4 x float> @v_maximumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9407,11 +9101,6 @@ define <4 x float> @v_maximumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -9643,11 +9332,6 @@ define <2 x double> @v_maximumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v2f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9671,11 +9355,6 @@ define <2 x double> @v_maximumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9700,9 +9379,6 @@ define <2 x double> @v_maximumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -9966,14 +9642,7 @@ define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v3f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[8:9]
; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[10:11]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -10000,14 +9669,7 @@ define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -10035,14 +9697,7 @@ define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -10348,18 +10003,9 @@ define <4 x double> @v_maximumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX1170-SDAG-LABEL: v_maximumnum_v4f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[12:13], v[12:13], v[12:13]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[14:15], v[14:15], v[14:15]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[10:11]
; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[14:15]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10388,18 +10034,9 @@ define <4 x double> @v_maximumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10429,11 +10066,6 @@ define <4 x double> @v_maximumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[8:11]
; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[12:15]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -10598,10 +10230,7 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
@@ -10616,9 +10245,6 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10638,10 +10264,7 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
@@ -10664,9 +10287,6 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10687,10 +10307,7 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
@@ -10707,9 +10324,6 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -10858,8 +10472,6 @@ define float @v_maximumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX1170-SDAG-LABEL: v_maximumnum_f32_no_ieee:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10878,8 +10490,6 @@ define float @v_maximumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10899,8 +10509,6 @@ define float @v_maximumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -11007,9 +10615,6 @@ define double @v_maximumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX1170-SDAG-LABEL: v_maximumnum_f64_no_ieee:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -11029,9 +10634,6 @@ define double @v_maximumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -11052,9 +10654,6 @@ define double @v_maximumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -11200,9 +10799,6 @@ define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX1170-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -11222,9 +10818,6 @@ define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -11245,9 +10838,6 @@ define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/minimumnum.ll b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
index af48913e04995..9e1b3ad5effea 100644
--- a/llvm/test/CodeGen/AMDGPU/minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
@@ -144,10 +144,7 @@ define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16:
@@ -162,9 +159,6 @@ define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -184,10 +178,7 @@ define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16:
@@ -210,9 +201,6 @@ define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -233,10 +221,7 @@ define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16:
@@ -253,9 +238,6 @@ define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -416,63 +398,109 @@ define half @v_minimumnum_f16_1.0(half %x) #1 {
; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, 1.0, v0
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_1.0:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_1.0:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half 1.0)
ret half %result
}
@@ -561,8 +589,6 @@ define float @v_minimumnum_f32(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -581,8 +607,6 @@ define float @v_minimumnum_f32(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -602,8 +626,6 @@ define float @v_minimumnum_f32(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -762,9 +784,6 @@ define double @v_minimumnum_f64(double %x, double %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -784,9 +803,6 @@ define double @v_minimumnum_f64(double %x, double %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -807,9 +823,6 @@ define double @v_minimumnum_f64(double %x, double %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -920,34 +933,57 @@ define float @v_minimumnum_f32_1.0(float %x) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, 1.0, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_f32_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_f32_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_f32_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -993,34 +1029,63 @@ define float @v_minimumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%canon.y = call float @llvm.canonicalize.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %x, float %canon.y)
ret float %result
@@ -1067,34 +1132,63 @@ define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.minimumnum.f32(float %canon.x, float %y)
ret float %result
@@ -1212,34 +1306,57 @@ define double @v_minimumnum_f64_1.0(double %x) #1 {
; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f64_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_f64_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_f64_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_f64_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double 1.0)
ret double %result
}
@@ -1366,10 +1483,7 @@ define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
@@ -1384,10 +1498,7 @@ define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
@@ -1406,10 +1517,7 @@ define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
@@ -1432,10 +1540,7 @@ define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
@@ -1455,10 +1560,7 @@ define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
@@ -1475,10 +1577,7 @@ define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
@@ -1657,18 +1756,18 @@ define half @v_minimumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX1170-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
; GFX12-TRUE16-GISEL: ; %bb.0:
@@ -1688,19 +1787,6 @@ define half @v_minimumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v1, v0
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
; GFX12-FAKE16-GISEL: ; %bb.0:
; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -1719,15 +1805,14 @@ define half @v_minimumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: s_min_num_f16 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
; GFX1251-TRUE16-GISEL: ; %bb.0:
@@ -1739,16 +1824,6 @@ define half @v_minimumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v1, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
; GFX1251-FAKE16-GISEL: ; %bb.0:
; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -1864,10 +1939,7 @@ define float @v_minimumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32_s_v:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f32_s_v:
@@ -1886,10 +1958,7 @@ define float @v_minimumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f32_s_v:
@@ -1909,10 +1978,7 @@ define float @v_minimumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_v:
@@ -2030,10 +2096,7 @@ define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32_v_s:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f32_v_s:
@@ -2052,10 +2115,7 @@ define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f32_v_s:
@@ -2075,10 +2135,7 @@ define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f32_v_s:
@@ -2222,10 +2279,10 @@ define float @v_minimumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX12-SDAG-NEXT: s_min_num_f32 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f32_s_s:
@@ -2250,10 +2307,9 @@ define float @v_minimumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: s_min_num_f32 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_s:
@@ -2351,37 +2407,60 @@ define double @v_minimumnum_f64_s_v(double inreg %x, double %y) #1 {
; GFX11-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f64_s_v:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[2:3], v[0:1]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], s[0:1], v[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_f64_s_v:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[2:3], v[0:1]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_f64_s_v:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -2468,37 +2547,60 @@ define double @v_minimumnum_f64_v_s(double %x, double inreg %y) #1 {
; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f64_v_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], s[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_f64_v_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_f64_v_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -2605,10 +2707,7 @@ define double @v_minimumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f64_s_s:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[2:3], s[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[2:3], v[0:1]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], s[0:1], s[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f64_s_s:
@@ -2627,10 +2726,7 @@ define double @v_minimumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f64_s_s:
@@ -2650,10 +2746,7 @@ define double @v_minimumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f64_s_s:
@@ -2755,10 +2848,7 @@ define float @v_minimumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
@@ -2777,10 +2867,7 @@ define float @v_minimumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
@@ -2800,10 +2887,7 @@ define float @v_minimumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
@@ -2906,10 +2990,7 @@ define float @v_minimumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
@@ -2928,10 +3009,7 @@ define float @v_minimumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
@@ -2951,10 +3029,7 @@ define float @v_minimumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
@@ -3058,10 +3133,7 @@ define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32_fabs:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f32_fabs:
@@ -3080,10 +3152,7 @@ define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f32_fabs:
@@ -3103,10 +3172,7 @@ define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs:
@@ -3210,10 +3276,7 @@ define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32_fneg:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f32_fneg:
@@ -3232,10 +3295,7 @@ define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f32_fneg:
@@ -3255,9 +3315,7 @@ define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, -v1, -v1 :: v_dual_max_num_f32 v0, -v0, -v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg:
@@ -3380,10 +3438,7 @@ define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
@@ -3398,10 +3453,7 @@ define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
@@ -3420,10 +3472,7 @@ define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
@@ -3446,10 +3495,7 @@ define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
@@ -3469,10 +3515,7 @@ define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
@@ -3489,10 +3532,7 @@ define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
@@ -3615,10 +3655,7 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
@@ -3633,10 +3670,7 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
@@ -3655,10 +3689,7 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
@@ -3681,10 +3712,7 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
@@ -3704,10 +3732,7 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
@@ -3724,10 +3749,7 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
@@ -3851,10 +3873,7 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
@@ -3869,10 +3888,7 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
@@ -3891,10 +3907,7 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
@@ -3917,10 +3930,7 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
@@ -3940,10 +3950,7 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
@@ -3960,10 +3967,7 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
@@ -4087,10 +4091,7 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
@@ -4105,10 +4106,7 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
@@ -4127,10 +4125,7 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
@@ -4153,10 +4148,7 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
@@ -4176,10 +4168,7 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
@@ -4196,10 +4185,7 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
@@ -4303,10 +4289,7 @@ define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_f64_fneg:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], -v[0:1], -v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_f64_fneg:
@@ -4325,10 +4308,7 @@ define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_f64_fneg:
@@ -4348,10 +4328,7 @@ define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_f64_fneg:
@@ -4499,9 +4476,6 @@ define <2 x half> @v_minimumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v2f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -4521,9 +4495,6 @@ define <2 x half> @v_minimumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -4544,9 +4515,6 @@ define <2 x half> @v_minimumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -4814,11 +4782,6 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v3f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -4842,11 +4805,6 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -4871,11 +4829,6 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -5206,11 +5159,6 @@ define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v4f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5234,11 +5182,6 @@ define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5263,11 +5206,6 @@ define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -5673,14 +5611,7 @@ define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v6f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5707,14 +5638,7 @@ define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -5742,14 +5666,7 @@ define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -6089,18 +6006,9 @@ define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v8f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -6129,18 +6037,9 @@ define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -6170,18 +6069,9 @@ define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -6769,30 +6659,14 @@ define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v16f16:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v8
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v9
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v10
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v11
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_v16f16:
@@ -6831,30 +6705,14 @@ define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v8
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v9
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v10
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v11
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_v16f16:
@@ -6894,30 +6752,14 @@ define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v8
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v9
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v10
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v11
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_v16f16:
@@ -8073,37 +7915,6 @@ define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
@@ -8120,9 +7931,7 @@ define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_v32f16:
@@ -8189,37 +7998,6 @@ define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
@@ -8236,9 +8014,7 @@ define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_v32f16:
@@ -8306,37 +8082,6 @@ define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
@@ -8353,16 +8098,14 @@ define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_v32f16:
; GFX1251-GISEL: ; %bb.0:
; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32 nv
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
@@ -8528,9 +8271,6 @@ define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v2f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -8550,9 +8290,6 @@ define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -8573,9 +8310,6 @@ define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -8791,10 +8525,6 @@ define <3 x float> @v_minimumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v3f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -8817,10 +8547,6 @@ define <3 x float> @v_minimumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -8844,10 +8570,6 @@ define <3 x float> @v_minimumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -9100,11 +8822,6 @@ define <4 x float> @v_minimumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v4f32:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9128,11 +8845,6 @@ define <4 x float> @v_minimumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9157,11 +8869,6 @@ define <4 x float> @v_minimumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -9393,11 +9100,6 @@ define <2 x double> @v_minimumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v2f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9421,11 +9123,6 @@ define <2 x double> @v_minimumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9450,9 +9147,6 @@ define <2 x double> @v_minimumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -9716,14 +9410,7 @@ define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v3f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[8:9]
; GFX1170-SDAG-NEXT: v_min_num_f64 v[4:5], v[4:5], v[10:11]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9750,14 +9437,7 @@ define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
@@ -9785,14 +9465,7 @@ define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -10098,18 +9771,9 @@ define <4 x double> @v_minimumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX1170-SDAG-LABEL: v_minimumnum_v4f64:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[12:13], v[12:13], v[12:13]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[14:15], v[14:15], v[14:15]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[10:11]
; GFX1170-SDAG-NEXT: v_min_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[6:7], v[6:7], v[14:15]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10138,18 +9802,9 @@ define <4 x double> @v_minimumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10179,11 +9834,6 @@ define <4 x double> @v_minimumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[8:11]
; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[4:7], v[4:7], v[12:15]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
@@ -10348,10 +9998,7 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
; GFX1170-TRUE16-SDAG: ; %bb.0:
; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
@@ -10366,9 +10013,6 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
; GFX1170-FAKE16-SDAG: ; %bb.0:
; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10388,10 +10032,7 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
@@ -10414,9 +10055,6 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10437,10 +10075,7 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1251-TRUE16-SDAG: ; %bb.0:
; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
@@ -10457,9 +10092,6 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX1251-FAKE16-SDAG: ; %bb.0:
; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -10608,8 +10240,6 @@ define float @v_minimumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX1170-SDAG-LABEL: v_minimumnum_f32_no_ieee:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10628,8 +10258,6 @@ define float @v_minimumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10649,8 +10277,6 @@ define float @v_minimumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -10757,9 +10383,6 @@ define double @v_minimumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX1170-SDAG-LABEL: v_minimumnum_f64_no_ieee:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10779,9 +10402,6 @@ define double @v_minimumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10802,9 +10422,6 @@ define double @v_minimumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
@@ -10950,9 +10567,6 @@ define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX1170-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
; GFX1170-SDAG: ; %bb.0:
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10972,9 +10586,6 @@ define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -10995,9 +10606,6 @@ define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/minmax.ll b/llvm/test/CodeGen/AMDGPU/minmax.ll
index 9599e09ab54cc..7de99ea6aab11 100644
--- a/llvm/test/CodeGen/AMDGPU/minmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/minmax.ll
@@ -566,8 +566,6 @@ define float @test_minmax_f32_ieee_true(float %a, float %b, float %c) {
; SDAG-GFX1170-LABEL: test_minmax_f32_ieee_true:
; SDAG-GFX1170: ; %bb.0:
; SDAG-GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1170-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; SDAG-GFX1170-NEXT: v_max_num_f32_e32 v2, v2, v2
; SDAG-GFX1170-NEXT: v_maxmin_num_f32 v0, v0, v1, v2
; SDAG-GFX1170-NEXT: s_setpc_b64 s[30:31]
;
@@ -586,8 +584,6 @@ define float @test_minmax_f32_ieee_true(float %a, float %b, float %c) {
; SDAG-GFX12-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX12-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX12-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX12-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; SDAG-GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2
; SDAG-GFX12-NEXT: v_maxmin_num_f32 v0, v0, v1, v2
; SDAG-GFX12-NEXT: s_setpc_b64 s[30:31]
;
@@ -607,8 +603,6 @@ define float @test_minmax_f32_ieee_true(float %a, float %b, float %c) {
; SDAG-GFX1250: ; %bb.0:
; SDAG-GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; SDAG-GFX1250-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1250-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; SDAG-GFX1250-NEXT: v_max_num_f32_e32 v2, v2, v2
; SDAG-GFX1250-NEXT: v_maxmin_num_f32 v0, v0, v1, v2
; SDAG-GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
@@ -757,8 +751,6 @@ define float @test_maxmin_f32_ieee_true(float %a, float %b, float %c) {
; SDAG-GFX1170-LABEL: test_maxmin_f32_ieee_true:
; SDAG-GFX1170: ; %bb.0:
; SDAG-GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1170-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; SDAG-GFX1170-NEXT: v_max_num_f32_e32 v2, v2, v2
; SDAG-GFX1170-NEXT: v_minmax_num_f32 v0, v0, v1, v2
; SDAG-GFX1170-NEXT: s_setpc_b64 s[30:31]
;
@@ -777,8 +769,6 @@ define float @test_maxmin_f32_ieee_true(float %a, float %b, float %c) {
; SDAG-GFX12-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX12-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX12-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX12-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; SDAG-GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2
; SDAG-GFX12-NEXT: v_minmax_num_f32 v0, v0, v1, v2
; SDAG-GFX12-NEXT: s_setpc_b64 s[30:31]
;
@@ -798,8 +788,6 @@ define float @test_maxmin_f32_ieee_true(float %a, float %b, float %c) {
; SDAG-GFX1250: ; %bb.0:
; SDAG-GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; SDAG-GFX1250-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1250-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; SDAG-GFX1250-NEXT: v_max_num_f32_e32 v2, v2, v2
; SDAG-GFX1250-NEXT: v_minmax_num_f32 v0, v0, v1, v2
; SDAG-GFX1250-NEXT: s_set_pc_i64 s[30:31]
;
@@ -1224,18 +1212,12 @@ define half @test_minmax_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX1170-TRUE16-LABEL: test_minmax_commuted_f16_ieee_true:
; SDAG-GFX1170-TRUE16: ; %bb.0:
; SDAG-GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; SDAG-GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; SDAG-GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; SDAG-GFX1170-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v0.h, v1.l
+; SDAG-GFX1170-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v1.l, v2.l
; SDAG-GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; SDAG-GFX1170-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:
; SDAG-GFX1170-FAKE16: ; %bb.0:
; SDAG-GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; SDAG-GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; SDAG-GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; SDAG-GFX1170-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v2
; SDAG-GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1264,10 +1246,7 @@ define half @test_minmax_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; SDAG-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v0.h, v1.l
+; SDAG-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v1.l, v2.l
; SDAG-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; SDAG-GFX12-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:
@@ -1277,9 +1256,6 @@ define half @test_minmax_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; SDAG-GFX12-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v2
; SDAG-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1313,19 +1289,13 @@ define half @test_minmax_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX1250-TRUE16: ; %bb.0:
; SDAG-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; SDAG-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; SDAG-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v0.h, v1.l
+; SDAG-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v1.l, v2.l
; SDAG-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]
;
; SDAG-GFX1250-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:
; SDAG-GFX1250-FAKE16: ; %bb.0:
; SDAG-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; SDAG-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; SDAG-GFX1250-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v2
; SDAG-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
;
@@ -1482,18 +1452,12 @@ define half @test_maxmin_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX1170-TRUE16-LABEL: test_maxmin_commuted_f16_ieee_true:
; SDAG-GFX1170-TRUE16: ; %bb.0:
; SDAG-GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; SDAG-GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; SDAG-GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; SDAG-GFX1170-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v0.h, v1.l
+; SDAG-GFX1170-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v1.l, v2.l
; SDAG-GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; SDAG-GFX1170-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:
; SDAG-GFX1170-FAKE16: ; %bb.0:
; SDAG-GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; SDAG-GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; SDAG-GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; SDAG-GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; SDAG-GFX1170-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v2
; SDAG-GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1522,10 +1486,7 @@ define half @test_maxmin_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; SDAG-GFX12-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v0.h, v1.l
+; SDAG-GFX12-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v1.l, v2.l
; SDAG-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; SDAG-GFX12-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:
@@ -1535,9 +1496,6 @@ define half @test_maxmin_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; SDAG-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; SDAG-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; SDAG-GFX12-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v2
; SDAG-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1571,19 +1529,13 @@ define half @test_maxmin_commuted_f16_ieee_true(half %a, half %b, half %c) {
; SDAG-GFX1250-TRUE16: ; %bb.0:
; SDAG-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; SDAG-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l
-; SDAG-GFX1250-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v0.h, v1.l
+; SDAG-GFX1250-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v1.l, v2.l
; SDAG-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]
;
; SDAG-GFX1250-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:
; SDAG-GFX1250-FAKE16: ; %bb.0:
; SDAG-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; SDAG-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
-; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v2
; SDAG-GFX1250-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v2
; SDAG-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll b/llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
index a8f5d1d1bc4b4..f5f3ddf880987 100644
--- a/llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
+++ b/llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
@@ -22,9 +22,8 @@ define float @v_max3_maxnum_tree4_f32(float %a, float %b, float %c, float %d) {
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: v_max3_num_f32 v0, v0, v1, v2
-; GFX1250-NEXT: v_max_num_f32_e32 v1, v3, v3
; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1250-NEXT: v_max_num_f32_e32 v0, v0, v3
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%max.ab = call float @llvm.maxnum.f32(float %a, float %b)
%max.cd = call float @llvm.maxnum.f32(float %c, float %d)
@@ -50,10 +49,9 @@ define float @v_max3_maxnum_tree8_f32(float %a, float %b, float %c, float %d,
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: v_max3_num_f32 v0, v0, v1, v2
; GFX1250-NEXT: v_max3_num_f32 v1, v4, v5, v6
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250-NEXT: v_max3_num_f32 v0, v0, v3, v1
-; GFX1250-NEXT: v_max_num_f32_e32 v1, v7, v7
-; GFX1250-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1250-NEXT: v_max_num_f32_e32 v0, v0, v7
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
float %e, float %f, float %g, float %h) {
%ab = call float @llvm.maxnum.f32(float %a, float %b)
@@ -193,9 +191,8 @@ define float @v_min3_minnum_tree4_f32(float %a, float %b, float %c, float %d) {
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: v_min3_num_f32 v0, v0, v1, v2
-; GFX1250-NEXT: v_max_num_f32_e32 v1, v3, v3
; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1250-NEXT: v_min_num_f32_e32 v0, v0, v3
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%min.ab = call float @llvm.minnum.f32(float %a, float %b)
%min.cd = call float @llvm.minnum.f32(float %c, float %d)
@@ -345,9 +342,8 @@ define float @v_max3_maxnum_tree4_multi_use(float %a, float %b, float %c, float
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v2, v2, v2
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250-NEXT: v_max_num_f32_e32 v2, v2, v3
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-NEXT: v_max3_num_f32 v0, v0, v1, v2
; GFX1250-NEXT: global_store_b32 v[4:5], v2, off
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
@@ -431,9 +427,8 @@ define half @v_max3_maxnum_tree4_f16(half %a, half %b, half %c, half %d) {
; GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX1250-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v2
-; GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v1, v3, v3
; GFX1250-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v3
; GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1250-REAL16-LABEL: v_max3_maxnum_tree4_f16:
@@ -441,9 +436,8 @@ define half @v_max3_maxnum_tree4_f16(half %a, half %b, half %c, half %d) {
; GFX1250-REAL16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-REAL16-NEXT: s_wait_kmcnt 0x0
; GFX1250-REAL16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v2.l
-; GFX1250-REAL16-NEXT: v_max_num_f16_e32 v0.h, v3.l, v3.l
; GFX1250-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-REAL16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1250-REAL16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v3.l
; GFX1250-REAL16-NEXT: s_set_pc_i64 s[30:31]
%max.ab = call half @llvm.maxnum.f16(half %a, half %b)
%max.cd = call half @llvm.maxnum.f16(half %c, half %d)
@@ -469,11 +463,6 @@ define double @v_no_max3_maxnum_tree4_f64(double %a, double %b, double %c, doubl
; GFX1250: ; %bb.0:
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
-; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1250-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX1250-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX1250-NEXT: v_max_num_f64_e32 v[2:3], v[4:5], v[6:7]
; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -624,11 +613,9 @@ define <2 x float> @v_max3_maxnum_tree4_v2f32(<2 x float> %a, <2 x float> %b, <2
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: v_max3_num_f32 v0, v0, v2, v4
-; GFX1250-NEXT: v_max_num_f32_e32 v2, v6, v6
; GFX1250-NEXT: v_max3_num_f32 v1, v1, v3, v5
-; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1250-NEXT: v_dual_max_num_f32 v3, v7, v7 :: v_dual_max_num_f32 v0, v0, v2
-; GFX1250-NEXT: v_max_num_f32_e32 v1, v1, v3
+; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1250-NEXT: v_dual_max_num_f32 v0, v0, v6 :: v_dual_max_num_f32 v1, v1, v7
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%max.ab = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %a, <2 x float> %b)
%max.cd = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %c, <2 x float> %d)
@@ -698,9 +685,8 @@ define <2 x half> @v_max3_maxnum_tree4_v2f16(<2 x half> %a, <2 x half> %b, <2 x
; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: v_pk_max3_num_f16 v0, v0, v1, v2
-; GFX1250-NEXT: v_pk_max_num_f16 v1, v3, v3
; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1250-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1250-NEXT: v_pk_max_num_f16 v0, v0, v3
; GFX1250-NEXT: s_set_pc_i64 s[30:31]
%max.ab = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> %b)
%max.cd = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %c, <2 x half> %d)
diff --git a/llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll b/llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
index f21bd9784c66f..5029a0272636b 100644
--- a/llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
+++ b/llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
@@ -317,13 +317,8 @@ define <4 x half> @fminnum_v4f16_neg(<4 x half> %first, <4 x half> %second) {
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-LABEL: fminnum_v4f16_neg:
@@ -384,19 +379,10 @@ define <8 x half> @fminnum_v8f16_neg(<8 x half> %first, <8 x half> %second) {
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1]
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-LABEL: fminnum_v8f16_neg:
@@ -451,13 +437,8 @@ define <4 x half> @fmaxnum_v4f16_neg(<4 x half> %first, <4 x half> %second) {
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-LABEL: fmaxnum_v4f16_neg:
@@ -518,19 +499,10 @@ define <8 x half> @fmaxnum_v8f16_neg(<8 x half> %first, <8 x half> %second) {
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7 neg_lo:[1,1] neg_hi:[1,1]
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1]
+; GFX1250-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1]
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1250-GISEL-LABEL: fmaxnum_v8f16_neg:
diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
index 643e4daa913e3..dd070040d47c8 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
@@ -130,9 +130,6 @@ define half @test_vector_reduce_fmax_v2half(<2 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmax_v2half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -140,9 +137,7 @@ define half @test_vector_reduce_fmax_v2half(<2 x half> %v) {
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -172,9 +167,6 @@ define half @test_vector_reduce_fmax_v2half(<2 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -186,9 +178,7 @@ define half @test_vector_reduce_fmax_v2half(<2 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -347,9 +337,7 @@ define half @test_vector_reduce_fmax_v3half(<3 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmax_v3half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0x7e00
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v1.l
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0xfe00
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
@@ -358,10 +346,9 @@ define half @test_vector_reduce_fmax_v3half(<3 x half> %v) {
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmax_v3half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, 0x7e00
+; GFX1170-SDAG-FAKE16-NEXT: s_mov_b32 s0, 0xfe00
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_perm_b32 v1, s0, v1, 0x5040100
; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
@@ -396,9 +383,7 @@ define half @test_vector_reduce_fmax_v3half(<3 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0x7e00
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0xfe00
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
@@ -411,13 +396,13 @@ define half @test_vector_reduce_fmax_v3half(<3 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, 0x7e00
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-SDAG-FAKE16-NEXT: s_mov_b32 s0, 0xfe00
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: v_perm_b32 v1, s0, v1, 0x5040100
; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -611,22 +596,17 @@ define half @test_vector_reduce_fmax_v4half(<4 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmax_v4half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmax_v4half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -664,10 +644,8 @@ define half @test_vector_reduce_fmax_v4half(<4 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -678,12 +656,9 @@ define half @test_vector_reduce_fmax_v4half(<4 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -984,33 +959,27 @@ define half @test_vector_reduce_fmax_v8half(<8 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmax_v8half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v1.h
+; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v2.h
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmax_v8half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v4
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
+; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v5
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v4
+; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v3, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmax_v8half:
@@ -1064,11 +1033,6 @@ define half @test_vector_reduce_fmax_v8half(<8 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
@@ -1083,11 +1047,6 @@ define half @test_vector_reduce_fmax_v8half(<8 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
@@ -1602,19 +1561,17 @@ define half @test_vector_reduce_fmax_v16half(<16 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmax_v16half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v1.h
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v1.h
; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v4.l, v4.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v5.l, v5.h
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v5.l, v5.h
; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v6.l, v6.h
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v7.l, v7.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1622,27 +1579,24 @@ define half @test_vector_reduce_fmax_v16half(<16 x half> %v) {
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v8, v8, v8
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v8
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v9
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v8
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v3, v1
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v4, v2
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v5, v1
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v7
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v6, v2
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v7, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1727,20 +1681,16 @@ define half @test_vector_reduce_fmax_v16half(<16 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v1.h
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v3.l, v3.h
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v4.l, v4.h
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v5.l, v5.h
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v6.l, v6.h
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v7.l, v7.h
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmax_v16half:
@@ -1750,29 +1700,18 @@ define half @test_vector_reduce_fmax_v16half(<16 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v8, v8, v8
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v8
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v9
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v8
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v3, v1
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v4, v2
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v5, v1
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v6, v2
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v7, v1
+; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmax_v16half:
@@ -1945,8 +1884,6 @@ define float @test_vector_reduce_fmax_v2float(<2 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v2float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -1965,8 +1902,6 @@ define float @test_vector_reduce_fmax_v2float(<2 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2207,9 +2142,8 @@ define float @test_vector_reduce_fmax_v4float(<4 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v4float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2230,9 +2164,8 @@ define float @test_vector_reduce_fmax_v4float(<4 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2402,12 +2335,11 @@ define float @test_vector_reduce_fmax_v8float(<8 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v8float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v4, v5
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2434,12 +2366,11 @@ define float @test_vector_reduce_fmax_v8float(<8 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v4, v5
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2699,18 +2630,17 @@ define float @test_vector_reduce_fmax_v16float(<16 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v16float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v4, v5
-; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v8, v9
-; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v10, v11
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v10, v11
; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v12, v13
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max3_num_f32 v0, v0, v14, v15
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2747,18 +2677,17 @@ define float @test_vector_reduce_fmax_v16float(<16 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v4, v5
-; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v8, v9
-; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v10, v11
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v10, v11
; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v12, v13
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max3_num_f32 v0, v0, v14, v15
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2883,9 +2812,6 @@ define double @test_vector_reduce_fmax_v2double(<2 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v2double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2905,9 +2831,6 @@ define double @test_vector_reduce_fmax_v2double(<2 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -3034,11 +2957,8 @@ define double @test_vector_reduce_fmax_v3double(<3 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v3double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -3060,11 +2980,8 @@ define double @test_vector_reduce_fmax_v3double(<3 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -3215,15 +3132,10 @@ define double @test_vector_reduce_fmax_v4double(<4 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v4double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[6:7], v[6:7]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmax_v4double:
@@ -3247,15 +3159,10 @@ define double @test_vector_reduce_fmax_v4double(<4 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmax_v4double:
@@ -3490,25 +3397,16 @@ define double @test_vector_reduce_fmax_v8double(<8 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v8double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[12:13], v[12:13]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[14:15], v[14:15]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[10:11]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[12:13]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[14:15]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmax_v8double:
@@ -3540,25 +3438,16 @@ define double @test_vector_reduce_fmax_v8double(<8 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[12:13], v[12:13]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[14:15], v[14:15]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[10:11]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[12:13]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[14:15]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmax_v8double:
@@ -3985,46 +3874,30 @@ define double @test_vector_reduce_fmax_v16double(<16 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmax_v16double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[12:13], v[12:13]
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[14:15], v[14:15]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[16:17], v[16:17]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[18:19], v[18:19]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[20:21], v[20:21]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[22:23], v[22:23]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[24:25], v[24:25]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[26:27], v[26:27]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[28:29], v[28:29]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[10:11]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[12:13]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[14:15]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[16:17]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[18:19]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[20:21]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[22:23]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[24:25]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[26:27]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[28:29]
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[30:31], v[30:31]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[30:31]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmax_v16double:
@@ -4075,46 +3948,30 @@ define double @test_vector_reduce_fmax_v16double(<16 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[12:13], v[12:13]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[14:15], v[14:15]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[16:17], v[16:17]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[18:19], v[18:19]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[20:21], v[20:21]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[22:23], v[22:23]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[24:25], v[24:25]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[26:27], v[26:27]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[28:29], v[28:29]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[10:11]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[12:13]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[14:15]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[16:17]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[18:19]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[20:21]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[22:23]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[24:25]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[26:27]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[28:29]
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[30:31], v[30:31]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[30:31]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmax_v16double:
diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
index c574bf0fbe86e..a6059b76c53db 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
@@ -130,9 +130,6 @@ define half @test_vector_reduce_fmin_v2half(<2 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v2half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -140,9 +137,7 @@ define half @test_vector_reduce_fmin_v2half(<2 x half> %v) {
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -172,9 +167,6 @@ define half @test_vector_reduce_fmin_v2half(<2 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -186,9 +178,7 @@ define half @test_vector_reduce_fmin_v2half(<2 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -348,8 +338,6 @@ define half @test_vector_reduce_fmin_v3half(<3 x half> %v) {
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0x7e00
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v1.l
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
@@ -358,10 +346,9 @@ define half @test_vector_reduce_fmin_v3half(<3 x half> %v) {
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v3half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, 0x7e00
+; GFX1170-SDAG-FAKE16-NEXT: s_movk_i32 s0, 0x7e00
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_perm_b32 v1, s0, v1, 0x5040100
; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
@@ -397,8 +384,6 @@ define half @test_vector_reduce_fmin_v3half(<3 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0x7e00
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v1.l
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
@@ -411,13 +396,13 @@ define half @test_vector_reduce_fmin_v3half(<3 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, 0x7e00
-; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-SDAG-FAKE16-NEXT: s_movk_i32 s0, 0x7e00
+; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-FAKE16-NEXT: v_perm_b32 v1, s0, v1, 0x5040100
; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -611,22 +596,17 @@ define half @test_vector_reduce_fmin_v4half(<4 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v4half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -664,10 +644,8 @@ define half @test_vector_reduce_fmin_v4half(<4 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -678,12 +656,9 @@ define half @test_vector_reduce_fmin_v4half(<4 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -984,33 +959,27 @@ define half @test_vector_reduce_fmin_v8half(<8 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
+; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v2.h
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v4
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
+; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v1, v5
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v4
+; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v3, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
@@ -1064,11 +1033,6 @@ define half @test_vector_reduce_fmin_v8half(<8 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
@@ -1083,11 +1047,6 @@ define half @test_vector_reduce_fmin_v8half(<8 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
@@ -1602,19 +1561,17 @@ define half @test_vector_reduce_fmin_v16half(<16 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v4.l, v4.h
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v5.l, v5.h
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v5.l, v5.h
; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v6.l, v6.h
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v7.l, v7.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1622,27 +1579,24 @@ define half @test_vector_reduce_fmin_v16half(<16 x half> %v) {
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v8, v8, v8
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v8
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v1, v9
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v8
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v3, v1
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v4, v2
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v5, v1
; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v7
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v6, v2
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v7, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
@@ -1727,20 +1681,16 @@ define half @test_vector_reduce_fmin_v16half(<16 x half> %v) {
; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v0.h, v0.h
-; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v4.l, v4.h
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v5.l, v5.h
-; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v6.l, v6.h
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v7.l, v7.h
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
@@ -1750,29 +1700,18 @@ define half @test_vector_reduce_fmin_v16half(<16 x half> %v) {
; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v8, v8, v8
-; GFX12-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v8
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v1, v9
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v8
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v3, v1
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v4, v2
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v5, v1
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v6, v2
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v7, v1
+; GFX12-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
@@ -1945,8 +1884,6 @@ define float @test_vector_reduce_fmin_v2float(<2 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v2float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -1965,8 +1902,6 @@ define float @test_vector_reduce_fmin_v2float(<2 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2207,9 +2142,8 @@ define float @test_vector_reduce_fmin_v4float(<4 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v4float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2230,9 +2164,8 @@ define float @test_vector_reduce_fmin_v4float(<4 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2402,12 +2335,11 @@ define float @test_vector_reduce_fmin_v8float(<8 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v8float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v4, v5
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2434,12 +2366,11 @@ define float @test_vector_reduce_fmin_v8float(<8 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v4, v5
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2699,18 +2630,17 @@ define float @test_vector_reduce_fmin_v16float(<16 x float> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v16float:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v4, v5
-; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v6, v7
; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v8, v9
-; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v10, v11
; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v10, v11
; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v12, v13
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min3_num_f32 v0, v0, v14, v15
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2747,18 +2677,17 @@ define float @test_vector_reduce_fmin_v16float(<16 x float> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v2, v3
; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v4, v5
-; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v6, v7
; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v8, v9
-; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v10, v11
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v10, v11
; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v12, v13
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min3_num_f32 v0, v0, v14, v15
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2882,9 +2811,6 @@ define double @test_vector_reduce_fmin_v2double(<2 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v2double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -2904,9 +2830,6 @@ define double @test_vector_reduce_fmin_v2double(<2 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -3033,11 +2956,8 @@ define double @test_vector_reduce_fmin_v3double(<3 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v3double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -3059,11 +2979,8 @@ define double @test_vector_reduce_fmin_v3double(<3 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
@@ -3214,15 +3131,10 @@ define double @test_vector_reduce_fmin_v4double(<4 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v4double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[6:7], v[6:7]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v4double:
@@ -3246,15 +3158,10 @@ define double @test_vector_reduce_fmin_v4double(<4 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v4double:
@@ -3489,25 +3396,16 @@ define double @test_vector_reduce_fmin_v8double(<8 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v8double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[12:13], v[12:13]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[14:15], v[14:15]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[10:11]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[12:13]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[14:15]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v8double:
@@ -3539,25 +3437,16 @@ define double @test_vector_reduce_fmin_v8double(<8 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[12:13], v[12:13]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[14:15], v[14:15]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[10:11]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[12:13]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[14:15]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v8double:
@@ -3984,46 +3873,30 @@ define double @test_vector_reduce_fmin_v16double(<16 x double> %v) {
; GFX1170-SDAG-LABEL: test_vector_reduce_fmin_v16double:
; GFX1170-SDAG: ; %bb.0: ; %entry
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[6:7], v[6:7]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[8:9], v[8:9]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[10:11], v[10:11]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[12:13], v[12:13]
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[14:15], v[14:15]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[16:17], v[16:17]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[18:19], v[18:19]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[20:21], v[20:21]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[22:23], v[22:23]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[24:25], v[24:25]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[26:27], v[26:27]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[28:29], v[28:29]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[10:11]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[12:13]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[14:15]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[16:17]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[18:19]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[20:21]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[22:23]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[24:25]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[26:27]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[28:29]
; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[30:31], v[30:31]
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[30:31]
; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: test_vector_reduce_fmin_v16double:
@@ -4074,46 +3947,30 @@ define double @test_vector_reduce_fmin_v16double(<16 x double> %v) {
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[6:7], v[6:7]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[8:9], v[8:9]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[10:11], v[10:11]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[12:13], v[12:13]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[14:15], v[14:15]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[16:17], v[16:17]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[18:19], v[18:19]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[20:21], v[20:21]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[22:23], v[22:23]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[24:25], v[24:25]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[26:27], v[26:27]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
+; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[28:29], v[28:29]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[10:11]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[12:13]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[14:15]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[16:17]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[18:19]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[20:21]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[22:23]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[24:25]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[26:27]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[28:29]
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[30:31], v[30:31]
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[30:31]
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_vector_reduce_fmin_v16double:
>From cfe600e56ac7e022478e68d263dac5b6dbdb6a49 Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Wed, 24 Jun 2026 10:28:31 +0800
Subject: [PATCH 3/7] fix test case
---
.../buffer-fat-pointer-atomicrmw-fmax.ll | 66 ++++++++-----------
.../buffer-fat-pointer-atomicrmw-fmin.ll | 66 ++++++++-----------
2 files changed, 54 insertions(+), 78 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
index 44e0a7f9282d9..3abac9a8ed8ee 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
@@ -1552,19 +1552,17 @@ define double @buffer_fat_ptr_agent_atomic_fmax_ret_f64__offset__waterfall__amdg
; GFX12-NEXT: s_cbranch_execnz .LBB7_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-NEXT: v_max_num_f64_e32 v[5:6], v[5:6], v[5:6]
; GFX12-NEXT: s_mov_b32 s4, 0
; GFX12-NEXT: .LBB7_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB7_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[13:14], v[13:14]
+; GFX12-NEXT: v_max_num_f64_e32 v[11:12], v[13:14], v[5:6]
; GFX12-NEXT: s_mov_b32 s5, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_mov_b32 s6, s5
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f64_e32 v[11:12], v[0:1], v[5:6]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v1, v12
; GFX12-NEXT: v_dual_mov_b32 v2, v13 :: v_dual_mov_b32 v3, v14
; GFX12-NEXT: .LBB7_4: ; Parent Loop BB7_3 Depth=1
@@ -3282,7 +3280,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-TRUE16-NEXT: s_mov_b32 s4, exec_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_mov_b32 s5, s4
@@ -3303,30 +3301,28 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_load_b32 v6, v10, s[0:3], null offen
+; GFX12-TRUE16-NEXT: buffer_load_b32 v7, v10, s[0:3], null offen
; GFX12-TRUE16-NEXT: s_and_not1_wrexec_b32 s5, s5
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-TRUE16-NEXT: ; %bb.2:
; GFX12-TRUE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v5.l, v5.l
; GFX12-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX12-TRUE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-TRUE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v9, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.h, 0
; GFX12-TRUE16-NEXT: s_mov_b32 s5, exec_lo
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s5
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v5.l, v4.h, v4.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v9, v5
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v6.l, v6.l, v5.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v11, v5
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
+; GFX12-TRUE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-TRUE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-TRUE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
@@ -3338,7 +3334,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[7:8], v10, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_and_not1_wrexec_b32 s6, s6
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-TRUE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
@@ -3353,7 +3349,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-TRUE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v9, v7
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -3363,7 +3359,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s4, exec_lo
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_mov_b32 s5, s4
@@ -3384,32 +3380,28 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_load_b32 v6, v8, s[0:3], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v7, v10, s[0:3], null offen
; GFX12-FAKE16-NEXT: s_and_not1_wrexec_b32 s5, s5
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-FAKE16-NEXT: ; %bb.2:
; GFX12-FAKE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v10, v5, v5
; GFX12-FAKE16-NEXT: s_mov_b32 s4, 0
; GFX12-FAKE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-FAKE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v7, v6
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
; GFX12-FAKE16-NEXT: s_mov_b32 s5, exec_lo
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s5
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v6, v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v10
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v7, v4
-; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v9, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v5
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v5, v6
+; GFX12-FAKE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-FAKE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-FAKE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s0, v0
@@ -3421,7 +3413,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v8, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_and_not1_wrexec_b32 s6, s6
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-FAKE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
@@ -3436,7 +3428,7 @@ define half @buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-FAKE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v7, v4
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmax_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -6593,25 +6585,21 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_load_b32 v7, v4, s[0:3], null offen offset:1024
+; GFX12-NEXT: buffer_load_b32 v8, v4, s[0:3], null offen offset:1024
; GFX12-NEXT: s_and_not1_wrexec_b32 s5, s5
; GFX12-NEXT: s_cbranch_execnz .LBB18_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-NEXT: v_pk_max_num_f16 v8, v5, v5
; GFX12-NEXT: s_mov_b32 s4, 0
; GFX12-NEXT: .LBB18_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB18_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v5, v7, v7
+; GFX12-NEXT: v_pk_max_num_f16 v7, v8, v5
; GFX12-NEXT: s_mov_b32 s5, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_mov_b32 s6, s5
-; GFX12-NEXT: v_pk_max_num_f16 v6, v5, v8
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v5, v6
; GFX12-NEXT: v_mov_b32_e32 v6, v7
; GFX12-NEXT: v_mov_b32_e32 v7, v8
; GFX12-NEXT: .LBB18_4: ; Parent Loop BB18_3 Depth=1
@@ -6625,7 +6613,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[5:6], v4, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[6:7], v4, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_and_not1_wrexec_b32 s6, s6
; GFX12-NEXT: s_cbranch_execnz .LBB18_4
; GFX12-NEXT: ; %bb.5: ; in Loop: Header=BB18_3 Depth=1
@@ -6640,7 +6628,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_cbranch_execnz .LBB18_3
; GFX12-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX12-NEXT: v_mov_b32_e32 v0, v5
+; GFX12-NEXT: v_mov_b32_e32 v0, v6
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmax_ret_v2f16__offset__waterfall__amdgpu_no_fine_grained_memory:
diff --git a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
index e7782a7503075..7a439fcaa5c87 100644
--- a/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
@@ -1552,19 +1552,17 @@ define double @buffer_fat_ptr_agent_atomic_fmin_ret_f64__offset__waterfall__amdg
; GFX12-NEXT: s_cbranch_execnz .LBB7_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-NEXT: v_max_num_f64_e32 v[5:6], v[5:6], v[5:6]
; GFX12-NEXT: s_mov_b32 s4, 0
; GFX12-NEXT: .LBB7_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB7_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[13:14], v[13:14]
+; GFX12-NEXT: v_min_num_f64_e32 v[11:12], v[13:14], v[5:6]
; GFX12-NEXT: s_mov_b32 s5, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_mov_b32 s6, s5
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f64_e32 v[11:12], v[0:1], v[5:6]
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v1, v12
; GFX12-NEXT: v_dual_mov_b32 v2, v13 :: v_dual_mov_b32 v3, v14
; GFX12-NEXT: .LBB7_4: ; Parent Loop BB7_3 Depth=1
@@ -3282,7 +3280,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-TRUE16-NEXT: s_mov_b32 s4, exec_lo
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_mov_b32 s5, s4
@@ -3303,30 +3301,28 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_load_b32 v6, v10, s[0:3], null offen
+; GFX12-TRUE16-NEXT: buffer_load_b32 v7, v10, s[0:3], null offen
; GFX12-TRUE16-NEXT: s_and_not1_wrexec_b32 s5, s5
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-TRUE16-NEXT: ; %bb.2:
; GFX12-TRUE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.l, v5.l, v5.l
; GFX12-TRUE16-NEXT: s_mov_b32 s4, 0
; GFX12-TRUE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-TRUE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-TRUE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v9, v6
-; GFX12-TRUE16-NEXT: v_mov_b16_e32 v5.h, 0
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
+; GFX12-TRUE16-NEXT: v_mov_b16_e32 v6.h, 0
; GFX12-TRUE16-NEXT: s_mov_b32 s5, exec_lo
; GFX12-TRUE16-NEXT: s_wait_storecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s5
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v4.h, v5.l, v5.l
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v5.l, v4.h, v4.l
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v5, v9, v5
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v6.l, v6.l, v5.l
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_and_or_b32 v5, v6, v11, v5
-; GFX12-TRUE16-NEXT: v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
+; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
+; GFX12-TRUE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-TRUE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-TRUE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s0, v0
@@ -3338,7 +3334,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-TRUE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[7:8], v10, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-TRUE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-TRUE16-NEXT: s_and_not1_wrexec_b32 s6, s6
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-TRUE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
@@ -3353,7 +3349,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-TRUE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-TRUE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-TRUE16-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v9, v7
+; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -3363,7 +3359,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x200, v4
+; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v6, 0x200, v4
; GFX12-FAKE16-NEXT: s_mov_b32 s4, exec_lo
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_mov_b32 s5, s4
@@ -3384,32 +3380,28 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_load_b32 v6, v8, s[0:3], null offen
+; GFX12-FAKE16-NEXT: buffer_load_b32 v7, v10, s[0:3], null offen
; GFX12-FAKE16-NEXT: s_and_not1_wrexec_b32 s5, s5
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-FAKE16-NEXT: ; %bb.2:
; GFX12-FAKE16-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v10, v5, v5
; GFX12-FAKE16-NEXT: s_mov_b32 s4, 0
; GFX12-FAKE16-NEXT: .LBB12_3: ; %atomicrmw.start
; GFX12-FAKE16-NEXT: ; =>This Loop Header: Depth=1
; GFX12-FAKE16-NEXT: ; Child Loop BB12_4 Depth 2
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v4, v7, v6
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v6, v4, v7
; GFX12-FAKE16-NEXT: s_mov_b32 s5, exec_lo
; GFX12-FAKE16-NEXT: s_wait_storecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s5
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v4, v4, v4
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v6, v6, v5
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v4, v4, v10
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX12-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v6, v4, v6
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v4, v7, v4
-; GFX12-FAKE16-NEXT: v_and_or_b32 v5, v6, v9, v4
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v4, v5
-; GFX12-FAKE16-NEXT: v_mov_b32_e32 v5, v6
+; GFX12-FAKE16-NEXT: v_and_or_b32 v6, v7, v11, v6
+; GFX12-FAKE16-NEXT: v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
; GFX12-FAKE16-NEXT: .LBB12_4: ; Parent Loop BB12_3 Depth=1
; GFX12-FAKE16-NEXT: ; => This Inner Loop Header: Depth=2
; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s0, v0
@@ -3421,7 +3413,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-FAKE16-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[4:5], v8, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX12-FAKE16-NEXT: buffer_atomic_cmpswap_b32 v[8:9], v10, s[0:3], null offen th:TH_ATOMIC_RETURN
; GFX12-FAKE16-NEXT: s_and_not1_wrexec_b32 s6, s6
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_4
; GFX12-FAKE16-NEXT: ; %bb.5: ; in Loop: Header=BB12_3 Depth=1
@@ -3436,7 +3428,7 @@ define half @buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu
; GFX12-FAKE16-NEXT: s_cbranch_execnz .LBB12_3
; GFX12-FAKE16-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-FAKE16-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v7, v4
+; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, v4, v8
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmin_ret_f16__offset__waterfall__amdgpu_no_fine_grained_memory:
@@ -6593,25 +6585,21 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_load_b32 v7, v4, s[0:3], null offen offset:1024
+; GFX12-NEXT: buffer_load_b32 v8, v4, s[0:3], null offen offset:1024
; GFX12-NEXT: s_and_not1_wrexec_b32 s5, s5
; GFX12-NEXT: s_cbranch_execnz .LBB18_1
; GFX12-NEXT: ; %bb.2:
; GFX12-NEXT: s_mov_b32 exec_lo, s4
-; GFX12-NEXT: v_pk_max_num_f16 v8, v5, v5
; GFX12-NEXT: s_mov_b32 s4, 0
; GFX12-NEXT: .LBB18_3: ; %atomicrmw.start
; GFX12-NEXT: ; =>This Loop Header: Depth=1
; GFX12-NEXT: ; Child Loop BB18_4 Depth 2
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v5, v7, v7
+; GFX12-NEXT: v_pk_min_num_f16 v7, v8, v5
; GFX12-NEXT: s_mov_b32 s5, exec_lo
; GFX12-NEXT: s_wait_storecnt 0x0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_mov_b32 s6, s5
-; GFX12-NEXT: v_pk_min_num_f16 v6, v5, v8
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_mov_b32_e32 v5, v6
; GFX12-NEXT: v_mov_b32_e32 v6, v7
; GFX12-NEXT: v_mov_b32_e32 v7, v8
; GFX12-NEXT: .LBB18_4: ; Parent Loop BB18_3 Depth=1
@@ -6625,7 +6613,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[0:1], v[0:1]
; GFX12-NEXT: v_cmpx_eq_u64_e32 s[2:3], v[2:3]
; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[5:6], v4, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
+; GFX12-NEXT: buffer_atomic_cmpswap_b32 v[6:7], v4, s[0:3], null offen offset:1024 th:TH_ATOMIC_RETURN
; GFX12-NEXT: s_and_not1_wrexec_b32 s6, s6
; GFX12-NEXT: s_cbranch_execnz .LBB18_4
; GFX12-NEXT: ; %bb.5: ; in Loop: Header=BB18_3 Depth=1
@@ -6640,7 +6628,7 @@ define <2 x half> @buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall
; GFX12-NEXT: s_cbranch_execnz .LBB18_3
; GFX12-NEXT: ; %bb.6: ; %atomicrmw.end
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s4
-; GFX12-NEXT: v_mov_b32_e32 v0, v5
+; GFX12-NEXT: v_mov_b32_e32 v0, v6
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-LABEL: buffer_fat_ptr_agent_atomic_fmin_ret_v2f16__offset__waterfall__amdgpu_no_fine_grained_memory:
>From 7558d188d9f3a719d00ac2d4d3731a31618c1e65 Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Fri, 3 Jul 2026 11:14:11 +0800
Subject: [PATCH 4/7] fix comments
---
llvm/lib/Target/AMDGPU/AMDGPU.td | 6 +-
.../AMDGPU/AMDGPURegBankLegalizeRules.cpp | 10 +-
.../Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 16 +-
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 34 +-
llvm/lib/Target/AMDGPU/SOPInstructions.td | 23 +-
.../GlobalISel/llvm.amdgcn.rsq.clamp.ll | 9 +-
llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll | 89 +-
llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll | 89 +-
llvm/test/CodeGen/AMDGPU/maximumnum.ll | 14330 +++++-----------
llvm/test/CodeGen/AMDGPU/minimumnum.ll | 13883 +++++----------
llvm/test/CodeGen/AMDGPU/minmax.ll | 17 +-
.../test/CodeGen/AMDGPU/vector-reduce-fmax.ll | 78 +-
.../test/CodeGen/AMDGPU/vector-reduce-fmin.ll | 78 +-
13 files changed, 9382 insertions(+), 19280 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index aa8de4d96664c..b77aad86aaf67 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -186,7 +186,7 @@ defm IEEEMinimumMaximumInsts : AMDGPUSubtargetFeature<"ieee-minimum-maximum-inst
>;
defm SALUMinimumMaximumInsts : AMDGPUSubtargetFeature<"salu-minimum-maximum-insts",
- "Has s_minimum/maximum_f16/f32 and s_max/min_num_f16/f32 instructions"
+ "Has s_minimum/maximum_f16/f32 instructions"
>;
defm Minimum3Maximum3F32 : AMDGPUSubtargetFeature<"minimum3-maximum3-f32",
@@ -2795,6 +2795,10 @@ def NotHasMinMaxDenormModes : Predicate<"!Subtarget->supportsMinMaxDenormModes()
def HasFminFmaxLegacy : Predicate<"Subtarget->hasFminFmaxLegacy()">;
+def HasSALUFloatInstsNotGFX11_7 :
+Predicate<"!(Subtarget->getGeneration() == AMDGPUSubtarget::GFX11 && Subtarget->hasGFX11_7Insts()) &&"
+ "Subtarget->hasSALUFloatInsts()">;
+
def HasSDWA8 : Predicate<"Subtarget->hasSDWA()">,
AssemblerPredicate<(all_of (not FeatureGFX9Insts), FeatureSDWA)>;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 7f7225ad6d311..d63dba909dacb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -1672,6 +1672,8 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
.Uni(V2S16, {{UniInVgprV2S16}, {VgprV2S16, VgprV2S16}})
.Div(V2S16, {{VgprV2S16}, {VgprV2S16, VgprV2S16}});
+ bool hasSMINNUMMAXNUMPattern = hasSALUFloat && !ST->hasGFX11_7Insts();
+
addRulesForGOpcs({G_FMINNUM_IEEE, G_FMAXNUM_IEEE, G_FMINNUM, G_FMAXNUM,
G_FMINIMUMNUM, G_FMAXIMUMNUM},
Standard)
@@ -1681,10 +1683,10 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
.Div(S64, {{Vgpr64}, {Vgpr64, Vgpr64}})
.Uni(V2S16, {{UniInVgprV2S16}, {VgprV2S16, VgprV2S16}})
.Div(V2S16, {{VgprV2S16}, {VgprV2S16, VgprV2S16}})
- .Uni(S16, {{Sgpr16}, {Sgpr16, Sgpr16}}, hasSALUFloat)
- .Uni(S16, {{UniInVgprS16}, {Vgpr16, Vgpr16}}, !hasSALUFloat)
- .Uni(S32, {{Sgpr32}, {Sgpr32, Sgpr32}}, hasSALUFloat)
- .Uni(S32, {{UniInVgprS32}, {Vgpr32, Vgpr32}}, !hasSALUFloat);
+ .Uni(S16, {{Sgpr16}, {Sgpr16, Sgpr16}}, hasSMINNUMMAXNUMPattern)
+ .Uni(S16, {{UniInVgprS16}, {Vgpr16, Vgpr16}}, !hasSMINNUMMAXNUMPattern)
+ .Uni(S32, {{Sgpr32}, {Sgpr32, Sgpr32}}, hasSMINNUMMAXNUMPattern)
+ .Uni(S32, {{UniInVgprS32}, {Vgpr32, Vgpr32}}, !hasSMINNUMMAXNUMPattern);
addRulesForGOpcs({G_FPTRUNC})
.Any({{DivS16, S32}, {{Vgpr16}, {Vgpr32}}})
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
index 200234c23c886..9160a5590d585 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
@@ -4091,10 +4091,6 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
case AMDGPU::G_FFLOOR:
case AMDGPU::G_FCEIL:
case AMDGPU::G_INTRINSIC_ROUNDEVEN:
- case AMDGPU::G_FMINNUM:
- case AMDGPU::G_FMAXNUM:
- case AMDGPU::G_FMINIMUMNUM:
- case AMDGPU::G_FMAXIMUMNUM:
case AMDGPU::G_INTRINSIC_TRUNC:
case AMDGPU::G_STRICT_FADD:
case AMDGPU::G_STRICT_FSUB:
@@ -4107,6 +4103,18 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
return getDefaultMappingSOP(MI);
return getDefaultMappingVOP(MI);
}
+ case AMDGPU::G_FMINNUM:
+ case AMDGPU::G_FMAXNUM:
+ case AMDGPU::G_FMINIMUMNUM:
+ case AMDGPU::G_FMAXIMUMNUM: {
+ LLT Ty = MRI.getType(MI.getOperand(0).getReg());
+ unsigned Size = Ty.getSizeInBits();
+ if (Subtarget.hasSALUFloatInsts() && Ty.isScalar() &&
+ (Size == 32 || Size == 16) && isSALUMapping(MI) &&
+ Subtarget.hasGFX11_7Insts())
+ return getDefaultMappingSOP(MI);
+ return getDefaultMappingVOP(MI);
+ }
case AMDGPU::G_FMINIMUM:
case AMDGPU::G_FMAXIMUM: {
LLT Ty = MRI.getType(MI.getOperand(0).getReg());
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 3999a6e011100..269bffb9b7f39 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -545,29 +545,16 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
if (Subtarget->hasIEEEMinimumMaximumInsts()) {
setOperationAction(
{ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- MVT::f64, Legal);
+ {MVT::f64, MVT::f32}, Legal);
} else {
setOperationAction(
{ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- MVT::f64, Custom);
+ {MVT::f64, MVT::f32}, Custom);
// These are really only legal for ieee_mode functions. We should be
// avoiding them for functions that don't have ieee_mode enabled, so just
// say they are legal.
- setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, MVT::f64, Legal);
- }
-
- // If has v_{min|max}_num_f32 but no s_{min|max}_num_f32, leave it for custom
- // function
- if (Subtarget->hasIEEEMinimumMaximumInsts() &&
- Subtarget->hasSALUMinimumMaximumInsts()) {
- setOperationAction(
- {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- MVT::f32, Legal);
- } else {
- setOperationAction(
- {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
- MVT::f32, Custom);
- setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, MVT::f32, Legal);
+ setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE},
+ {MVT::f64, MVT::f32}, Legal);
}
if (Subtarget->haveRoundOpsF64())
@@ -838,8 +825,7 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
MVT::v8f16, MVT::v8bf16, MVT::v16f16, MVT::v16bf16,
MVT::v32f16, MVT::v32bf16},
Custom);
- if (Subtarget->hasIEEEMinimumMaximumInsts() &&
- Subtarget->hasSALUMinimumMaximumInsts()) {
+ if (Subtarget->hasIEEEMinimumMaximumInsts()) {
setOperationAction(
{ISD::FMAXNUM, ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
MVT::f16, Legal);
@@ -8759,15 +8745,12 @@ SDValue SITargetLowering::lowerFMINNUM_FMAXNUM(SDValue Op,
const MachineFunction &MF = DAG.getMachineFunction();
const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
bool IsIEEEMode = Info->getMode().IEEE;
- bool IsDivergent = Op.getNode()->isDivergent();
- bool NeedExpand = (IsDivergent && !Subtarget->hasIEEEMinimumMaximumInsts()) ||
- (!IsDivergent && !Subtarget->hasSALUMinimumMaximumInsts());
// FIXME: Assert during selection that this is only selected for
// ieee_mode. Currently a combine can produce the ieee version for non-ieee
// mode functions, but this happens to be OK since it's only done in cases
// where there is known no sNaN.
- if (IsIEEEMode && NeedExpand)
+ if (IsIEEEMode)
return expandFMINNUM_FMAXNUM(Op.getNode(), DAG);
if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
@@ -8785,11 +8768,8 @@ SITargetLowering::lowerFMINIMUMNUM_FMAXIMUMNUM(SDValue Op,
const MachineFunction &MF = DAG.getMachineFunction();
const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
bool IsIEEEMode = Info->getMode().IEEE;
- bool IsDivergent = Op.getNode()->isDivergent();
- bool NeedExpand = (IsDivergent && !Subtarget->hasIEEEMinimumMaximumInsts()) ||
- (!IsDivergent && !Subtarget->hasSALUMinimumMaximumInsts());
- if (IsIEEEMode && NeedExpand)
+ if (IsIEEEMode)
return expandFMINIMUMNUM_FMAXIMUMNUM(Op.getNode(), DAG);
if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index cd7c43972813c..059eb6aea7c78 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -940,8 +940,8 @@ let SubtargetPredicate = HasSALUFloatInsts, mayRaiseFPException = 1,
let isReMaterializable = 1 in {
let isCommutable = 1 in {
def S_ADD_F32 : SOP2_F32_Inst<"s_add_f32", any_fadd>;
- def S_MIN_F32 : SOP2_F32_Inst<"s_min_f32", fminnum_like>;
- def S_MAX_F32 : SOP2_F32_Inst<"s_max_f32", fmaxnum_like>;
+ def S_MIN_F32 : SOP2_F32<"s_min_f32">;
+ def S_MAX_F32 : SOP2_F32<"s_max_f32">;
def S_MUL_F32 : SOP2_F32_Inst<"s_mul_f32", any_fmul>;
let FixedSize = 1 in
@@ -956,8 +956,8 @@ let SubtargetPredicate = HasSALUFloatInsts, mayRaiseFPException = 1,
def S_MUL_F16 : SOP2_F16_Inst<"s_mul_f16", any_fmul>;
} // End FPDPRounding
- def S_MIN_F16 : SOP2_F16_Inst<"s_min_f16", fminnum_like>;
- def S_MAX_F16 : SOP2_F16_Inst<"s_max_f16", fmaxnum_like>;
+ def S_MIN_F16 : SOP2_F16<"s_min_f16">;
+ def S_MAX_F16 : SOP2_F16<"s_max_f16">;
} // End isCommutable = 1
let FPDPRounding = 1 in
@@ -995,6 +995,21 @@ let SubtargetPredicate = HasSALUFloatInsts, mayRaiseFPException = 1,
} // End SubtargetPredicate = HasSALUFloatInsts, mayRaiseFPException = 1,
// Uses = [MODE], SchedRW = [WriteSFPU]
+let OtherPredicates = [HasSALUFloatInstsNotGFX11_7] in {
+ def : GCNPat<(f32 (UniformBinFrag<fminnum_like> (f32 SSrc_f32:$src0),
+ (f32 SSrc_f32:$src1))),
+ (S_MIN_F32 SSrc_f32:$src0, SSrc_f32:$src1)>;
+ def : GCNPat<(f32 (UniformBinFrag<fmaxnum_like> (f32 SSrc_f32:$src0),
+ (f32 SSrc_f32:$src1))),
+ (S_MAX_F32 SSrc_f32:$src0, SSrc_f32:$src1)>;
+ def : GCNPat<(f16 (UniformBinFrag<fminnum_like> (f16 SSrc_f16:$src0),
+ (f16 SSrc_f16:$src1))),
+ (S_MIN_F16 SSrc_f16:$src0, SSrc_f16:$src1)>;
+ def : GCNPat<(f16 (UniformBinFrag<fmaxnum_like> (f16 SSrc_f16:$src0),
+ (f16 SSrc_f16:$src1))),
+ (S_MAX_F16 SSrc_f16:$src0, SSrc_f16:$src1)>;
+}
+
// On GFX12 MIN/MAX instructions do not read MODE register.
let SubtargetPredicate = isGFX12Plus, mayRaiseFPException = 1, isCommutable = 1,
isReMaterializable = 1, SchedRW = [WriteSFPU], AddedComplexity = 25 in {
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
index cd79352ac7941..fc0bf16cc3215 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
@@ -201,12 +201,9 @@ define float @v_rsq_clamp_undef_f32() #0 {
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-NEXT: v_rsq_f32_e32 v0, s0
-; GFX1170-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_3)
-; GFX1170-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1170-NEXT: s_min_f32 s0, s0, 0x7f7fffff
-; GFX1170-NEXT: s_max_f32 s0, s0, 0xff7fffff
-; GFX1170-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1170-NEXT: v_mov_b32_e32 v0, s0
+; GFX1170-NEXT: v_mov_b32_e32 v1, 0xff7fffff
+; GFX1170-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_1)
+; GFX1170-NEXT: v_minmax_num_f32 v0, v0, 0x7f7fffff, v1
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_rsq_clamp_undef_f32:
diff --git a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
index c76d1742d99f4..bf07c31524ca2 100644
--- a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
@@ -1401,19 +1401,34 @@ define <3 x half> @v_max3_v3f16_maximumnum_maximumnum__v_v_v_0(<3 x half> %a, <3
; GFX11-NEXT: v_pk_max_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-TRUE16-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.h, v0.h, v2.h, v4.h
+; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v4.l
+; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v1.l, v1.l, v3.l, v5.l
+; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-FAKE16-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
+; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v4
+; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v1, v1, v3, v5
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v2, v7, v6, v8
+; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v2
+; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %a, <3 x half> %b)
%max3 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)
ret <3 x half> %max3
@@ -1604,19 +1619,41 @@ define <4 x half> @v_max3_v4f16_maximumnum_maximumnum__v_v_v_0(<4 x half> %a, <4
; GFX11-NEXT: v_pk_max_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-TRUE16-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v1.h, v1.h, v3.h, v5.h
+; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.h, v0.h, v2.h, v4.h
+; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v4.l
+; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v1.l, v1.l, v3.l, v5.l
+; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-FAKE16-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
+; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v4
+; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v1, v1, v3, v5
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v8, v9, v8, v10
+; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v6, v7, v6, v11
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v8
+; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v6
+; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)
%max3 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)
ret <4 x half> %max3
diff --git a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
index bb34d552f6058..accee7cb077c4 100644
--- a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
@@ -1401,19 +1401,34 @@ define <3 x half> @v_min3_v3f16_minimumnum_minimumnum__v_v_v_0(<3 x half> %a, <3
; GFX11-NEXT: v_pk_min_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-TRUE16-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.h, v0.h, v2.h, v4.h
+; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v4.l
+; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v1.l, v1.l, v3.l, v5.l
+; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-FAKE16-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
+; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v4
+; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v1, v1, v3, v5
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v2, v7, v6, v8
+; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v2
+; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %a, <3 x half> %b)
%min3 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)
ret <3 x half> %min3
@@ -1604,19 +1619,41 @@ define <4 x half> @v_min3_v4f16_minimumnum_minimumnum__v_v_v_0(<4 x half> %a, <4
; GFX11-NEXT: v_pk_min_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-TRUE16-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v1.h, v1.h, v3.h, v5.h
+; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.h, v0.h, v2.h, v4.h
+; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v4.l
+; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v1.l, v1.l, v3.l, v5.l
+; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-FAKE16-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
+; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
+; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v4
+; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v1, v1, v3, v5
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v8, v9, v8, v10
+; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v6, v7, v6, v11
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v8
+; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v6
+; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)
%min3 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)
ret <4 x half> %min3
diff --git a/llvm/test/CodeGen/AMDGPU/maximumnum.ll b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
index 35c6f0fabc337..6cded80fd6141 100644
--- a/llvm/test/CodeGen/AMDGPU/maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
@@ -39,239 +39,115 @@
; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
define half @v_maximumnum_f16(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f16:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f16:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_maximumnum_f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f16:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
define half @v_maximumnum_f16_nnan(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_maximumnum_f16_nnan:
; GFX8: ; %bb.0:
@@ -398,245 +274,118 @@ define half @v_maximumnum_f16_1.0(half %x) #1 {
; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, 1.0, v0
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_1.0:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_1.0:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half 1.0)
ret half %result
}
define float @v_maximumnum_f32(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_maximumnum_f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f32:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -699,142 +448,69 @@ define float @v_maximumnum_f32_nnan(float %x, float %y) #1 {
}
define double @v_maximumnum_f64(double %x, double %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f64:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f64:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX9-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_maximumnum_f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f64:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f64:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f64:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -933,57 +609,28 @@ define float @v_maximumnum_f32_1.0(float %x) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, 1.0, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_1.0:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_1.0:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_1.0:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_1.0:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_1.0:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_1.0:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_f32_1.0:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_1.0:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_1.0:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -1029,79 +676,50 @@ define float @v_maximumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %canon.y = call float @llvm.canonicalize.f32(float %y)
- %result = call float @llvm.maximumnum.f32(float %x, float %canon.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX8-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX8: ; %bb.0:
+; GFX12-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %canon.y = call float @llvm.canonicalize.f32(float %y)
+ %result = call float @llvm.maximumnum.f32(float %x, float %canon.y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
@@ -1132,63 +750,34 @@ define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.maximumnum.f32(float %canon.x, float %y)
ret float %result
@@ -1306,3861 +895,1897 @@ define double @v_maximumnum_f64_1.0(double %x) #1 {
; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_f64_1.0:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f64_1.0:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f64_1.0:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f64_1.0:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f64_1.0:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f64_1.0:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.maximumnum.f64(double %x, double 1.0)
- ret double %result
-}
-
-define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call half @llvm.maximumnum.f16(half %x, half %y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call half @llvm.maximumnum.f16(half %x, half %y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, s17
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, s16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s17
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
-; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
-; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
-; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
-; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, s1, s1
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, s0, s0
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s1, s1
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1170-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX1170-TRUE16-GISEL-NEXT: s_max_f16 s0, s0, s1
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1170-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_max_f16 s0, s0, s1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1170-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_max_num_f16 s0, s0, s1
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX12-TRUE16-GISEL-NEXT: s_max_num_f16 s0, s0, s1
-; GFX12-TRUE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX12-FAKE16-GISEL-NEXT: s_max_num_f16 s0, s0, s1
-; GFX12-FAKE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f16_s_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: s_max_num_f16 s0, s0, s1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s1, s1
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call half @llvm.maximumnum.f16(half %x, half %y)
- ret half %result
-}
-
-define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_s_v:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_v:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.maximumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_v_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_v_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.maximumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
-; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
-; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
-; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
-; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1170-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX1170-GISEL-NEXT: s_max_f32 s0, s0, s1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1170-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_max_num_f32 s0, s0, s1
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX12-GISEL-NEXT: s_max_num_f32 s0, s0, s1
-; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_s_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: s_max_num_f32 s0, s0, s1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.maximumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define double @v_maximumnum_f64_s_v(double inreg %x, double %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f64_s_v:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f64_s_v:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f64_s_v:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f64_s_v:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f64_s_v:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f64_s_v:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f64_s_v:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f64_s_v:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f64_s_v:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f64_s_v:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f64_s_v:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f64_s_v:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[2:3], v[0:1]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f64_s_v:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f64_s_v:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f64_s_v:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f64_s_v:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.maximumnum.f64(double %x, double %y)
- ret double %result
-}
-
-define double @v_maximumnum_f64_v_s(double %x, double inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f64_v_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f64_v_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f64_v_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f64_v_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f64_v_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f64_v_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f64_v_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f64_v_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f64_v_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f64_v_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f64_v_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], s[0:1]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f64_v_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f64_v_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f64_v_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f64_v_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f64_v_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.maximumnum.f64(double %x, double %y)
- ret double %result
-}
-
-define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[0:1], s[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], s[0:1], s[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[2:3], s[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f64_s_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f64_s_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.maximumnum.f64(double %x, double %y)
- ret double %result
-}
-
-define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %result = call float @llvm.maximumnum.f32(float %x, float %fabs.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %fneg.fabs.y = fneg float %fabs.y
- %result = call float @llvm.maximumnum.f32(float %x, float %fneg.fabs.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_fabs:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.x = call float @llvm.fabs.f32(float %x)
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %result = call float @llvm.maximumnum.f32(float %fabs.x, float %fabs.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX9-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX10-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX11-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_fneg:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, -v0, -v0 :: v_dual_max_num_f32 v1, -v1, -v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg float %x
- %fneg.y = fneg float %y
- %result = call float @llvm.maximumnum.f32(float %fneg.x, float %fneg.y)
- ret float %result
-}
-
-define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %result = call half @llvm.maximumnum.f16(half %x, half %fabs.y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %fneg.fabs.y = fneg half %fabs.y
- %result = call half @llvm.maximumnum.f16(half %x, half %fneg.fabs.y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, |v0|
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.x = call half @llvm.fabs.f16(half %x)
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %result = call half @llvm.maximumnum.f16(half %fabs.x, half %fabs.y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, -v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -v1
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX8-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX9-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX10-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg half %x
- %fneg.y = fneg half %y
- %result = call half @llvm.maximumnum.f16(half %fneg.x, half %fneg.y)
- ret half %result
-}
-
-define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX9-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX9-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f64_fneg:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f64_fneg:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg double %x
- %fneg.y = fneg double %y
- %result = call double @llvm.maximumnum.f64(double %fneg.x, double %fneg.y)
- ret double %result
-}
-
-define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v2, v3
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v2f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v2f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
-}
-
-define <2 x half> @v_maximumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v2f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v2f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v2f16_nnan:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v2f16_nnan:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_v2f16_nnan:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v2f16_nnan:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v2f16_nnan:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v2f16_nnan:
+; GFX1170-LABEL: v_maximumnum_f64_1.0:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_v2f16_nnan:
+; GFX12-LABEL: v_maximumnum_f64_1.0:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_v2f16_nnan:
+; GFX1251-LABEL: v_maximumnum_f64_1.0:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
-}
-
-define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v5
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX9-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v3f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
+ %result = call double @llvm.maximumnum.f64(double %x, double 1.0)
+ ret double %result
}
-define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v3f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v3f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v3f16_nnan:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v3f16_nnan:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_v3f16_nnan:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_v3f16_nnan:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
+; GFX7-LABEL: v_maximumnum_f16_s_v:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_maximumnum_v3f16_nnan:
+; GFX8-LABEL: v_maximumnum_f16_s_v:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f16_s_v:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f16_s_v:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16_s_v:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16_s_v:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16_s_v:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_s_v:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_s_v:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_s_v:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_s_v:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %result = call half @llvm.maximumnum.f16(half %x, half %y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
+; GFX7-LABEL: v_maximumnum_f16_v_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f16_v_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f16_v_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f16_v_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16_v_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16_v_s:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16_v_s:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_v_s:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_v_s:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_v_s:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_v_s:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %result = call half @llvm.maximumnum.f16(half %x, half %y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
+; GFX7-LABEL: v_maximumnum_f16_s_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, s17
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f16_s_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f16_s_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f16_s_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16_s_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16_s_s:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, s1, s1
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16_s_s:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_s_s:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, s0, s1
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_s_s:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, s0, s1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f16_s_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f16_s_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: s_max_num_f16 s0, s0, s1
+; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call half @llvm.maximumnum.f16(half %x, half %y)
+ ret half %result
+}
+
+define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_s_v:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_s_v:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f32_s_v:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f32_s_v:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32_s_v:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32_s_v:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32_s_v:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_s_v:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_s_v:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.maximumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_v_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_v_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f32_v_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f32_v_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32_v_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32_v_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32_v_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_v_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_v_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.maximumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_s_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_s_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f32_s_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f32_s_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32_s_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32_s_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32_s_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e64 v0, s0, s1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_s_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: s_max_num_f32 s0, s0, s1
+; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_s_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: s_max_num_f32 s0, s0, s1
+; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.maximumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define double @v_maximumnum_f64_s_v(double inreg %x, double %y) #1 {
+; GFX7-LABEL: v_maximumnum_f64_s_v:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f64_s_v:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f64_s_v:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f64_s_v:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f64_s_v:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f64_s_v:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f64_s_v:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], s[0:1], v[0:1]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f64_s_v:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_s_v:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.maximumnum.f64(double %x, double %y)
+ ret double %result
+}
+
+define double @v_maximumnum_f64_v_s(double %x, double inreg %y) #1 {
+; GFX7-LABEL: v_maximumnum_f64_v_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f64_v_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f64_v_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f64_v_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f64_v_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f64_v_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f64_v_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], s[0:1]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f64_v_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_v_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.maximumnum.f64(double %x, double %y)
+ ret double %result
+}
+
+define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
+; GFX7-LABEL: v_maximumnum_f64_s_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f64_s_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_f64_s_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_f64_s_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f64_s_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f64_s_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f64_s_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], s[0:1], s[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f64_s_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_s_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.maximumnum.f64(double %x, double %y)
+ ret double %result
+}
+
+define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e64 v0, v0, |v1|
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e64 v0, v0, |v1|
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e64 v0, v0, |v1|
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %result = call float @llvm.maximumnum.f32(float %x, float %fabs.y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %fneg.fabs.y = fneg float %fabs.y
+ %result = call float @llvm.maximumnum.f32(float %x, float %fneg.fabs.y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_fabs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_fabs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f32_fabs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32_fabs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32_fabs:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32_fabs:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_fabs:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_fabs:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.x = call float @llvm.fabs.f32(float %x)
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %result = call float @llvm.maximumnum.f32(float %fabs.x, float %fabs.y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_fneg:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f32_fneg:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f32_fneg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f32_fneg:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f32_fneg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f32_fneg:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e64 v0, -v0, -v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_fneg:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_fneg:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e64 v0, -v0, -v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg float %x
+ %fneg.y = fneg float %y
+ %result = call float @llvm.maximumnum.f32(float %fneg.x, float %fneg.y)
+ ret float %result
+}
+
+define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
+; GFX7-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, |v1|
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, |v1|
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, |v1|
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %result = call half @llvm.maximumnum.f16(half %x, half %fabs.y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
+; GFX7-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %fneg.fabs.y = fneg half %fabs.y
+ %result = call half @llvm.maximumnum.f16(half %x, half %fneg.fabs.y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
+; GFX7-LABEL: v_maximumnum_f16_fabs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-NEXT: v_cvt_f32_f16_e64 v0, |v0|
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f16_fabs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f16_fabs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16_fabs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16_fabs:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16_fabs:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fabs:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fabs:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_fabs:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_fabs:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.x = call half @llvm.fabs.f16(half %x)
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %result = call half @llvm.maximumnum.f16(half %fabs.x, half %fabs.y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
+; GFX7-LABEL: v_maximumnum_f16_fneg:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -v1
+; GFX7-NEXT: v_cvt_f32_f16_e64 v0, -v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f16_fneg:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX8-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f16_fneg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX9-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f16_fneg:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX10-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_maximumnum_f16_fneg:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_maximumnum_f16_fneg:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fneg:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fneg:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, -v0, -v1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_fneg:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_fneg:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, -v0, -v1
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, -v0, -v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg half %x
+ %fneg.y = fneg half %y
+ %result = call half @llvm.maximumnum.f16(half %fneg.x, half %fneg.y)
+ ret half %result
+}
+
+define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
+; GFX7-LABEL: v_maximumnum_f64_fneg:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX7-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_f64_fneg:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX8-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_f64_fneg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX9-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_f64_fneg:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX10-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_f64_fneg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX11-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_f64_fneg:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f64_fneg:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_fneg:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg double %x
+ %fneg.y = fneg double %y
+ %result = call double @llvm.maximumnum.f64(double %fneg.x, double %fneg.y)
+ ret double %result
+}
+
+define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v2f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v2f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v2f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v2f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v2f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v2f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v2f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v2f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
+}
+
+define <2 x half> @v_maximumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v2f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v2f16_nnan:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_v2f16_nnan:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v2f16_nnan:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v2f16_nnan:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v2f16_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v2f16_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
+}
+
+define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v3f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v3f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_v3f16:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX9-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX9-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v3f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v3f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_maximumnum_v3f16:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_v3f16:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v3
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_v3f16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_v3f16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v3
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_v3f16:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_v3f16:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v3
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
+}
+
+define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v3f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v3f16_nnan:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_v3f16_nnan:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v3f16_nnan:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_maximumnum_v3f16_nnan:
@@ -5170,14 +2795,138 @@ define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1170-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_maximum_f16 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v3f16_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_maximum_f16 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
+}
+
+define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v4f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v5, v6, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v4f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v4f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX900-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v4f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX950-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v4f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v4f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v4f16:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_v3f16_nnan:
+; GFX12-LABEL: v_maximumnum_v4f16:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
@@ -5188,356 +2937,57 @@ define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1251-LABEL: v_maximumnum_v4f16:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
-}
-
-define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v6, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v5
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v2, v5
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v4f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v4f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
ret <4 x half> %result
}
define <4 x half> @v_maximumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v4f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v6, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v4f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v4f16_nnan:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v4f16_nnan:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v3
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v4f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v5, v6, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v4f16_nnan:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_maximumnum_v4f16_nnan:
; GFX9: ; %bb.0:
@@ -5585,2975 +3035,1416 @@ define <4 x half> @v_maximumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
- ret <4 x half> %result
-}
-
-define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v6, v6, v7
-; GFX7-SDAG-NEXT: v_max_f32_e32 v8, v8, v9
-; GFX7-SDAG-NEXT: v_max_f32_e32 v9, v10, v11
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v6
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v9
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v4
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v6, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v6, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v6, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v7
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v6
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v6, v7
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v3, v7
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v7
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v6, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v3, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v4, v2
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v3
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v3
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v3
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v3
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v5
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v5
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v5
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v5
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v6f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v6f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <6 x half> @llvm.maximumnum.v6f16(<6 x half> %x, <6 x half> %y)
- ret <6 x half> %result
-}
-
-define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v14, 16, v2
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v15, 16, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_max_f32_e32 v11, v11, v12
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v8, v8, v9
-; GFX7-SDAG-NEXT: v_max_f32_e32 v12, v14, v12
-; GFX7-SDAG-NEXT: v_max_f32_e32 v10, v10, v13
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v7
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v6
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v11
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v8, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v13
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v6
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v5
-; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v14
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v3
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v7
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v6
-; GFX7-GISEL-NEXT: v_max_f32_e32 v6, v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v15
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v7
-; GFX7-GISEL-NEXT: v_max_f32_e32 v7, v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v7
-; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v7
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v6
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v11
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v8, v9
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v9
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v6, v6
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v5, v9
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v7, v7
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v6, v9
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v8, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v5, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v6, v3
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v4
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v4
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v4
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v4
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v6
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v7
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v6
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v7
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v6
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v7
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v6
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v7
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v8f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v8f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> %x, <8 x half> %y)
- ret <8 x half> %result
-}
-
-define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v17, 16, v7
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v18, 16, v14
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v19, 16, v6
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v13
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v5
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v12
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_max_f32_e32 v16, v17, v16
-; GFX7-SDAG-NEXT: v_max_f32_e32 v17, v19, v18
-; GFX7-SDAG-NEXT: v_max_f32_e32 v18, v21, v20
-; GFX7-SDAG-NEXT: v_max_f32_e32 v19, v23, v22
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v11
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v10
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v24, 16, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v20, v21, v20
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-SDAG-NEXT: v_max_f32_e32 v21, v23, v22
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v9
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v22, v23, v22
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v8
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v23, v24, v23
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v23
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v9
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v22
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v21
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v5, v13
-; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v11
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v18
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v20
-; GFX7-SDAG-NEXT: v_max_f32_e32 v7, v7, v15
-; GFX7-SDAG-NEXT: v_max_f32_e32 v6, v6, v14
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v12
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v19
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v10
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v9
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v9
-; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v8
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v9
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-GISEL-NEXT: v_max_f32_e32 v8, v17, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_max_f32_e32 v16, v16, v18
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-GISEL-NEXT: v_max_f32_e32 v9, v17, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v4
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v11
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_max_f32_e32 v10, v17, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v5
-; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v4, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v13
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-GISEL-NEXT: v_max_f32_e32 v11, v17, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v6
-; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v5, v13
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v7
-; GFX7-GISEL-NEXT: v_max_f32_e32 v12, v17, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-GISEL-NEXT: v_max_f32_e32 v6, v6, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v15
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-GISEL-NEXT: v_max_f32_e32 v13, v19, v13
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-GISEL-NEXT: v_max_f32_e32 v7, v7, v14
-; GFX7-GISEL-NEXT: v_max_f32_e32 v14, v15, v17
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v4, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v12
-; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v5, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v13
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v16
-; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v6, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v14
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v15
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v14
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v13
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v12
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v11
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v10
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v9
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v8
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v23
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v22
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v21
-; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v20
-; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v19
-; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v18
-; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v17
-; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v16
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v8, v8
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v16, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v9, v9
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v8, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v10, v10
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v9, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v10, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v11, v11
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v10, v10, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v11, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v12, v12
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v11, v11, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v12, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v13, v13
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v12, v12, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v13, v6, v6
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v14, v14
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v13, v13, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v14 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v14, v7, v7
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v15, v15
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v14, v14, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v16, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v8, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v10, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v11, v4
-; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v12, v5
-; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v13, v6
-; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v14, v7
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v8
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v8
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v8
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v8
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v9
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v10
-; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v9
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v10
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v11
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v12
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v9
-; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v10
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v9
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v10
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v11
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v12
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v9
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v10
-; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v9
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v10
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v11
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v12
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v9
-; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v10
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v9
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v10
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v11
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v12
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v8
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v9
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v10
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v8
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v9
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v10
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v16f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v16f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v8
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v9
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v10
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <16 x half> @llvm.maximumnum.v16f16(<16 x half> %x, <16 x half> %y)
- ret <16 x half> %result
-}
-
-define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v31, 16, v30
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v32, 16, v14
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v34, 16, v13
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v28
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v36, 16, v12
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v37, 16, v27
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v39, 16, v26
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v48, 16, v10
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v25
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v9
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v24
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v8
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v23
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v31, v31
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v32, v32
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v33, v33
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v34, v34
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v36, v36
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v37, v37
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v38, v38
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v39, v39
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v48, v48
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-SDAG-NEXT: v_max_f32_e32 v31, v32, v31
-; GFX7-SDAG-NEXT: v_max_f32_e32 v33, v34, v33
-; GFX7-SDAG-NEXT: v_max_f32_e32 v32, v36, v35
-; GFX7-SDAG-NEXT: v_max_f32_e32 v34, v38, v37
-; GFX7-SDAG-NEXT: v_max_f32_e32 v36, v48, v39
-; GFX7-SDAG-NEXT: v_max_f32_e32 v37, v51, v50
-; GFX7-SDAG-NEXT: v_max_f32_e32 v38, v53, v52
-; GFX7-SDAG-NEXT: v_max_f32_e32 v39, v55, v54
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v20
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v19
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v18
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-SDAG-NEXT: v_max_f32_e32 v50, v51, v50
-; GFX7-SDAG-NEXT: v_max_f32_e32 v51, v53, v52
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; GFX7-SDAG-NEXT: v_max_f32_e32 v52, v55, v54
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v40, 16, v22
-; GFX7-SDAG-NEXT: v_max_f32_e32 v53, v54, v53
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v6
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v40, v40
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v43, 16, v21
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v44, 16, v5
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v43, v43
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v44, v44
-; GFX7-SDAG-NEXT: v_max_f32_e32 v48, v41, v40
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v49
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v19
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v51
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v42, v42
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-SDAG-NEXT: v_max_f32_e32 v40, v44, v43
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_max_f32_e32 v35, v42, v35
-; GFX7-SDAG-NEXT: v_max_f32_e32 v54, v41, v55
-; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v40
-; GFX7-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v18
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v54
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v52
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v5, v21
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v20
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v50
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_max_f32_e32 v7, v7, v23
-; GFX7-SDAG-NEXT: v_max_f32_e32 v6, v6, v22
-; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v48
-; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v39
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v25, v25
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_max_f32_e32 v9, v9, v25
-; GFX7-SDAG-NEXT: v_max_f32_e32 v8, v8, v24
-; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v38
-; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v37
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v27, v27
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v26, v26
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_max_f32_e32 v11, v11, v27
-; GFX7-SDAG-NEXT: v_max_f32_e32 v10, v10, v26
-; GFX7-SDAG-NEXT: v_or_b32_e32 v8, v8, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v36
-; GFX7-SDAG-NEXT: v_or_b32_e32 v9, v9, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v34
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v49, v49
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v29, v29
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v28, v28
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_max_f32_e32 v15, v15, v49
-; GFX7-SDAG-NEXT: v_max_f32_e32 v14, v14, v30
-; GFX7-SDAG-NEXT: v_max_f32_e32 v13, v13, v29
-; GFX7-SDAG-NEXT: v_max_f32_e32 v12, v12, v28
-; GFX7-SDAG-NEXT: v_or_b32_e32 v10, v10, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v35
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v33
-; GFX7-SDAG-NEXT: v_or_b32_e32 v11, v11, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v31
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v19, v32
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v15, v15
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_or_b32_e32 v12, v12, v19
-; GFX7-SDAG-NEXT: v_or_b32_e32 v13, v13, v18
-; GFX7-SDAG-NEXT: v_or_b32_e32 v14, v14, v17
-; GFX7-SDAG-NEXT: v_or_b32_e32 v15, v15, v16
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v31, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v16
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-GISEL-NEXT: v_max_f32_e32 v31, v31, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v17
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; GFX7-GISEL-NEXT: v_max_f32_e32 v16, v0, v16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v18
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v17
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-GISEL-NEXT: v_max_f32_e32 v17, v17, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v19
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; GFX7-GISEL-NEXT: v_max_f32_e32 v18, v2, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v3
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v20
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v4
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-GISEL-NEXT: v_max_f32_e32 v19, v19, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v21
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v21, 16, v21
-; GFX7-GISEL-NEXT: v_max_f32_e32 v20, v4, v20
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v5
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v4, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v22
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v22, 16, v22
-; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v5, v21
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v6
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-GISEL-NEXT: v_max_f32_e32 v21, v21, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v23
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v23, 16, v23
-; GFX7-GISEL-NEXT: v_max_f32_e32 v6, v6, v22
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v7
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-GISEL-NEXT: v_max_f32_e32 v22, v22, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v24
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; GFX7-GISEL-NEXT: v_max_f32_e32 v7, v7, v23
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v8
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-GISEL-NEXT: v_max_f32_e32 v23, v23, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v25
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v25, 16, v25
-; GFX7-GISEL-NEXT: v_max_f32_e32 v8, v8, v24
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v9
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v25
-; GFX7-GISEL-NEXT: v_max_f32_e32 v24, v24, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v26
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v26, 16, v26
-; GFX7-GISEL-NEXT: v_max_f32_e32 v9, v9, v25
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v26
-; GFX7-GISEL-NEXT: v_max_f32_e32 v25, v25, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v27
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v27, 16, v27
-; GFX7-GISEL-NEXT: v_max_f32_e32 v10, v10, v26
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v11
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v27
-; GFX7-GISEL-NEXT: v_max_f32_e32 v26, v26, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v28
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v28, 16, v28
-; GFX7-GISEL-NEXT: v_max_f32_e32 v11, v11, v27
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v28
-; GFX7-GISEL-NEXT: v_max_f32_e32 v27, v27, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v29
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v29, 16, v29
-; GFX7-GISEL-NEXT: v_max_f32_e32 v12, v12, v28
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v13
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v29
-; GFX7-GISEL-NEXT: v_max_f32_e32 v28, v28, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v30
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; GFX7-GISEL-NEXT: v_max_f32_e32 v13, v13, v29
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v14
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-GISEL-NEXT: v_max_f32_e32 v29, v29, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v15
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; GFX7-GISEL-NEXT: v_max_f32_e32 v14, v14, v30
-; GFX7-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v17
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v33, v30
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-GISEL-NEXT: v_max_f32_e32 v32, v32, v33
-; GFX7-GISEL-NEXT: v_max_f32_e32 v15, v15, v30
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v30, v31
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v31, v0
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v0, 16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v18
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v15, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v30, v0
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v20
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v19
-; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v16
-; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v17, v4
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v21
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v22
-; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v18, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v29
-; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v16, v6
-; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v17, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v23
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v24
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v19, v32
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v8, v16, v8
-; GFX7-GISEL-NEXT: v_or_b32_e32 v9, v17, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v25
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v26
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v31, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v14, v18, v14
-; GFX7-GISEL-NEXT: v_or_b32_e32 v10, v16, v10
-; GFX7-GISEL-NEXT: v_or_b32_e32 v11, v17, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v27
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v28
-; GFX7-GISEL-NEXT: v_or_b32_e32 v15, v19, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v12, v16, v12
-; GFX7-GISEL-NEXT: v_or_b32_e32 v13, v17, v13
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v17, v17, v17
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v17
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v40
-; GFX8-SDAG-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v30, v30, v30
-; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-SDAG-NEXT: v_max_f16_e32 v29, v29, v29
-; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-SDAG-NEXT: v_max_f16_e32 v28, v28, v28
-; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-SDAG-NEXT: v_max_f16_e32 v27, v27, v27
-; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-SDAG-NEXT: v_max_f16_e32 v26, v26, v26
-; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-SDAG-NEXT: v_max_f16_e32 v25, v25, v25
-; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-SDAG-NEXT: v_max_f16_e32 v24, v24, v24
-; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-SDAG-NEXT: v_max_f16_e32 v23, v23, v23
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-SDAG-NEXT: v_max_f16_e32 v22, v22, v22
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-SDAG-NEXT: v_max_f16_e32 v21, v21, v21
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v20, v20, v20
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v19, v19, v19
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v18, v18, v18
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v16, v16, v16
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v30
-; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v29
-; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v28
-; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v27
-; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v26
-; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v25
-; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v24
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v23
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v22
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v21
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v20
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v19
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v18
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v16
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v33
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v55
-; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v54
-; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v53
-; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v52
-; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v51
-; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v50
-; GFX8-SDAG-NEXT: v_or_b32_e32 v8, v8, v49
-; GFX8-SDAG-NEXT: v_or_b32_e32 v9, v9, v48
-; GFX8-SDAG-NEXT: v_or_b32_e32 v10, v10, v39
-; GFX8-SDAG-NEXT: v_or_b32_e32 v11, v11, v38
-; GFX8-SDAG-NEXT: v_or_b32_e32 v12, v12, v36
-; GFX8-SDAG-NEXT: v_or_b32_e32 v13, v13, v34
-; GFX8-SDAG-NEXT: v_or_b32_e32 v14, v14, v32
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v31, v31, v31
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v31
-; GFX8-SDAG-NEXT: v_or_b32_e32 v15, v15, v35
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v31, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v16, v16
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v16, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v31, v31, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v17, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v17, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v16, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v18, v18
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v18, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v17, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v18, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v19, v19
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v19, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v18, v18, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v19, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v20, v20
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v20, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v19, v19, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v20, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v21, v21
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v21, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v20, v20, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v21, v6, v6
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v22, v22
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v22, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v21, v21, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v22, v7, v7
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v23, v23
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v23, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v22, v22, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v23, v8, v8
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v24, v24
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v24, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v23, v23, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v24 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v24, v9, v9
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v25, v25
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v25, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v24, v24, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v25, v10, v10
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v26, v26
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v26, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v25, v25, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v26 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v26, v11, v11
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v27, v27
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v27, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v26, v26, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v27, v12, v12
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v28, v28
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v28, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v27, v27, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v28 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v28, v13, v13
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v29, v29
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v29, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v28, v28, v32
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v29, v14, v14
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v30, v30
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
-; GFX8-GISEL-NEXT: v_max_f16_e32 v29, v29, v32
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v15, v15
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v31, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v16, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v19, v4
-; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v20, v5
-; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v21, v6
-; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v22, v7
-; GFX8-GISEL-NEXT: v_or_b32_e32 v8, v23, v8
-; GFX8-GISEL-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX8-GISEL-NEXT: v_or_b32_e32 v10, v25, v10
-; GFX8-GISEL-NEXT: v_or_b32_e32 v11, v26, v11
-; GFX8-GISEL-NEXT: v_or_b32_e32 v12, v27, v12
-; GFX8-GISEL-NEXT: v_or_b32_e32 v13, v28, v13
-; GFX8-GISEL-NEXT: v_or_b32_e32 v14, v29, v14
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v33, v30, v30
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v32, v33
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v15, v32, v15
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v17, v17
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v18, v18
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v19, v19
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v16
-; GFX900-SDAG-NEXT: buffer_load_dword v16, off, s[0:3], s32
-; GFX900-SDAG-NEXT: v_pk_max_f16 v17, v20, v20
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v18, v21, v21
-; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-SDAG-NEXT: v_pk_max_f16 v19, v22, v22
-; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-SDAG-NEXT: v_pk_max_f16 v20, v23, v23
-; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-SDAG-NEXT: v_pk_max_f16 v21, v24, v24
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v22, v25, v25
-; GFX900-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX900-SDAG-NEXT: v_pk_max_f16 v23, v26, v26
-; GFX900-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX900-SDAG-NEXT: v_pk_max_f16 v24, v27, v27
-; GFX900-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX900-SDAG-NEXT: v_pk_max_f16 v25, v28, v28
-; GFX900-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX900-SDAG-NEXT: v_pk_max_f16 v26, v29, v29
-; GFX900-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX900-SDAG-NEXT: v_pk_max_f16 v27, v30, v30
-; GFX900-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX900-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v17
-; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v18
-; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v19
-; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v20
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v21
-; GFX900-SDAG-NEXT: v_pk_max_f16 v9, v9, v22
-; GFX900-SDAG-NEXT: v_pk_max_f16 v10, v10, v23
-; GFX900-SDAG-NEXT: v_pk_max_f16 v11, v11, v24
-; GFX900-SDAG-NEXT: v_pk_max_f16 v12, v12, v25
-; GFX900-SDAG-NEXT: v_pk_max_f16 v13, v13, v26
-; GFX900-SDAG-NEXT: v_pk_max_f16 v14, v14, v27
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v17, v17
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v18, v18
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v19, v19
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v16
-; GFX900-GISEL-NEXT: buffer_load_dword v16, off, s[0:3], s32
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v17, v20, v20
-; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-GISEL-NEXT: v_pk_max_f16 v18, v21, v21
-; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-GISEL-NEXT: v_pk_max_f16 v19, v22, v22
-; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-GISEL-NEXT: v_pk_max_f16 v20, v23, v23
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v21, v24, v24
-; GFX900-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX900-GISEL-NEXT: v_pk_max_f16 v22, v25, v25
-; GFX900-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX900-GISEL-NEXT: v_pk_max_f16 v23, v26, v26
-; GFX900-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX900-GISEL-NEXT: v_pk_max_f16 v24, v27, v27
-; GFX900-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX900-GISEL-NEXT: v_pk_max_f16 v25, v28, v28
-; GFX900-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX900-GISEL-NEXT: v_pk_max_f16 v26, v29, v29
-; GFX900-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX900-GISEL-NEXT: v_pk_max_f16 v27, v30, v30
-; GFX900-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v17
-; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v18
-; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v19
-; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v20
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v21
-; GFX900-GISEL-NEXT: v_pk_max_f16 v9, v9, v22
-; GFX900-GISEL-NEXT: v_pk_max_f16 v10, v10, v23
-; GFX900-GISEL-NEXT: v_pk_max_f16 v11, v11, v24
-; GFX900-GISEL-NEXT: v_pk_max_f16 v12, v12, v25
-; GFX900-GISEL-NEXT: v_pk_max_f16 v13, v13, v26
-; GFX900-GISEL-NEXT: v_pk_max_f16 v14, v14, v27
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: scratch_load_dword v31, off, s32
-; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX950-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX950-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX950-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX950-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX950-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX950-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX950-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX950-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX950-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX950-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX950-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX950-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX950-SDAG-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX950-SDAG-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX950-SDAG-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX950-SDAG-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX950-SDAG-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX950-SDAG-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: scratch_load_dword v31, off, s32
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX950-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX950-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX950-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX950-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX950-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX950-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX950-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX950-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX950-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX950-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX950-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX950-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX950-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX950-GISEL-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX950-GISEL-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX950-GISEL-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX950-GISEL-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX950-GISEL-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX950-GISEL-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX10-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX10-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX10-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX10-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX10-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX10-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX10-SDAG-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX10-SDAG-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX10-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX10-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX10-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX10-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX10-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX10-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX10-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX10-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX10-GISEL-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX10-GISEL-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX10-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX11-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX11-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX11-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX11-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX11-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX11-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX11-SDAG-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX11-SDAG-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX11-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX11-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX11-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX11-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX11-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX11-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX11-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX11-GISEL-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX11-GISEL-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v32f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v32f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32 nv
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <32 x half> @llvm.maximumnum.v32f16(<32 x half> %x, <32 x half> %y)
- ret <32 x half> %result
-}
-
-define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX8-GISEL-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v3, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v3, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v2 :: v_dual_max_f32 v1, v1, v3
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v2 :: v_dual_max_f32 v1, v1, v3
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v2f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v2f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %result
+}
+
+define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v6f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_max_f32_e32 v6, v6, v7
+; GFX7-NEXT: v_max_f32_e32 v8, v8, v9
+; GFX7-NEXT: v_max_f32_e32 v9, v10, v11
+; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v6f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v5
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v4
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v6
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v6f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX900-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX900-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v3
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v6f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX950-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX950-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v3
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v6f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v6f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v6f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v6f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v6f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <6 x half> @llvm.maximumnum.v6f16(<6 x half> %x, <6 x half> %y)
+ ret <6 x half> %result
+}
+
+define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v8f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v13, 16, v5
+; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_max_f32_e32 v11, v11, v12
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_max_f32_e32 v8, v8, v9
+; GFX7-NEXT: v_max_f32_e32 v12, v14, v12
+; GFX7-NEXT: v_max_f32_e32 v10, v10, v13
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-NEXT: v_max_f32_e32 v3, v3, v7
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v6
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v12
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX7-NEXT: v_or_b32_e32 v3, v3, v11
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v8f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v7
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v6
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v5
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v4
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX8-NEXT: v_or_b32_e32 v3, v3, v8
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v8f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX900-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX900-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v4
+; GFX900-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v4
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v8f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX950-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX950-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v4
+; GFX950-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v4
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v8f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v5
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v6
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v7
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v8f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v5
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v6
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v7
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v8f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1170-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v8f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v8f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1251-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> %x, <8 x half> %y)
+ ret <8 x half> %result
+}
+
+define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v16f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v16, 16, v15
+; GFX7-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; GFX7-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX7-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v13
+; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v5
+; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_max_f32_e32 v16, v17, v16
+; GFX7-NEXT: v_max_f32_e32 v17, v19, v18
+; GFX7-NEXT: v_max_f32_e32 v18, v21, v20
+; GFX7-NEXT: v_max_f32_e32 v19, v23, v22
+; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v10
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX7-NEXT: v_max_f32_e32 v20, v21, v20
+; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-NEXT: v_max_f32_e32 v21, v23, v22
+; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v9
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_max_f32_e32 v22, v23, v22
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v8
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_max_f32_e32 v23, v24, v23
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v23
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v9
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v22
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v10
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v21
+; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-NEXT: v_max_f32_e32 v5, v5, v13
+; GFX7-NEXT: v_max_f32_e32 v3, v3, v11
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v18
+; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v20
+; GFX7-NEXT: v_max_f32_e32 v7, v7, v15
+; GFX7-NEXT: v_max_f32_e32 v6, v6, v14
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v12
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v19
+; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-NEXT: v_or_b32_e32 v3, v3, v10
+; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX7-NEXT: v_or_b32_e32 v5, v5, v9
+; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX7-NEXT: v_or_b32_e32 v4, v4, v10
+; GFX7-NEXT: v_or_b32_e32 v6, v6, v9
+; GFX7-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v16f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v15
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v14
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v13
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v12
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v11
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v10
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v9
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v8
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v23
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v22
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v21
+; GFX8-NEXT: v_or_b32_e32 v3, v3, v20
+; GFX8-NEXT: v_or_b32_e32 v4, v4, v19
+; GFX8-NEXT: v_or_b32_e32 v5, v5, v18
+; GFX8-NEXT: v_or_b32_e32 v6, v6, v17
+; GFX8-NEXT: v_or_b32_e32 v7, v7, v16
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v16f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-NEXT: v_pk_max_f16 v5, v5, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-NEXT: v_pk_max_f16 v6, v6, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-NEXT: v_pk_max_f16 v7, v7, v8
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v16f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-NEXT: v_pk_max_f16 v5, v5, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-NEXT: v_pk_max_f16 v6, v6, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_max_f16 v7, v7, v8
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v16f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX10-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v9
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v10
+; GFX10-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v9
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v10
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v11
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v16f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX11-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v9
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v10
+; GFX11-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v9
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v10
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v11
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v16f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1170-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX1170-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX1170-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX1170-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX1170-NEXT: v_pk_max_num_f16 v7, v7, v15
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v16f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX12-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX12-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX12-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX12-NEXT: v_pk_max_num_f16 v7, v7, v15
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v16f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1251-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX1251-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX1251-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX1251-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX1251-NEXT: v_pk_max_num_f16 v7, v7, v15
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <16 x half> @llvm.maximumnum.v16f16(<16 x half> %x, <16 x half> %y)
+ ret <16 x half> %result
+}
+
+define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v32f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_load_dword v49, off, s[0:3], s32
+; GFX7-NEXT: v_lshrrev_b32_e32 v31, 16, v30
+; GFX7-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX7-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX7-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v28
+; GFX7-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX7-NEXT: v_lshrrev_b32_e32 v37, 16, v27
+; GFX7-NEXT: v_lshrrev_b32_e32 v38, 16, v11
+; GFX7-NEXT: v_lshrrev_b32_e32 v39, 16, v26
+; GFX7-NEXT: v_lshrrev_b32_e32 v48, 16, v10
+; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v25
+; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v9
+; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v24
+; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v8
+; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v23
+; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v31, v31
+; GFX7-NEXT: v_cvt_f32_f16_e32 v32, v32
+; GFX7-NEXT: v_cvt_f32_f16_e32 v33, v33
+; GFX7-NEXT: v_cvt_f32_f16_e32 v34, v34
+; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-NEXT: v_cvt_f32_f16_e32 v36, v36
+; GFX7-NEXT: v_cvt_f32_f16_e32 v37, v37
+; GFX7-NEXT: v_cvt_f32_f16_e32 v38, v38
+; GFX7-NEXT: v_cvt_f32_f16_e32 v39, v39
+; GFX7-NEXT: v_cvt_f32_f16_e32 v48, v48
+; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-NEXT: v_max_f32_e32 v31, v32, v31
+; GFX7-NEXT: v_max_f32_e32 v33, v34, v33
+; GFX7-NEXT: v_max_f32_e32 v32, v36, v35
+; GFX7-NEXT: v_max_f32_e32 v34, v38, v37
+; GFX7-NEXT: v_max_f32_e32 v36, v48, v39
+; GFX7-NEXT: v_max_f32_e32 v37, v51, v50
+; GFX7-NEXT: v_max_f32_e32 v38, v53, v52
+; GFX7-NEXT: v_max_f32_e32 v39, v55, v54
+; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v20
+; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v19
+; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v18
+; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-NEXT: v_max_f32_e32 v50, v51, v50
+; GFX7-NEXT: v_max_f32_e32 v51, v53, v52
+; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v17
+; GFX7-NEXT: v_max_f32_e32 v52, v55, v54
+; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v40, 16, v22
+; GFX7-NEXT: v_max_f32_e32 v53, v54, v53
+; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v6
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v40, v40
+; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v43, 16, v21
+; GFX7-NEXT: v_lshrrev_b32_e32 v44, 16, v5
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_lshrrev_b32_e32 v42, 16, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v43, v43
+; GFX7-NEXT: v_cvt_f32_f16_e32 v44, v44
+; GFX7-NEXT: v_max_f32_e32 v48, v41, v40
+; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v16
+; GFX7-NEXT: s_waitcnt vmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v49
+; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v0
+; GFX7-NEXT: v_max_f32_e32 v3, v3, v19
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v51
+; GFX7-NEXT: v_cvt_f32_f16_e32 v42, v42
+; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-NEXT: v_max_f32_e32 v40, v44, v43
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_max_f32_e32 v35, v42, v35
+; GFX7-NEXT: v_max_f32_e32 v54, v41, v55
+; GFX7-NEXT: v_or_b32_e32 v3, v3, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v40
+; GFX7-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v18
+; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v54
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v52
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_max_f32_e32 v5, v5, v21
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v20
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v50
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_max_f32_e32 v7, v7, v23
+; GFX7-NEXT: v_max_f32_e32 v6, v6, v22
+; GFX7-NEXT: v_or_b32_e32 v4, v4, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v48
+; GFX7-NEXT: v_or_b32_e32 v5, v5, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v39
+; GFX7-NEXT: v_cvt_f32_f16_e32 v25, v25
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_max_f32_e32 v9, v9, v25
+; GFX7-NEXT: v_max_f32_e32 v8, v8, v24
+; GFX7-NEXT: v_or_b32_e32 v6, v6, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v38
+; GFX7-NEXT: v_or_b32_e32 v7, v7, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v37
+; GFX7-NEXT: v_cvt_f32_f16_e32 v27, v27
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_cvt_f32_f16_e32 v26, v26
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_max_f32_e32 v11, v11, v27
+; GFX7-NEXT: v_max_f32_e32 v10, v10, v26
+; GFX7-NEXT: v_or_b32_e32 v8, v8, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v36
+; GFX7-NEXT: v_or_b32_e32 v9, v9, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v34
+; GFX7-NEXT: v_cvt_f32_f16_e32 v49, v49
+; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-NEXT: v_cvt_f32_f16_e32 v29, v29
+; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-NEXT: v_cvt_f32_f16_e32 v28, v28
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_max_f32_e32 v15, v15, v49
+; GFX7-NEXT: v_max_f32_e32 v14, v14, v30
+; GFX7-NEXT: v_max_f32_e32 v13, v13, v29
+; GFX7-NEXT: v_max_f32_e32 v12, v12, v28
+; GFX7-NEXT: v_or_b32_e32 v10, v10, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v35
+; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v33
+; GFX7-NEXT: v_or_b32_e32 v11, v11, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v31
+; GFX7-NEXT: v_cvt_f16_f32_e32 v19, v32
+; GFX7-NEXT: v_cvt_f16_f32_e32 v15, v15
+; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX7-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_or_b32_e32 v12, v12, v19
+; GFX7-NEXT: v_or_b32_e32 v13, v13, v18
+; GFX7-NEXT: v_or_b32_e32 v14, v14, v17
+; GFX7-NEXT: v_or_b32_e32 v15, v15, v16
+; GFX7-NEXT: s_waitcnt vmcnt(0)
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v32f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX8-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v17, v17, v17
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v17
+; GFX8-NEXT: v_max_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v40
+; GFX8-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX8-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-NEXT: v_max_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v30, v30, v30
+; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-NEXT: v_max_f16_e32 v29, v29, v29
+; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-NEXT: v_max_f16_e32 v28, v28, v28
+; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-NEXT: v_max_f16_e32 v27, v27, v27
+; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-NEXT: v_max_f16_e32 v26, v26, v26
+; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-NEXT: v_max_f16_e32 v25, v25, v25
+; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-NEXT: v_max_f16_e32 v24, v24, v24
+; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-NEXT: v_max_f16_e32 v23, v23, v23
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-NEXT: v_max_f16_e32 v22, v22, v22
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-NEXT: v_max_f16_e32 v21, v21, v21
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v20, v20, v20
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v19, v19, v19
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v18, v18, v18
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v16, v16, v16
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_max_f16_e32 v14, v14, v30
+; GFX8-NEXT: v_max_f16_e32 v13, v13, v29
+; GFX8-NEXT: v_max_f16_e32 v12, v12, v28
+; GFX8-NEXT: v_max_f16_e32 v11, v11, v27
+; GFX8-NEXT: v_max_f16_e32 v10, v10, v26
+; GFX8-NEXT: v_max_f16_e32 v9, v9, v25
+; GFX8-NEXT: v_max_f16_e32 v8, v8, v24
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v23
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v22
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v21
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v20
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v19
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v18
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v16
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v33
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v55
+; GFX8-NEXT: v_or_b32_e32 v3, v3, v54
+; GFX8-NEXT: v_or_b32_e32 v4, v4, v53
+; GFX8-NEXT: v_or_b32_e32 v5, v5, v52
+; GFX8-NEXT: v_or_b32_e32 v6, v6, v51
+; GFX8-NEXT: v_or_b32_e32 v7, v7, v50
+; GFX8-NEXT: v_or_b32_e32 v8, v8, v49
+; GFX8-NEXT: v_or_b32_e32 v9, v9, v48
+; GFX8-NEXT: v_or_b32_e32 v10, v10, v39
+; GFX8-NEXT: v_or_b32_e32 v11, v11, v38
+; GFX8-NEXT: v_or_b32_e32 v12, v12, v36
+; GFX8-NEXT: v_or_b32_e32 v13, v13, v34
+; GFX8-NEXT: v_or_b32_e32 v14, v14, v32
+; GFX8-NEXT: s_waitcnt vmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v31, v31, v31
+; GFX8-NEXT: v_max_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v15, v15, v31
+; GFX8-NEXT: v_or_b32_e32 v15, v15, v35
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v32f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX900-NEXT: v_pk_max_f16 v16, v17, v17
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v16
+; GFX900-NEXT: v_pk_max_f16 v16, v18, v18
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v16
+; GFX900-NEXT: v_pk_max_f16 v16, v19, v19
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v16
+; GFX900-NEXT: buffer_load_dword v16, off, s[0:3], s32
+; GFX900-NEXT: v_pk_max_f16 v17, v20, v20
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-NEXT: v_pk_max_f16 v18, v21, v21
+; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-NEXT: v_pk_max_f16 v19, v22, v22
+; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-NEXT: v_pk_max_f16 v20, v23, v23
+; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-NEXT: v_pk_max_f16 v21, v24, v24
+; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-NEXT: v_pk_max_f16 v22, v25, v25
+; GFX900-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX900-NEXT: v_pk_max_f16 v23, v26, v26
+; GFX900-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX900-NEXT: v_pk_max_f16 v24, v27, v27
+; GFX900-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX900-NEXT: v_pk_max_f16 v25, v28, v28
+; GFX900-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX900-NEXT: v_pk_max_f16 v26, v29, v29
+; GFX900-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX900-NEXT: v_pk_max_f16 v27, v30, v30
+; GFX900-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX900-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v17
+; GFX900-NEXT: v_pk_max_f16 v5, v5, v18
+; GFX900-NEXT: v_pk_max_f16 v6, v6, v19
+; GFX900-NEXT: v_pk_max_f16 v7, v7, v20
+; GFX900-NEXT: v_pk_max_f16 v8, v8, v21
+; GFX900-NEXT: v_pk_max_f16 v9, v9, v22
+; GFX900-NEXT: v_pk_max_f16 v10, v10, v23
+; GFX900-NEXT: v_pk_max_f16 v11, v11, v24
+; GFX900-NEXT: v_pk_max_f16 v12, v12, v25
+; GFX900-NEXT: v_pk_max_f16 v13, v13, v26
+; GFX900-NEXT: v_pk_max_f16 v14, v14, v27
+; GFX900-NEXT: s_waitcnt vmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v32f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: scratch_load_dword v31, off, s32
+; GFX950-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX950-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX950-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX950-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX950-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX950-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX950-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX950-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX950-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX950-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX950-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX950-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX950-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX950-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX950-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX950-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX950-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX950-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX950-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX950-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX950-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX950-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX950-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX950-NEXT: s_waitcnt vmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v32f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX10-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX10-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX10-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX10-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX10-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX10-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX10-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX10-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX10-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX10-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX10-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX10-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX10-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX10-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX10-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX10-NEXT: s_waitcnt vmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX10-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v32f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX11-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX11-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX11-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX11-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX11-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX11-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX11-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX11-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX11-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX11-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX11-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX11-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX11-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX11-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX11-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v32f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: scratch_load_b32 v31, off, s32
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1170-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1170-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1170-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1170-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1170-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1170-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1170-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1170-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1170-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1170-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1170-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1170-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1170-NEXT: s_waitcnt vmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v15, v15, v31
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v32f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: scratch_load_b32 v31, off, s32
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX12-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX12-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX12-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX12-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX12-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX12-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX12-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX12-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX12-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX12-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX12-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v15, v15, v31
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v32f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1251-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1251-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1251-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1251-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1251-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1251-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1251-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1251-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1251-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1251-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1251-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1251-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v15, v15, v31
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <32 x half> @llvm.maximumnum.v32f16(<32 x half> %x, <32 x half> %y)
+ ret <32 x half> %result
+}
+
+define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v2f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v2f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_v2f32:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX9-NEXT: v_max_f32_e32 v2, v3, v3
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v2f32:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v2f32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_dual_max_f32 v0, v0, v2 :: v_dual_max_f32 v1, v1, v3
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v2f32:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v2f32:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -8620,203 +4511,98 @@ define <2 x float> @v_maximumnum_v2f32_nnan(<2 x float> %x, <2 x float> %y) #1 {
}
define <3 x float> @v_maximumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX8-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX8-GISEL-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v4, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v5, v5
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v4, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v5, v5
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
-; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
-; GFX11-SDAG-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v3 :: v_dual_max_f32 v1, v1, v4
-; GFX11-SDAG-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v3, v3, v3
-; GFX11-GISEL-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v4, v4, v4
-; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v5, v5, v5
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v3 :: v_dual_max_f32 v1, v1, v4
-; GFX11-GISEL-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v3f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v3f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v3f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v3f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_v3f32:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX9-NEXT: v_max_f32_e32 v3, v4, v4
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX9-NEXT: v_max_f32_e32 v3, v5, v5
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v3f32:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v3f32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
+; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
+; GFX11-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_max_f32 v0, v0, v3 :: v_dual_max_f32 v1, v1, v4
+; GFX11-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v3f32:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1170-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v3f32:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v3f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1251-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x float> @llvm.maximumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -8891,232 +4677,111 @@ define <3 x float> @v_maximumnum_v3f32_nnan(<3 x float> %x, <3 x float> %y) #1 {
}
define <4 x float> @v_maximumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-SDAG-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-SDAG-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX8-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX8-GISEL-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX8-GISEL-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v5, v5
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v6, v6
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v7, v7
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v5, v5
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v6, v6
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v7, v7
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f32_e32 v6, v6, v6
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-SDAG-NEXT: v_max_f32_e32 v7, v7, v7
-; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v5
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v6
-; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v7
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-GISEL-NEXT: v_max_f32_e32 v6, v6, v6
-; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-GISEL-NEXT: v_max_f32_e32 v7, v7, v7
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v5
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v6
-; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v7
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
-; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-SDAG-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
-; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v4 :: v_dual_max_f32 v1, v1, v5
-; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v6 :: v_dual_max_f32 v3, v3, v7
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-GISEL-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
-; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-GISEL-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v4 :: v_dual_max_f32 v1, v1, v5
-; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v6 :: v_dual_max_f32 v3, v3, v7
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v4f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v4f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v4f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v4f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_v4f32:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX9-NEXT: v_max_f32_e32 v4, v5, v5
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX9-NEXT: v_max_f32_e32 v4, v6, v6
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX9-NEXT: v_max_f32_e32 v4, v7, v7
+; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v4f32:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f32_e32 v6, v6, v6
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-NEXT: v_max_f32_e32 v7, v7, v7
+; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v5
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v6
+; GFX10-NEXT: v_max_f32_e32 v3, v3, v7
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v4f32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
+; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
+; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_max_f32 v0, v0, v4 :: v_dual_max_f32 v1, v1, v5
+; GFX11-NEXT: v_dual_max_f32 v2, v2, v6 :: v_dual_max_f32 v3, v3, v7
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v4f32:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1170-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v4f32:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX12-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v4f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1251-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x float> @llvm.maximumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -9195,203 +4860,97 @@ define <4 x float> @v_maximumnum_v4f32_nnan(<4 x float> %x, <4 x float> %y) #1 {
}
define <2 x double> @v_maximumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[4:5]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[4:5]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v2f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v2f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v2f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v2f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v2f64:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v2f64:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX950-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[4:5]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v2f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v2f64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v2f64:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v2f64:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -9425,297 +4984,155 @@ define <2 x double> @v_maximumnum_v2f64_nnan(<2 x double> %x, <2 x double> %y) #
; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_maximumnum_v2f64_nnan:
+; GFX11-LABEL: v_maximumnum_v2f64_nnan:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v2f64_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v2f64_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
+ ret <2 x double> %result
+}
+
+define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
+; GFX7-LABEL: v_maximumnum_v3f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v3f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v3f64:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v3f64:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX950-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX950-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[6:7]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v3f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v3f64:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_v2f64_nnan:
+; GFX1170-LABEL: v_maximumnum_v3f64:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[8:9]
+; GFX1170-NEXT: v_max_num_f64 v[4:5], v[4:5], v[10:11]
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_v2f64_nnan:
+; GFX12-LABEL: v_maximumnum_v3f64:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_maximumnum_v2f64_nnan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v2f64_nnan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
- ret <2 x double> %result
-}
-
-define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[6:7]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[6:7]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[8:9]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[10:11]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[8:9]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[10:11]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v3f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v3f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[6:9], v[6:9], v[6:9]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_maximumnum_v3f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x double> @llvm.maximumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -9794,297 +5211,140 @@ define <3 x double> @v_maximumnum_v3f64_nnan(<3 x double> %x, <3 x double> %y) #
}
define <4 x double> @v_maximumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
-; GFX7-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[8:9]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[8:9]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[10:11]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[14:15]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[12:13], v[12:13], v[12:13]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[14:15], v[14:15], v[14:15]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[10:11]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[14:15]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v4f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[8:11]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[12:15]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v4f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v4f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v4f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_maximumnum_v4f64:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_maximumnum_v4f64:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX950-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX950-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[8:9]
+; GFX950-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
+; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[8:9]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_maximumnum_v4f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_maximumnum_v4f64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_maximumnum_v4f64:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[10:11]
+; GFX1170-NEXT: v_max_num_f64 v[4:5], v[4:5], v[12:13]
+; GFX1170-NEXT: v_max_num_f64 v[6:7], v[6:7], v[14:15]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v4f64:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v4f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x double> @llvm.maximumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -10157,45 +5417,28 @@ define <4 x double> @v_maximumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_maximumnum_v4f64_nnan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[8:11]
-; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[12:15]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v4f64_nnan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_maximumnum_v4f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x double> @llvm.maximumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_f16_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_maximumnum_f16_no_ieee:
; GFX8: ; %bb.0:
@@ -10227,137 +5470,64 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_maximumnum_f16_no_ieee:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_maximumnum_f16_no_ieee:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
define half @v_maximumnum_f16_nan_no_ieee(half %x, half %y) #0 {
-; GFX7-SDAG-LABEL: v_maximumnum_f16_nan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_f16_nan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_f16_nan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_maximumnum_f16_nan_no_ieee:
; GFX8: ; %bb.0:
@@ -10469,57 +5639,28 @@ define float @v_maximumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_f32_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f32_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f32_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f32_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f32_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f32_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f32_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -10612,60 +5753,28 @@ define double @v_maximumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_f64_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_f64_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_f64_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_f64_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_f64_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_f64_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_f64_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -10728,55 +5837,30 @@ define double @v_maximumnum_f64_nnan_no_ieee(double %x, double %y) #0 {
}
define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_maximumnum_v2f16_no_ieee:
; GFX9: ; %bb.0:
@@ -10796,114 +5880,57 @@ define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
define <2 x half> @v_maximumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -10950,79 +5977,42 @@ define <2 x half> @v_maximumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y)
}
define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
; GFX10: ; %bb.0:
@@ -11042,7 +6032,7 @@ define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-NEXT: v_pk_maximum_f16 v1, v1, v3
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
@@ -11053,7 +6043,7 @@ define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-NEXT: v_pk_maximum_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX1251-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
@@ -11061,92 +6051,52 @@ define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
define <4 x half> @v_maximumnum_v4f16_nnan_no_ieee(<4 x half> %x, <4 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v6, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v3
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_max_f32_e32 v5, v6, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -11202,5 +6152,21 @@ attributes #0 = { "amdgpu-ieee"="false" nounwind }
attributes #1 = { nounwind }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX900: {{.*}}
-; GFX950: {{.*}}
+; GFX10-SDAG: {{.*}}
+; GFX11-FAKE16-SDAG: {{.*}}
+; GFX11-SDAG: {{.*}}
+; GFX11-TRUE16-SDAG: {{.*}}
+; GFX1170-FAKE16-SDAG: {{.*}}
+; GFX1170-SDAG: {{.*}}
+; GFX1170-TRUE16-SDAG: {{.*}}
+; GFX12-FAKE16-SDAG: {{.*}}
+; GFX12-SDAG: {{.*}}
+; GFX12-TRUE16-SDAG: {{.*}}
+; GFX1251-FAKE16-SDAG: {{.*}}
+; GFX1251-SDAG: {{.*}}
+; GFX1251-TRUE16-SDAG: {{.*}}
+; GFX7-SDAG: {{.*}}
+; GFX8-SDAG: {{.*}}
+; GFX9-SDAG: {{.*}}
+; GFX900-SDAG: {{.*}}
+; GFX950-SDAG: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/minimumnum.ll b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
index d5d65d2d09766..7e431a59cbbdb 100644
--- a/llvm/test/CodeGen/AMDGPU/minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
@@ -39,239 +39,115 @@
; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
define half @v_minimumnum_f16(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f16:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f16:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f16:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_minimumnum_f16:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_minimumnum_f16:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define half @v_minimumnum_f16_nnan(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_minimumnum_f16_nnan:
; GFX8: ; %bb.0:
@@ -398,245 +274,118 @@ define half @v_minimumnum_f16_1.0(half %x) #1 {
; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, 1.0, v0
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16_1.0:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16_1.0:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half 1.0)
ret half %result
}
define float @v_minimumnum_f32(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f32:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f32:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -699,142 +448,69 @@ define float @v_minimumnum_f32_nnan(float %x, float %y) #1 {
}
define double @v_minimumnum_f64(double %x, double %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f64:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX9-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f64:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX9-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX9-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f64:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f64:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f64:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -933,57 +609,28 @@ define float @v_minimumnum_f32_1.0(float %x) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, 1.0, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_1.0:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_1.0:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_1.0:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_1.0:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_1.0:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_1.0:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_f32_1.0:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_1.0:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_1.0:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -1029,79 +676,50 @@ define float @v_minimumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %canon.y = call float @llvm.canonicalize.f32(float %y)
- %result = call float @llvm.minimumnum.f32(float %x, float %canon.y)
- ret float %result
-}
-
-define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX8-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX8: ; %bb.0:
+; GFX12-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %canon.y = call float @llvm.canonicalize.f32(float %y)
+ %result = call float @llvm.minimumnum.f32(float %x, float %canon.y)
+ ret float %result
+}
+
+define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
+; GFX7-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
@@ -1132,63 +750,34 @@ define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.minimumnum.f32(float %canon.x, float %y)
ret float %result
@@ -1306,7022 +895,3447 @@ define double @v_minimumnum_f64_1.0(double %x) #1 {
; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f64_1.0:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f64_1.0:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f64_1.0:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f64_1.0:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f64_1.0:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f64_1.0:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_f64_1.0:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f64_1.0:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_1.0:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double 1.0)
ret double %result
}
define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f16_v_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f16_v_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f16_v_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f16_v_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f16_v_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_minimumnum_f16_v_s:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_minimumnum_f16_v_s:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_v_s:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_v_s:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, s0, v0
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16_v_s:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16_v_s:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, s0, v0
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, s0, v0
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define half @v_minimumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, s17
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, s16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s17
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
-; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
-; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
-; GFX900-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
-; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
-; GFX950-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
-; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, s1, s1
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.h, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, s0, s0
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s1, s1
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
-; GFX1170-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1170-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX1170-TRUE16-GISEL-NEXT: s_min_f16 s0, s0, s1
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1170-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
-; GFX1170-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v1, v0
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_min_f16 s0, s0, s1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1170-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_min_num_f16 s0, s0, s1
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX12-TRUE16-GISEL-NEXT: s_min_num_f16 s0, s0, s1
-; GFX12-TRUE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX12-FAKE16-GISEL-NEXT: s_min_num_f16 s0, s0, s1
-; GFX12-FAKE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f16_s_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: s_min_num_f16 s0, s0, s1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s1, s1
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f16_s_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, s17
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f16_s_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f16_s_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f16_s_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f16_s_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_minimumnum_f16_s_s:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, s1, s1
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.h, v0.l
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_minimumnum_f16_s_s:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_s_s:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, s0, s1
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_s_s:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, s0, s1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f16_s_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f16_s_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: s_min_num_f16 s0, s0, s1
+; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define float @v_minimumnum_f32_s_v(float inreg %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_s_v:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_v:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.minimumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_v_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_v_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.minimumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define float @v_minimumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
-; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
-; GFX900-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
-; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
-; GFX950-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
-; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
-; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX1170-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX1170-GISEL-NEXT: s_min_f32 s0, s0, s1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1170-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: s_min_num_f32 s0, s0, s1
-; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
-; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v1
-; GFX12-GISEL-NEXT: s_min_num_f32 s0, s0, s1
-; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_s_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: s_min_num_f32 s0, s0, s1
-; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.minimumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define double @v_minimumnum_f64_s_v(double inreg %x, double %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f64_s_v:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f64_s_v:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f64_s_v:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f64_s_v:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f64_s_v:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f64_s_v:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f64_s_v:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f64_s_v:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f32_s_v:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_minimumnum_f64_s_v:
+; GFX8-LABEL: v_minimumnum_f32_s_v:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f32_s_v:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f32_s_v:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32_s_v:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-NEXT: v_min_f32_e32 v0, v1, v0
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_f64_s_v:
+; GFX11-LABEL: v_minimumnum_f32_s_v:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-NEXT: v_min_f32_e32 v0, v1, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f64_s_v:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], s[0:1], v[0:1]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f64_s_v:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[2:3], v[0:1]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f64_s_v:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f64_s_v:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f64_s_v:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f64_s_v:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.minimumnum.f64(double %x, double %y)
- ret double %result
+; GFX1170-LABEL: v_minimumnum_f32_s_v:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_s_v:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_s_v:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.minimumnum.f32(float %x, float %y)
+ ret float %result
}
-define double @v_minimumnum_f64_v_s(double %x, double inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f64_v_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f64_v_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f64_v_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f64_v_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f64_v_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f64_v_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f64_v_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f64_v_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
+; GFX7-LABEL: v_minimumnum_f32_v_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_minimumnum_f64_v_s:
+; GFX8-LABEL: v_minimumnum_f32_v_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f32_v_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f32_v_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32_v_s:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_f64_v_s:
+; GFX11-LABEL: v_minimumnum_f32_v_s:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f32_v_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_v_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_v_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.minimumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define float @v_minimumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
+; GFX7-LABEL: v_minimumnum_f32_s_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f32_s_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f32_s_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f32_s_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32_s_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f32_s_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f32_s_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e64 v0, s0, s1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_s_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: s_min_num_f32 s0, s0, s1
+; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_s_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: s_min_num_f32 s0, s0, s1
+; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.minimumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define double @v_minimumnum_f64_s_v(double inreg %x, double %y) #1 {
+; GFX7-LABEL: v_minimumnum_f64_s_v:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f64_s_v:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f64_s_v:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f64_s_v:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f64_s_v:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f64_s_v:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f64_s_v:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], s[0:1], v[0:1]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f64_s_v:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_s_v:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.minimumnum.f64(double %x, double %y)
+ ret double %result
+}
+
+define double @v_minimumnum_f64_v_s(double %x, double inreg %y) #1 {
+; GFX7-LABEL: v_minimumnum_f64_v_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f64_v_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f64_v_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f64_v_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f64_v_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f64_v_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f64_v_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], s[0:1]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f64_v_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f64_v_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f64_v_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f64_v_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f64_v_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_f64_v_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], s[0:1]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f64_v_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_v_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
define double @v_minimumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
-; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
-; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], s[0:1], s[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], s[0:1], s[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[2:3], s[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f64_s_s:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f64_s_s:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f64_s_s:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f64_s_s:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_f64_s_s:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_f64_s_s:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f64_s_s:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f64_s_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f64_s_s:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], s[0:1], s[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f64_s_s:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_s_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
define float @v_minimumnum_f32_fabs_rhs(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e64 v0, v0, |v1|
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e64 v0, v0, |v1|
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e64 v0, v0, |v1|
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call float @llvm.fabs.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %x, float %fabs.y)
ret float %result
}
define float @v_minimumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %fneg.fabs.y = fneg float %fabs.y
- %result = call float @llvm.minimumnum.f32(float %x, float %fneg.fabs.y)
- ret float %result
-}
-
-define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_fabs:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
-; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.x = call float @llvm.fabs.f32(float %x)
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %result = call float @llvm.minimumnum.f32(float %fabs.x, float %fabs.y)
- ret float %result
-}
-
-define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX9-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX10-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX11-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
-; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_fneg:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, -v0, -v0 :: v_dual_max_num_f32 v1, -v1, -v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg float %x
- %fneg.y = fneg float %y
- %result = call float @llvm.minimumnum.f32(float %fneg.x, float %fneg.y)
+; GFX7-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %fneg.fabs.y = fneg float %fabs.y
+ %result = call float @llvm.minimumnum.f32(float %x, float %fneg.fabs.y)
ret float %result
}
-define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %result = call half @llvm.minimumnum.f16(half %x, half %fabs.y)
- ret half %result
+define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
+; GFX7-LABEL: v_minimumnum_f32_fabs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f32_fabs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f32_fabs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32_fabs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f32_fabs:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f32_fabs:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_fabs:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_fabs:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.x = call float @llvm.fabs.f32(float %x)
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %result = call float @llvm.minimumnum.f32(float %fabs.x, float %fabs.y)
+ ret float %result
}
-define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %fneg.fabs.y = fneg half %fabs.y
- %result = call half @llvm.minimumnum.f16(half %x, half %fneg.fabs.y)
- ret half %result
+define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
+; GFX7-LABEL: v_minimumnum_f32_fneg:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f32_fneg:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f32_fneg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f32_fneg:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f32_fneg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f32_fneg:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e64 v0, -v0, -v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_fneg:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e64 v0, -v0, -v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_fneg:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e64 v0, -v0, -v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg float %x
+ %fneg.y = fneg float %y
+ %result = call float @llvm.minimumnum.f32(float %fneg.x, float %fneg.y)
+ ret float %result
}
-define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, |v0|
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fabs.x = call half @llvm.fabs.f16(half %x)
+define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
+; GFX7-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, |v1|
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, |v1|
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, |v1|
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call half @llvm.fabs.f16(half %y)
- %result = call half @llvm.minimumnum.f16(half %fabs.x, half %fabs.y)
- ret half %result
-}
-
-define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, -v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -v1
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX8-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX9-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX10-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX11-TRUE16-SDAG: ; %bb.0:
-; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
-; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
-; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX11-TRUE16-GISEL: ; %bb.0:
-; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
-; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
-; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX11-FAKE16-SDAG: ; %bb.0:
-; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX11-FAKE16-GISEL: ; %bb.0:
-; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg half %x
- %fneg.y = fneg half %y
- %result = call half @llvm.minimumnum.f16(half %fneg.x, half %fneg.y)
+ %result = call half @llvm.minimumnum.f16(half %x, half %fabs.y)
ret half %result
}
-define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX9-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX9-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX9-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX9-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], -v[0:1], -v[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f64_fneg:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f64_fneg:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg double %x
- %fneg.y = fneg double %y
- %result = call double @llvm.minimumnum.f64(double %fneg.x, double %fneg.y)
- ret double %result
-}
-
-define <2 x half> @v_minimumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v2, v3
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v2f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v2f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
+define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
+; GFX7-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %fneg.fabs.y = fneg half %fabs.y
+ %result = call half @llvm.minimumnum.f16(half %x, half %fneg.fabs.y)
+ ret half %result
+}
+
+define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
+; GFX7-LABEL: v_minimumnum_f16_fabs:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-NEXT: v_cvt_f32_f16_e64 v0, |v0|
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f16_fabs:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f16_fabs:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f16_fabs:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_minimumnum_f16_fabs:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_minimumnum_f16_fabs:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fabs:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fabs:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16_fabs:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16_fabs:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.x = call half @llvm.fabs.f16(half %x)
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %result = call half @llvm.minimumnum.f16(half %fabs.x, half %fabs.y)
+ ret half %result
+}
+
+define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
+; GFX7-LABEL: v_minimumnum_f16_fneg:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -v1
+; GFX7-NEXT: v_cvt_f32_f16_e64 v0, -v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f16_fneg:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX8-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f16_fneg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX9-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f16_fneg:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX10-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-LABEL: v_minimumnum_f16_fneg:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
+; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: v_minimumnum_f16_fneg:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fneg:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fneg:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, -v0, -v1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16_fneg:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16_fneg:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, -v0, -v1
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, -v0, -v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg half %x
+ %fneg.y = fneg half %y
+ %result = call half @llvm.minimumnum.f16(half %fneg.x, half %fneg.y)
+ ret half %result
+}
+
+define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
+; GFX7-LABEL: v_minimumnum_f64_fneg:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX7-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_f64_fneg:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX8-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_f64_fneg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX9-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_f64_fneg:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX10-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_f64_fneg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX11-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_f64_fneg:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], -v[0:1], -v[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f64_fneg:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_fneg:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg double %x
+ %fneg.y = fneg double %y
+ %result = call double @llvm.minimumnum.f64(double %fneg.x, double %fneg.y)
+ ret double %result
+}
+
+define <2 x half> @v_minimumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v2f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v2f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v2f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v2f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v2f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v2f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v2f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v2f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
+}
+
+define <2 x half> @v_minimumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v2f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v2f16_nnan:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v2f16_nnan:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v2f16_nnan:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v2f16_nnan:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v2f16_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v2f16_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
+}
+
+define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v3f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v3f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v3f16:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX9-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX9-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v3f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v3f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-LABEL: v_minimumnum_v3f16:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_v3f16:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v3
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_v3f16:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_v3f16:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v3
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_v3f16:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_v3f16:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v3
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
+}
+
+define <3 x half> @v_minimumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v3f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v3f16_nnan:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v3f16_nnan:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v3f16_nnan:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v3f16_nnan:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_minimum_f16 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v3f16_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
+}
+
+define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v4f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v5, v6, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v4f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v4f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX900-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v4f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX950-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v4f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v4f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v4f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v4f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v4f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %result
}
-define <2 x half> @v_minimumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v2f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v2f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v2f16_nnan:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v2f16_nnan:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v0, v1
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+define <4 x half> @v_minimumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v4f16_nnan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v5, v6, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
-; GFX9-LABEL: v_minimumnum_v2f16_nnan:
+; GFX8-LABEL: v_minimumnum_v4f16_nnan:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v4f16_nnan:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_minimumnum_v2f16_nnan:
+; GFX10-LABEL: v_minimumnum_v4f16_nnan:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_v2f16_nnan:
+; GFX11-LABEL: v_minimumnum_v4f16_nnan:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v2f16_nnan:
+; GFX1170-LABEL: v_minimumnum_v4f16_nnan:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_v2f16_nnan:
+; GFX12-LABEL: v_minimumnum_v4f16_nnan:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_v2f16_nnan:
+; GFX1251-LABEL: v_minimumnum_v4f16_nnan:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
+ %result = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %result
}
-define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v5
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v3, v3
-; GFX8-GISEL-NEXT: v_min_f16_e32 v1, v1, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX9-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX9-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v3f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
+define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v6f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_min_f32_e32 v6, v6, v7
+; GFX7-NEXT: v_min_f32_e32 v8, v8, v9
+; GFX7-NEXT: v_min_f32_e32 v9, v10, v11
+; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v6f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_e32 v2, v2, v5
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v4
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v6
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v6f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX900-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX900-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_min_f16 v2, v2, v3
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v6f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX950-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX950-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_min_f16 v2, v2, v3
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v6f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX10-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v6f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX11-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v6f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v6f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v6f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <6 x half> @llvm.minimumnum.v6f16(<6 x half> %x, <6 x half> %y)
+ ret <6 x half> %result
}
-define <3 x half> @v_minimumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v3f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v3f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v3f16_nnan:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v3f16_nnan:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_v3f16_nnan:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_v3f16_nnan:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v8f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v13, 16, v5
+; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_min_f32_e32 v11, v11, v12
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_min_f32_e32 v8, v8, v9
+; GFX7-NEXT: v_min_f32_e32 v12, v14, v12
+; GFX7-NEXT: v_min_f32_e32 v10, v10, v13
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-NEXT: v_min_f32_e32 v3, v3, v7
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v6
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v12
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX7-NEXT: v_or_b32_e32 v3, v3, v11
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_minimumnum_v3f16_nnan:
+; GFX8-LABEL: v_minimumnum_v8f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_e32 v3, v3, v7
+; GFX8-NEXT: v_min_f16_e32 v2, v2, v6
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v5
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v4
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX8-NEXT: v_or_b32_e32 v3, v3, v8
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v8f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX900-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX900-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_min_f16 v2, v2, v4
+; GFX900-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_min_f16 v3, v3, v4
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v8f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX950-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX950-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_min_f16 v2, v2, v4
+; GFX950-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_min_f16 v3, v3, v4
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v8f16:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v5
+; GFX10-NEXT: v_pk_min_f16 v2, v2, v6
+; GFX10-NEXT: v_pk_min_f16 v3, v3, v7
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_v3f16_nnan:
+; GFX11-LABEL: v_minimumnum_v8f16:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v5
+; GFX11-NEXT: v_pk_min_f16 v2, v2, v6
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-NEXT: v_pk_min_f16 v3, v3, v7
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1170-LABEL: v_minimumnum_v8f16:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1170-NEXT: v_pk_min_num_f16 v3, v3, v7
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_v3f16_nnan:
+; GFX12-LABEL: v_minimumnum_v8f16:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v7
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1251-LABEL: v_minimumnum_v8f16:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1251-NEXT: v_pk_min_num_f16 v3, v3, v7
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
+ %result = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> %x, <8 x half> %y)
+ ret <8 x half> %result
}
-define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v6, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v5
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v2, v5
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v4f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v4f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
- ret <4 x half> %result
+define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v16f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v16, 16, v15
+; GFX7-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; GFX7-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX7-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v13
+; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v5
+; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_min_f32_e32 v16, v17, v16
+; GFX7-NEXT: v_min_f32_e32 v17, v19, v18
+; GFX7-NEXT: v_min_f32_e32 v18, v21, v20
+; GFX7-NEXT: v_min_f32_e32 v19, v23, v22
+; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v10
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX7-NEXT: v_min_f32_e32 v20, v21, v20
+; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-NEXT: v_min_f32_e32 v21, v23, v22
+; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v9
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_min_f32_e32 v22, v23, v22
+; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v8
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_min_f32_e32 v23, v24, v23
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v23
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v9
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v22
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v10
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v21
+; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-NEXT: v_min_f32_e32 v5, v5, v13
+; GFX7-NEXT: v_min_f32_e32 v3, v3, v11
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v18
+; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v20
+; GFX7-NEXT: v_min_f32_e32 v7, v7, v15
+; GFX7-NEXT: v_min_f32_e32 v6, v6, v14
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v12
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v19
+; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-NEXT: v_or_b32_e32 v3, v3, v10
+; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX7-NEXT: v_or_b32_e32 v5, v5, v9
+; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX7-NEXT: v_or_b32_e32 v4, v4, v10
+; GFX7-NEXT: v_or_b32_e32 v6, v6, v9
+; GFX7-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v16f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_e32 v7, v7, v15
+; GFX8-NEXT: v_min_f16_e32 v6, v6, v14
+; GFX8-NEXT: v_min_f16_e32 v5, v5, v13
+; GFX8-NEXT: v_min_f16_e32 v4, v4, v12
+; GFX8-NEXT: v_min_f16_e32 v3, v3, v11
+; GFX8-NEXT: v_min_f16_e32 v2, v2, v10
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v9
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v8
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v23
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v22
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v21
+; GFX8-NEXT: v_or_b32_e32 v3, v3, v20
+; GFX8-NEXT: v_or_b32_e32 v4, v4, v19
+; GFX8-NEXT: v_or_b32_e32 v5, v5, v18
+; GFX8-NEXT: v_or_b32_e32 v6, v6, v17
+; GFX8-NEXT: v_or_b32_e32 v7, v7, v16
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v16f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_min_f16 v1, v1, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_min_f16 v2, v2, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-NEXT: v_pk_min_f16 v4, v4, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-NEXT: v_pk_min_f16 v5, v5, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-NEXT: v_pk_min_f16 v6, v6, v8
+; GFX900-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-NEXT: v_pk_min_f16 v7, v7, v8
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v16f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_min_f16 v1, v1, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_min_f16 v2, v2, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-NEXT: v_pk_min_f16 v4, v4, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-NEXT: v_pk_min_f16 v5, v5, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-NEXT: v_pk_min_f16 v6, v6, v8
+; GFX950-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_min_f16 v7, v7, v8
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v16f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX10-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v9
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_min_f16 v2, v2, v10
+; GFX10-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX10-NEXT: v_pk_min_f16 v4, v4, v9
+; GFX10-NEXT: v_pk_min_f16 v5, v5, v10
+; GFX10-NEXT: v_pk_min_f16 v6, v6, v11
+; GFX10-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v16f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX11-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v9
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_min_f16 v2, v2, v10
+; GFX11-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX11-NEXT: v_pk_min_f16 v4, v4, v9
+; GFX11-NEXT: v_pk_min_f16 v5, v5, v10
+; GFX11-NEXT: v_pk_min_f16 v6, v6, v11
+; GFX11-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v16f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1170-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX1170-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX1170-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX1170-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX1170-NEXT: v_pk_min_num_f16 v7, v7, v15
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v16f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX12-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX12-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX12-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX12-NEXT: v_pk_min_num_f16 v7, v7, v15
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v16f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1251-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX1251-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX1251-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX1251-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX1251-NEXT: v_pk_min_num_f16 v7, v7, v15
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <16 x half> @llvm.minimumnum.v16f16(<16 x half> %x, <16 x half> %y)
+ ret <16 x half> %result
}
-define <4 x half> @v_minimumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v4f16_nnan:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v6, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v4f16_nnan:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v4f16_nnan:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v4f16_nnan:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v1, v3
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v32f16:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX7-NEXT: buffer_load_dword v49, off, s[0:3], s32
+; GFX7-NEXT: v_lshrrev_b32_e32 v31, 16, v30
+; GFX7-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX7-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX7-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v28
+; GFX7-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX7-NEXT: v_lshrrev_b32_e32 v37, 16, v27
+; GFX7-NEXT: v_lshrrev_b32_e32 v38, 16, v11
+; GFX7-NEXT: v_lshrrev_b32_e32 v39, 16, v26
+; GFX7-NEXT: v_lshrrev_b32_e32 v48, 16, v10
+; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v25
+; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v9
+; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v24
+; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v8
+; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v23
+; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v31, v31
+; GFX7-NEXT: v_cvt_f32_f16_e32 v32, v32
+; GFX7-NEXT: v_cvt_f32_f16_e32 v33, v33
+; GFX7-NEXT: v_cvt_f32_f16_e32 v34, v34
+; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-NEXT: v_cvt_f32_f16_e32 v36, v36
+; GFX7-NEXT: v_cvt_f32_f16_e32 v37, v37
+; GFX7-NEXT: v_cvt_f32_f16_e32 v38, v38
+; GFX7-NEXT: v_cvt_f32_f16_e32 v39, v39
+; GFX7-NEXT: v_cvt_f32_f16_e32 v48, v48
+; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-NEXT: v_min_f32_e32 v31, v32, v31
+; GFX7-NEXT: v_min_f32_e32 v33, v34, v33
+; GFX7-NEXT: v_min_f32_e32 v32, v36, v35
+; GFX7-NEXT: v_min_f32_e32 v34, v38, v37
+; GFX7-NEXT: v_min_f32_e32 v36, v48, v39
+; GFX7-NEXT: v_min_f32_e32 v37, v51, v50
+; GFX7-NEXT: v_min_f32_e32 v38, v53, v52
+; GFX7-NEXT: v_min_f32_e32 v39, v55, v54
+; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v20
+; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v19
+; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v18
+; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-NEXT: v_min_f32_e32 v50, v51, v50
+; GFX7-NEXT: v_min_f32_e32 v51, v53, v52
+; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v17
+; GFX7-NEXT: v_min_f32_e32 v52, v55, v54
+; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v40, 16, v22
+; GFX7-NEXT: v_min_f32_e32 v53, v54, v53
+; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v6
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v53
+; GFX7-NEXT: v_cvt_f32_f16_e32 v40, v40
+; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v43, 16, v21
+; GFX7-NEXT: v_lshrrev_b32_e32 v44, 16, v5
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_lshrrev_b32_e32 v42, 16, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v43, v43
+; GFX7-NEXT: v_cvt_f32_f16_e32 v44, v44
+; GFX7-NEXT: v_min_f32_e32 v48, v41, v40
+; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v16
+; GFX7-NEXT: s_waitcnt vmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v49
+; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v0
+; GFX7-NEXT: v_min_f32_e32 v3, v3, v19
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v51
+; GFX7-NEXT: v_cvt_f32_f16_e32 v42, v42
+; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-NEXT: v_min_f32_e32 v40, v44, v43
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_min_f32_e32 v35, v42, v35
+; GFX7-NEXT: v_min_f32_e32 v54, v41, v55
+; GFX7-NEXT: v_or_b32_e32 v3, v3, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v40
+; GFX7-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX7-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v18
+; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v54
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v52
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_min_f32_e32 v5, v5, v21
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v20
+; GFX7-NEXT: v_or_b32_e32 v2, v2, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v50
+; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_min_f32_e32 v7, v7, v23
+; GFX7-NEXT: v_min_f32_e32 v6, v6, v22
+; GFX7-NEXT: v_or_b32_e32 v4, v4, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v48
+; GFX7-NEXT: v_or_b32_e32 v5, v5, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v39
+; GFX7-NEXT: v_cvt_f32_f16_e32 v25, v25
+; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_min_f32_e32 v9, v9, v25
+; GFX7-NEXT: v_min_f32_e32 v8, v8, v24
+; GFX7-NEXT: v_or_b32_e32 v6, v6, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v38
+; GFX7-NEXT: v_or_b32_e32 v7, v7, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v37
+; GFX7-NEXT: v_cvt_f32_f16_e32 v27, v27
+; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-NEXT: v_cvt_f32_f16_e32 v26, v26
+; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_min_f32_e32 v11, v11, v27
+; GFX7-NEXT: v_min_f32_e32 v10, v10, v26
+; GFX7-NEXT: v_or_b32_e32 v8, v8, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v36
+; GFX7-NEXT: v_or_b32_e32 v9, v9, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v34
+; GFX7-NEXT: v_cvt_f32_f16_e32 v49, v49
+; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-NEXT: v_cvt_f32_f16_e32 v29, v29
+; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-NEXT: v_cvt_f32_f16_e32 v28, v28
+; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_min_f32_e32 v15, v15, v49
+; GFX7-NEXT: v_min_f32_e32 v14, v14, v30
+; GFX7-NEXT: v_min_f32_e32 v13, v13, v29
+; GFX7-NEXT: v_min_f32_e32 v12, v12, v28
+; GFX7-NEXT: v_or_b32_e32 v10, v10, v16
+; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v35
+; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v33
+; GFX7-NEXT: v_or_b32_e32 v11, v11, v17
+; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v31
+; GFX7-NEXT: v_cvt_f16_f32_e32 v19, v32
+; GFX7-NEXT: v_cvt_f16_f32_e32 v15, v15
+; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX7-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-NEXT: v_or_b32_e32 v12, v12, v19
+; GFX7-NEXT: v_or_b32_e32 v13, v13, v18
+; GFX7-NEXT: v_or_b32_e32 v14, v14, v17
+; GFX7-NEXT: v_or_b32_e32 v15, v15, v16
+; GFX7-NEXT: s_waitcnt vmcnt(0)
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
-; GFX9-LABEL: v_minimumnum_v4f16_nnan:
+; GFX8-LABEL: v_minimumnum_v32f16:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX8-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v17, v17, v17
+; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v17
+; GFX8-NEXT: v_min_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v40
+; GFX8-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX8-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-NEXT: v_min_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_max_f16_e32 v30, v30, v30
+; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-NEXT: v_max_f16_e32 v29, v29, v29
+; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-NEXT: v_max_f16_e32 v28, v28, v28
+; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-NEXT: v_max_f16_e32 v27, v27, v27
+; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-NEXT: v_max_f16_e32 v26, v26, v26
+; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-NEXT: v_max_f16_e32 v25, v25, v25
+; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-NEXT: v_max_f16_e32 v24, v24, v24
+; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-NEXT: v_max_f16_e32 v23, v23, v23
+; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-NEXT: v_max_f16_e32 v22, v22, v22
+; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-NEXT: v_max_f16_e32 v21, v21, v21
+; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-NEXT: v_max_f16_e32 v20, v20, v20
+; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-NEXT: v_max_f16_e32 v19, v19, v19
+; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-NEXT: v_max_f16_e32 v18, v18, v18
+; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-NEXT: v_max_f16_e32 v16, v16, v16
+; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-NEXT: v_min_f16_e32 v14, v14, v30
+; GFX8-NEXT: v_min_f16_e32 v13, v13, v29
+; GFX8-NEXT: v_min_f16_e32 v12, v12, v28
+; GFX8-NEXT: v_min_f16_e32 v11, v11, v27
+; GFX8-NEXT: v_min_f16_e32 v10, v10, v26
+; GFX8-NEXT: v_min_f16_e32 v9, v9, v25
+; GFX8-NEXT: v_min_f16_e32 v8, v8, v24
+; GFX8-NEXT: v_min_f16_e32 v7, v7, v23
+; GFX8-NEXT: v_min_f16_e32 v6, v6, v22
+; GFX8-NEXT: v_min_f16_e32 v5, v5, v21
+; GFX8-NEXT: v_min_f16_e32 v4, v4, v20
+; GFX8-NEXT: v_min_f16_e32 v3, v3, v19
+; GFX8-NEXT: v_min_f16_e32 v2, v2, v18
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v16
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v33
+; GFX8-NEXT: v_or_b32_e32 v2, v2, v55
+; GFX8-NEXT: v_or_b32_e32 v3, v3, v54
+; GFX8-NEXT: v_or_b32_e32 v4, v4, v53
+; GFX8-NEXT: v_or_b32_e32 v5, v5, v52
+; GFX8-NEXT: v_or_b32_e32 v6, v6, v51
+; GFX8-NEXT: v_or_b32_e32 v7, v7, v50
+; GFX8-NEXT: v_or_b32_e32 v8, v8, v49
+; GFX8-NEXT: v_or_b32_e32 v9, v9, v48
+; GFX8-NEXT: v_or_b32_e32 v10, v10, v39
+; GFX8-NEXT: v_or_b32_e32 v11, v11, v38
+; GFX8-NEXT: v_or_b32_e32 v12, v12, v36
+; GFX8-NEXT: v_or_b32_e32 v13, v13, v34
+; GFX8-NEXT: v_or_b32_e32 v14, v14, v32
+; GFX8-NEXT: s_waitcnt vmcnt(0)
+; GFX8-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_max_f16_e32 v31, v31, v31
+; GFX8-NEXT: v_min_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT: v_min_f16_e32 v15, v15, v31
+; GFX8-NEXT: v_or_b32_e32 v15, v15, v35
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v32f16:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX900-NEXT: v_pk_max_f16 v16, v17, v17
+; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-NEXT: v_pk_min_f16 v1, v1, v16
+; GFX900-NEXT: v_pk_max_f16 v16, v18, v18
+; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-NEXT: v_pk_min_f16 v2, v2, v16
+; GFX900-NEXT: v_pk_max_f16 v16, v19, v19
+; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-NEXT: v_pk_min_f16 v3, v3, v16
+; GFX900-NEXT: buffer_load_dword v16, off, s[0:3], s32
+; GFX900-NEXT: v_pk_max_f16 v17, v20, v20
+; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-NEXT: v_pk_max_f16 v18, v21, v21
+; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-NEXT: v_pk_max_f16 v19, v22, v22
+; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-NEXT: v_pk_max_f16 v20, v23, v23
+; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-NEXT: v_pk_max_f16 v21, v24, v24
+; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-NEXT: v_pk_max_f16 v22, v25, v25
+; GFX900-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX900-NEXT: v_pk_max_f16 v23, v26, v26
+; GFX900-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX900-NEXT: v_pk_max_f16 v24, v27, v27
+; GFX900-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX900-NEXT: v_pk_max_f16 v25, v28, v28
+; GFX900-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX900-NEXT: v_pk_max_f16 v26, v29, v29
+; GFX900-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX900-NEXT: v_pk_max_f16 v27, v30, v30
+; GFX900-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX900-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX900-NEXT: v_pk_min_f16 v4, v4, v17
+; GFX900-NEXT: v_pk_min_f16 v5, v5, v18
+; GFX900-NEXT: v_pk_min_f16 v6, v6, v19
+; GFX900-NEXT: v_pk_min_f16 v7, v7, v20
+; GFX900-NEXT: v_pk_min_f16 v8, v8, v21
+; GFX900-NEXT: v_pk_min_f16 v9, v9, v22
+; GFX900-NEXT: v_pk_min_f16 v10, v10, v23
+; GFX900-NEXT: v_pk_min_f16 v11, v11, v24
+; GFX900-NEXT: v_pk_min_f16 v12, v12, v25
+; GFX900-NEXT: v_pk_min_f16 v13, v13, v26
+; GFX900-NEXT: v_pk_min_f16 v14, v14, v27
+; GFX900-NEXT: s_waitcnt vmcnt(0)
+; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v32f16:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: scratch_load_dword v31, off, s32
+; GFX950-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX950-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX950-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX950-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX950-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX950-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX950-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX950-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX950-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX950-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX950-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX950-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX950-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX950-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX950-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX950-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX950-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX950-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX950-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX950-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX950-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX950-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX950-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX950-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX950-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX950-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX950-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX950-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX950-NEXT: s_waitcnt vmcnt(0)
+; GFX950-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX950-NEXT: s_nop 0
+; GFX950-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v32f16:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX10-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX10-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX10-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX10-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX10-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX10-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX10-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX10-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX10-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX10-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX10-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX10-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX10-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX10-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX10-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX10-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX10-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX10-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX10-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX10-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX10-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX10-NEXT: s_waitcnt vmcnt(0)
+; GFX10-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX10-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v32f16:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX11-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX11-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX11-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX11-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX11-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX11-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX11-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX11-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX11-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX11-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX11-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX11-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX11-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX11-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX11-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX11-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX11-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX11-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX11-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX11-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX11-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v32f16:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: scratch_load_b32 v31, off, s32
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1170-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1170-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1170-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1170-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1170-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1170-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1170-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1170-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1170-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1170-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1170-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1170-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1170-NEXT: s_waitcnt vmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v15, v15, v31
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v32f16:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: scratch_load_b32 v31, off, s32
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX12-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX12-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX12-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX12-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX12-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX12-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX12-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX12-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX12-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX12-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX12-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v15, v15, v31
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v32f16:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1251-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1251-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1251-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1251-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1251-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1251-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1251-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1251-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1251-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1251-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1251-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1251-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v15, v15, v31
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <32 x half> @llvm.minimumnum.v32f16(<32 x half> %x, <32 x half> %y)
+ ret <32 x half> %result
+}
+
+define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v2f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v2f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v2f32:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX9-NEXT: v_max_f32_e32 v2, v3, v3
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_min_f32_e32 v1, v1, v2
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_minimumnum_v4f16_nnan:
+; GFX10-LABEL: v_minimumnum_v2f32:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX10-NEXT: v_min_f32_e32 v1, v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_v4f16_nnan:
+; GFX11-LABEL: v_minimumnum_v2f32:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_dual_min_f32 v0, v0, v2 :: v_dual_min_f32 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v4f16_nnan:
+; GFX1170-LABEL: v_minimumnum_v2f32:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_v4f16_nnan:
+; GFX12-LABEL: v_minimumnum_v2f32:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_v4f16_nnan:
+; GFX1251-LABEL: v_minimumnum_v2f32:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
- ret <4 x half> %result
-}
-
-define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v6, v6, v7
-; GFX7-SDAG-NEXT: v_min_f32_e32 v8, v8, v9
-; GFX7-SDAG-NEXT: v_min_f32_e32 v9, v10, v11
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v6
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v9
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v4
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v6, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v6, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v6, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v5
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v7
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v6
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v6, v6, v7
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v3, v3, v7
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v7
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v6, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v3, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v4, v2
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v3
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v3
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v3
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v3
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v5
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v5
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v5
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v5
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v6f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v6f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <6 x half> @llvm.minimumnum.v6f16(<6 x half> %x, <6 x half> %y)
- ret <6 x half> %result
-}
-
-define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v14, 16, v2
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v15, 16, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_min_f32_e32 v11, v11, v12
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v8, v8, v9
-; GFX7-SDAG-NEXT: v_min_f32_e32 v12, v14, v12
-; GFX7-SDAG-NEXT: v_min_f32_e32 v10, v10, v13
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v7
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v6
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v11
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v8, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v13
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v6
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v5
-; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v14
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v3
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v7
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v6
-; GFX7-GISEL-NEXT: v_min_f32_e32 v6, v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v15
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v7
-; GFX7-GISEL-NEXT: v_min_f32_e32 v7, v8, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v6
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v7
-; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v4
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_e32 v3, v3, v7
-; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v6
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v5
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v11
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v8, v8, v9
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v9
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v6, v6
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v5, v5, v9
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v7, v7
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v6, v6, v9
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v8, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v4, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v5, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v6, v3
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_min_f16 v3, v3, v4
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX900-GISEL-NEXT: v_pk_min_f16 v3, v3, v4
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_min_f16 v3, v3, v4
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_min_f16 v3, v3, v4
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v5
-; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v6
-; GFX10-SDAG-NEXT: v_pk_min_f16 v3, v3, v7
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v5
-; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v6
-; GFX10-GISEL-NEXT: v_pk_min_f16 v3, v3, v7
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v5
-; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v6
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-SDAG-NEXT: v_pk_min_f16 v3, v3, v7
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v5
-; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v6
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-GISEL-NEXT: v_pk_min_f16 v3, v3, v7
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v8f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v8f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> %x, <8 x half> %y)
- ret <8 x half> %result
-}
-
-define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v17, 16, v7
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v18, 16, v14
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v19, 16, v6
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v13
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v5
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v12
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_min_f32_e32 v16, v17, v16
-; GFX7-SDAG-NEXT: v_min_f32_e32 v17, v19, v18
-; GFX7-SDAG-NEXT: v_min_f32_e32 v18, v21, v20
-; GFX7-SDAG-NEXT: v_min_f32_e32 v19, v23, v22
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v11
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v10
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v24, 16, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v20, v21, v20
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-SDAG-NEXT: v_min_f32_e32 v21, v23, v22
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v9
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v22, v23, v22
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v8
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v23, v24, v23
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v23
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v9
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v22
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v21
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v5, v13
-; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v11
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v18
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v20
-; GFX7-SDAG-NEXT: v_min_f32_e32 v7, v7, v15
-; GFX7-SDAG-NEXT: v_min_f32_e32 v6, v6, v14
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v12
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v19
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v10
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v9
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v10
-; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v9
-; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v8
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v9
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-GISEL-NEXT: v_min_f32_e32 v8, v17, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_min_f32_e32 v16, v16, v18
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-GISEL-NEXT: v_min_f32_e32 v9, v17, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v4
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v11
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_min_f32_e32 v10, v17, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v5
-; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v4, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v13
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-GISEL-NEXT: v_min_f32_e32 v11, v17, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v6
-; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v5, v13
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v7
-; GFX7-GISEL-NEXT: v_min_f32_e32 v12, v17, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-GISEL-NEXT: v_min_f32_e32 v6, v6, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v15
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-GISEL-NEXT: v_min_f32_e32 v13, v19, v13
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-GISEL-NEXT: v_min_f32_e32 v7, v7, v14
-; GFX7-GISEL-NEXT: v_min_f32_e32 v14, v15, v17
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v4, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v12
-; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v5, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v13
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v16
-; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v6, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v14
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_e32 v7, v7, v15
-; GFX8-SDAG-NEXT: v_min_f16_e32 v6, v6, v14
-; GFX8-SDAG-NEXT: v_min_f16_e32 v5, v5, v13
-; GFX8-SDAG-NEXT: v_min_f16_e32 v4, v4, v12
-; GFX8-SDAG-NEXT: v_min_f16_e32 v3, v3, v11
-; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v10
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v9
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v8
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v23
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v22
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v21
-; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v20
-; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v19
-; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v18
-; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v17
-; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v16
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v8, v8
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v16, v16, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v9, v9
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v8, v8, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v10, v10
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v9, v9, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v10, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v11, v11
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v10, v10, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v3, v3, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v11, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v12, v12
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v11, v11, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v4, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v12, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v13, v13
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v12, v12, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v13, v6, v6
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v14, v14
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v13, v13, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v6, v6, v14 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v14, v7, v7
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v15, v15
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v14, v14, v17
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v7, v7, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v16, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v8, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v9, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v10, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v11, v4
-; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v12, v5
-; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v13, v6
-; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v14, v7
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-SDAG-NEXT: v_pk_min_f16 v4, v4, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-SDAG-NEXT: v_pk_min_f16 v5, v5, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-SDAG-NEXT: v_pk_min_f16 v6, v6, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-SDAG-NEXT: v_pk_min_f16 v7, v7, v8
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX900-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX900-GISEL-NEXT: v_pk_min_f16 v4, v4, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX900-GISEL-NEXT: v_pk_min_f16 v5, v5, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX900-GISEL-NEXT: v_pk_min_f16 v6, v6, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX900-GISEL-NEXT: v_pk_min_f16 v7, v7, v8
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-SDAG-NEXT: v_pk_min_f16 v4, v4, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-SDAG-NEXT: v_pk_min_f16 v5, v5, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-SDAG-NEXT: v_pk_min_f16 v6, v6, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_min_f16 v7, v7, v8
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-GISEL-NEXT: v_pk_min_f16 v4, v4, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-GISEL-NEXT: v_pk_min_f16 v5, v5, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-GISEL-NEXT: v_pk_min_f16 v6, v6, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_min_f16 v7, v7, v8
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v9
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v10
-; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX10-SDAG-NEXT: v_pk_min_f16 v4, v4, v9
-; GFX10-SDAG-NEXT: v_pk_min_f16 v5, v5, v10
-; GFX10-SDAG-NEXT: v_pk_min_f16 v6, v6, v11
-; GFX10-SDAG-NEXT: v_pk_min_f16 v7, v7, v12
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v9
-; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v10
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX10-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX10-GISEL-NEXT: v_pk_min_f16 v4, v4, v9
-; GFX10-GISEL-NEXT: v_pk_min_f16 v5, v5, v10
-; GFX10-GISEL-NEXT: v_pk_min_f16 v6, v6, v11
-; GFX10-GISEL-NEXT: v_pk_min_f16 v7, v7, v12
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v9
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v10
-; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX11-SDAG-NEXT: v_pk_min_f16 v4, v4, v9
-; GFX11-SDAG-NEXT: v_pk_min_f16 v5, v5, v10
-; GFX11-SDAG-NEXT: v_pk_min_f16 v6, v6, v11
-; GFX11-SDAG-NEXT: v_pk_min_f16 v7, v7, v12
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v9
-; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v10
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX11-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX11-GISEL-NEXT: v_pk_min_f16 v4, v4, v9
-; GFX11-GISEL-NEXT: v_pk_min_f16 v5, v5, v10
-; GFX11-GISEL-NEXT: v_pk_min_f16 v6, v6, v11
-; GFX11-GISEL-NEXT: v_pk_min_f16 v7, v7, v12
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v8
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v9
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v10
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v8
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v9
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v10
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v16f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v16f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v8
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v9
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v10
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <16 x half> @llvm.minimumnum.v16f16(<16 x half> %x, <16 x half> %y)
- ret <16 x half> %result
-}
-
-define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX7-SDAG-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v31, 16, v30
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v32, 16, v14
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v34, 16, v13
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v28
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v36, 16, v12
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v37, 16, v27
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v39, 16, v26
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v48, 16, v10
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v25
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v9
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v24
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v8
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v23
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v31, v31
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v32, v32
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v33, v33
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v34, v34
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v36, v36
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v37, v37
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v38, v38
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v39, v39
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v48, v48
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-SDAG-NEXT: v_min_f32_e32 v31, v32, v31
-; GFX7-SDAG-NEXT: v_min_f32_e32 v33, v34, v33
-; GFX7-SDAG-NEXT: v_min_f32_e32 v32, v36, v35
-; GFX7-SDAG-NEXT: v_min_f32_e32 v34, v38, v37
-; GFX7-SDAG-NEXT: v_min_f32_e32 v36, v48, v39
-; GFX7-SDAG-NEXT: v_min_f32_e32 v37, v51, v50
-; GFX7-SDAG-NEXT: v_min_f32_e32 v38, v53, v52
-; GFX7-SDAG-NEXT: v_min_f32_e32 v39, v55, v54
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v20
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v19
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v18
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-SDAG-NEXT: v_min_f32_e32 v50, v51, v50
-; GFX7-SDAG-NEXT: v_min_f32_e32 v51, v53, v52
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; GFX7-SDAG-NEXT: v_min_f32_e32 v52, v55, v54
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v40, 16, v22
-; GFX7-SDAG-NEXT: v_min_f32_e32 v53, v54, v53
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v6
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v53
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v40, v40
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v43, 16, v21
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v44, 16, v5
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v43, v43
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v44, v44
-; GFX7-SDAG-NEXT: v_min_f32_e32 v48, v41, v40
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v49
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v19
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v51
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v42, v42
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-SDAG-NEXT: v_min_f32_e32 v40, v44, v43
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_min_f32_e32 v35, v42, v35
-; GFX7-SDAG-NEXT: v_min_f32_e32 v54, v41, v55
-; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v40
-; GFX7-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v18
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v54
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v52
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v5, v21
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v20
-; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v50
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_min_f32_e32 v7, v7, v23
-; GFX7-SDAG-NEXT: v_min_f32_e32 v6, v6, v22
-; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v48
-; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v39
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v25, v25
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_min_f32_e32 v9, v9, v25
-; GFX7-SDAG-NEXT: v_min_f32_e32 v8, v8, v24
-; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v38
-; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v37
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v27, v27
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v26, v26
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_min_f32_e32 v11, v11, v27
-; GFX7-SDAG-NEXT: v_min_f32_e32 v10, v10, v26
-; GFX7-SDAG-NEXT: v_or_b32_e32 v8, v8, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v36
-; GFX7-SDAG-NEXT: v_or_b32_e32 v9, v9, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v34
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v49, v49
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v29, v29
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v28, v28
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_min_f32_e32 v15, v15, v49
-; GFX7-SDAG-NEXT: v_min_f32_e32 v14, v14, v30
-; GFX7-SDAG-NEXT: v_min_f32_e32 v13, v13, v29
-; GFX7-SDAG-NEXT: v_min_f32_e32 v12, v12, v28
-; GFX7-SDAG-NEXT: v_or_b32_e32 v10, v10, v16
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v35
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v33
-; GFX7-SDAG-NEXT: v_or_b32_e32 v11, v11, v17
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v31
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v19, v32
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v15, v15
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-SDAG-NEXT: v_or_b32_e32 v12, v12, v19
-; GFX7-SDAG-NEXT: v_or_b32_e32 v13, v13, v18
-; GFX7-SDAG-NEXT: v_or_b32_e32 v14, v14, v17
-; GFX7-SDAG-NEXT: v_or_b32_e32 v15, v15, v16
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v31, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v16
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-GISEL-NEXT: v_min_f32_e32 v31, v31, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v17
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; GFX7-GISEL-NEXT: v_min_f32_e32 v16, v0, v16
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v18
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v17
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-GISEL-NEXT: v_min_f32_e32 v17, v17, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v19
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; GFX7-GISEL-NEXT: v_min_f32_e32 v18, v2, v18
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v3
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v20
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v19
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v4
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-GISEL-NEXT: v_min_f32_e32 v19, v19, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v21
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v21, 16, v21
-; GFX7-GISEL-NEXT: v_min_f32_e32 v20, v4, v20
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v5
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v4, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v22
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v22, 16, v22
-; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v5, v21
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v6
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-GISEL-NEXT: v_min_f32_e32 v21, v21, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v23
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v23, 16, v23
-; GFX7-GISEL-NEXT: v_min_f32_e32 v6, v6, v22
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v7
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-GISEL-NEXT: v_min_f32_e32 v22, v22, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v24
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; GFX7-GISEL-NEXT: v_min_f32_e32 v7, v7, v23
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v8
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-GISEL-NEXT: v_min_f32_e32 v23, v23, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v25
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v25, 16, v25
-; GFX7-GISEL-NEXT: v_min_f32_e32 v8, v8, v24
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v9
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v25
-; GFX7-GISEL-NEXT: v_min_f32_e32 v24, v24, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v26
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v26, 16, v26
-; GFX7-GISEL-NEXT: v_min_f32_e32 v9, v9, v25
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v10
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v26
-; GFX7-GISEL-NEXT: v_min_f32_e32 v25, v25, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v27
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v27, 16, v27
-; GFX7-GISEL-NEXT: v_min_f32_e32 v10, v10, v26
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v11
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v27
-; GFX7-GISEL-NEXT: v_min_f32_e32 v26, v26, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v28
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v28, 16, v28
-; GFX7-GISEL-NEXT: v_min_f32_e32 v11, v11, v27
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v12
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v28
-; GFX7-GISEL-NEXT: v_min_f32_e32 v27, v27, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v29
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v29, 16, v29
-; GFX7-GISEL-NEXT: v_min_f32_e32 v12, v12, v28
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v13
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v13
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v29
-; GFX7-GISEL-NEXT: v_min_f32_e32 v28, v28, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v30
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; GFX7-GISEL-NEXT: v_min_f32_e32 v13, v13, v29
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v14
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-GISEL-NEXT: v_min_f32_e32 v29, v29, v32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v15
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; GFX7-GISEL-NEXT: v_min_f32_e32 v14, v14, v30
-; GFX7-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v17
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v33, v30
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-GISEL-NEXT: v_min_f32_e32 v32, v32, v33
-; GFX7-GISEL-NEXT: v_min_f32_e32 v15, v15, v30
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v30, v31
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v31, v0
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v0, 16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v18
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v15, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v30, v0
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v20
-; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v19
-; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v4
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v16
-; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v17, v4
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v21
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v22
-; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v18, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v29
-; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v16, v6
-; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v17, v7
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v23
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v24
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v19, v32
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v8, v16, v8
-; GFX7-GISEL-NEXT: v_or_b32_e32 v9, v17, v9
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v25
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v26
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v31, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v14, v18, v14
-; GFX7-GISEL-NEXT: v_or_b32_e32 v10, v16, v10
-; GFX7-GISEL-NEXT: v_or_b32_e32 v11, v17, v11
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v27
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v28
-; GFX7-GISEL-NEXT: v_or_b32_e32 v15, v19, v15
-; GFX7-GISEL-NEXT: v_or_b32_e32 v12, v16, v12
-; GFX7-GISEL-NEXT: v_or_b32_e32 v13, v17, v13
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v17, v17, v17
-; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v17
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v40
-; GFX8-SDAG-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_max_f16_e32 v30, v30, v30
-; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-SDAG-NEXT: v_max_f16_e32 v29, v29, v29
-; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-SDAG-NEXT: v_max_f16_e32 v28, v28, v28
-; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-SDAG-NEXT: v_max_f16_e32 v27, v27, v27
-; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-SDAG-NEXT: v_max_f16_e32 v26, v26, v26
-; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-SDAG-NEXT: v_max_f16_e32 v25, v25, v25
-; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-SDAG-NEXT: v_max_f16_e32 v24, v24, v24
-; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-SDAG-NEXT: v_max_f16_e32 v23, v23, v23
-; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-SDAG-NEXT: v_max_f16_e32 v22, v22, v22
-; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-SDAG-NEXT: v_max_f16_e32 v21, v21, v21
-; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-SDAG-NEXT: v_max_f16_e32 v20, v20, v20
-; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-SDAG-NEXT: v_max_f16_e32 v19, v19, v19
-; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-SDAG-NEXT: v_max_f16_e32 v18, v18, v18
-; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-SDAG-NEXT: v_max_f16_e32 v16, v16, v16
-; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-SDAG-NEXT: v_min_f16_e32 v14, v14, v30
-; GFX8-SDAG-NEXT: v_min_f16_e32 v13, v13, v29
-; GFX8-SDAG-NEXT: v_min_f16_e32 v12, v12, v28
-; GFX8-SDAG-NEXT: v_min_f16_e32 v11, v11, v27
-; GFX8-SDAG-NEXT: v_min_f16_e32 v10, v10, v26
-; GFX8-SDAG-NEXT: v_min_f16_e32 v9, v9, v25
-; GFX8-SDAG-NEXT: v_min_f16_e32 v8, v8, v24
-; GFX8-SDAG-NEXT: v_min_f16_e32 v7, v7, v23
-; GFX8-SDAG-NEXT: v_min_f16_e32 v6, v6, v22
-; GFX8-SDAG-NEXT: v_min_f16_e32 v5, v5, v21
-; GFX8-SDAG-NEXT: v_min_f16_e32 v4, v4, v20
-; GFX8-SDAG-NEXT: v_min_f16_e32 v3, v3, v19
-; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v18
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v16
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v33
-; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v55
-; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v54
-; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v53
-; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v52
-; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v51
-; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v50
-; GFX8-SDAG-NEXT: v_or_b32_e32 v8, v8, v49
-; GFX8-SDAG-NEXT: v_or_b32_e32 v9, v9, v48
-; GFX8-SDAG-NEXT: v_or_b32_e32 v10, v10, v39
-; GFX8-SDAG-NEXT: v_or_b32_e32 v11, v11, v38
-; GFX8-SDAG-NEXT: v_or_b32_e32 v12, v12, v36
-; GFX8-SDAG-NEXT: v_or_b32_e32 v13, v13, v34
-; GFX8-SDAG-NEXT: v_or_b32_e32 v14, v14, v32
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_max_f16_e32 v31, v31, v31
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-SDAG-NEXT: v_min_f16_e32 v15, v15, v31
-; GFX8-SDAG-NEXT: v_or_b32_e32 v15, v15, v35
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v31, v0, v0
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v16, v16
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v16, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v31, v31, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v1, v1
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v17, v17
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v17, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v16, v16, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v2, v2
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v18, v18
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v18, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v17, v17, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v18, v3, v3
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v19, v19
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v19, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v18, v18, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v3, v3, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v19, v4, v4
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v20, v20
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v20, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v19, v19, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v4, v4, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v20, v5, v5
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v21, v21
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v21, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v20, v20, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v21, v6, v6
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v22, v22
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v22, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v21, v21, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v6, v6, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v22, v7, v7
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v23, v23
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v23, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v22, v22, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v23, v8, v8
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v24, v24
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v24, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v23, v23, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v8, v8, v24 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v24, v9, v9
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v25, v25
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v25, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v24, v24, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v9, v9, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v25, v10, v10
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v26, v26
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v26, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v25, v25, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v10, v10, v26 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v26, v11, v11
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v27, v27
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v27, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v26, v26, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v27, v12, v12
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v28, v28
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v28, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v27, v27, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v12, v12, v28 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v28, v13, v13
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v29, v29
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v29, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v28, v28, v32
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v13, v13, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_max_f16_e32 v29, v14, v14
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v30, v30
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v14, v14, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
-; GFX8-GISEL-NEXT: v_min_f16_e32 v29, v29, v32
-; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v15, v15
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v31, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v16, v1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
-; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v19, v4
-; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v20, v5
-; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v21, v6
-; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v22, v7
-; GFX8-GISEL-NEXT: v_or_b32_e32 v8, v23, v8
-; GFX8-GISEL-NEXT: v_or_b32_e32 v9, v24, v9
-; GFX8-GISEL-NEXT: v_or_b32_e32 v10, v25, v10
-; GFX8-GISEL-NEXT: v_or_b32_e32 v11, v26, v11
-; GFX8-GISEL-NEXT: v_or_b32_e32 v12, v27, v12
-; GFX8-GISEL-NEXT: v_or_b32_e32 v13, v28, v13
-; GFX8-GISEL-NEXT: v_or_b32_e32 v14, v29, v14
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f16_e32 v33, v30, v30
-; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v32, v32, v33
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v15, v15, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-GISEL-NEXT: v_or_b32_e32 v15, v32, v15
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v17, v17
-; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v18, v18
-; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v16
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v19, v19
-; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-SDAG-NEXT: v_pk_min_f16 v3, v3, v16
-; GFX900-SDAG-NEXT: buffer_load_dword v16, off, s[0:3], s32
-; GFX900-SDAG-NEXT: v_pk_max_f16 v17, v20, v20
-; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-SDAG-NEXT: v_pk_max_f16 v18, v21, v21
-; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-SDAG-NEXT: v_pk_max_f16 v19, v22, v22
-; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-SDAG-NEXT: v_pk_max_f16 v20, v23, v23
-; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-SDAG-NEXT: v_pk_max_f16 v21, v24, v24
-; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-SDAG-NEXT: v_pk_max_f16 v22, v25, v25
-; GFX900-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX900-SDAG-NEXT: v_pk_max_f16 v23, v26, v26
-; GFX900-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX900-SDAG-NEXT: v_pk_max_f16 v24, v27, v27
-; GFX900-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX900-SDAG-NEXT: v_pk_max_f16 v25, v28, v28
-; GFX900-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX900-SDAG-NEXT: v_pk_max_f16 v26, v29, v29
-; GFX900-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX900-SDAG-NEXT: v_pk_max_f16 v27, v30, v30
-; GFX900-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX900-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX900-SDAG-NEXT: v_pk_min_f16 v4, v4, v17
-; GFX900-SDAG-NEXT: v_pk_min_f16 v5, v5, v18
-; GFX900-SDAG-NEXT: v_pk_min_f16 v6, v6, v19
-; GFX900-SDAG-NEXT: v_pk_min_f16 v7, v7, v20
-; GFX900-SDAG-NEXT: v_pk_min_f16 v8, v8, v21
-; GFX900-SDAG-NEXT: v_pk_min_f16 v9, v9, v22
-; GFX900-SDAG-NEXT: v_pk_min_f16 v10, v10, v23
-; GFX900-SDAG-NEXT: v_pk_min_f16 v11, v11, v24
-; GFX900-SDAG-NEXT: v_pk_min_f16 v12, v12, v25
-; GFX900-SDAG-NEXT: v_pk_min_f16 v13, v13, v26
-; GFX900-SDAG-NEXT: v_pk_min_f16 v14, v14, v27
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v17, v17
-; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v18, v18
-; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v16
-; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v19, v19
-; GFX900-GISEL-NEXT: v_pk_min_f16 v3, v3, v16
-; GFX900-GISEL-NEXT: buffer_load_dword v16, off, s[0:3], s32
-; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-GISEL-NEXT: v_pk_max_f16 v17, v20, v20
-; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-GISEL-NEXT: v_pk_max_f16 v18, v21, v21
-; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-GISEL-NEXT: v_pk_max_f16 v19, v22, v22
-; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-GISEL-NEXT: v_pk_max_f16 v20, v23, v23
-; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-GISEL-NEXT: v_pk_max_f16 v21, v24, v24
-; GFX900-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX900-GISEL-NEXT: v_pk_max_f16 v22, v25, v25
-; GFX900-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX900-GISEL-NEXT: v_pk_max_f16 v23, v26, v26
-; GFX900-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX900-GISEL-NEXT: v_pk_max_f16 v24, v27, v27
-; GFX900-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX900-GISEL-NEXT: v_pk_max_f16 v25, v28, v28
-; GFX900-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX900-GISEL-NEXT: v_pk_max_f16 v26, v29, v29
-; GFX900-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX900-GISEL-NEXT: v_pk_max_f16 v27, v30, v30
-; GFX900-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX900-GISEL-NEXT: v_pk_min_f16 v4, v4, v17
-; GFX900-GISEL-NEXT: v_pk_min_f16 v5, v5, v18
-; GFX900-GISEL-NEXT: v_pk_min_f16 v6, v6, v19
-; GFX900-GISEL-NEXT: v_pk_min_f16 v7, v7, v20
-; GFX900-GISEL-NEXT: v_pk_min_f16 v8, v8, v21
-; GFX900-GISEL-NEXT: v_pk_min_f16 v9, v9, v22
-; GFX900-GISEL-NEXT: v_pk_min_f16 v10, v10, v23
-; GFX900-GISEL-NEXT: v_pk_min_f16 v11, v11, v24
-; GFX900-GISEL-NEXT: v_pk_min_f16 v12, v12, v25
-; GFX900-GISEL-NEXT: v_pk_min_f16 v13, v13, v26
-; GFX900-GISEL-NEXT: v_pk_min_f16 v14, v14, v27
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: scratch_load_dword v31, off, s32
-; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX950-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX950-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX950-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX950-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX950-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX950-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX950-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX950-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX950-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX950-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX950-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX950-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX950-SDAG-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX950-SDAG-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX950-SDAG-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX950-SDAG-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX950-SDAG-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX950-SDAG-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX950-SDAG-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX950-SDAG-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX950-SDAG-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX950-SDAG-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX950-SDAG-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX950-SDAG-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX950-SDAG-NEXT: s_nop 0
-; GFX950-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: scratch_load_dword v31, off, s32
-; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX950-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX950-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX950-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX950-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX950-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX950-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX950-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX950-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX950-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX950-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX950-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX950-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX950-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX950-GISEL-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX950-GISEL-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX950-GISEL-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX950-GISEL-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX950-GISEL-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX950-GISEL-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX950-GISEL-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX950-GISEL-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX950-GISEL-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX950-GISEL-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX950-GISEL-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX950-GISEL-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX950-GISEL-NEXT: s_nop 0
-; GFX950-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX10-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX10-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX10-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX10-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX10-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX10-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX10-SDAG-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX10-SDAG-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX10-SDAG-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX10-SDAG-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX10-SDAG-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX10-SDAG-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX10-SDAG-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX10-SDAG-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX10-SDAG-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX10-SDAG-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX10-SDAG-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX10-SDAG-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX10-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX10-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX10-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX10-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX10-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX10-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX10-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX10-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX10-GISEL-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX10-GISEL-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX10-GISEL-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX10-GISEL-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX10-GISEL-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX10-GISEL-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX10-GISEL-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX10-GISEL-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX10-GISEL-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX10-GISEL-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX10-GISEL-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX10-GISEL-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX10-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX11-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX11-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX11-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX11-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX11-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX11-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX11-SDAG-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX11-SDAG-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX11-SDAG-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX11-SDAG-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX11-SDAG-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX11-SDAG-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX11-SDAG-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX11-SDAG-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX11-SDAG-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX11-SDAG-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX11-SDAG-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX11-SDAG-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX11-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX11-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX11-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX11-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX11-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX11-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX11-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX11-GISEL-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX11-GISEL-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX11-GISEL-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX11-GISEL-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX11-GISEL-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX11-GISEL-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX11-GISEL-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX11-GISEL-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX11-GISEL-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX11-GISEL-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX11-GISEL-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX11-GISEL-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v32f16:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v32f16:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32 nv
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call <32 x half> @llvm.minimumnum.v32f16(<32 x half> %x, <32 x half> %y)
- ret <32 x half> %result
-}
-
-define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v3, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v3, v3
-; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX10-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX10-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-SDAG-NEXT: v_dual_min_f32 v0, v0, v2 :: v_dual_min_f32 v1, v1, v3
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-GISEL-NEXT: v_dual_min_f32 v0, v0, v2 :: v_dual_min_f32 v1, v1, v3
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v2f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v2f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v2, v2, v2
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -8388,203 +4402,98 @@ define <2 x float> @v_minimumnum_v2f32_nnan(<2 x float> %x, <2 x float> %y) #1 {
}
define <3 x float> @v_minimumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v4, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v5, v5
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v4, v4
-; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v5, v5
-; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX10-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX10-SDAG-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX10-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX10-GISEL-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
-; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
-; GFX11-SDAG-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_dual_min_f32 v0, v0, v3 :: v_dual_min_f32 v1, v1, v4
-; GFX11-SDAG-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v3, v3, v3
-; GFX11-GISEL-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v4, v4, v4
-; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v5, v5, v5
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_dual_min_f32 v0, v0, v3 :: v_dual_min_f32 v1, v1, v4
-; GFX11-GISEL-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v3f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v3f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v3f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v3f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v3f32:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX9-NEXT: v_max_f32_e32 v3, v4, v4
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX9-NEXT: v_max_f32_e32 v3, v5, v5
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v3f32:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX10-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX10-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v3f32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
+; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
+; GFX11-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_min_f32 v0, v0, v3 :: v_dual_min_f32 v1, v1, v4
+; GFX11-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v3f32:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1170-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v3f32:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX12-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v3f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1251-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x float> @llvm.minimumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -8659,232 +4568,111 @@ define <3 x float> @v_minimumnum_v3f32_nnan(<3 x float> %x, <3 x float> %y) #1 {
}
define <4 x float> @v_minimumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-SDAG-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX8-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v5, v5
-; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v6, v6
-; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v7, v7
-; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-SDAG-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v5, v5
-; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v6, v6
-; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v7, v7
-; GFX9-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-SDAG-NEXT: v_max_f32_e32 v6, v6, v6
-; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-SDAG-NEXT: v_max_f32_e32 v7, v7, v7
-; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX10-SDAG-NEXT: v_min_f32_e32 v1, v1, v5
-; GFX10-SDAG-NEXT: v_min_f32_e32 v2, v2, v6
-; GFX10-SDAG-NEXT: v_min_f32_e32 v3, v3, v7
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-GISEL-NEXT: v_max_f32_e32 v6, v6, v6
-; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-GISEL-NEXT: v_max_f32_e32 v7, v7, v7
-; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX10-GISEL-NEXT: v_min_f32_e32 v1, v1, v5
-; GFX10-GISEL-NEXT: v_min_f32_e32 v2, v2, v6
-; GFX10-GISEL-NEXT: v_min_f32_e32 v3, v3, v7
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
-; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-SDAG-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
-; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_dual_min_f32 v0, v0, v4 :: v_dual_min_f32 v1, v1, v5
-; GFX11-SDAG-NEXT: v_dual_min_f32 v2, v2, v6 :: v_dual_min_f32 v3, v3, v7
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-GISEL-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
-; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-GISEL-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_dual_min_f32 v0, v0, v4 :: v_dual_min_f32 v1, v1, v5
-; GFX11-GISEL-NEXT: v_dual_min_f32 v2, v2, v6 :: v_dual_min_f32 v3, v3, v7
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX12-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX12-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v4f32:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v4f32:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v4f32:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v4f32:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v4f32:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX9-NEXT: v_max_f32_e32 v4, v5, v5
+; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX9-NEXT: v_max_f32_e32 v4, v6, v6
+; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX9-NEXT: v_max_f32_e32 v4, v7, v7
+; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v4f32:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-NEXT: v_max_f32_e32 v6, v6, v6
+; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-NEXT: v_max_f32_e32 v7, v7, v7
+; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX10-NEXT: v_min_f32_e32 v1, v1, v5
+; GFX10-NEXT: v_min_f32_e32 v2, v2, v6
+; GFX10-NEXT: v_min_f32_e32 v3, v3, v7
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v4f32:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
+; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
+; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_min_f32 v0, v0, v4 :: v_dual_min_f32 v1, v1, v5
+; GFX11-NEXT: v_dual_min_f32 v2, v2, v6 :: v_dual_min_f32 v3, v3, v7
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v4f32:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1170-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v4f32:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX12-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v4f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1251-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x float> @llvm.minimumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -8963,203 +4751,97 @@ define <4 x float> @v_minimumnum_v4f32_nnan(<4 x float> %x, <4 x float> %y) #1 {
}
define <2 x double> @v_minimumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX7-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX7-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX8-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX8-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX900-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX900-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[4:5]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
-; GFX950-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[4:5]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX10-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX10-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v2f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v2f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v2f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX7-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v2f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX8-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v2f64:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX900-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v2f64:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX950-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-NEXT: v_min_f64 v[2:3], v[2:3], v[4:5]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v2f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX10-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v2f64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v2f64:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v2f64:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -9193,297 +4875,155 @@ define <2 x double> @v_minimumnum_v2f64_nnan(<2 x double> %x, <2 x double> %y) #
; GFX10-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_v2f64_nnan:
+; GFX11-LABEL: v_minimumnum_v2f64_nnan:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v2f64_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v2f64_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
+ ret <2 x double> %result
+}
+
+define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
+; GFX7-LABEL: v_minimumnum_v3f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX7-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX7-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v3f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX8-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX8-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v3f64:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX900-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX900-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v3f64:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX950-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX950-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-NEXT: v_min_f64 v[4:5], v[4:5], v[6:7]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v3f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX10-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX10-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v3f64:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX11-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v2f64_nnan:
+; GFX1170-LABEL: v_minimumnum_v3f64:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[8:9]
+; GFX1170-NEXT: v_min_num_f64 v[4:5], v[4:5], v[10:11]
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_v2f64_nnan:
+; GFX12-LABEL: v_minimumnum_v3f64:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_minimumnum_v2f64_nnan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v2f64_nnan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
- ret <2 x double> %result
-}
-
-define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX7-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX7-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX7-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX7-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX8-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX8-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX8-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX8-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX900-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX900-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX900-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX900-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[6:7]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
-; GFX950-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
-; GFX950-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[6:7]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX10-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX10-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX10-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX10-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX11-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX11-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[8:9]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[4:5], v[4:5], v[10:11]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[2:3], v[2:3], v[8:9]
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[4:5], v[4:5], v[10:11]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v3f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v3f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[6:9], v[6:9], v[6:9]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_minimumnum_v3f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x double> @llvm.minimumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -9562,297 +5102,140 @@ define <3 x double> @v_minimumnum_v3f64_nnan(<3 x double> %x, <3 x double> %y) #
}
define <4 x double> @v_minimumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
-; GFX7-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX7-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX7-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX7-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX7-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX7-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX7-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX8-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX8-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX8-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX8-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX8-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX8-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX900-SDAG: ; %bb.0:
-; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX900-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX900-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX900-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX900-GISEL: ; %bb.0:
-; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX900-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX900-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX900-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX950-SDAG: ; %bb.0:
-; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
-; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
-; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[8:9]
-; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
-; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[8:9]
-; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX950-GISEL: ; %bb.0:
-; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
-; GFX950-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
-; GFX950-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[8:9]
-; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
-; GFX950-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[8:9]
-; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX10-SDAG: ; %bb.0:
-; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX10-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX10-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX10-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX10-GISEL: ; %bb.0:
-; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX10-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX10-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX10-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX11-SDAG: ; %bb.0:
-; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX11-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX11-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX11-GISEL: ; %bb.0:
-; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX11-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX11-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[10:11]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[6:7], v[6:7], v[14:15]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[12:13], v[12:13], v[12:13]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[14:15], v[14:15], v[14:15]
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[2:3], v[2:3], v[10:11]
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[6:7], v[6:7], v[14:15]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v4f64:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[8:11]
-; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[4:7], v[4:7], v[12:15]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v4f64:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
-; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v4f64:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX7-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX7-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX7-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v4f64:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX8-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX8-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX8-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-LABEL: v_minimumnum_v4f64:
+; GFX900: ; %bb.0:
+; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX900-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX900-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX900-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX900-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-LABEL: v_minimumnum_v4f64:
+; GFX950: ; %bb.0:
+; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX950-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
+; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX950-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
+; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-NEXT: v_min_f64 v[4:5], v[4:5], v[8:9]
+; GFX950-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
+; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-NEXT: v_min_f64 v[6:7], v[6:7], v[8:9]
+; GFX950-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-LABEL: v_minimumnum_v4f64:
+; GFX10: ; %bb.0:
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX10-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX10-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX10-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_minimumnum_v4f64:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX11-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-LABEL: v_minimumnum_v4f64:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[10:11]
+; GFX1170-NEXT: v_min_num_f64 v[4:5], v[4:5], v[12:13]
+; GFX1170-NEXT: v_min_num_f64 v[6:7], v[6:7], v[14:15]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v4f64:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v4f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x double> @llvm.minimumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -9925,45 +5308,28 @@ define <4 x double> @v_minimumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_minimumnum_v4f64_nnan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[8:11]
-; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[4:7], v[4:7], v[12:15]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v4f64_nnan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_minimumnum_v4f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x double> @llvm.minimumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f16_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_minimumnum_f16_no_ieee:
; GFX8: ; %bb.0:
@@ -9995,137 +5361,64 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1170-TRUE16-GISEL: ; %bb.0:
-; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1170-FAKE16-GISEL: ; %bb.0:
-; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
-; GFX12-TRUE16-GISEL: ; %bb.0:
-; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
-; GFX12-FAKE16-GISEL: ; %bb.0:
-; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1251-TRUE16-GISEL: ; %bb.0:
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
-; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
-; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1251-FAKE16-GISEL: ; %bb.0:
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
-; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1170-TRUE16: ; %bb.0:
+; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1170-FAKE16: ; %bb.0:
+; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-LABEL: v_minimumnum_f16_no_ieee:
+; GFX12-TRUE16: ; %bb.0:
+; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-LABEL: v_minimumnum_f16_no_ieee:
+; GFX12-FAKE16: ; %bb.0:
+; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define half @v_minimumnum_f16_nan_no_ieee(half %x, half %y) #0 {
-; GFX7-SDAG-LABEL: v_minimumnum_f16_nan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_f16_nan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_f16_nan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_minimumnum_f16_nan_no_ieee:
; GFX8: ; %bb.0:
@@ -10237,57 +5530,28 @@ define float @v_minimumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f32_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f32_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f32_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f32_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f32_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f32_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f32_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -10380,60 +5644,28 @@ define double @v_minimumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_f64_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_f64_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
-; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_f64_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_f64_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_f64_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_f64_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_f64_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -10496,55 +5728,30 @@ define double @v_minimumnum_f64_nnan_no_ieee(double %x, double %y) #0 {
}
define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v0, v1
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_minimumnum_v2f16_no_ieee:
; GFX9: ; %bb.0:
@@ -10564,114 +5771,57 @@ define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
define <2 x half> @v_minimumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v0, v1
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -10718,79 +5868,42 @@ define <2 x half> @v_minimumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y)
}
define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX9-SDAG: ; %bb.0:
-; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX9-GISEL: ; %bb.0:
-; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
; GFX10: ; %bb.0:
@@ -10810,7 +5923,7 @@ define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-NEXT: v_pk_minimum_f16 v1, v1, v3
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
@@ -10821,7 +5934,7 @@ define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
; GFX1251-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
@@ -10829,92 +5942,52 @@ define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
define <4 x half> @v_minimumnum_v4f16_nnan_no_ieee(<4 x half> %x, <4 x half> %y) #0 {
-; GFX7-SDAG-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
-; GFX7-SDAG: ; %bb.0:
-; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v6, v5
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX7-GISEL-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
-; GFX7-GISEL: ; %bb.0:
-; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
-; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
-; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v5, v6
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
-; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-SDAG-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
-; GFX8-SDAG: ; %bb.0:
-; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-GISEL-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
-; GFX8-GISEL: ; %bb.0:
-; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v1, v3
-; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
-; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
-; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX7-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-NEXT: v_min_f32_e32 v5, v6, v5
+; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
+; GFX8: ; %bb.0:
+; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -10970,5 +6043,21 @@ attributes #0 = { "amdgpu-ieee"="false" nounwind }
attributes #1 = { nounwind }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX900: {{.*}}
-; GFX950: {{.*}}
+; GFX10-SDAG: {{.*}}
+; GFX11-FAKE16-SDAG: {{.*}}
+; GFX11-SDAG: {{.*}}
+; GFX11-TRUE16-SDAG: {{.*}}
+; GFX1170-FAKE16-SDAG: {{.*}}
+; GFX1170-SDAG: {{.*}}
+; GFX1170-TRUE16-SDAG: {{.*}}
+; GFX12-FAKE16-SDAG: {{.*}}
+; GFX12-SDAG: {{.*}}
+; GFX12-TRUE16-SDAG: {{.*}}
+; GFX1251-FAKE16-SDAG: {{.*}}
+; GFX1251-SDAG: {{.*}}
+; GFX1251-TRUE16-SDAG: {{.*}}
+; GFX7-SDAG: {{.*}}
+; GFX8-SDAG: {{.*}}
+; GFX9-SDAG: {{.*}}
+; GFX900-SDAG: {{.*}}
+; GFX950-SDAG: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/minmax.ll b/llvm/test/CodeGen/AMDGPU/minmax.ll
index 3b39f69cb6a69..1f8616c4d2170 100644
--- a/llvm/test/CodeGen/AMDGPU/minmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/minmax.ll
@@ -649,12 +649,10 @@ define amdgpu_ps void @s_test_minmax_f32_ieee_false(float inreg %a, float inreg
;
; GISEL-GFX1170-LABEL: s_test_minmax_f32_ieee_false:
; GISEL-GFX1170: ; %bb.0:
-; GISEL-GFX1170-NEXT: s_max_f32 s0, s0, s1
+; GISEL-GFX1170-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
; GISEL-GFX1170-NEXT: s_mov_b32 s6, s3
; GISEL-GFX1170-NEXT: s_mov_b32 s7, s4
-; GISEL-GFX1170-NEXT: v_mov_b32_e32 v1, 0
-; GISEL-GFX1170-NEXT: s_min_f32 s0, s0, s2
-; GISEL-GFX1170-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX1170-NEXT: v_maxmin_num_f32 v0, s0, s1, v0
; GISEL-GFX1170-NEXT: global_store_b32 v1, v0, s[6:7]
; GISEL-GFX1170-NEXT: s_endpgm
;
@@ -1061,23 +1059,20 @@ define amdgpu_ps void @s_test_minmax_f16_ieee_false(half inreg %a, half inreg %b
;
; GISEL-GFX1170-TRUE16-LABEL: s_test_minmax_f16_ieee_false:
; GISEL-GFX1170-TRUE16: ; %bb.0:
-; GISEL-GFX1170-TRUE16-NEXT: s_max_f16 s0, s0, s1
+; GISEL-GFX1170-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
; GISEL-GFX1170-TRUE16-NEXT: v_mov_b32_e32 v1, 0
; GISEL-GFX1170-TRUE16-NEXT: s_mov_b32 s6, s3
; GISEL-GFX1170-TRUE16-NEXT: s_mov_b32 s7, s4
-; GISEL-GFX1170-TRUE16-NEXT: s_min_f16 s0, s0, s2
-; GISEL-GFX1170-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0
+; GISEL-GFX1170-TRUE16-NEXT: v_maxmin_num_f16 v0.l, s0, s1, v0.l
; GISEL-GFX1170-TRUE16-NEXT: global_store_b16 v1, v0, s[6:7]
; GISEL-GFX1170-TRUE16-NEXT: s_endpgm
;
; GISEL-GFX1170-FAKE16-LABEL: s_test_minmax_f16_ieee_false:
; GISEL-GFX1170-FAKE16: ; %bb.0:
-; GISEL-GFX1170-FAKE16-NEXT: s_max_f16 s0, s0, s1
+; GISEL-GFX1170-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0
; GISEL-GFX1170-FAKE16-NEXT: s_mov_b32 s6, s3
; GISEL-GFX1170-FAKE16-NEXT: s_mov_b32 s7, s4
-; GISEL-GFX1170-FAKE16-NEXT: v_mov_b32_e32 v1, 0
-; GISEL-GFX1170-FAKE16-NEXT: s_min_f16 s0, s0, s2
-; GISEL-GFX1170-FAKE16-NEXT: v_mov_b32_e32 v0, s0
+; GISEL-GFX1170-FAKE16-NEXT: v_maxmin_num_f16 v0, s0, s1, v0
; GISEL-GFX1170-FAKE16-NEXT: global_store_b16 v1, v0, s[6:7]
; GISEL-GFX1170-FAKE16-NEXT: s_endpgm
;
diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
index 4f068fb68672d..78261dcac9895 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
@@ -959,27 +959,23 @@ define half @test_vector_reduce_fmax_v8half(<8 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmax_v8half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v1.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v3.l, v3.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmax_v8half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v4
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v5
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v4
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v3, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmax_v8half:
@@ -1561,43 +1557,33 @@ define half @test_vector_reduce_fmax_v16half(<16 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmax_v16half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v1.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v3.l, v3.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v4.l, v4.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v5.l, v5.h
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v6.l, v6.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v7.l, v7.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmax_v16half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v8
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v9
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v8
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v3, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v4, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v5, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v6, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v7, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmax_v16half:
diff --git a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
index b34d9e592d63c..944a8285c7440 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
@@ -959,27 +959,23 @@ define half @test_vector_reduce_fmin_v8half(<8 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v8half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v4
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v1, v5
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v4
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v3, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v8half:
@@ -1561,43 +1557,33 @@ define half @test_vector_reduce_fmin_v16half(<16 x half> %v) {
; GFX1170-SDAG-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX1170-SDAG-TRUE16: ; %bb.0: ; %entry
; GFX1170-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v1.l, v1.h
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v2.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v3.l, v3.h
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v4.l, v4.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v5.l, v5.h
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v6.l, v6.h
-; GFX1170-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v7.l, v7.h
+; GFX1170-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
; GFX1170-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-SDAG-FAKE16-LABEL: test_vector_reduce_fmin_v16half:
; GFX1170-SDAG-FAKE16: ; %bb.0: ; %entry
; GFX1170-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v8
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v1, v9
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v8
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v3, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v4, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v5, v1
-; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v7
-; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v6, v2
-; GFX1170-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v7, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
+; GFX1170-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX1170-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-TRUE16-LABEL: test_vector_reduce_fmin_v16half:
>From e07df7391882d7f7d4fb2941fa6878e501c71fe3 Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Fri, 3 Jul 2026 11:46:58 +0800
Subject: [PATCH 5/7] fix test case
---
llvm/test/CodeGen/AMDGPU/maximumnum.ll | 14385 +++++++++++++++--------
llvm/test/CodeGen/AMDGPU/minimumnum.ll | 13904 +++++++++++++++-------
2 files changed, 19180 insertions(+), 9109 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/maximumnum.ll b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
index 6cded80fd6141..8aef100354799 100644
--- a/llvm/test/CodeGen/AMDGPU/maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
@@ -39,115 +39,239 @@
; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
define half @v_maximumnum_f16(half %x, half %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f16:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f16:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f16:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
define half @v_maximumnum_f16_nnan(half %x, half %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_maximumnum_f16_nnan:
; GFX8: ; %bb.0:
@@ -274,118 +398,245 @@ define half @v_maximumnum_f16_1.0(half %x) #1 {
; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, 1.0, v0
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_1.0:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_1.0:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_1.0:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half 1.0)
ret half %result
}
define float @v_maximumnum_f32(float %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f32:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -448,69 +699,142 @@ define float @v_maximumnum_f32_nnan(float %x, float %y) #1 {
}
define double @v_maximumnum_f64(double %x, double %y) #1 {
-; GFX7-LABEL: v_maximumnum_f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f64:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f64:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f64:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX9-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -609,28 +933,57 @@ define float @v_maximumnum_f32_1.0(float %x) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, 1.0, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f32_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, 1.0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -676,47 +1029,76 @@ define float @v_maximumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_rhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %canon.y = call float @llvm.canonicalize.f32(float %y)
- %result = call float @llvm.maximumnum.f32(float %x, float %canon.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %canon.y = call float @llvm.canonicalize.f32(float %y)
+ %result = call float @llvm.maximumnum.f32(float %x, float %canon.y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
+; GFX7-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_maximumnum_f32_lhs_not_snan:
; GFX8: ; %bb.0:
@@ -750,34 +1132,63 @@ define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_lhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.maximumnum.f32(float %canon.x, float %y)
ret float %result
@@ -895,3556 +1306,7297 @@ define double @v_maximumnum_f64_1.0(double %x) #1 {
; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f64_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f64_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f64_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f64_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double 1.0)
ret double %result
}
define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_s_v:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16_s_v:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_f16_s_v:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f16_s_v:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16_s_v:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16_s_v:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16_s_v:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_s_v:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_s_v:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_s_v:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_s_v:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_s_v:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_s_v:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_v_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16_v_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, s0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call half @llvm.maximumnum.f16(half %x, half %y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, s17
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, s16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s17
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
+; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
+; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
+; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
+; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, s1, s1
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, s0, s0
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s1, s1
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s0, s1
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s1, s1
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s0, s1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX12-TRUE16-GISEL-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-TRUE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX12-FAKE16-GISEL-NEXT: s_max_num_f16 s0, s0, s1
+; GFX12-FAKE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: s_max_num_f16 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1251-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1251-TRUE16-GISEL-NEXT: s_max_num_f16 s0, s0, s1
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_max_num_f16 s0, s0, s1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call half @llvm.maximumnum.f16(half %x, half %y)
+ ret half %result
+}
+
+define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.maximumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, s0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.maximumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define float @v_maximumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
+; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
+; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
+; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
+; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v1, v0
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, s0, s1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_max_num_f32 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX12-GISEL-NEXT: s_max_num_f32 s0, s0, s1
+; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: s_max_num_f32 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1251-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1251-GISEL-NEXT: s_max_num_f32 s0, s0, s1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.maximumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define double @v_maximumnum_f64_s_v(double inreg %x, double %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX900-LABEL: v_maximumnum_f16_v_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f16_v_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16_v_s:
+; GFX10-LABEL: v_maximumnum_f64_s_v:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16_v_s:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16_v_s:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_v_s:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_v_s:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_v_s:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_v_s:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_v_s:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, s0, v0.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX11-LABEL: v_maximumnum_f64_s_v:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_v_s:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, s0, v0
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
- %result = call half @llvm.maximumnum.f16(half %x, half %y)
- ret half %result
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[0:1], v[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[2:3], v[0:1]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.maximumnum.f64(double %x, double %y)
+ ret double %result
}
-define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_s_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, s17
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16_s_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+define double @v_maximumnum_f64_v_s(double %x, double inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX900-LABEL: v_maximumnum_f16_s_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f16_s_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16_s_s:
+; GFX10-LABEL: v_maximumnum_f64_v_s:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f16_e32 v0, v1, v0
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16_s_s:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, s1, s1
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.h, v0.l
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: v_maximumnum_f64_v_s:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16_s_s:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v1, v0
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_s_s:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, s0, s1
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_s_s:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, s0, s1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f16_s_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_max_num_f16 s0, s0, s1
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f16_s_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: s_max_num_f16 s0, s0, s1
-; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call half @llvm.maximumnum.f16(half %x, half %y)
- ret half %result
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], s[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.maximumnum.f64(double %x, double %y)
+ ret double %result
}
-define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_s_v:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32_s_v:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_f32_s_v:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f32_s_v:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32_s_v:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32_s_v:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32_s_v:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_s_v:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_s_v:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.maximumnum.f32(float %x, float %y)
+define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], s[0:1], s[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[2:3], s[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.maximumnum.f64(double %x, double %y)
+ ret double %result
+}
+
+define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, v0, |v1|
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %result = call float @llvm.maximumnum.f32(float %x, float %fabs.y)
ret float %result
}
-define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_v_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32_v_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_f32_v_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f32_v_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32_v_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32_v_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32_v_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_v_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_v_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, s0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.maximumnum.f32(float %x, float %y)
+define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %fneg.fabs.y = fneg float %fabs.y
+ %result = call float @llvm.maximumnum.f32(float %x, float %fneg.fabs.y)
ret float %result
}
-define float @v_maximumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_s_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32_s_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_f32_s_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f32_s_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32_s_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32_s_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v1, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32_s_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e64 v0, s0, s1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_s_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_max_num_f32 s0, s0, s1
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_s_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: s_max_num_f32 s0, s0, s1
-; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.maximumnum.f32(float %x, float %y)
+define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.x = call float @llvm.fabs.f32(float %x)
+ %fabs.y = call float @llvm.fabs.f32(float %y)
+ %result = call float @llvm.maximumnum.f32(float %fabs.x, float %fabs.y)
ret float %result
}
-define double @v_maximumnum_f64_s_v(double inreg %x, double %y) #1 {
-; GFX7-LABEL: v_maximumnum_f64_s_v:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f64_s_v:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_f64_s_v:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f64_s_v:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f64_s_v:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f64_s_v:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f64_s_v:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], s[0:1], v[0:1]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f64_s_v:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f64_s_v:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.maximumnum.f64(double %x, double %y)
+define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX9-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX10-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX11-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, -v0, -v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, -v0, -v0 :: v_dual_max_num_f32 v1, -v1, -v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg float %x
+ %fneg.y = fneg float %y
+ %result = call float @llvm.maximumnum.f32(float %fneg.x, float %fneg.y)
+ ret float %result
+}
+
+define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %result = call half @llvm.maximumnum.f16(half %x, half %fabs.y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %fneg.fabs.y = fneg half %fabs.y
+ %result = call half @llvm.maximumnum.f16(half %x, half %fneg.fabs.y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, |v0|
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fabs.x = call half @llvm.fabs.f16(half %x)
+ %fabs.y = call half @llvm.fabs.f16(half %y)
+ %result = call half @llvm.maximumnum.f16(half %fabs.x, half %fabs.y)
+ ret half %result
+}
+
+define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, -v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -v1
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX8-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX9-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX10-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg half %x
+ %fneg.y = fneg half %y
+ %result = call half @llvm.maximumnum.f16(half %fneg.x, half %fneg.y)
+ ret half %result
+}
+
+define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX9-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX9-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %fneg.x = fneg double %x
+ %fneg.y = fneg double %y
+ %result = call double @llvm.maximumnum.f64(double %fneg.x, double %fneg.y)
ret double %result
}
-define double @v_maximumnum_f64_v_s(double %x, double inreg %y) #1 {
-; GFX7-LABEL: v_maximumnum_f64_v_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f64_v_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_f64_v_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f64_v_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f64_v_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f64_v_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f64_v_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], s[0:1]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f64_v_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f64_v_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.maximumnum.f64(double %x, double %y)
- ret double %result
-}
-
-define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
-; GFX7-LABEL: v_maximumnum_f64_s_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f64_s_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_f64_s_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_f64_s_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f64_s_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f64_s_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f64 v[0:1], v[2:3], v[0:1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f64_s_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], s[0:1], s[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f64_s_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f64_s_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.maximumnum.f64(double %x, double %y)
- ret double %result
-}
-
-define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e64 v0, v0, |v1|
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e64 v0, v0, |v1|
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_fabs_rhs:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e64 v0, v0, |v1|
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %result = call float @llvm.maximumnum.f32(float %x, float %fabs.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e64 v0, v0, -|v1|
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %fneg.fabs.y = fneg float %fabs.y
- %result = call float @llvm.maximumnum.f32(float %x, float %fneg.fabs.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_fabs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32_fabs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f32_fabs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32_fabs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32_fabs:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32_fabs:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_fabs:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_fabs:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e64 v0, |v0|, |v1|
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %fabs.x = call float @llvm.fabs.f32(float %x)
- %fabs.y = call float @llvm.fabs.f32(float %y)
- %result = call float @llvm.maximumnum.f32(float %fabs.x, float %fabs.y)
- ret float %result
-}
-
-define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
-; GFX7-LABEL: v_maximumnum_f32_fneg:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f32_fneg:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f32_fneg:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f32_fneg:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f32_fneg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f32_fneg:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e64 v0, -v0, -v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_fneg:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_fneg:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e64 v0, -v0, -v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg float %x
- %fneg.y = fneg float %y
- %result = call float @llvm.maximumnum.f32(float %fneg.x, float %fneg.y)
- ret float %result
-}
-
-define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, |v1|
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, |v1|
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fabs_rhs:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, |v1|
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %result = call half @llvm.maximumnum.f16(half %x, half %fabs.y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, v0, -|v1|
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %fneg.fabs.y = fneg half %fabs.y
- %result = call half @llvm.maximumnum.f16(half %x, half %fneg.fabs.y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_fabs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-NEXT: v_cvt_f32_f16_e64 v0, |v0|
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16_fabs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f16_fabs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16_fabs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16_fabs:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16_fabs:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fabs:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fabs:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_fabs:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_fabs:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fabs:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fabs:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, |v0|, |v1|
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
- %fabs.x = call half @llvm.fabs.f16(half %x)
- %fabs.y = call half @llvm.fabs.f16(half %y)
- %result = call half @llvm.maximumnum.f16(half %fabs.x, half %fabs.y)
- ret half %result
-}
-
-define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
-; GFX7-LABEL: v_maximumnum_f16_fneg:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -v1
-; GFX7-NEXT: v_cvt_f32_f16_e64 v0, -v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f16_fneg:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX8-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f16_fneg:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX9-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f16_fneg:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX10-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_maximumnum_f16_fneg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_maximumnum_f16_fneg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_fneg:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_fneg:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e64 v0, -v0, -v1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_fneg:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_fneg:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e64 v0, -v0, -v1
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_fneg:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_fneg:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e64 v0, -v0, -v1
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg half %x
- %fneg.y = fneg half %y
- %result = call half @llvm.maximumnum.f16(half %fneg.x, half %fneg.y)
- ret half %result
-}
-
-define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
-; GFX7-LABEL: v_maximumnum_f64_fneg:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX7-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_f64_fneg:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX8-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_f64_fneg:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX9-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_f64_fneg:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX10-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_f64_fneg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX11-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_f64_fneg:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f64_fneg:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f64_fneg:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %fneg.x = fneg double %x
- %fneg.y = fneg double %y
- %result = call double @llvm.maximumnum.f64(double %fneg.x, double %fneg.y)
- ret double %result
-}
-
-define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v2f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v2f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v2f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v2f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v2f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v2f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v2f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v2f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v2f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
-}
-
-define <2 x half> @v_maximumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v2f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v2f16_nnan:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_v2f16_nnan:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v2f16_nnan:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v2f16_nnan:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v2f16_nnan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v2f16_nnan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v2f16_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
-}
-
-define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v3f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v3f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_v3f16:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX9-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX9-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v3f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v3f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_maximumnum_v3f16:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_v3f16:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v3
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_v3f16:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_v3f16:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v3
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_v3f16:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_v3f16:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v3
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
- %result = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
-}
-
-define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v3f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v3f16_nnan:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_v3f16_nnan:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v3f16_nnan:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v3f16_nnan:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v3f16_nnan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v3f16_nnan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v3f16_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
-}
-
-define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v4f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v5, v6, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v4f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v4f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX900-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v4f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX950-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v2
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v4f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v4f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v4f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v4f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v4f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
- ret <4 x half> %result
-}
-
-define <4 x half> @v_maximumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v4f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v5, v6, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v4f16_nnan:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v2, v3
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
+}
+
+define <2 x half> @v_maximumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v2f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v2f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v2f16_nnan:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v2f16_nnan:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX9-LABEL: v_maximumnum_v4f16_nnan:
+; GFX9-LABEL: v_maximumnum_v2f16_nnan:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_maximumnum_v4f16_nnan:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v4f16_nnan:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v4f16_nnan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v4f16_nnan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v4f16_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
- ret <4 x half> %result
-}
-
-define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v6f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_max_f32_e32 v6, v6, v7
-; GFX7-NEXT: v_max_f32_e32 v8, v8, v9
-; GFX7-NEXT: v_max_f32_e32 v9, v10, v11
-; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v6
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v9
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v6f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v5
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v4
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v6
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v6f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX900-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX900-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v3
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v6f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX950-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX950-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v3
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v6f16:
+; GFX10-LABEL: v_maximumnum_v2f16_nnan:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v1
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_maximumnum_v6f16:
+; GFX11-LABEL: v_maximumnum_v2f16_nnan:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_v6f16:
+; GFX1170-LABEL: v_maximumnum_v2f16_nnan:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_v6f16:
+; GFX12-LABEL: v_maximumnum_v2f16_nnan:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_v6f16:
+; GFX1251-LABEL: v_maximumnum_v2f16_nnan:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v3
-; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v4
-; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <6 x half> @llvm.maximumnum.v6f16(<6 x half> %x, <6 x half> %y)
- ret <6 x half> %result
+ %result = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
}
-define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v8f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v2
-; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_max_f32_e32 v11, v11, v12
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_max_f32_e32 v8, v8, v9
-; GFX7-NEXT: v_max_f32_e32 v12, v14, v12
-; GFX7-NEXT: v_max_f32_e32 v10, v10, v13
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-NEXT: v_max_f32_e32 v3, v3, v7
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v6
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v12
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
-; GFX7-NEXT: v_or_b32_e32 v3, v3, v11
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v8f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v7
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v6
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v5
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v4
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX8-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v8f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX900-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX900-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v4
-; GFX900-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v4
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v8f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX950-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v4
-; GFX950-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v4
-; GFX950-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v4
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v8f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v5
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v6
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v7
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v8f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v4
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v5
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v7
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v8f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1170-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v8f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v8f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v4
-; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v5
-; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v6
-; GFX1251-NEXT: v_pk_max_num_f16 v3, v3, v7
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> %x, <8 x half> %y)
- ret <8 x half> %result
+define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v5
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX9-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v3
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v3
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v3
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
}
-define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v16f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; GFX7-NEXT: v_lshrrev_b32_e32 v17, 16, v7
-; GFX7-NEXT: v_lshrrev_b32_e32 v18, 16, v14
-; GFX7-NEXT: v_lshrrev_b32_e32 v19, 16, v6
-; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v13
-; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v5
-; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v12
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_max_f32_e32 v16, v17, v16
-; GFX7-NEXT: v_max_f32_e32 v17, v19, v18
-; GFX7-NEXT: v_max_f32_e32 v18, v21, v20
-; GFX7-NEXT: v_max_f32_e32 v19, v23, v22
-; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v11
-; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v10
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_lshrrev_b32_e32 v24, 16, v0
-; GFX7-NEXT: v_max_f32_e32 v20, v21, v20
-; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-NEXT: v_max_f32_e32 v21, v23, v22
-; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v9
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_max_f32_e32 v22, v23, v22
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v8
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_max_f32_e32 v23, v24, v23
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v23
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v9
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v22
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v10
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v21
-; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-NEXT: v_max_f32_e32 v5, v5, v13
-; GFX7-NEXT: v_max_f32_e32 v3, v3, v11
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v18
-; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v20
-; GFX7-NEXT: v_max_f32_e32 v7, v7, v15
-; GFX7-NEXT: v_max_f32_e32 v6, v6, v14
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v12
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v19
-; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-NEXT: v_or_b32_e32 v3, v3, v10
-; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX7-NEXT: v_or_b32_e32 v5, v5, v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX7-NEXT: v_or_b32_e32 v4, v4, v10
-; GFX7-NEXT: v_or_b32_e32 v6, v6, v9
-; GFX7-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v16f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v15
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v14
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v13
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v12
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v11
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v10
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v9
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v8
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v23
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v22
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v21
-; GFX8-NEXT: v_or_b32_e32 v3, v3, v20
-; GFX8-NEXT: v_or_b32_e32 v4, v4, v19
-; GFX8-NEXT: v_or_b32_e32 v5, v5, v18
-; GFX8-NEXT: v_or_b32_e32 v6, v6, v17
-; GFX8-NEXT: v_or_b32_e32 v7, v7, v16
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v3f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v3f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v3f16_nnan:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v3f16_nnan:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_v3f16_nnan:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_v3f16_nnan:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX900-LABEL: v_maximumnum_v16f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-NEXT: v_pk_max_f16 v5, v5, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-NEXT: v_pk_max_f16 v6, v6, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-NEXT: v_pk_max_f16 v7, v7, v8
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v16f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-NEXT: v_pk_max_f16 v5, v5, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-NEXT: v_pk_max_f16 v6, v6, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_max_f16 v7, v7, v8
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v16f16:
+; GFX10-LABEL: v_maximumnum_v3f16_nnan:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX10-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v9
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v10
-; GFX10-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v9
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v10
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v11
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_maximumnum_v16f16:
+; GFX11-LABEL: v_maximumnum_v3f16_nnan:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v8
-; GFX11-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v9
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v10
-; GFX11-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v8
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v9
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v10
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v11
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_v16f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1170-NEXT: v_pk_max_num_f16 v3, v3, v11
-; GFX1170-NEXT: v_pk_max_num_f16 v4, v4, v12
-; GFX1170-NEXT: v_pk_max_num_f16 v5, v5, v13
-; GFX1170-NEXT: v_pk_max_num_f16 v6, v6, v14
-; GFX1170-NEXT: v_pk_max_num_f16 v7, v7, v15
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v16f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v11
-; GFX12-NEXT: v_pk_max_num_f16 v4, v4, v12
-; GFX12-NEXT: v_pk_max_num_f16 v5, v5, v13
-; GFX12-NEXT: v_pk_max_num_f16 v6, v6, v14
-; GFX12-NEXT: v_pk_max_num_f16 v7, v7, v15
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v16f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v8
-; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v9
-; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v10
-; GFX1251-NEXT: v_pk_max_num_f16 v3, v3, v11
-; GFX1251-NEXT: v_pk_max_num_f16 v4, v4, v12
-; GFX1251-NEXT: v_pk_max_num_f16 v5, v5, v13
-; GFX1251-NEXT: v_pk_max_num_f16 v6, v6, v14
-; GFX1251-NEXT: v_pk_max_num_f16 v7, v7, v15
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <16 x half> @llvm.maximumnum.v16f16(<16 x half> %x, <16 x half> %y)
- ret <16 x half> %result
+; GFX1170-SDAG-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v3f16_nnan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v3f16_nnan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
}
-define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v32f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; GFX7-NEXT: v_lshrrev_b32_e32 v31, 16, v30
-; GFX7-NEXT: v_lshrrev_b32_e32 v32, 16, v14
-; GFX7-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX7-NEXT: v_lshrrev_b32_e32 v34, 16, v13
-; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v28
-; GFX7-NEXT: v_lshrrev_b32_e32 v36, 16, v12
-; GFX7-NEXT: v_lshrrev_b32_e32 v37, 16, v27
-; GFX7-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; GFX7-NEXT: v_lshrrev_b32_e32 v39, 16, v26
-; GFX7-NEXT: v_lshrrev_b32_e32 v48, 16, v10
-; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v25
-; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v9
-; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v24
-; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v8
-; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v23
-; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v31, v31
-; GFX7-NEXT: v_cvt_f32_f16_e32 v32, v32
-; GFX7-NEXT: v_cvt_f32_f16_e32 v33, v33
-; GFX7-NEXT: v_cvt_f32_f16_e32 v34, v34
-; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-NEXT: v_cvt_f32_f16_e32 v36, v36
-; GFX7-NEXT: v_cvt_f32_f16_e32 v37, v37
-; GFX7-NEXT: v_cvt_f32_f16_e32 v38, v38
-; GFX7-NEXT: v_cvt_f32_f16_e32 v39, v39
-; GFX7-NEXT: v_cvt_f32_f16_e32 v48, v48
-; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-NEXT: v_max_f32_e32 v31, v32, v31
-; GFX7-NEXT: v_max_f32_e32 v33, v34, v33
-; GFX7-NEXT: v_max_f32_e32 v32, v36, v35
-; GFX7-NEXT: v_max_f32_e32 v34, v38, v37
-; GFX7-NEXT: v_max_f32_e32 v36, v48, v39
-; GFX7-NEXT: v_max_f32_e32 v37, v51, v50
-; GFX7-NEXT: v_max_f32_e32 v38, v53, v52
-; GFX7-NEXT: v_max_f32_e32 v39, v55, v54
-; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v20
-; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v19
-; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v18
-; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-NEXT: v_max_f32_e32 v50, v51, v50
-; GFX7-NEXT: v_max_f32_e32 v51, v53, v52
-; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; GFX7-NEXT: v_max_f32_e32 v52, v55, v54
-; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v40, 16, v22
-; GFX7-NEXT: v_max_f32_e32 v53, v54, v53
-; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v6
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v40, v40
-; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v43, 16, v21
-; GFX7-NEXT: v_lshrrev_b32_e32 v44, 16, v5
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v43, v43
-; GFX7-NEXT: v_cvt_f32_f16_e32 v44, v44
-; GFX7-NEXT: v_max_f32_e32 v48, v41, v40
-; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX7-NEXT: s_waitcnt vmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v49
-; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v0
-; GFX7-NEXT: v_max_f32_e32 v3, v3, v19
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v51
-; GFX7-NEXT: v_cvt_f32_f16_e32 v42, v42
-; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-NEXT: v_max_f32_e32 v40, v44, v43
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_max_f32_e32 v35, v42, v35
-; GFX7-NEXT: v_max_f32_e32 v54, v41, v55
-; GFX7-NEXT: v_or_b32_e32 v3, v3, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v40
-; GFX7-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v18
-; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v54
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v52
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_max_f32_e32 v5, v5, v21
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v20
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v50
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_max_f32_e32 v7, v7, v23
-; GFX7-NEXT: v_max_f32_e32 v6, v6, v22
-; GFX7-NEXT: v_or_b32_e32 v4, v4, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v48
-; GFX7-NEXT: v_or_b32_e32 v5, v5, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v39
-; GFX7-NEXT: v_cvt_f32_f16_e32 v25, v25
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_max_f32_e32 v9, v9, v25
-; GFX7-NEXT: v_max_f32_e32 v8, v8, v24
-; GFX7-NEXT: v_or_b32_e32 v6, v6, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v38
-; GFX7-NEXT: v_or_b32_e32 v7, v7, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v37
-; GFX7-NEXT: v_cvt_f32_f16_e32 v27, v27
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_cvt_f32_f16_e32 v26, v26
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_max_f32_e32 v11, v11, v27
-; GFX7-NEXT: v_max_f32_e32 v10, v10, v26
-; GFX7-NEXT: v_or_b32_e32 v8, v8, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v36
-; GFX7-NEXT: v_or_b32_e32 v9, v9, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v34
-; GFX7-NEXT: v_cvt_f32_f16_e32 v49, v49
-; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-NEXT: v_cvt_f32_f16_e32 v29, v29
-; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-NEXT: v_cvt_f32_f16_e32 v28, v28
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_max_f32_e32 v15, v15, v49
-; GFX7-NEXT: v_max_f32_e32 v14, v14, v30
-; GFX7-NEXT: v_max_f32_e32 v13, v13, v29
-; GFX7-NEXT: v_max_f32_e32 v12, v12, v28
-; GFX7-NEXT: v_or_b32_e32 v10, v10, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v35
-; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v33
-; GFX7-NEXT: v_or_b32_e32 v11, v11, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v31
-; GFX7-NEXT: v_cvt_f16_f32_e32 v19, v32
-; GFX7-NEXT: v_cvt_f16_f32_e32 v15, v15
-; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX7-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_or_b32_e32 v12, v12, v19
-; GFX7-NEXT: v_or_b32_e32 v13, v13, v18
-; GFX7-NEXT: v_or_b32_e32 v14, v14, v17
-; GFX7-NEXT: v_or_b32_e32 v15, v15, v16
-; GFX7-NEXT: s_waitcnt vmcnt(0)
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v32f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX8-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v17, v17, v17
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v17
-; GFX8-NEXT: v_max_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v40
-; GFX8-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX8-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-NEXT: v_max_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v30, v30, v30
-; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-NEXT: v_max_f16_e32 v29, v29, v29
-; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-NEXT: v_max_f16_e32 v28, v28, v28
-; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-NEXT: v_max_f16_e32 v27, v27, v27
-; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-NEXT: v_max_f16_e32 v26, v26, v26
-; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-NEXT: v_max_f16_e32 v25, v25, v25
-; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-NEXT: v_max_f16_e32 v24, v24, v24
-; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-NEXT: v_max_f16_e32 v23, v23, v23
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-NEXT: v_max_f16_e32 v22, v22, v22
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-NEXT: v_max_f16_e32 v21, v21, v21
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v20, v20, v20
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v19, v19, v19
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v18, v18, v18
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v16, v16, v16
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_max_f16_e32 v14, v14, v30
-; GFX8-NEXT: v_max_f16_e32 v13, v13, v29
-; GFX8-NEXT: v_max_f16_e32 v12, v12, v28
-; GFX8-NEXT: v_max_f16_e32 v11, v11, v27
-; GFX8-NEXT: v_max_f16_e32 v10, v10, v26
-; GFX8-NEXT: v_max_f16_e32 v9, v9, v25
-; GFX8-NEXT: v_max_f16_e32 v8, v8, v24
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v23
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v22
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v21
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v20
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v19
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v18
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v16
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v33
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v55
-; GFX8-NEXT: v_or_b32_e32 v3, v3, v54
-; GFX8-NEXT: v_or_b32_e32 v4, v4, v53
-; GFX8-NEXT: v_or_b32_e32 v5, v5, v52
-; GFX8-NEXT: v_or_b32_e32 v6, v6, v51
-; GFX8-NEXT: v_or_b32_e32 v7, v7, v50
-; GFX8-NEXT: v_or_b32_e32 v8, v8, v49
-; GFX8-NEXT: v_or_b32_e32 v9, v9, v48
-; GFX8-NEXT: v_or_b32_e32 v10, v10, v39
-; GFX8-NEXT: v_or_b32_e32 v11, v11, v38
-; GFX8-NEXT: v_or_b32_e32 v12, v12, v36
-; GFX8-NEXT: v_or_b32_e32 v13, v13, v34
-; GFX8-NEXT: v_or_b32_e32 v14, v14, v32
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v31, v31, v31
-; GFX8-NEXT: v_max_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v15, v15, v31
-; GFX8-NEXT: v_or_b32_e32 v15, v15, v35
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v32f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX900-NEXT: v_pk_max_f16 v16, v17, v17
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v16
-; GFX900-NEXT: v_pk_max_f16 v16, v18, v18
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v16
-; GFX900-NEXT: v_pk_max_f16 v16, v19, v19
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v16
-; GFX900-NEXT: buffer_load_dword v16, off, s[0:3], s32
-; GFX900-NEXT: v_pk_max_f16 v17, v20, v20
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-NEXT: v_pk_max_f16 v18, v21, v21
-; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-NEXT: v_pk_max_f16 v19, v22, v22
-; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-NEXT: v_pk_max_f16 v20, v23, v23
-; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-NEXT: v_pk_max_f16 v21, v24, v24
-; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-NEXT: v_pk_max_f16 v22, v25, v25
-; GFX900-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX900-NEXT: v_pk_max_f16 v23, v26, v26
-; GFX900-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX900-NEXT: v_pk_max_f16 v24, v27, v27
-; GFX900-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX900-NEXT: v_pk_max_f16 v25, v28, v28
-; GFX900-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX900-NEXT: v_pk_max_f16 v26, v29, v29
-; GFX900-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX900-NEXT: v_pk_max_f16 v27, v30, v30
-; GFX900-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX900-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v17
-; GFX900-NEXT: v_pk_max_f16 v5, v5, v18
-; GFX900-NEXT: v_pk_max_f16 v6, v6, v19
-; GFX900-NEXT: v_pk_max_f16 v7, v7, v20
-; GFX900-NEXT: v_pk_max_f16 v8, v8, v21
-; GFX900-NEXT: v_pk_max_f16 v9, v9, v22
-; GFX900-NEXT: v_pk_max_f16 v10, v10, v23
-; GFX900-NEXT: v_pk_max_f16 v11, v11, v24
-; GFX900-NEXT: v_pk_max_f16 v12, v12, v25
-; GFX900-NEXT: v_pk_max_f16 v13, v13, v26
-; GFX900-NEXT: v_pk_max_f16 v14, v14, v27
-; GFX900-NEXT: s_waitcnt vmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v32f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: scratch_load_dword v31, off, s32
-; GFX950-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX950-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX950-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX950-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX950-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX950-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX950-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX950-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX950-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX950-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX950-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX950-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX950-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX950-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX950-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX950-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX950-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX950-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX950-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX950-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX950-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX950-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX950-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX950-NEXT: s_waitcnt vmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v32f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX10-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX10-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX10-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX10-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX10-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX10-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX10-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX10-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX10-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX10-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX10-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX10-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX10-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX10-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX10-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX10-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v32f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX11-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX11-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX11-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX11-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX11-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX11-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX11-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX11-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v16
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v17
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v18
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v19
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v20
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v21
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v22
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v23
-; GFX11-NEXT: v_pk_max_f16 v8, v8, v24
-; GFX11-NEXT: v_pk_max_f16 v9, v9, v25
-; GFX11-NEXT: v_pk_max_f16 v10, v10, v26
-; GFX11-NEXT: v_pk_max_f16 v11, v11, v27
-; GFX11-NEXT: v_pk_max_f16 v12, v12, v28
-; GFX11-NEXT: v_pk_max_f16 v13, v13, v29
-; GFX11-NEXT: v_pk_max_f16 v14, v14, v30
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_max_f16 v15, v15, v16
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v32f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX1170-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX1170-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX1170-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX1170-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX1170-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX1170-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX1170-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX1170-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX1170-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX1170-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX1170-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX1170-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX1170-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX1170-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v15, v15, v31
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v32f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX12-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX12-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX12-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX12-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX12-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX12-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX12-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX12-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX12-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX12-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX12-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v15, v15, v31
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v32f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: scratch_load_b32 v31, off, s32
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v16
-; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v17
-; GFX1251-NEXT: v_pk_max_num_f16 v2, v2, v18
-; GFX1251-NEXT: v_pk_max_num_f16 v3, v3, v19
-; GFX1251-NEXT: v_pk_max_num_f16 v4, v4, v20
-; GFX1251-NEXT: v_pk_max_num_f16 v5, v5, v21
-; GFX1251-NEXT: v_pk_max_num_f16 v6, v6, v22
-; GFX1251-NEXT: v_pk_max_num_f16 v7, v7, v23
-; GFX1251-NEXT: v_pk_max_num_f16 v8, v8, v24
-; GFX1251-NEXT: v_pk_max_num_f16 v9, v9, v25
-; GFX1251-NEXT: v_pk_max_num_f16 v10, v10, v26
-; GFX1251-NEXT: v_pk_max_num_f16 v11, v11, v27
-; GFX1251-NEXT: v_pk_max_num_f16 v12, v12, v28
-; GFX1251-NEXT: v_pk_max_num_f16 v13, v13, v29
-; GFX1251-NEXT: v_pk_max_num_f16 v14, v14, v30
-; GFX1251-NEXT: s_wait_loadcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v15, v15, v31
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <32 x half> @llvm.maximumnum.v32f16(<32 x half> %x, <32 x half> %y)
- ret <32 x half> %result
+define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v6, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v5
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v2, v5
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v2
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %result
}
-define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v2f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v2f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_max_f32_e32 v1, v1, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+define <4 x half> @v_maximumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v4f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v6, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v4f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v4f16_nnan:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v4f16_nnan:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v3
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX9-LABEL: v_maximumnum_v2f32:
+; GFX9-LABEL: v_maximumnum_v4f16_nnan:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX9-NEXT: v_max_f32_e32 v2, v3, v3
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_maximumnum_v2f32:
+; GFX10-LABEL: v_maximumnum_v4f16_nnan:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX10-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_max_f16 v1, v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_maximumnum_v2f32:
+; GFX11-LABEL: v_maximumnum_v4f16_nnan:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_dual_max_f32 v0, v0, v2 :: v_dual_max_f32 v1, v1, v3
+; GFX11-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_v2f32:
+; GFX1170-LABEL: v_maximumnum_v4f16_nnan:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_maximumnum_v2f32:
+; GFX12-LABEL: v_maximumnum_v4f16_nnan:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_v2f32:
+; GFX1251-LABEL: v_maximumnum_v4f16_nnan:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %result
+}
+
+define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v6, v6, v7
+; GFX7-SDAG-NEXT: v_max_f32_e32 v8, v8, v9
+; GFX7-SDAG-NEXT: v_max_f32_e32 v9, v10, v11
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v4
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v6, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v5
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v6, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v6, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v7
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v6
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v6, v7
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v3, v7
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v7
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v6, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v4, v2
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v3
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v3
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v3
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v3
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v5
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <6 x half> @llvm.maximumnum.v6f16(<6 x half> %x, <6 x half> %y)
+ ret <6 x half> %result
+}
+
+define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v13, 16, v5
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v15, 16, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_max_f32_e32 v11, v11, v12
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v8, v8, v9
+; GFX7-SDAG-NEXT: v_max_f32_e32 v12, v14, v12
+; GFX7-SDAG-NEXT: v_max_f32_e32 v10, v10, v13
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v7
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v6
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v11
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v5
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v8, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v13
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v6
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v5
+; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v14
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v7
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v6
+; GFX7-GISEL-NEXT: v_max_f32_e32 v6, v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v15
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v7
+; GFX7-GISEL-NEXT: v_max_f32_e32 v7, v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v5
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v7
+; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v7
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v6
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v11
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v8
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v8, v9
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v4, v9
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v6, v6
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v5, v9
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v7, v7
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v6, v9
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v8, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v5, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v6, v3
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v4
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v4
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v4
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v4
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v6
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v7
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v6
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v7
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v6
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v7
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v7
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> %x, <8 x half> %y)
+ ret <8 x half> %result
+}
+
+define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v16, 16, v15
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v13
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v5
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_max_f32_e32 v16, v17, v16
+; GFX7-SDAG-NEXT: v_max_f32_e32 v17, v19, v18
+; GFX7-SDAG-NEXT: v_max_f32_e32 v18, v21, v20
+; GFX7-SDAG-NEXT: v_max_f32_e32 v19, v23, v22
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v10
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v20, v21, v20
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-SDAG-NEXT: v_max_f32_e32 v21, v23, v22
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v9
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v22, v23, v22
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v8
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v23, v24, v23
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v23
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v9
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v22
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v21
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v5, v13
+; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v11
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v18
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v20
+; GFX7-SDAG-NEXT: v_max_f32_e32 v7, v7, v15
+; GFX7-SDAG-NEXT: v_max_f32_e32 v6, v6, v14
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v12
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v19
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v10
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v9
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v9
+; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v8
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v9
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-GISEL-NEXT: v_max_f32_e32 v8, v17, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_max_f32_e32 v16, v16, v18
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-GISEL-NEXT: v_max_f32_e32 v9, v17, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v4
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v11
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_max_f32_e32 v10, v17, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v5
+; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v4, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v13
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-GISEL-NEXT: v_max_f32_e32 v11, v17, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v5, v13
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v7
+; GFX7-GISEL-NEXT: v_max_f32_e32 v12, v17, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v15
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-GISEL-NEXT: v_max_f32_e32 v6, v6, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v15
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-GISEL-NEXT: v_max_f32_e32 v13, v19, v13
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-GISEL-NEXT: v_max_f32_e32 v7, v7, v14
+; GFX7-GISEL-NEXT: v_max_f32_e32 v14, v15, v17
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v11
+; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v4, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v12
+; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v5, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v13
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v16
+; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v6, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v14
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v15
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v14
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v13
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v12
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v11
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v10
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v9
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v8
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v23
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v22
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v21
+; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v20
+; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v19
+; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v18
+; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v17
+; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v16
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v8, v8
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v16, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v9, v9
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v8, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v10, v10
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v9, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v10, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v11, v11
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v10, v10, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v11, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v12, v12
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v11, v11, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v12, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v13, v13
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v12, v12, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v13, v6, v6
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v14, v14
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v13, v13, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v14 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v14, v7, v7
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v15, v15
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v14, v14, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v16, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v8, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v9, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v10, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v11, v4
+; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v12, v5
+; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v13, v6
+; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v14, v7
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v8
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v8
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v8
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v8
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v9
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v10
+; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v9
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v10
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v11
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v9
+; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v10
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v9
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v10
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v11
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v9
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v10
+; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v9
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v10
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v11
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v8
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v9
+; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v10
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v8
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v9
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v10
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v11
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v12
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v8
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v9
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v10
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v8
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v9
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v10
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v11
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v12
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v13
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v14
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v15
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <16 x half> @llvm.maximumnum.v16f16(<16 x half> %x, <16 x half> %y)
+ ret <16 x half> %result
+}
+
+define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_load_dword v49, off, s[0:3], s32
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v31, 16, v30
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v28
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v37, 16, v27
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v38, 16, v11
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v39, 16, v26
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v48, 16, v10
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v25
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v9
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v24
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v8
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v23
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v31, v31
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v32, v32
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v33, v33
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v34, v34
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v36, v36
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v37, v37
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v38, v38
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v39, v39
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v48, v48
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-SDAG-NEXT: v_max_f32_e32 v31, v32, v31
+; GFX7-SDAG-NEXT: v_max_f32_e32 v33, v34, v33
+; GFX7-SDAG-NEXT: v_max_f32_e32 v32, v36, v35
+; GFX7-SDAG-NEXT: v_max_f32_e32 v34, v38, v37
+; GFX7-SDAG-NEXT: v_max_f32_e32 v36, v48, v39
+; GFX7-SDAG-NEXT: v_max_f32_e32 v37, v51, v50
+; GFX7-SDAG-NEXT: v_max_f32_e32 v38, v53, v52
+; GFX7-SDAG-NEXT: v_max_f32_e32 v39, v55, v54
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v20
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v19
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v18
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-SDAG-NEXT: v_max_f32_e32 v50, v51, v50
+; GFX7-SDAG-NEXT: v_max_f32_e32 v51, v53, v52
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v17
+; GFX7-SDAG-NEXT: v_max_f32_e32 v52, v55, v54
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v40, 16, v22
+; GFX7-SDAG-NEXT: v_max_f32_e32 v53, v54, v53
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v6
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v40, v40
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v43, 16, v21
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v44, 16, v5
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v42, 16, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v43, v43
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v44, v44
+; GFX7-SDAG-NEXT: v_max_f32_e32 v48, v41, v40
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v16
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v49
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v19
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v51
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v42, v42
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-SDAG-NEXT: v_max_f32_e32 v40, v44, v43
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_max_f32_e32 v35, v42, v35
+; GFX7-SDAG-NEXT: v_max_f32_e32 v54, v41, v55
+; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v40
+; GFX7-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v18
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v54
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v52
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v5, v21
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v20
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v50
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_max_f32_e32 v7, v7, v23
+; GFX7-SDAG-NEXT: v_max_f32_e32 v6, v6, v22
+; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v48
+; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v39
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v25, v25
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_max_f32_e32 v9, v9, v25
+; GFX7-SDAG-NEXT: v_max_f32_e32 v8, v8, v24
+; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v38
+; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v37
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v27, v27
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v26, v26
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_max_f32_e32 v11, v11, v27
+; GFX7-SDAG-NEXT: v_max_f32_e32 v10, v10, v26
+; GFX7-SDAG-NEXT: v_or_b32_e32 v8, v8, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v36
+; GFX7-SDAG-NEXT: v_or_b32_e32 v9, v9, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v34
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v49, v49
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v29, v29
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v28, v28
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_max_f32_e32 v15, v15, v49
+; GFX7-SDAG-NEXT: v_max_f32_e32 v14, v14, v30
+; GFX7-SDAG-NEXT: v_max_f32_e32 v13, v13, v29
+; GFX7-SDAG-NEXT: v_max_f32_e32 v12, v12, v28
+; GFX7-SDAG-NEXT: v_or_b32_e32 v10, v10, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v35
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v33
+; GFX7-SDAG-NEXT: v_or_b32_e32 v11, v11, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v31
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v19, v32
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v15, v15
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_or_b32_e32 v12, v12, v19
+; GFX7-SDAG-NEXT: v_or_b32_e32 v13, v13, v18
+; GFX7-SDAG-NEXT: v_or_b32_e32 v14, v14, v17
+; GFX7-SDAG-NEXT: v_or_b32_e32 v15, v15, v16
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v31, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v16
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-GISEL-NEXT: v_max_f32_e32 v31, v31, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v17
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; GFX7-GISEL-NEXT: v_max_f32_e32 v16, v0, v16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v18
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v18
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v17
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-GISEL-NEXT: v_max_f32_e32 v17, v17, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v19
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v19
+; GFX7-GISEL-NEXT: v_max_f32_e32 v18, v2, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v3
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v20
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v20, 16, v20
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v4
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-GISEL-NEXT: v_max_f32_e32 v19, v19, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v21
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v21, 16, v21
+; GFX7-GISEL-NEXT: v_max_f32_e32 v20, v4, v20
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v5
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-GISEL-NEXT: v_max_f32_e32 v4, v4, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v22
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; GFX7-GISEL-NEXT: v_max_f32_e32 v5, v5, v21
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v6
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-GISEL-NEXT: v_max_f32_e32 v21, v21, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v23
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; GFX7-GISEL-NEXT: v_max_f32_e32 v6, v6, v22
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v7
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-GISEL-NEXT: v_max_f32_e32 v22, v22, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v24
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v24, 16, v24
+; GFX7-GISEL-NEXT: v_max_f32_e32 v7, v7, v23
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v8
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-GISEL-NEXT: v_max_f32_e32 v23, v23, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v25
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v25, 16, v25
+; GFX7-GISEL-NEXT: v_max_f32_e32 v8, v8, v24
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v9
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v25
+; GFX7-GISEL-NEXT: v_max_f32_e32 v24, v24, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v26
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v26, 16, v26
+; GFX7-GISEL-NEXT: v_max_f32_e32 v9, v9, v25
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v26
+; GFX7-GISEL-NEXT: v_max_f32_e32 v25, v25, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v27
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v27, 16, v27
+; GFX7-GISEL-NEXT: v_max_f32_e32 v10, v10, v26
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v11
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v27
+; GFX7-GISEL-NEXT: v_max_f32_e32 v26, v26, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v28
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v28, 16, v28
+; GFX7-GISEL-NEXT: v_max_f32_e32 v11, v11, v27
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v28
+; GFX7-GISEL-NEXT: v_max_f32_e32 v27, v27, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v29
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v29, 16, v29
+; GFX7-GISEL-NEXT: v_max_f32_e32 v12, v12, v28
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v13
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v29
+; GFX7-GISEL-NEXT: v_max_f32_e32 v28, v28, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v30
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; GFX7-GISEL-NEXT: v_max_f32_e32 v13, v13, v29
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v14
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-GISEL-NEXT: v_max_f32_e32 v29, v29, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v15
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX7-GISEL-NEXT: v_max_f32_e32 v14, v14, v30
+; GFX7-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v17
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v33, v30
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-GISEL-NEXT: v_max_f32_e32 v32, v32, v33
+; GFX7-GISEL-NEXT: v_max_f32_e32 v15, v15, v30
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v30, v31
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v31, v0
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v0, 16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v18
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v15, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v30, v0
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v20
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v19
+; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v16
+; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v17, v4
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v21
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v22
+; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v18, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v29
+; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v16, v6
+; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v17, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v23
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v24
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v19, v32
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v8, v16, v8
+; GFX7-GISEL-NEXT: v_or_b32_e32 v9, v17, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v25
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v26
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v31, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v14, v18, v14
+; GFX7-GISEL-NEXT: v_or_b32_e32 v10, v16, v10
+; GFX7-GISEL-NEXT: v_or_b32_e32 v11, v17, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v27
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v28
+; GFX7-GISEL-NEXT: v_or_b32_e32 v15, v19, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v12, v16, v12
+; GFX7-GISEL-NEXT: v_or_b32_e32 v13, v17, v13
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v17, v17, v17
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v17
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v40
+; GFX8-SDAG-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v30, v30, v30
+; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-SDAG-NEXT: v_max_f16_e32 v29, v29, v29
+; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-SDAG-NEXT: v_max_f16_e32 v28, v28, v28
+; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-SDAG-NEXT: v_max_f16_e32 v27, v27, v27
+; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-SDAG-NEXT: v_max_f16_e32 v26, v26, v26
+; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-SDAG-NEXT: v_max_f16_e32 v25, v25, v25
+; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-SDAG-NEXT: v_max_f16_e32 v24, v24, v24
+; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-SDAG-NEXT: v_max_f16_e32 v23, v23, v23
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-SDAG-NEXT: v_max_f16_e32 v22, v22, v22
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-SDAG-NEXT: v_max_f16_e32 v21, v21, v21
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v20, v20, v20
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v19, v19, v19
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v18, v18, v18
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v16, v16, v16
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v30
+; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v29
+; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v28
+; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v27
+; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v26
+; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v25
+; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v24
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v23
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v22
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v21
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v20
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v19
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v18
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v16
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v33
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v55
+; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v54
+; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v53
+; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v52
+; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v51
+; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v50
+; GFX8-SDAG-NEXT: v_or_b32_e32 v8, v8, v49
+; GFX8-SDAG-NEXT: v_or_b32_e32 v9, v9, v48
+; GFX8-SDAG-NEXT: v_or_b32_e32 v10, v10, v39
+; GFX8-SDAG-NEXT: v_or_b32_e32 v11, v11, v38
+; GFX8-SDAG-NEXT: v_or_b32_e32 v12, v12, v36
+; GFX8-SDAG-NEXT: v_or_b32_e32 v13, v13, v34
+; GFX8-SDAG-NEXT: v_or_b32_e32 v14, v14, v32
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v31, v31, v31
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v31
+; GFX8-SDAG-NEXT: v_or_b32_e32 v15, v15, v35
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v31, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v16, v16
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v16, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v31, v31, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v17, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v17, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v16, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v18, v18
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v18, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v17, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v18, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v19, v19
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v19, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v18, v18, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v19, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v20, v20
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v20, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v19, v19, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v20, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v21, v21
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v21, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v20, v20, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v21, v6, v6
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v22, v22
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v22, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v21, v21, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v22, v7, v7
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v23, v23
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v23, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v22, v22, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v23, v8, v8
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v24, v24
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v24, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v23, v23, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v24 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v24, v9, v9
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v25, v25
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v25, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v24, v24, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v25, v10, v10
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v26, v26
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v26, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v25, v25, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v26 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v26, v11, v11
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v27, v27
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v27, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v26, v26, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v27, v12, v12
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v28, v28
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v28, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v27, v27, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v28 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v28, v13, v13
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v29, v29
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v29, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v28, v28, v32
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v29, v14, v14
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v30, v30
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
+; GFX8-GISEL-NEXT: v_max_f16_e32 v29, v29, v32
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v15, v15
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v31, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v16, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v19, v4
+; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v20, v5
+; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v21, v6
+; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v22, v7
+; GFX8-GISEL-NEXT: v_or_b32_e32 v8, v23, v8
+; GFX8-GISEL-NEXT: v_or_b32_e32 v9, v24, v9
+; GFX8-GISEL-NEXT: v_or_b32_e32 v10, v25, v10
+; GFX8-GISEL-NEXT: v_or_b32_e32 v11, v26, v11
+; GFX8-GISEL-NEXT: v_or_b32_e32 v12, v27, v12
+; GFX8-GISEL-NEXT: v_or_b32_e32 v13, v28, v13
+; GFX8-GISEL-NEXT: v_or_b32_e32 v14, v29, v14
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v33, v30, v30
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v32, v33
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v15, v32, v15
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v17, v17
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v18, v18
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v19, v19
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v16
+; GFX900-SDAG-NEXT: buffer_load_dword v16, off, s[0:3], s32
+; GFX900-SDAG-NEXT: v_pk_max_f16 v17, v20, v20
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v18, v21, v21
+; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-SDAG-NEXT: v_pk_max_f16 v19, v22, v22
+; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-SDAG-NEXT: v_pk_max_f16 v20, v23, v23
+; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-SDAG-NEXT: v_pk_max_f16 v21, v24, v24
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v22, v25, v25
+; GFX900-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX900-SDAG-NEXT: v_pk_max_f16 v23, v26, v26
+; GFX900-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX900-SDAG-NEXT: v_pk_max_f16 v24, v27, v27
+; GFX900-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX900-SDAG-NEXT: v_pk_max_f16 v25, v28, v28
+; GFX900-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX900-SDAG-NEXT: v_pk_max_f16 v26, v29, v29
+; GFX900-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX900-SDAG-NEXT: v_pk_max_f16 v27, v30, v30
+; GFX900-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX900-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v17
+; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v18
+; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v19
+; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v20
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v21
+; GFX900-SDAG-NEXT: v_pk_max_f16 v9, v9, v22
+; GFX900-SDAG-NEXT: v_pk_max_f16 v10, v10, v23
+; GFX900-SDAG-NEXT: v_pk_max_f16 v11, v11, v24
+; GFX900-SDAG-NEXT: v_pk_max_f16 v12, v12, v25
+; GFX900-SDAG-NEXT: v_pk_max_f16 v13, v13, v26
+; GFX900-SDAG-NEXT: v_pk_max_f16 v14, v14, v27
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v17, v17
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v18, v18
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v19, v19
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v16
+; GFX900-GISEL-NEXT: buffer_load_dword v16, off, s[0:3], s32
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v17, v20, v20
+; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-GISEL-NEXT: v_pk_max_f16 v18, v21, v21
+; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-GISEL-NEXT: v_pk_max_f16 v19, v22, v22
+; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-GISEL-NEXT: v_pk_max_f16 v20, v23, v23
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v21, v24, v24
+; GFX900-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX900-GISEL-NEXT: v_pk_max_f16 v22, v25, v25
+; GFX900-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX900-GISEL-NEXT: v_pk_max_f16 v23, v26, v26
+; GFX900-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX900-GISEL-NEXT: v_pk_max_f16 v24, v27, v27
+; GFX900-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX900-GISEL-NEXT: v_pk_max_f16 v25, v28, v28
+; GFX900-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX900-GISEL-NEXT: v_pk_max_f16 v26, v29, v29
+; GFX900-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX900-GISEL-NEXT: v_pk_max_f16 v27, v30, v30
+; GFX900-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v17
+; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v18
+; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v19
+; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v20
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v21
+; GFX900-GISEL-NEXT: v_pk_max_f16 v9, v9, v22
+; GFX900-GISEL-NEXT: v_pk_max_f16 v10, v10, v23
+; GFX900-GISEL-NEXT: v_pk_max_f16 v11, v11, v24
+; GFX900-GISEL-NEXT: v_pk_max_f16 v12, v12, v25
+; GFX900-GISEL-NEXT: v_pk_max_f16 v13, v13, v26
+; GFX900-GISEL-NEXT: v_pk_max_f16 v14, v14, v27
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: scratch_load_dword v31, off, s32
+; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX950-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX950-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX950-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX950-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX950-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX950-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX950-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX950-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX950-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX950-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX950-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX950-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX950-SDAG-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX950-SDAG-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX950-SDAG-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX950-SDAG-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX950-SDAG-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX950-SDAG-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: scratch_load_dword v31, off, s32
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX950-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX950-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX950-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX950-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX950-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX950-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX950-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX950-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX950-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX950-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX950-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX950-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX950-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX950-GISEL-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX950-GISEL-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX950-GISEL-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX950-GISEL-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX950-GISEL-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX950-GISEL-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX10-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX10-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX10-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX10-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX10-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX10-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX10-SDAG-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX10-SDAG-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX10-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX10-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX10-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX10-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX10-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX10-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX10-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX10-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX10-GISEL-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX10-GISEL-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX10-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX11-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX11-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX11-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX11-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX11-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX11-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX11-SDAG-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX11-SDAG-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX11-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX11-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX11-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX11-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX11-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX11-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX11-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v16
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v17
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v18
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v19
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v20
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v21
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v22
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v23
+; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v24
+; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v25
+; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v26
+; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v11, v27
+; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v12, v28
+; GFX11-GISEL-NEXT: v_pk_max_f16 v13, v13, v29
+; GFX11-GISEL-NEXT: v_pk_max_f16 v14, v14, v30
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v15, v15, v16
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v31
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32 nv
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <32 x half> @llvm.maximumnum.v32f16(<32 x half> %x, <32 x half> %y)
+ ret <32 x half> %result
+}
+
+define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX8-GISEL-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v3, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v3, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v2
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v2 :: v_dual_max_f32 v1, v1, v3
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v2 :: v_dual_max_f32 v1, v1, v3
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -4511,98 +8663,203 @@ define <2 x float> @v_maximumnum_v2f32_nnan(<2 x float> %x, <2 x float> %y) #1 {
}
define <3 x float> @v_maximumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v3f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v3f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_v3f32:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX9-NEXT: v_max_f32_e32 v3, v4, v4
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX9-NEXT: v_max_f32_e32 v3, v5, v5
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v3f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v3
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v3f32:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
-; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
-; GFX11-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_dual_max_f32 v0, v0, v3 :: v_dual_max_f32 v1, v1, v4
-; GFX11-NEXT: v_max_f32_e32 v2, v2, v5
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v3f32:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX1170-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v3f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v3f32:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
-; GFX1251-NEXT: v_max_num_f32_e32 v2, v2, v5
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX8-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX8-GISEL-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v4, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v5, v5
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v4, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v5, v5
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v3
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
+; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
+; GFX11-SDAG-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v3 :: v_dual_max_f32 v1, v1, v4
+; GFX11-SDAG-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v3, v3, v3
+; GFX11-GISEL-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v4, v4, v4
+; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v5, v5, v5
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v3 :: v_dual_max_f32 v1, v1, v4
+; GFX11-GISEL-NEXT: v_max_f32_e32 v2, v2, v5
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x float> @llvm.maximumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -4677,111 +8934,232 @@ define <3 x float> @v_maximumnum_v3f32_nnan(<3 x float> %x, <3 x float> %y) #1 {
}
define <4 x float> @v_maximumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v4f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v4f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_v4f32:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX9-NEXT: v_max_f32_e32 v4, v5, v5
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v4
-; GFX9-NEXT: v_max_f32_e32 v4, v6, v6
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v4
-; GFX9-NEXT: v_max_f32_e32 v4, v7, v7
-; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-NEXT: v_max_f32_e32 v3, v3, v4
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v4f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f32_e32 v6, v6, v6
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-NEXT: v_max_f32_e32 v7, v7, v7
-; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v4
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v5
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v6
-; GFX10-NEXT: v_max_f32_e32 v3, v3, v7
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v4f32:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
-; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
-; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_dual_max_f32 v0, v0, v4 :: v_dual_max_f32 v1, v1, v5
-; GFX11-NEXT: v_dual_max_f32 v2, v2, v6 :: v_dual_max_f32 v3, v3, v7
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v4f32:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX1170-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v4f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX12-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v4f32:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
-; GFX1251-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-SDAG-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-SDAG-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-SDAG-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX8-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX8-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX8-GISEL-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX8-GISEL-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v5, v5
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v6, v6
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v7, v7
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v5, v5
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v6, v6
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v7, v7
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v4
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f32_e32 v6, v6, v6
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-SDAG-NEXT: v_max_f32_e32 v7, v7, v7
+; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v5
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v6
+; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v7
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-GISEL-NEXT: v_max_f32_e32 v6, v6, v6
+; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-GISEL-NEXT: v_max_f32_e32 v7, v7, v7
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v4
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v5
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v6
+; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v7
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
+; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-SDAG-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
+; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v4 :: v_dual_max_f32 v1, v1, v5
+; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v6 :: v_dual_max_f32 v3, v3, v7
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-GISEL-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
+; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-GISEL-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v4 :: v_dual_max_f32 v1, v1, v5
+; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v6 :: v_dual_max_f32 v3, v3, v7
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1170-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x float> @llvm.maximumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -4860,97 +9238,203 @@ define <4 x float> @v_maximumnum_v4f32_nnan(<4 x float> %x, <4 x float> %y) #1 {
}
define <2 x double> @v_maximumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v2f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v2f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v2f64:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v2f64:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX950-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[4:5]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v2f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v2f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v2f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v2f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v2f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[4:5]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[4:5]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -5004,135 +9488,277 @@ define <2 x double> @v_maximumnum_v2f64_nnan(<2 x double> %x, <2 x double> %y) #
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v2f64_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
- ret <2 x double> %result
-}
-
-define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v3f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v3f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v3f64:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v3f64:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX950-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
-; GFX950-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[6:7]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v3f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v3f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v3f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[8:9]
-; GFX1170-NEXT: v_max_num_f64 v[4:5], v[4:5], v[10:11]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v3f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_v3f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX1251-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
+ ret <2 x double> %result
+}
+
+define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
+; GFX7-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[6:7]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[6:7]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[6:7]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[10:11]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[8:9]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[10:11]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[8:9]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[10:11]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[6:9], v[6:9], v[6:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x double> @llvm.maximumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -5211,140 +9837,299 @@ define <3 x double> @v_maximumnum_v3f64_nnan(<3 x double> %x, <3 x double> %y) #
}
define <4 x double> @v_maximumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
-; GFX7-LABEL: v_maximumnum_v4f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v4f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_maximumnum_v4f64:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_maximumnum_v4f64:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX950-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
-; GFX950-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[8:9]
-; GFX950-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
-; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[8:9]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_maximumnum_v4f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_maximumnum_v4f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_maximumnum_v4f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
-; GFX1170-NEXT: v_max_num_f64 v[2:3], v[2:3], v[10:11]
-; GFX1170-NEXT: v_max_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-NEXT: v_max_num_f64 v[6:7], v[6:7], v[14:15]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v4f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v4f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[8:9]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[8:9]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[8:9]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[10:11]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[12:13]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[14:15]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[2:3], v[2:3], v[10:11]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[4:5], v[4:5], v[12:13]
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[6:7], v[6:7], v[14:15]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[12:13], v[12:13], v[12:13]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[14:15], v[14:15], v[14:15]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[10:11]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[12:13]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[14:15]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x double> @llvm.maximumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -5431,14 +10216,23 @@ define <4 x double> @v_maximumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
}
define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
-; GFX7-LABEL: v_maximumnum_f16_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_maximumnum_f16_no_ieee:
; GFX8: ; %bb.0:
@@ -5470,64 +10264,137 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v1
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_maximumnum_f16_no_ieee:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_maximumnum_f16_no_ieee:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_maximumnum_f16_no_ieee:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
define half @v_maximumnum_f16_nan_no_ieee(half %x, half %y) #0 {
-; GFX7-LABEL: v_maximumnum_f16_nan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_f16_nan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_f16_nan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_maximumnum_f16_nan_no_ieee:
; GFX8: ; %bb.0:
@@ -5639,28 +10506,57 @@ define float @v_maximumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX11-NEXT: v_max_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f32_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f32_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f32_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f32_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f32_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -5753,28 +10649,60 @@ define double @v_maximumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_f64_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_f64_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_f64_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_f64_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_f64_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -5837,30 +10765,55 @@ define double @v_maximumnum_f64_nnan_no_ieee(double %x, double %y) #0 {
}
define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_maximumnum_v2f16_no_ieee:
; GFX9: ; %bb.0:
@@ -5880,57 +10833,114 @@ define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX11-NEXT: v_pk_max_f16 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v2f16_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
define <2 x half> @v_maximumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -5977,42 +10987,79 @@ define <2 x half> @v_maximumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y)
}
define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y) #0 {
-; GFX7-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_max_f16 v1, v1, v3
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v2
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_pk_max_f16 v0, v0, v2
+; GFX9-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
; GFX10: ; %bb.0:
@@ -6028,75 +11075,141 @@ define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
define <4 x half> @v_maximumnum_v4f16_nnan_no_ieee(<4 x half> %x, <4 x half> %y) #0 {
-; GFX7-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_max_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_max_f32_e32 v5, v6, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_max_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_max_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_max_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_max_f32_e32 v5, v6, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_max_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_max_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_max_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_max_f32_e32 v3, v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v3
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -6152,21 +11265,5 @@ attributes #0 = { "amdgpu-ieee"="false" nounwind }
attributes #1 = { nounwind }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX10-SDAG: {{.*}}
-; GFX11-FAKE16-SDAG: {{.*}}
-; GFX11-SDAG: {{.*}}
-; GFX11-TRUE16-SDAG: {{.*}}
-; GFX1170-FAKE16-SDAG: {{.*}}
-; GFX1170-SDAG: {{.*}}
-; GFX1170-TRUE16-SDAG: {{.*}}
-; GFX12-FAKE16-SDAG: {{.*}}
-; GFX12-SDAG: {{.*}}
-; GFX12-TRUE16-SDAG: {{.*}}
-; GFX1251-FAKE16-SDAG: {{.*}}
-; GFX1251-SDAG: {{.*}}
-; GFX1251-TRUE16-SDAG: {{.*}}
-; GFX7-SDAG: {{.*}}
-; GFX8-SDAG: {{.*}}
-; GFX9-SDAG: {{.*}}
-; GFX900-SDAG: {{.*}}
-; GFX950-SDAG: {{.*}}
+; GFX900: {{.*}}
+; GFX950: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/minimumnum.ll b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
index 7e431a59cbbdb..29c5139015d57 100644
--- a/llvm/test/CodeGen/AMDGPU/minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
@@ -39,115 +39,239 @@
; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
define half @v_minimumnum_f16(half %x, half %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f16:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_minimumnum_f16:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_minimumnum_f16:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f16:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f16:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define half @v_minimumnum_f16_nnan(half %x, half %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_minimumnum_f16_nnan:
; GFX8: ; %bb.0:
@@ -274,118 +398,245 @@ define half @v_minimumnum_f16_1.0(half %x) #1 {
; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, 1.0, v0
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_1.0:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_1.0:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_1.0:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half 1.0)
ret half %result
}
define float @v_minimumnum_f32(float %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f32:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f32:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f32:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -448,69 +699,142 @@ define float @v_minimumnum_f32_nnan(float %x, float %y) #1 {
}
define double @v_minimumnum_f64(double %x, double %y) #1 {
-; GFX7-LABEL: v_minimumnum_f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f64:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX9-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f64:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX9-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX9-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f64:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX9-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX9-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -609,28 +933,57 @@ define float @v_minimumnum_f32_1.0(float %x) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, 1.0, v0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e32 v0, 1.0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -676,47 +1029,76 @@ define float @v_minimumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_rhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %canon.y = call float @llvm.canonicalize.f32(float %y)
- %result = call float @llvm.minimumnum.f32(float %x, float %canon.y)
- ret float %result
-}
-
-define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %canon.y = call float @llvm.canonicalize.f32(float %y)
+ %result = call float @llvm.minimumnum.f32(float %x, float %canon.y)
+ ret float %result
+}
+
+define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
+; GFX7-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX7: ; %bb.0:
+; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_minimumnum_f32_lhs_not_snan:
; GFX8: ; %bb.0:
@@ -750,34 +1132,63 @@ define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1170-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_lhs_not_snan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
-; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.minimumnum.f32(float %canon.x, float %y)
ret float %result
@@ -895,832 +1306,1732 @@ define double @v_minimumnum_f64_1.0(double %x) #1 {
; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f64_1.0:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f64_1.0:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f64_1.0:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_1.0:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_1.0:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], 1.0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f64_1.0:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_1.0:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_1.0:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_1.0:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double 1.0)
ret double %result
}
define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16_v_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f16_v_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_f16_v_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX900-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f16_v_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX950-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f16_v_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_minimumnum_f16_v_s:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_minimumnum_f16_v_s:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_v_s:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_v_s:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, s0, v0
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_v_s:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_v_s:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, s0, v0
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_v_s:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_v_s:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, s0, v0
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, s0, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, s0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define half @v_minimumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16_s_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, s17
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, s16
-; GFX7-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f16_s_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX8-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX8-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_f16_s_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX900-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX900-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f16_s_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX950-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX950-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f16_s_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v0, s17, s17
-; GFX10-NEXT: v_max_f16_e64 v1, s16, s16
-; GFX10-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_minimumnum_f16_s_s:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, s1, s1
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, s0, s0
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.h, v0.l
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_minimumnum_f16_s_s:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, s1, s1
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, s0, s0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v1, v0
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_s_s:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, s0, s1
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_s_s:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, s0, s1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f16_s_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_min_num_f16 s0, s0, s1
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f16_s_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: s_min_num_f16 s0, s0, s1
-; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, s17
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, s16
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, s16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, s17
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
+; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX900-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
+; GFX900-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
+; GFX900-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX950-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
+; GFX950-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
+; GFX950-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v0, s17, s17
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e64 v0, s16, s16
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, s17, s17
+; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, s1, s1
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, s0, s0
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.h, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, s0, s0
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, s1, s1
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, s1, s1
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, s0, s1
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s1, s1
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, s0, s1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX12-TRUE16-GISEL-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-TRUE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX12-FAKE16-GISEL-NEXT: s_min_num_f16 s0, s0, s1
+; GFX12-FAKE16-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: s_min_num_f16 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v1.l, s1, s1
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1251-TRUE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1251-TRUE16-GISEL-NEXT: s_min_num_f16 s0, s0, s1
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-TRUE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_min_num_f16 s0, s0, s1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define float @v_minimumnum_f32_s_v(float inreg %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_s_v:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32_s_v:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.minimumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, s0, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.minimumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define float @v_minimumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s16
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s16
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s17
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX900-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX900-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
+; GFX900-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
+; GFX900-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX950-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX950-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
+; GFX950-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
+; GFX950-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, s16, s16
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v0, s16, s16
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, s17, s17
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v0, s1, s1
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, s1, s1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, s0, s1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: s_min_num_f32 s0, s0, s1
+; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX12-GISEL-NEXT: s_min_num_f32 s0, s0, s1
+; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
+; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: s_min_num_f32 s0, s0, s1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_readfirstlane_b32 s0, v0
+; GFX1251-GISEL-NEXT: v_readfirstlane_b32 s1, v1
+; GFX1251-GISEL-NEXT: s_min_num_f32 s0, s0, s1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
+; GFX1251-GISEL-NEXT: v_mov_b32_e32 v0, s0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call float @llvm.minimumnum.f32(float %x, float %y)
+ ret float %result
+}
+
+define double @v_minimumnum_f64_s_v(double inreg %x, double %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX900-LABEL: v_minimumnum_f32_s_v:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f32_s_v:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32_s_v:
+; GFX10-LABEL: v_minimumnum_f64_s_v:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_f32_s_v:
+; GFX11-LABEL: v_minimumnum_f64_s_v:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v1, v0
+; GFX11-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_s_v:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_s_v:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_s_v:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.minimumnum.f32(float %x, float %y)
- ret float %result
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], s[0:1], v[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[2:3], v[0:1]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call double @llvm.minimumnum.f64(double %x, double %y)
+ ret double %result
}
-define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_v_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32_v_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+define double @v_minimumnum_f64_v_s(double %x, double inreg %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX900-LABEL: v_minimumnum_f32_v_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX900-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f32_v_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX950-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32_v_s:
+; GFX10-LABEL: v_minimumnum_f64_v_s:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_f32_v_s:
+; GFX11-LABEL: v_minimumnum_f64_v_s:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_v_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_v_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_v_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e32 v0, s0, v0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.minimumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define float @v_minimumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_s_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX7-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32_s_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, s17
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, s16
-; GFX8-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_f32_s_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX900-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX900-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f32_s_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX950-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX950-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32_s_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v0, s17, s17
-; GFX10-NEXT: v_max_f32_e64 v1, s16, s16
-; GFX10-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f32_s_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v0, s1, s1
-; GFX11-NEXT: v_max_f32_e64 v1, s0, s0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v1, v0
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f32_s_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e64 v0, s0, s1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_s_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: s_min_num_f32 s0, s0, s1
-; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
-; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
-; GFX12-NEXT: v_mov_b32_e32 v0, s0
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_s_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: s_min_num_f32 s0, s0, s1
-; GFX1251-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
-; GFX1251-NEXT: v_mov_b32_e32 v0, s0
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call float @llvm.minimumnum.f32(float %x, float %y)
- ret float %result
-}
-
-define double @v_minimumnum_f64_s_v(double inreg %x, double %y) #1 {
-; GFX7-LABEL: v_minimumnum_f64_s_v:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f64_s_v:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_f64_s_v:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f64_s_v:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f64_s_v:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f64_s_v:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f64_s_v:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], s[0:1], v[0:1]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f64_s_v:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f64_s_v:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call double @llvm.minimumnum.f64(double %x, double %y)
- ret double %result
-}
-
-define double @v_minimumnum_f64_v_s(double %x, double inreg %y) #1 {
-; GFX7-LABEL: v_minimumnum_f64_v_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f64_v_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_f64_v_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f64_v_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f64_v_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f64_v_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f64_v_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], s[0:1]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f64_v_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f64_v_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], s[0:1]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], s[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
define double @v_minimumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
-; GFX7-LABEL: v_minimumnum_f64_s_s:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX7-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX7-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f64_s_s:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX8-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX8-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_f64_s_s:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX900-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX900-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_f64_s_s:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX950-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX950-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f64_s_s:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
-; GFX10-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
-; GFX10-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f64_s_s:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
-; GFX11-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f64_s_s:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], s[0:1], s[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f64_s_s:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f64_s_s:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
+; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], s[18:19], s[18:19]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], s[16:17], s[16:17]
+; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], s[16:17], s[16:17]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], s[18:19], s[18:19]
+; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], s[0:1], s[0:1]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], s[0:1], s[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], s[0:1], s[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], s[0:1], s[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], s[2:3], s[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
define float @v_minimumnum_f32_fabs_rhs(float %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e64 v0, v0, |v1|
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e64 v0, v0, |v1|
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_fabs_rhs:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e64 v0, v0, |v1|
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, v0, |v1|
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call float @llvm.fabs.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %x, float %fabs.y)
ret float %result
}
define float @v_minimumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
-; GFX11-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, -1.0, |v1|
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX11-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -|v1|, -|v1|
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, v0, -|v1|
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call float @llvm.fabs.f32(float %y)
%fneg.fabs.y = fneg float %fabs.y
%result = call float @llvm.minimumnum.f32(float %x, float %fneg.fabs.y)
@@ -1728,69 +3039,142 @@ define float @v_minimumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
}
define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_fabs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX7-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32_fabs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
-; GFX8-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f32_fabs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32_fabs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f32_fabs:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, |v1|, |v1|
-; GFX11-NEXT: v_max_f32_e64 v0, |v0|, |v0|
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f32_fabs:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_fabs:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_fabs:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX7-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, |v0|
+; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, |v1|
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-SDAG-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v0, |v0|, |v0|
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, |v1|, |v1|
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, |v0|, |v1|
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.x = call float @llvm.fabs.f32(float %x)
%fabs.y = call float @llvm.fabs.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %fabs.x, float %fabs.y)
@@ -1798,69 +3182,141 @@ define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
}
define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
-; GFX7-LABEL: v_minimumnum_f32_fneg:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f32_fneg:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v1, -1.0, v1
-; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f32_fneg:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f32_fneg:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f32_fneg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f32_e64 v1, -v1, -v1
-; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f32_fneg:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e64 v0, -v0, -v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_fneg:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e64 v0, -v0, -v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_fneg:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e64 v0, -v0, -v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, -1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, -1.0, v1
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX9-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX9-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX10-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX10-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX11-SDAG-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f32_e64 v0, -v0, -v0
+; GFX11-GISEL-NEXT: v_max_f32_e64 v1, -v1, -v1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
+; GFX1170-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, -v0, -v0
+; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, -v1, -v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e64 v0, -v0, -v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, -v0, -v0 :: v_dual_max_num_f32 v1, -v1, -v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg float %x
%fneg.y = fneg float %y
%result = call float @llvm.minimumnum.f32(float %fneg.x, float %fneg.y)
@@ -1868,204 +3324,434 @@ define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
}
define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, |v1|
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, |v1|
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fabs_rhs:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, |v1|
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call half @llvm.fabs.f16(half %y)
%result = call half @llvm.minimumnum.f16(half %x, half %fabs.y)
ret half %result
}
define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX9-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX10-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
-; GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
-; GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -|v1|
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX9-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX10-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -|v1|, -|v1|
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, v0.l, -|v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, v0, -|v1|
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call half @llvm.fabs.f16(half %y)
%fneg.fabs.y = fneg half %fabs.y
%result = call half @llvm.minimumnum.f16(half %x, half %fneg.fabs.y)
@@ -2073,102 +3759,217 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
}
define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16_fabs:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, |v1|
-; GFX7-NEXT: v_cvt_f32_f16_e64 v0, |v0|
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f16_fabs:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX8-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f16_fabs:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX9-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f16_fabs:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX10-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_minimumnum_f16_fabs:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_minimumnum_f16_fabs:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, |v1|, |v1|
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, |v0|, |v0|
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fabs:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fabs:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_fabs:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_fabs:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fabs:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fabs:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, |v0|
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, |v1|
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, |v0|, |v0|
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, |v1|, |v1|
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, |v0.l|, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, |v0|, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.x = call half @llvm.fabs.f16(half %x)
%fabs.y = call half @llvm.fabs.f16(half %y)
%result = call half @llvm.minimumnum.f16(half %fabs.x, half %fabs.y)
@@ -2176,102 +3977,217 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
}
define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
-; GFX7-LABEL: v_minimumnum_f16_fneg:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e64 v1, -v1
-; GFX7-NEXT: v_cvt_f32_f16_e64 v0, -v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f16_fneg:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX8-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f16_fneg:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX9-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f16_fneg:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX10-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX10-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-TRUE16-LABEL: v_minimumnum_f16_fneg:
-; GFX11-TRUE16: ; %bb.0:
-; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
-; GFX11-TRUE16-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
-; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
-; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-FAKE16-LABEL: v_minimumnum_f16_fneg:
-; GFX11-FAKE16: ; %bb.0:
-; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v1, -v1, -v1
-; GFX11-FAKE16-NEXT: v_max_f16_e64 v0, -v0, -v0
-; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_fneg:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_fneg:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e64 v0, -v0, -v1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_fneg:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_fneg:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e64 v0, -v0, -v1
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_fneg:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_fneg:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e64 v0, -v0, -v1
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v1, -v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e64 v0, -v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v1, -v1
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX8-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX8-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX9-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX9-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX10-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX10-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX10-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX10-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX11-TRUE16-SDAG: ; %bb.0:
+; GFX11-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
+; GFX11-TRUE16-SDAG-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
+; GFX11-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-SDAG-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX11-TRUE16-GISEL: ; %bb.0:
+; GFX11-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.l, -v0.l, -v0.l
+; GFX11-TRUE16-GISEL-NEXT: v_max_f16_e64 v0.h, -v1.l, -v1.l
+; GFX11-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-TRUE16-GISEL-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h
+; GFX11-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX11-FAKE16-SDAG: ; %bb.0:
+; GFX11-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX11-FAKE16-SDAG-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX11-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX11-FAKE16-GISEL: ; %bb.0:
+; GFX11-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v0, -v0, -v0
+; GFX11-FAKE16-GISEL-NEXT: v_max_f16_e64 v1, -v1, -v1
+; GFX11-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX11-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e64 v0.l, -v0.l, -v1.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e64 v0, -v0, -v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg half %x
%fneg.y = fneg half %y
%result = call half @llvm.minimumnum.f16(half %fneg.x, half %fneg.y)
@@ -2279,69 +4195,142 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
}
define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
-; GFX7-LABEL: v_minimumnum_f64_fneg:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX7-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_f64_fneg:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX8-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_f64_fneg:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX9-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_f64_fneg:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX10-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_f64_fneg:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
-; GFX11-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_f64_fneg:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], -v[0:1], -v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f64_fneg:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f64_fneg:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX9-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX9-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX9-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX9-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], -v[0:1], -v[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], -v[0:1], -v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], -v[2:3], -v[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e64 v[0:1], -v[0:1], -v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg double %x
%fneg.y = fneg double %y
%result = call double @llvm.minimumnum.f64(double %fneg.x, double %fneg.y)
@@ -2349,1993 +4338,4033 @@ define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
}
define <2 x half> @v_minimumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v2f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v2f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v2f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v2f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v2f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v2f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v2f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v2f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v2f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
-}
-
-define <2 x half> @v_minimumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v2f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v2f16_nnan:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_v2f16_nnan:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v2f16_nnan:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v2f16_nnan:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v2f16_nnan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v2f16_nnan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v2f16_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
- ret <2 x half> %result
-}
-
-define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v3f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v3f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_v3f16:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX9-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX9-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX9-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v3f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v3f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-TRUE16-LABEL: v_minimumnum_v3f16:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_v3f16:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v3
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_v3f16:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_v3f16:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v3
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_v3f16:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_v3f16:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v1, v1, v3
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
- %result = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
-}
-
-define <3 x half> @v_minimumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v3f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v3f16_nnan:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_v3f16_nnan:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v3f16_nnan:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v3f16_nnan:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v3f16_nnan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v3f16_nnan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v3f16_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
- ret <3 x half> %result
-}
-
-define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v4f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v5, v6, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v4f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v4f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX900-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v4f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX950-NEXT: v_pk_max_f16 v2, v3, v3
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_min_f16 v1, v1, v2
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v4f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v4f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v4f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v4f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v4f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
- ret <4 x half> %result
-}
-
-define <4 x half> @v_minimumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v4f16_nnan:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v5, v6, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v4f16_nnan:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v2, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v3, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v2, v3
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
+}
+
+define <2 x half> @v_minimumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v2f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v2f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v2f16_nnan:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v2f16_nnan:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v0, v1
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX9-LABEL: v_minimumnum_v4f16_nnan:
+; GFX9-LABEL: v_minimumnum_v2f16_nnan:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-NEXT: v_pk_min_f16 v0, v0, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_minimumnum_v4f16_nnan:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v4f16_nnan:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v4f16_nnan:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v4f16_nnan:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v4f16_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
- ret <4 x half> %result
-}
-
-define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v6f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v2
-; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_min_f32_e32 v6, v6, v7
-; GFX7-NEXT: v_min_f32_e32 v8, v8, v9
-; GFX7-NEXT: v_min_f32_e32 v9, v10, v11
-; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v6
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v9
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v6f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_e32 v2, v2, v5
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v4
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v6
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v6f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX900-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX900-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_min_f16 v2, v2, v3
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v6f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX950-NEXT: v_pk_max_f16 v3, v4, v4
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX950-NEXT: v_pk_max_f16 v3, v5, v5
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_min_f16 v2, v2, v3
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v6f16:
+; GFX10-LABEL: v_minimumnum_v2f16_nnan:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX10-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v1
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_v6f16:
+; GFX11-LABEL: v_minimumnum_v2f16_nnan:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX11-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v6f16:
+; GFX1170-LABEL: v_minimumnum_v2f16_nnan:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_v6f16:
+; GFX12-LABEL: v_minimumnum_v2f16_nnan:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_v6f16:
+; GFX1251-LABEL: v_minimumnum_v2f16_nnan:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v3
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v4
-; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <6 x half> @llvm.minimumnum.v6f16(<6 x half> %x, <6 x half> %y)
- ret <6 x half> %result
+ %result = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
+ ret <2 x half> %result
}
-define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v8f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v13, 16, v5
-; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v2
-; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_min_f32_e32 v11, v11, v12
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_min_f32_e32 v8, v8, v9
-; GFX7-NEXT: v_min_f32_e32 v12, v14, v12
-; GFX7-NEXT: v_min_f32_e32 v10, v10, v13
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-NEXT: v_min_f32_e32 v3, v3, v7
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v6
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v8
-; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v12
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
-; GFX7-NEXT: v_or_b32_e32 v3, v3, v11
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v8f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_e32 v3, v3, v7
-; GFX8-NEXT: v_min_f16_e32 v2, v2, v6
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v5
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v4
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX8-NEXT: v_or_b32_e32 v3, v3, v8
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v8f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX900-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX900-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_min_f16 v2, v2, v4
-; GFX900-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_min_f16 v3, v3, v4
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v8f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX950-NEXT: v_pk_max_f16 v4, v5, v5
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_min_f16 v1, v1, v4
-; GFX950-NEXT: v_pk_max_f16 v4, v6, v6
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_min_f16 v2, v2, v4
-; GFX950-NEXT: v_pk_max_f16 v4, v7, v7
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_min_f16 v3, v3, v4
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v8f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v5
-; GFX10-NEXT: v_pk_min_f16 v2, v2, v6
-; GFX10-NEXT: v_pk_min_f16 v3, v3, v7
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v8f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v4
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v5
-; GFX11-NEXT: v_pk_min_f16 v2, v2, v6
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_pk_min_f16 v3, v3, v7
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v8f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1170-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v8f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v8f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v4
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v5
-; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v6
-; GFX1251-NEXT: v_pk_min_num_f16 v3, v3, v7
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> %x, <8 x half> %y)
- ret <8 x half> %result
+define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v5
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v3, v3
+; GFX8-GISEL-NEXT: v_min_f16_e32 v1, v1, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX9-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX9-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX9-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX9-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v1, v1, v3
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v1, v1, v3
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v1, v1, v3
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
}
-define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v16f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v16, 16, v15
-; GFX7-NEXT: v_lshrrev_b32_e32 v17, 16, v7
-; GFX7-NEXT: v_lshrrev_b32_e32 v18, 16, v14
-; GFX7-NEXT: v_lshrrev_b32_e32 v19, 16, v6
-; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v13
-; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v5
-; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v12
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_min_f32_e32 v16, v17, v16
-; GFX7-NEXT: v_min_f32_e32 v17, v19, v18
-; GFX7-NEXT: v_min_f32_e32 v18, v21, v20
-; GFX7-NEXT: v_min_f32_e32 v19, v23, v22
-; GFX7-NEXT: v_lshrrev_b32_e32 v20, 16, v11
-; GFX7-NEXT: v_lshrrev_b32_e32 v21, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v10
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_lshrrev_b32_e32 v24, 16, v0
-; GFX7-NEXT: v_min_f32_e32 v20, v21, v20
-; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-NEXT: v_min_f32_e32 v21, v23, v22
-; GFX7-NEXT: v_lshrrev_b32_e32 v22, 16, v9
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_min_f32_e32 v22, v23, v22
-; GFX7-NEXT: v_lshrrev_b32_e32 v23, 16, v8
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_min_f32_e32 v23, v24, v23
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v23
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v9
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v22
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v10
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v8
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v9
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v21
-; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-NEXT: v_min_f32_e32 v5, v5, v13
-; GFX7-NEXT: v_min_f32_e32 v3, v3, v11
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v9
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v18
-; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v20
-; GFX7-NEXT: v_min_f32_e32 v7, v7, v15
-; GFX7-NEXT: v_min_f32_e32 v6, v6, v14
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v12
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v19
-; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-NEXT: v_or_b32_e32 v3, v3, v10
-; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v12
-; GFX7-NEXT: v_or_b32_e32 v5, v5, v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v11
-; GFX7-NEXT: v_or_b32_e32 v4, v4, v10
-; GFX7-NEXT: v_or_b32_e32 v6, v6, v9
-; GFX7-NEXT: v_or_b32_e32 v7, v7, v8
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v16f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_e32 v7, v7, v15
-; GFX8-NEXT: v_min_f16_e32 v6, v6, v14
-; GFX8-NEXT: v_min_f16_e32 v5, v5, v13
-; GFX8-NEXT: v_min_f16_e32 v4, v4, v12
-; GFX8-NEXT: v_min_f16_e32 v3, v3, v11
-; GFX8-NEXT: v_min_f16_e32 v2, v2, v10
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v9
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v8
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v23
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v22
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v21
-; GFX8-NEXT: v_or_b32_e32 v3, v3, v20
-; GFX8-NEXT: v_or_b32_e32 v4, v4, v19
-; GFX8-NEXT: v_or_b32_e32 v5, v5, v18
-; GFX8-NEXT: v_or_b32_e32 v6, v6, v17
-; GFX8-NEXT: v_or_b32_e32 v7, v7, v16
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+define <3 x half> @v_minimumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v3f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v3f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v3f16_nnan:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v3f16_nnan:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_v3f16_nnan:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_v3f16_nnan:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX900-LABEL: v_minimumnum_v16f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_min_f16 v1, v1, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_min_f16 v2, v2, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-NEXT: v_pk_min_f16 v4, v4, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-NEXT: v_pk_min_f16 v5, v5, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-NEXT: v_pk_min_f16 v6, v6, v8
-; GFX900-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-NEXT: v_pk_min_f16 v7, v7, v8
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v16f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v9, v9
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_min_f16 v1, v1, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v10, v10
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_min_f16 v2, v2, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v12, v12
-; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-NEXT: v_pk_min_f16 v4, v4, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v13, v13
-; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-NEXT: v_pk_min_f16 v5, v5, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v14, v14
-; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-NEXT: v_pk_min_f16 v6, v6, v8
-; GFX950-NEXT: v_pk_max_f16 v8, v15, v15
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_min_f16 v7, v7, v8
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v16f16:
+; GFX10-LABEL: v_minimumnum_v3f16_nnan:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX10-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v9
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_min_f16 v2, v2, v10
-; GFX10-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX10-NEXT: v_pk_min_f16 v4, v4, v9
-; GFX10-NEXT: v_pk_min_f16 v5, v5, v10
-; GFX10-NEXT: v_pk_min_f16 v6, v6, v11
-; GFX10-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_v16f16:
+; GFX11-LABEL: v_minimumnum_v3f16_nnan:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v8
-; GFX11-NEXT: v_pk_max_f16 v8, v11, v11
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v9
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_min_f16 v2, v2, v10
-; GFX11-NEXT: v_pk_max_f16 v9, v12, v12
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v10, v13, v13
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v11, v14, v14
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-NEXT: v_pk_max_f16 v12, v15, v15
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-NEXT: v_pk_min_f16 v3, v3, v8
-; GFX11-NEXT: v_pk_min_f16 v4, v4, v9
-; GFX11-NEXT: v_pk_min_f16 v5, v5, v10
-; GFX11-NEXT: v_pk_min_f16 v6, v6, v11
-; GFX11-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v16f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1170-NEXT: v_pk_min_num_f16 v3, v3, v11
-; GFX1170-NEXT: v_pk_min_num_f16 v4, v4, v12
-; GFX1170-NEXT: v_pk_min_num_f16 v5, v5, v13
-; GFX1170-NEXT: v_pk_min_num_f16 v6, v6, v14
-; GFX1170-NEXT: v_pk_min_num_f16 v7, v7, v15
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v16f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v11
-; GFX12-NEXT: v_pk_min_num_f16 v4, v4, v12
-; GFX12-NEXT: v_pk_min_num_f16 v5, v5, v13
-; GFX12-NEXT: v_pk_min_num_f16 v6, v6, v14
-; GFX12-NEXT: v_pk_min_num_f16 v7, v7, v15
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v16f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v8
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v9
-; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v10
-; GFX1251-NEXT: v_pk_min_num_f16 v3, v3, v11
-; GFX1251-NEXT: v_pk_min_num_f16 v4, v4, v12
-; GFX1251-NEXT: v_pk_min_num_f16 v5, v5, v13
-; GFX1251-NEXT: v_pk_min_num_f16 v6, v6, v14
-; GFX1251-NEXT: v_pk_min_num_f16 v7, v7, v15
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <16 x half> @llvm.minimumnum.v16f16(<16 x half> %x, <16 x half> %y)
- ret <16 x half> %result
+; GFX1170-SDAG-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v3f16_nnan:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v3f16_nnan:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
+ ret <3 x half> %result
}
-define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v32f16:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX7-NEXT: buffer_load_dword v49, off, s[0:3], s32
-; GFX7-NEXT: v_lshrrev_b32_e32 v31, 16, v30
-; GFX7-NEXT: v_lshrrev_b32_e32 v32, 16, v14
-; GFX7-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; GFX7-NEXT: v_lshrrev_b32_e32 v34, 16, v13
-; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v28
-; GFX7-NEXT: v_lshrrev_b32_e32 v36, 16, v12
-; GFX7-NEXT: v_lshrrev_b32_e32 v37, 16, v27
-; GFX7-NEXT: v_lshrrev_b32_e32 v38, 16, v11
-; GFX7-NEXT: v_lshrrev_b32_e32 v39, 16, v26
-; GFX7-NEXT: v_lshrrev_b32_e32 v48, 16, v10
-; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v25
-; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v9
-; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v24
-; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v8
-; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v23
-; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v31, v31
-; GFX7-NEXT: v_cvt_f32_f16_e32 v32, v32
-; GFX7-NEXT: v_cvt_f32_f16_e32 v33, v33
-; GFX7-NEXT: v_cvt_f32_f16_e32 v34, v34
-; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-NEXT: v_cvt_f32_f16_e32 v36, v36
-; GFX7-NEXT: v_cvt_f32_f16_e32 v37, v37
-; GFX7-NEXT: v_cvt_f32_f16_e32 v38, v38
-; GFX7-NEXT: v_cvt_f32_f16_e32 v39, v39
-; GFX7-NEXT: v_cvt_f32_f16_e32 v48, v48
-; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-NEXT: v_min_f32_e32 v31, v32, v31
-; GFX7-NEXT: v_min_f32_e32 v33, v34, v33
-; GFX7-NEXT: v_min_f32_e32 v32, v36, v35
-; GFX7-NEXT: v_min_f32_e32 v34, v38, v37
-; GFX7-NEXT: v_min_f32_e32 v36, v48, v39
-; GFX7-NEXT: v_min_f32_e32 v37, v51, v50
-; GFX7-NEXT: v_min_f32_e32 v38, v53, v52
-; GFX7-NEXT: v_min_f32_e32 v39, v55, v54
-; GFX7-NEXT: v_lshrrev_b32_e32 v50, 16, v20
-; GFX7-NEXT: v_lshrrev_b32_e32 v51, 16, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v52, 16, v19
-; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v18
-; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v50, v50
-; GFX7-NEXT: v_cvt_f32_f16_e32 v51, v51
-; GFX7-NEXT: v_cvt_f32_f16_e32 v52, v52
-; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-NEXT: v_min_f32_e32 v50, v51, v50
-; GFX7-NEXT: v_min_f32_e32 v51, v53, v52
-; GFX7-NEXT: v_lshrrev_b32_e32 v53, 16, v17
-; GFX7-NEXT: v_min_f32_e32 v52, v55, v54
-; GFX7-NEXT: v_lshrrev_b32_e32 v54, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v53, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v54, v54
-; GFX7-NEXT: v_cvt_f32_f16_e32 v17, v17
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v40, 16, v22
-; GFX7-NEXT: v_min_f32_e32 v53, v54, v53
-; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v6
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v53
-; GFX7-NEXT: v_cvt_f32_f16_e32 v40, v40
-; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-NEXT: v_cvt_f32_f16_e32 v19, v19
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v43, 16, v21
-; GFX7-NEXT: v_lshrrev_b32_e32 v44, 16, v5
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_lshrrev_b32_e32 v42, 16, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v43, v43
-; GFX7-NEXT: v_cvt_f32_f16_e32 v44, v44
-; GFX7-NEXT: v_min_f32_e32 v48, v41, v40
-; GFX7-NEXT: v_lshrrev_b32_e32 v55, 16, v16
-; GFX7-NEXT: s_waitcnt vmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v35, 16, v49
-; GFX7-NEXT: v_lshrrev_b32_e32 v41, 16, v0
-; GFX7-NEXT: v_min_f32_e32 v3, v3, v19
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v51
-; GFX7-NEXT: v_cvt_f32_f16_e32 v42, v42
-; GFX7-NEXT: v_cvt_f32_f16_e32 v35, v35
-; GFX7-NEXT: v_cvt_f32_f16_e32 v55, v55
-; GFX7-NEXT: v_cvt_f32_f16_e32 v41, v41
-; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3
-; GFX7-NEXT: v_min_f32_e32 v40, v44, v43
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_min_f32_e32 v35, v42, v35
-; GFX7-NEXT: v_min_f32_e32 v54, v41, v55
-; GFX7-NEXT: v_or_b32_e32 v3, v3, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v40
-; GFX7-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX7-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX7-NEXT: v_cvt_f32_f16_e32 v18, v18
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v16, v16
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v21, v21
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v18
-; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v54
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v18
-; GFX7-NEXT: v_cvt_f32_f16_e32 v20, v20
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v52
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_min_f32_e32 v5, v5, v21
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v20
-; GFX7-NEXT: v_or_b32_e32 v2, v2, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v50
-; GFX7-NEXT: v_cvt_f32_f16_e32 v23, v23
-; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v22, v22
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_min_f32_e32 v7, v7, v23
-; GFX7-NEXT: v_min_f32_e32 v6, v6, v22
-; GFX7-NEXT: v_or_b32_e32 v4, v4, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v48
-; GFX7-NEXT: v_or_b32_e32 v5, v5, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v39
-; GFX7-NEXT: v_cvt_f32_f16_e32 v25, v25
-; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v9
-; GFX7-NEXT: v_cvt_f32_f16_e32 v24, v24
-; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v6
-; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v7
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_min_f32_e32 v9, v9, v25
-; GFX7-NEXT: v_min_f32_e32 v8, v8, v24
-; GFX7-NEXT: v_or_b32_e32 v6, v6, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v38
-; GFX7-NEXT: v_or_b32_e32 v7, v7, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v37
-; GFX7-NEXT: v_cvt_f32_f16_e32 v27, v27
-; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v11
-; GFX7-NEXT: v_cvt_f32_f16_e32 v26, v26
-; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v10
-; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v8
-; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_min_f32_e32 v11, v11, v27
-; GFX7-NEXT: v_min_f32_e32 v10, v10, v26
-; GFX7-NEXT: v_or_b32_e32 v8, v8, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v36
-; GFX7-NEXT: v_or_b32_e32 v9, v9, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v34
-; GFX7-NEXT: v_cvt_f32_f16_e32 v49, v49
-; GFX7-NEXT: v_cvt_f32_f16_e32 v15, v15
-; GFX7-NEXT: v_cvt_f32_f16_e32 v30, v30
-; GFX7-NEXT: v_cvt_f32_f16_e32 v14, v14
-; GFX7-NEXT: v_cvt_f32_f16_e32 v29, v29
-; GFX7-NEXT: v_cvt_f32_f16_e32 v13, v13
-; GFX7-NEXT: v_cvt_f32_f16_e32 v28, v28
-; GFX7-NEXT: v_cvt_f32_f16_e32 v12, v12
-; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v10
-; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v11
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_min_f32_e32 v15, v15, v49
-; GFX7-NEXT: v_min_f32_e32 v14, v14, v30
-; GFX7-NEXT: v_min_f32_e32 v13, v13, v29
-; GFX7-NEXT: v_min_f32_e32 v12, v12, v28
-; GFX7-NEXT: v_or_b32_e32 v10, v10, v16
-; GFX7-NEXT: v_cvt_f16_f32_e32 v16, v35
-; GFX7-NEXT: v_cvt_f16_f32_e32 v18, v33
-; GFX7-NEXT: v_or_b32_e32 v11, v11, v17
-; GFX7-NEXT: v_cvt_f16_f32_e32 v17, v31
-; GFX7-NEXT: v_cvt_f16_f32_e32 v19, v32
-; GFX7-NEXT: v_cvt_f16_f32_e32 v15, v15
-; GFX7-NEXT: v_cvt_f16_f32_e32 v12, v12
-; GFX7-NEXT: v_cvt_f16_f32_e32 v13, v13
-; GFX7-NEXT: v_cvt_f16_f32_e32 v14, v14
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; GFX7-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; GFX7-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; GFX7-NEXT: v_or_b32_e32 v12, v12, v19
-; GFX7-NEXT: v_or_b32_e32 v13, v13, v18
-; GFX7-NEXT: v_or_b32_e32 v14, v14, v17
-; GFX7-NEXT: v_or_b32_e32 v15, v15, v16
-; GFX7-NEXT: s_waitcnt vmcnt(0)
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v32f16:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX8-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v17, v17, v17
-; GFX8-NEXT: v_max_f16_e32 v1, v1, v1
-; GFX8-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v17
-; GFX8-NEXT: v_min_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v40
-; GFX8-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX8-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v15, v15, v15
-; GFX8-NEXT: v_min_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_max_f16_e32 v30, v30, v30
-; GFX8-NEXT: v_max_f16_e32 v14, v14, v14
-; GFX8-NEXT: v_max_f16_e32 v29, v29, v29
-; GFX8-NEXT: v_max_f16_e32 v13, v13, v13
-; GFX8-NEXT: v_max_f16_e32 v28, v28, v28
-; GFX8-NEXT: v_max_f16_e32 v12, v12, v12
-; GFX8-NEXT: v_max_f16_e32 v27, v27, v27
-; GFX8-NEXT: v_max_f16_e32 v11, v11, v11
-; GFX8-NEXT: v_max_f16_e32 v26, v26, v26
-; GFX8-NEXT: v_max_f16_e32 v10, v10, v10
-; GFX8-NEXT: v_max_f16_e32 v25, v25, v25
-; GFX8-NEXT: v_max_f16_e32 v9, v9, v9
-; GFX8-NEXT: v_max_f16_e32 v24, v24, v24
-; GFX8-NEXT: v_max_f16_e32 v8, v8, v8
-; GFX8-NEXT: v_max_f16_e32 v23, v23, v23
-; GFX8-NEXT: v_max_f16_e32 v7, v7, v7
-; GFX8-NEXT: v_max_f16_e32 v22, v22, v22
-; GFX8-NEXT: v_max_f16_e32 v6, v6, v6
-; GFX8-NEXT: v_max_f16_e32 v21, v21, v21
-; GFX8-NEXT: v_max_f16_e32 v5, v5, v5
-; GFX8-NEXT: v_max_f16_e32 v20, v20, v20
-; GFX8-NEXT: v_max_f16_e32 v4, v4, v4
-; GFX8-NEXT: v_max_f16_e32 v19, v19, v19
-; GFX8-NEXT: v_max_f16_e32 v3, v3, v3
-; GFX8-NEXT: v_max_f16_e32 v18, v18, v18
-; GFX8-NEXT: v_max_f16_e32 v2, v2, v2
-; GFX8-NEXT: v_max_f16_e32 v16, v16, v16
-; GFX8-NEXT: v_max_f16_e32 v0, v0, v0
-; GFX8-NEXT: v_min_f16_e32 v14, v14, v30
-; GFX8-NEXT: v_min_f16_e32 v13, v13, v29
-; GFX8-NEXT: v_min_f16_e32 v12, v12, v28
-; GFX8-NEXT: v_min_f16_e32 v11, v11, v27
-; GFX8-NEXT: v_min_f16_e32 v10, v10, v26
-; GFX8-NEXT: v_min_f16_e32 v9, v9, v25
-; GFX8-NEXT: v_min_f16_e32 v8, v8, v24
-; GFX8-NEXT: v_min_f16_e32 v7, v7, v23
-; GFX8-NEXT: v_min_f16_e32 v6, v6, v22
-; GFX8-NEXT: v_min_f16_e32 v5, v5, v21
-; GFX8-NEXT: v_min_f16_e32 v4, v4, v20
-; GFX8-NEXT: v_min_f16_e32 v3, v3, v19
-; GFX8-NEXT: v_min_f16_e32 v2, v2, v18
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v16
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v33
-; GFX8-NEXT: v_or_b32_e32 v2, v2, v55
-; GFX8-NEXT: v_or_b32_e32 v3, v3, v54
-; GFX8-NEXT: v_or_b32_e32 v4, v4, v53
-; GFX8-NEXT: v_or_b32_e32 v5, v5, v52
-; GFX8-NEXT: v_or_b32_e32 v6, v6, v51
-; GFX8-NEXT: v_or_b32_e32 v7, v7, v50
-; GFX8-NEXT: v_or_b32_e32 v8, v8, v49
-; GFX8-NEXT: v_or_b32_e32 v9, v9, v48
-; GFX8-NEXT: v_or_b32_e32 v10, v10, v39
-; GFX8-NEXT: v_or_b32_e32 v11, v11, v38
-; GFX8-NEXT: v_or_b32_e32 v12, v12, v36
-; GFX8-NEXT: v_or_b32_e32 v13, v13, v34
-; GFX8-NEXT: v_or_b32_e32 v14, v14, v32
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_max_f16_e32 v31, v31, v31
-; GFX8-NEXT: v_min_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT: v_min_f16_e32 v15, v15, v31
-; GFX8-NEXT: v_or_b32_e32 v15, v15, v35
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v32f16:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX900-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX900-NEXT: v_pk_max_f16 v16, v17, v17
-; GFX900-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX900-NEXT: v_pk_min_f16 v1, v1, v16
-; GFX900-NEXT: v_pk_max_f16 v16, v18, v18
-; GFX900-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX900-NEXT: v_pk_min_f16 v2, v2, v16
-; GFX900-NEXT: v_pk_max_f16 v16, v19, v19
-; GFX900-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX900-NEXT: v_pk_min_f16 v3, v3, v16
-; GFX900-NEXT: buffer_load_dword v16, off, s[0:3], s32
-; GFX900-NEXT: v_pk_max_f16 v17, v20, v20
-; GFX900-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX900-NEXT: v_pk_max_f16 v18, v21, v21
-; GFX900-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX900-NEXT: v_pk_max_f16 v19, v22, v22
-; GFX900-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX900-NEXT: v_pk_max_f16 v20, v23, v23
-; GFX900-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX900-NEXT: v_pk_max_f16 v21, v24, v24
-; GFX900-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX900-NEXT: v_pk_max_f16 v22, v25, v25
-; GFX900-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX900-NEXT: v_pk_max_f16 v23, v26, v26
-; GFX900-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX900-NEXT: v_pk_max_f16 v24, v27, v27
-; GFX900-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX900-NEXT: v_pk_max_f16 v25, v28, v28
-; GFX900-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX900-NEXT: v_pk_max_f16 v26, v29, v29
-; GFX900-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX900-NEXT: v_pk_max_f16 v27, v30, v30
-; GFX900-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX900-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX900-NEXT: v_pk_min_f16 v4, v4, v17
-; GFX900-NEXT: v_pk_min_f16 v5, v5, v18
-; GFX900-NEXT: v_pk_min_f16 v6, v6, v19
-; GFX900-NEXT: v_pk_min_f16 v7, v7, v20
-; GFX900-NEXT: v_pk_min_f16 v8, v8, v21
-; GFX900-NEXT: v_pk_min_f16 v9, v9, v22
-; GFX900-NEXT: v_pk_min_f16 v10, v10, v23
-; GFX900-NEXT: v_pk_min_f16 v11, v11, v24
-; GFX900-NEXT: v_pk_min_f16 v12, v12, v25
-; GFX900-NEXT: v_pk_min_f16 v13, v13, v26
-; GFX900-NEXT: v_pk_min_f16 v14, v14, v27
-; GFX900-NEXT: s_waitcnt vmcnt(0)
-; GFX900-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX900-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v32f16:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: scratch_load_dword v31, off, s32
-; GFX950-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX950-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX950-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX950-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX950-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX950-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX950-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX950-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX950-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX950-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX950-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX950-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX950-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX950-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX950-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX950-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX950-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX950-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX950-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX950-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX950-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX950-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX950-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX950-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX950-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX950-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX950-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX950-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX950-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX950-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX950-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX950-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX950-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX950-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX950-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX950-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX950-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX950-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX950-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX950-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX950-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX950-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX950-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX950-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX950-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX950-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX950-NEXT: s_waitcnt vmcnt(0)
-; GFX950-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX950-NEXT: s_nop 0
-; GFX950-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v32f16:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX10-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX10-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX10-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX10-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX10-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX10-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX10-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX10-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX10-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX10-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX10-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX10-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX10-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX10-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX10-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX10-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX10-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX10-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX10-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX10-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX10-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX10-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX10-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX10-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX10-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX10-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX10-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX10-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX10-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX10-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX10-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX10-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX10-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX10-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX10-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX10-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX10-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX10-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX10-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX10-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX10-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX10-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX10-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX10-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX10-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX10-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v32f16:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-NEXT: v_pk_max_f16 v16, v16, v16
-; GFX11-NEXT: v_pk_max_f16 v0, v0, v0
-; GFX11-NEXT: v_pk_max_f16 v17, v17, v17
-; GFX11-NEXT: v_pk_max_f16 v1, v1, v1
-; GFX11-NEXT: v_pk_max_f16 v18, v18, v18
-; GFX11-NEXT: v_pk_max_f16 v2, v2, v2
-; GFX11-NEXT: v_pk_max_f16 v19, v19, v19
-; GFX11-NEXT: v_pk_max_f16 v3, v3, v3
-; GFX11-NEXT: v_pk_max_f16 v20, v20, v20
-; GFX11-NEXT: v_pk_max_f16 v4, v4, v4
-; GFX11-NEXT: v_pk_max_f16 v21, v21, v21
-; GFX11-NEXT: v_pk_max_f16 v5, v5, v5
-; GFX11-NEXT: v_pk_max_f16 v22, v22, v22
-; GFX11-NEXT: v_pk_max_f16 v6, v6, v6
-; GFX11-NEXT: v_pk_max_f16 v23, v23, v23
-; GFX11-NEXT: v_pk_max_f16 v7, v7, v7
-; GFX11-NEXT: v_pk_max_f16 v24, v24, v24
-; GFX11-NEXT: v_pk_max_f16 v8, v8, v8
-; GFX11-NEXT: v_pk_max_f16 v25, v25, v25
-; GFX11-NEXT: v_pk_max_f16 v9, v9, v9
-; GFX11-NEXT: v_pk_max_f16 v26, v26, v26
-; GFX11-NEXT: v_pk_max_f16 v10, v10, v10
-; GFX11-NEXT: v_pk_max_f16 v27, v27, v27
-; GFX11-NEXT: v_pk_max_f16 v11, v11, v11
-; GFX11-NEXT: v_pk_max_f16 v28, v28, v28
-; GFX11-NEXT: v_pk_max_f16 v12, v12, v12
-; GFX11-NEXT: v_pk_max_f16 v29, v29, v29
-; GFX11-NEXT: v_pk_max_f16 v13, v13, v13
-; GFX11-NEXT: v_pk_max_f16 v30, v30, v30
-; GFX11-NEXT: v_pk_max_f16 v14, v14, v14
-; GFX11-NEXT: v_pk_max_f16 v15, v15, v15
-; GFX11-NEXT: v_pk_min_f16 v0, v0, v16
-; GFX11-NEXT: v_pk_min_f16 v1, v1, v17
-; GFX11-NEXT: v_pk_min_f16 v2, v2, v18
-; GFX11-NEXT: v_pk_min_f16 v3, v3, v19
-; GFX11-NEXT: v_pk_min_f16 v4, v4, v20
-; GFX11-NEXT: v_pk_min_f16 v5, v5, v21
-; GFX11-NEXT: v_pk_min_f16 v6, v6, v22
-; GFX11-NEXT: v_pk_min_f16 v7, v7, v23
-; GFX11-NEXT: v_pk_min_f16 v8, v8, v24
-; GFX11-NEXT: v_pk_min_f16 v9, v9, v25
-; GFX11-NEXT: v_pk_min_f16 v10, v10, v26
-; GFX11-NEXT: v_pk_min_f16 v11, v11, v27
-; GFX11-NEXT: v_pk_min_f16 v12, v12, v28
-; GFX11-NEXT: v_pk_min_f16 v13, v13, v29
-; GFX11-NEXT: v_pk_min_f16 v14, v14, v30
-; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_pk_max_f16 v16, v31, v31
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_pk_min_f16 v15, v15, v16
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v32f16:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: scratch_load_b32 v31, off, s32
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX1170-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX1170-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX1170-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX1170-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX1170-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX1170-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX1170-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX1170-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX1170-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX1170-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX1170-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX1170-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX1170-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX1170-NEXT: s_waitcnt vmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v15, v15, v31
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v32f16:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: scratch_load_b32 v31, off, s32
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX12-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX12-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX12-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX12-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX12-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX12-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX12-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX12-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX12-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX12-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX12-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX12-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX12-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v15, v15, v31
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v32f16:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: scratch_load_b32 v31, off, s32
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v16
-; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v17
-; GFX1251-NEXT: v_pk_min_num_f16 v2, v2, v18
-; GFX1251-NEXT: v_pk_min_num_f16 v3, v3, v19
-; GFX1251-NEXT: v_pk_min_num_f16 v4, v4, v20
-; GFX1251-NEXT: v_pk_min_num_f16 v5, v5, v21
-; GFX1251-NEXT: v_pk_min_num_f16 v6, v6, v22
-; GFX1251-NEXT: v_pk_min_num_f16 v7, v7, v23
-; GFX1251-NEXT: v_pk_min_num_f16 v8, v8, v24
-; GFX1251-NEXT: v_pk_min_num_f16 v9, v9, v25
-; GFX1251-NEXT: v_pk_min_num_f16 v10, v10, v26
-; GFX1251-NEXT: v_pk_min_num_f16 v11, v11, v27
-; GFX1251-NEXT: v_pk_min_num_f16 v12, v12, v28
-; GFX1251-NEXT: v_pk_min_num_f16 v13, v13, v29
-; GFX1251-NEXT: v_pk_min_num_f16 v14, v14, v30
-; GFX1251-NEXT: s_wait_loadcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v15, v15, v31
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call <32 x half> @llvm.minimumnum.v32f16(<32 x half> %x, <32 x half> %y)
- ret <32 x half> %result
+define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v6, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v4, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v5, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v5, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v5
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v2, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v2, v5
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v3, v3
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v2
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %result
}
-define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v2f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v2f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v3
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_min_f32_e32 v1, v1, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+define <4 x half> @v_minimumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v4f16_nnan:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v6, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v4f16_nnan:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v4f16_nnan:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v4f16_nnan:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v1, v3
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX9-LABEL: v_minimumnum_v2f32:
+; GFX9-LABEL: v_minimumnum_v4f16_nnan:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX9-NEXT: v_max_f32_e32 v2, v3, v3
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-LABEL: v_minimumnum_v2f32:
+; GFX10-LABEL: v_minimumnum_v4f16_nnan:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX10-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX10-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX10-NEXT: v_pk_min_f16 v1, v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-LABEL: v_minimumnum_v2f32:
+; GFX11-LABEL: v_minimumnum_v4f16_nnan:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-NEXT: v_dual_min_f32 v0, v0, v2 :: v_dual_min_f32 v1, v1, v3
+; GFX11-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v2f32:
+; GFX1170-LABEL: v_minimumnum_v4f16_nnan:
; GFX1170: ; %bb.0:
; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_minimumnum_v2f32:
+; GFX12-LABEL: v_minimumnum_v4f16_nnan:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_v2f32:
+; GFX1251-LABEL: v_minimumnum_v4f16_nnan:
; GFX1251: ; %bb.0:
; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
+ ret <4 x half> %result
+}
+
+define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v6, v6, v7
+; GFX7-SDAG-NEXT: v_min_f32_e32 v8, v8, v9
+; GFX7-SDAG-NEXT: v_min_f32_e32 v9, v10, v11
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v9
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v4
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v6, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v5
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v6, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v6, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v4
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v3
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v6, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v6, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v7, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v7, v8, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v5
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v7
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v6
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v6, v6, v7
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v3, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v3, v3, v7
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v7, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v7
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v6, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v3, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v4, v2
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v3
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v3
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v3
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v4, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v5, v5
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v3
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v5
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <6 x half> @llvm.minimumnum.v6f16(<6 x half> %x, <6 x half> %y)
+ ret <6 x half> %result
+}
+
+define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v12, 16, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v8, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v9, 16, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v13, 16, v5
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v15, 16, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_min_f32_e32 v11, v11, v12
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v8, v8, v9
+; GFX7-SDAG-NEXT: v_min_f32_e32 v12, v14, v12
+; GFX7-SDAG-NEXT: v_min_f32_e32 v10, v10, v13
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v7
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v6
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v8
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v11
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v5
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v8, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v13
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v6
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v5
+; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v14
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v3
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v7
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v6
+; GFX7-GISEL-NEXT: v_min_f32_e32 v6, v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v15
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v7
+; GFX7-GISEL-NEXT: v_min_f32_e32 v7, v8, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v5
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v6
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v7
+; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v8, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v8, v9, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v9, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v9, v10, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v10, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v10, v11, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v11, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v12, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v11, v12, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_e32 v3, v3, v7
+; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v6
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v5
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v11
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v10
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v8
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v8, v8, v9
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v4, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v4, v9
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v5, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v6, v6
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v5, v5, v9
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v6, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v7, v7
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v6, v6, v9
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v8, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v4, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v5, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v6, v3
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_min_f16 v3, v3, v4
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX900-GISEL-NEXT: v_pk_min_f16 v3, v3, v4
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_min_f16 v3, v3, v4
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v5, v5
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v6, v6
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v7, v7
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_min_f16 v3, v3, v4
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v5
+; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v6
+; GFX10-SDAG-NEXT: v_pk_min_f16 v3, v3, v7
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v5
+; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v6
+; GFX10-GISEL-NEXT: v_pk_min_f16 v3, v3, v7
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v5
+; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v6
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-SDAG-NEXT: v_pk_min_f16 v3, v3, v7
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v4
+; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v5
+; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v6
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-GISEL-NEXT: v_pk_min_f16 v3, v3, v7
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> %x, <8 x half> %y)
+ ret <8 x half> %result
+}
+
+define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v16, 16, v15
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v18, 16, v14
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v13
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v5
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v12
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_min_f32_e32 v16, v17, v16
+; GFX7-SDAG-NEXT: v_min_f32_e32 v17, v19, v18
+; GFX7-SDAG-NEXT: v_min_f32_e32 v18, v21, v20
+; GFX7-SDAG-NEXT: v_min_f32_e32 v19, v23, v22
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v20, 16, v11
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v21, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v10
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v24, 16, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v20, v21, v20
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-SDAG-NEXT: v_min_f32_e32 v21, v23, v22
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v22, 16, v9
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v22, v23, v22
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v23, 16, v8
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v23, v24, v23
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v23
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v9
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v22
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v8
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v21
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v5, v13
+; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v11
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v9
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v18
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v20
+; GFX7-SDAG-NEXT: v_min_f32_e32 v7, v7, v15
+; GFX7-SDAG-NEXT: v_min_f32_e32 v6, v6, v14
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v12
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v19
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v10
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v9
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v9, 16, v11
+; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v10
+; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v9
+; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v8
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v9
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-GISEL-NEXT: v_min_f32_e32 v8, v17, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_min_f32_e32 v16, v16, v18
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-GISEL-NEXT: v_min_f32_e32 v9, v17, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v4
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v11
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_min_f32_e32 v10, v17, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v5
+; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v4, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v13
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-GISEL-NEXT: v_min_f32_e32 v11, v17, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v5, v13
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v7
+; GFX7-GISEL-NEXT: v_min_f32_e32 v12, v17, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v15
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-GISEL-NEXT: v_min_f32_e32 v6, v6, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v15
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-GISEL-NEXT: v_min_f32_e32 v13, v19, v13
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-GISEL-NEXT: v_min_f32_e32 v7, v7, v14
+; GFX7-GISEL-NEXT: v_min_f32_e32 v14, v15, v17
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v2, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v10
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v3, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v11
+; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v4, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v12
+; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v5, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v13
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v16
+; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v6, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v14
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v7, v8
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v16, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v16, v17, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v17, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v17, v18, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v18, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v18, v19, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v19, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v19, v20, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v20, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v20, v21, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v21, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v21, v22, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v22, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v22, v23, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v23, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v24, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v23, v24, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_e32 v7, v7, v15
+; GFX8-SDAG-NEXT: v_min_f16_e32 v6, v6, v14
+; GFX8-SDAG-NEXT: v_min_f16_e32 v5, v5, v13
+; GFX8-SDAG-NEXT: v_min_f16_e32 v4, v4, v12
+; GFX8-SDAG-NEXT: v_min_f16_e32 v3, v3, v11
+; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v10
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v9
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v8
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v23
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v22
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v21
+; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v20
+; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v19
+; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v18
+; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v17
+; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v16
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v8, v8
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v16, v16, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v8, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v9, v9
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v8, v8, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v9, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v10, v10
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v9, v9, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v10, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v11, v11
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v10, v10, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v3, v3, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v11, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v12, v12
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v11, v11, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v4, v4, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v12, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v13, v13
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v12, v12, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v5, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v13, v6, v6
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v14, v14
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v13, v13, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v6, v6, v14 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v14, v7, v7
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v15, v15
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v14, v14, v17
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v7, v7, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v16, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v8, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v9, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v10, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v11, v4
+; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v12, v5
+; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v13, v6
+; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v14, v7
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-SDAG-NEXT: v_pk_min_f16 v4, v4, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-SDAG-NEXT: v_pk_min_f16 v5, v5, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-SDAG-NEXT: v_pk_min_f16 v6, v6, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-SDAG-NEXT: v_pk_min_f16 v7, v7, v8
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX900-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX900-GISEL-NEXT: v_pk_min_f16 v4, v4, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX900-GISEL-NEXT: v_pk_min_f16 v5, v5, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX900-GISEL-NEXT: v_pk_min_f16 v6, v6, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX900-GISEL-NEXT: v_pk_min_f16 v7, v7, v8
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-SDAG-NEXT: v_pk_min_f16 v4, v4, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-SDAG-NEXT: v_pk_min_f16 v5, v5, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-SDAG-NEXT: v_pk_min_f16 v6, v6, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_min_f16 v7, v7, v8
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v9, v9
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v10, v10
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v12, v12
+; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-GISEL-NEXT: v_pk_min_f16 v4, v4, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v13, v13
+; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-GISEL-NEXT: v_pk_min_f16 v5, v5, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v14, v14
+; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-GISEL-NEXT: v_pk_min_f16 v6, v6, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v15, v15
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_min_f16 v7, v7, v8
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v9
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v10
+; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX10-SDAG-NEXT: v_pk_min_f16 v4, v4, v9
+; GFX10-SDAG-NEXT: v_pk_min_f16 v5, v5, v10
+; GFX10-SDAG-NEXT: v_pk_min_f16 v6, v6, v11
+; GFX10-SDAG-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v9
+; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v10
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX10-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX10-GISEL-NEXT: v_pk_min_f16 v4, v4, v9
+; GFX10-GISEL-NEXT: v_pk_min_f16 v5, v5, v10
+; GFX10-GISEL-NEXT: v_pk_min_f16 v6, v6, v11
+; GFX10-GISEL-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v9
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v10
+; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-SDAG-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX11-SDAG-NEXT: v_pk_min_f16 v4, v4, v9
+; GFX11-SDAG-NEXT: v_pk_min_f16 v5, v5, v10
+; GFX11-SDAG-NEXT: v_pk_min_f16 v6, v6, v11
+; GFX11-SDAG-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v8
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v9
+; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v11, v11
+; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v10
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v12, v12
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v13, v13
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v14, v14
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v15, v15
+; GFX11-GISEL-NEXT: v_pk_min_f16 v3, v3, v8
+; GFX11-GISEL-NEXT: v_pk_min_f16 v4, v4, v9
+; GFX11-GISEL-NEXT: v_pk_min_f16 v5, v5, v10
+; GFX11-GISEL-NEXT: v_pk_min_f16 v6, v6, v11
+; GFX11-GISEL-NEXT: v_pk_min_f16 v7, v7, v12
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v8
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v9
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v10
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v8
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v9
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v10
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v11
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v12
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v13
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v14
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v15
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v8
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v9
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v10
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <16 x half> @llvm.minimumnum.v16f16(<16 x half> %x, <16 x half> %y)
+ ret <16 x half> %result
+}
+
+define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX7-SDAG-NEXT: buffer_load_dword v49, off, s[0:3], s32
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v31, 16, v30
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v32, 16, v14
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v28
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v36, 16, v12
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v37, 16, v27
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v38, 16, v11
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v39, 16, v26
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v48, 16, v10
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v25
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v9
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v24
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v8
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v23
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v31, v31
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v32, v32
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v33, v33
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v34, v34
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v36, v36
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v37, v37
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v38, v38
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v39, v39
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v48, v48
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-SDAG-NEXT: v_min_f32_e32 v31, v32, v31
+; GFX7-SDAG-NEXT: v_min_f32_e32 v33, v34, v33
+; GFX7-SDAG-NEXT: v_min_f32_e32 v32, v36, v35
+; GFX7-SDAG-NEXT: v_min_f32_e32 v34, v38, v37
+; GFX7-SDAG-NEXT: v_min_f32_e32 v36, v48, v39
+; GFX7-SDAG-NEXT: v_min_f32_e32 v37, v51, v50
+; GFX7-SDAG-NEXT: v_min_f32_e32 v38, v53, v52
+; GFX7-SDAG-NEXT: v_min_f32_e32 v39, v55, v54
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v50, 16, v20
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v51, 16, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v52, 16, v19
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v3
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v18
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v50, v50
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v51, v51
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v52, v52
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-SDAG-NEXT: v_min_f32_e32 v50, v51, v50
+; GFX7-SDAG-NEXT: v_min_f32_e32 v51, v53, v52
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v53, 16, v17
+; GFX7-SDAG-NEXT: v_min_f32_e32 v52, v55, v54
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v53, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v54, v54
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v40, 16, v22
+; GFX7-SDAG-NEXT: v_min_f32_e32 v53, v54, v53
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v6
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v53
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v40, v40
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v43, 16, v21
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v44, 16, v5
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v42, 16, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v43, v43
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v44, v44
+; GFX7-SDAG-NEXT: v_min_f32_e32 v48, v41, v40
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v55, 16, v16
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v35, 16, v49
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v41, 16, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v19
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v51
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v42, v42
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v35, v35
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v55, v55
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v41, v41
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-SDAG-NEXT: v_min_f32_e32 v40, v44, v43
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_min_f32_e32 v35, v42, v35
+; GFX7-SDAG-NEXT: v_min_f32_e32 v54, v41, v55
+; GFX7-SDAG-NEXT: v_or_b32_e32 v3, v3, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v40
+; GFX7-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v18
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v54
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v52
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v5, v21
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v20
+; GFX7-SDAG-NEXT: v_or_b32_e32 v2, v2, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v50
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_min_f32_e32 v7, v7, v23
+; GFX7-SDAG-NEXT: v_min_f32_e32 v6, v6, v22
+; GFX7-SDAG-NEXT: v_or_b32_e32 v4, v4, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v48
+; GFX7-SDAG-NEXT: v_or_b32_e32 v5, v5, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v39
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v25, v25
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_min_f32_e32 v9, v9, v25
+; GFX7-SDAG-NEXT: v_min_f32_e32 v8, v8, v24
+; GFX7-SDAG-NEXT: v_or_b32_e32 v6, v6, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v38
+; GFX7-SDAG-NEXT: v_or_b32_e32 v7, v7, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v37
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v27, v27
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v26, v26
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_min_f32_e32 v11, v11, v27
+; GFX7-SDAG-NEXT: v_min_f32_e32 v10, v10, v26
+; GFX7-SDAG-NEXT: v_or_b32_e32 v8, v8, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v36
+; GFX7-SDAG-NEXT: v_or_b32_e32 v9, v9, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v34
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v49, v49
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v29, v29
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v28, v28
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_min_f32_e32 v15, v15, v49
+; GFX7-SDAG-NEXT: v_min_f32_e32 v14, v14, v30
+; GFX7-SDAG-NEXT: v_min_f32_e32 v13, v13, v29
+; GFX7-SDAG-NEXT: v_min_f32_e32 v12, v12, v28
+; GFX7-SDAG-NEXT: v_or_b32_e32 v10, v10, v16
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v35
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v18, v33
+; GFX7-SDAG-NEXT: v_or_b32_e32 v11, v11, v17
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v17, v31
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v19, v32
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v15, v15
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v18, 16, v18
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; GFX7-SDAG-NEXT: v_or_b32_e32 v12, v12, v19
+; GFX7-SDAG-NEXT: v_or_b32_e32 v13, v13, v18
+; GFX7-SDAG-NEXT: v_or_b32_e32 v14, v14, v17
+; GFX7-SDAG-NEXT: v_or_b32_e32 v15, v15, v16
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v31, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v16
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v0, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v16, 16, v16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v16, v16
+; GFX7-GISEL-NEXT: v_min_f32_e32 v31, v31, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v17
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v17, 16, v17
+; GFX7-GISEL-NEXT: v_min_f32_e32 v16, v0, v16
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v17
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v18
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v18, 16, v18
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v17
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v17, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v18, v18
+; GFX7-GISEL-NEXT: v_min_f32_e32 v17, v17, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v19
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v19, 16, v19
+; GFX7-GISEL-NEXT: v_min_f32_e32 v18, v2, v18
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v3
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v19
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v20
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v20, 16, v20
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v19
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v19, v4
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v20, v20
+; GFX7-GISEL-NEXT: v_min_f32_e32 v19, v19, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v21
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v21, 16, v21
+; GFX7-GISEL-NEXT: v_min_f32_e32 v20, v4, v20
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v5
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v5, 16, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v21
+; GFX7-GISEL-NEXT: v_min_f32_e32 v4, v4, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v22
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v22, 16, v22
+; GFX7-GISEL-NEXT: v_min_f32_e32 v5, v5, v21
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v21, v6
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v22
+; GFX7-GISEL-NEXT: v_min_f32_e32 v21, v21, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v23
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; GFX7-GISEL-NEXT: v_min_f32_e32 v6, v6, v22
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v22, v7
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v23
+; GFX7-GISEL-NEXT: v_min_f32_e32 v22, v22, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v24
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v24, 16, v24
+; GFX7-GISEL-NEXT: v_min_f32_e32 v7, v7, v23
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v23, v8
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v8, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v8, v8
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v24
+; GFX7-GISEL-NEXT: v_min_f32_e32 v23, v23, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v25
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v25, 16, v25
+; GFX7-GISEL-NEXT: v_min_f32_e32 v8, v8, v24
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v24, v9
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v9, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v9, v9
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v25
+; GFX7-GISEL-NEXT: v_min_f32_e32 v24, v24, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v26
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v26, 16, v26
+; GFX7-GISEL-NEXT: v_min_f32_e32 v9, v9, v25
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v25, v10
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v10, 16, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v10, v10
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v26
+; GFX7-GISEL-NEXT: v_min_f32_e32 v25, v25, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v27
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v27, 16, v27
+; GFX7-GISEL-NEXT: v_min_f32_e32 v10, v10, v26
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v26, v11
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v11, 16, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v11, v11
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v27
+; GFX7-GISEL-NEXT: v_min_f32_e32 v26, v26, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v28
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v28, 16, v28
+; GFX7-GISEL-NEXT: v_min_f32_e32 v11, v11, v27
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v27, v12
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v12, v12
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v28
+; GFX7-GISEL-NEXT: v_min_f32_e32 v27, v27, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v29
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v29, 16, v29
+; GFX7-GISEL-NEXT: v_min_f32_e32 v12, v12, v28
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v28, v13
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v13, v13
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v29
+; GFX7-GISEL-NEXT: v_min_f32_e32 v28, v28, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v30
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; GFX7-GISEL-NEXT: v_min_f32_e32 v13, v13, v29
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v29, v14
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v14, 16, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v14, v14
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-GISEL-NEXT: v_min_f32_e32 v29, v29, v32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v32, v15
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v15, 16, v15
+; GFX7-GISEL-NEXT: v_min_f32_e32 v14, v14, v30
+; GFX7-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v15, v15
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v17
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v6, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v7, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v8, v8
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v9, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v10, v10
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v11, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v12, v12
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v13, v13
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v14, v14
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v33, v30
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v30, v30
+; GFX7-GISEL-NEXT: v_min_f32_e32 v32, v32, v33
+; GFX7-GISEL-NEXT: v_min_f32_e32 v15, v15, v30
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v30, v31
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v31, v0
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v0, 16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v18
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v15, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v30, v0
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v20
+; GFX7-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v19
+; GFX7-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v4
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v4, 16, v16
+; GFX7-GISEL-NEXT: v_or_b32_e32 v4, v17, v4
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v21
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v22
+; GFX7-GISEL-NEXT: v_or_b32_e32 v5, v18, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v18, v29
+; GFX7-GISEL-NEXT: v_or_b32_e32 v6, v16, v6
+; GFX7-GISEL-NEXT: v_or_b32_e32 v7, v17, v7
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v23
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v24
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v19, v32
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v8, v16, v8
+; GFX7-GISEL-NEXT: v_or_b32_e32 v9, v17, v9
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v25
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v26
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v31, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v14, v18, v14
+; GFX7-GISEL-NEXT: v_or_b32_e32 v10, v16, v10
+; GFX7-GISEL-NEXT: v_or_b32_e32 v11, v17, v11
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v16, v27
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v17, v28
+; GFX7-GISEL-NEXT: v_or_b32_e32 v15, v19, v15
+; GFX7-GISEL-NEXT: v_or_b32_e32 v12, v16, v12
+; GFX7-GISEL-NEXT: v_or_b32_e32 v13, v17, v13
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v38, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v39, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v48, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v49, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v50, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v51, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v40, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v41, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v58, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v59, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v17, v17, v17
+; GFX8-SDAG-NEXT: v_max_f16_e32 v1, v1, v1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v52, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v53, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v54, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v55, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v42, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v43, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v44, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v45, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v46, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v47, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v56, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v57, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v38, v39, v38 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v39, v49, v48 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v48, v51, v50 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v51, v41, v40 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v40, v59, v58 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v17
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v49, v53, v52 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v50, v55, v54 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v52, v43, v42 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v53, v45, v44 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v54, v47, v46 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v55, v57, v56 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v40
+; GFX8-SDAG-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v32, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v34, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v36, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v32, v33, v32 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v33, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v34, v35, v34 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v36, v37, v36 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v37, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v15, v15, v15
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v33, v35, v33 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_max_f16_e32 v30, v30, v30
+; GFX8-SDAG-NEXT: v_max_f16_e32 v14, v14, v14
+; GFX8-SDAG-NEXT: v_max_f16_e32 v29, v29, v29
+; GFX8-SDAG-NEXT: v_max_f16_e32 v13, v13, v13
+; GFX8-SDAG-NEXT: v_max_f16_e32 v28, v28, v28
+; GFX8-SDAG-NEXT: v_max_f16_e32 v12, v12, v12
+; GFX8-SDAG-NEXT: v_max_f16_e32 v27, v27, v27
+; GFX8-SDAG-NEXT: v_max_f16_e32 v11, v11, v11
+; GFX8-SDAG-NEXT: v_max_f16_e32 v26, v26, v26
+; GFX8-SDAG-NEXT: v_max_f16_e32 v10, v10, v10
+; GFX8-SDAG-NEXT: v_max_f16_e32 v25, v25, v25
+; GFX8-SDAG-NEXT: v_max_f16_e32 v9, v9, v9
+; GFX8-SDAG-NEXT: v_max_f16_e32 v24, v24, v24
+; GFX8-SDAG-NEXT: v_max_f16_e32 v8, v8, v8
+; GFX8-SDAG-NEXT: v_max_f16_e32 v23, v23, v23
+; GFX8-SDAG-NEXT: v_max_f16_e32 v7, v7, v7
+; GFX8-SDAG-NEXT: v_max_f16_e32 v22, v22, v22
+; GFX8-SDAG-NEXT: v_max_f16_e32 v6, v6, v6
+; GFX8-SDAG-NEXT: v_max_f16_e32 v21, v21, v21
+; GFX8-SDAG-NEXT: v_max_f16_e32 v5, v5, v5
+; GFX8-SDAG-NEXT: v_max_f16_e32 v20, v20, v20
+; GFX8-SDAG-NEXT: v_max_f16_e32 v4, v4, v4
+; GFX8-SDAG-NEXT: v_max_f16_e32 v19, v19, v19
+; GFX8-SDAG-NEXT: v_max_f16_e32 v3, v3, v3
+; GFX8-SDAG-NEXT: v_max_f16_e32 v18, v18, v18
+; GFX8-SDAG-NEXT: v_max_f16_e32 v2, v2, v2
+; GFX8-SDAG-NEXT: v_max_f16_e32 v16, v16, v16
+; GFX8-SDAG-NEXT: v_max_f16_e32 v0, v0, v0
+; GFX8-SDAG-NEXT: v_min_f16_e32 v14, v14, v30
+; GFX8-SDAG-NEXT: v_min_f16_e32 v13, v13, v29
+; GFX8-SDAG-NEXT: v_min_f16_e32 v12, v12, v28
+; GFX8-SDAG-NEXT: v_min_f16_e32 v11, v11, v27
+; GFX8-SDAG-NEXT: v_min_f16_e32 v10, v10, v26
+; GFX8-SDAG-NEXT: v_min_f16_e32 v9, v9, v25
+; GFX8-SDAG-NEXT: v_min_f16_e32 v8, v8, v24
+; GFX8-SDAG-NEXT: v_min_f16_e32 v7, v7, v23
+; GFX8-SDAG-NEXT: v_min_f16_e32 v6, v6, v22
+; GFX8-SDAG-NEXT: v_min_f16_e32 v5, v5, v21
+; GFX8-SDAG-NEXT: v_min_f16_e32 v4, v4, v20
+; GFX8-SDAG-NEXT: v_min_f16_e32 v3, v3, v19
+; GFX8-SDAG-NEXT: v_min_f16_e32 v2, v2, v18
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v16
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v33
+; GFX8-SDAG-NEXT: v_or_b32_e32 v2, v2, v55
+; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v3, v54
+; GFX8-SDAG-NEXT: v_or_b32_e32 v4, v4, v53
+; GFX8-SDAG-NEXT: v_or_b32_e32 v5, v5, v52
+; GFX8-SDAG-NEXT: v_or_b32_e32 v6, v6, v51
+; GFX8-SDAG-NEXT: v_or_b32_e32 v7, v7, v50
+; GFX8-SDAG-NEXT: v_or_b32_e32 v8, v8, v49
+; GFX8-SDAG-NEXT: v_or_b32_e32 v9, v9, v48
+; GFX8-SDAG-NEXT: v_or_b32_e32 v10, v10, v39
+; GFX8-SDAG-NEXT: v_or_b32_e32 v11, v11, v38
+; GFX8-SDAG-NEXT: v_or_b32_e32 v12, v12, v36
+; GFX8-SDAG-NEXT: v_or_b32_e32 v13, v13, v34
+; GFX8-SDAG-NEXT: v_or_b32_e32 v14, v14, v32
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f16_sdwa v35, v31, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_max_f16_e32 v31, v31, v31
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v35, v37, v35 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-SDAG-NEXT: v_min_f16_e32 v15, v15, v31
+; GFX8-SDAG-NEXT: v_or_b32_e32 v15, v15, v35
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v31, v0, v0
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v16, v16
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v0, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v16, v16, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v31, v31, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v16, v1, v1
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v17, v17
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v1, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v17, v17, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v16, v16, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v17, v2, v2
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v18, v18
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v2, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v18, v18, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v17, v17, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v2, v2, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v18, v3, v3
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v19, v19
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v3, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v19, v19, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v18, v18, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v3, v3, v19 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v19, v4, v4
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v20, v20
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v4, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v20, v20, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v19, v19, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v4, v4, v20 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v20, v5, v5
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v21, v21
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v5, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v21, v21, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v20, v20, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v5, v5, v21 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v21, v6, v6
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v22, v22
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v6, v6, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v22, v22, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v21, v21, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v6, v6, v22 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v22, v7, v7
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v23, v23
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v7, v7, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v23, v23, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v22, v22, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v7, v7, v23 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v23, v8, v8
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v24, v24
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v8, v8, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v24, v24, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v23, v23, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v8, v8, v24 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v24, v9, v9
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v25, v25
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v9, v9, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v25, v25, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v24, v24, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v9, v9, v25 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v25, v10, v10
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v26, v26
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v10, v10, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v26, v26, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v25, v25, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v10, v10, v26 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v26, v11, v11
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v27, v27
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v11, v11, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v27, v27, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v26, v26, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v27, v12, v12
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v28, v28
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v12, v12, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v28, v28, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v27, v27, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v12, v12, v28 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v28, v13, v13
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v29, v29
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v13, v13, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v29, v29, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v28, v28, v32
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v13, v13, v29 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_max_f16_e32 v29, v14, v14
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v30, v30
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v14, v14, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v14, v14, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: buffer_load_dword v30, off, s[0:3], s32
+; GFX8-GISEL-NEXT: v_min_f16_e32 v29, v29, v32
+; GFX8-GISEL-NEXT: v_max_f16_e32 v32, v15, v15
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v15, v15, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v31, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v16, v1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v2, v17, v2
+; GFX8-GISEL-NEXT: v_or_b32_e32 v3, v18, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v4, v19, v4
+; GFX8-GISEL-NEXT: v_or_b32_e32 v5, v20, v5
+; GFX8-GISEL-NEXT: v_or_b32_e32 v6, v21, v6
+; GFX8-GISEL-NEXT: v_or_b32_e32 v7, v22, v7
+; GFX8-GISEL-NEXT: v_or_b32_e32 v8, v23, v8
+; GFX8-GISEL-NEXT: v_or_b32_e32 v9, v24, v9
+; GFX8-GISEL-NEXT: v_or_b32_e32 v10, v25, v10
+; GFX8-GISEL-NEXT: v_or_b32_e32 v11, v26, v11
+; GFX8-GISEL-NEXT: v_or_b32_e32 v12, v27, v12
+; GFX8-GISEL-NEXT: v_or_b32_e32 v13, v28, v13
+; GFX8-GISEL-NEXT: v_or_b32_e32 v14, v29, v14
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f16_e32 v33, v30, v30
+; GFX8-GISEL-NEXT: v_max_f16_sdwa v30, v30, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v32, v32, v33
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v15, v15, v30 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_e32 v15, v32, v15
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v17, v17
+; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v18, v18
+; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-SDAG-NEXT: v_pk_min_f16 v2, v2, v16
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v19, v19
+; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-SDAG-NEXT: v_pk_min_f16 v3, v3, v16
+; GFX900-SDAG-NEXT: buffer_load_dword v16, off, s[0:3], s32
+; GFX900-SDAG-NEXT: v_pk_max_f16 v17, v20, v20
+; GFX900-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-SDAG-NEXT: v_pk_max_f16 v18, v21, v21
+; GFX900-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-SDAG-NEXT: v_pk_max_f16 v19, v22, v22
+; GFX900-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-SDAG-NEXT: v_pk_max_f16 v20, v23, v23
+; GFX900-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-SDAG-NEXT: v_pk_max_f16 v21, v24, v24
+; GFX900-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-SDAG-NEXT: v_pk_max_f16 v22, v25, v25
+; GFX900-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX900-SDAG-NEXT: v_pk_max_f16 v23, v26, v26
+; GFX900-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX900-SDAG-NEXT: v_pk_max_f16 v24, v27, v27
+; GFX900-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX900-SDAG-NEXT: v_pk_max_f16 v25, v28, v28
+; GFX900-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX900-SDAG-NEXT: v_pk_max_f16 v26, v29, v29
+; GFX900-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX900-SDAG-NEXT: v_pk_max_f16 v27, v30, v30
+; GFX900-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX900-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX900-SDAG-NEXT: v_pk_min_f16 v4, v4, v17
+; GFX900-SDAG-NEXT: v_pk_min_f16 v5, v5, v18
+; GFX900-SDAG-NEXT: v_pk_min_f16 v6, v6, v19
+; GFX900-SDAG-NEXT: v_pk_min_f16 v7, v7, v20
+; GFX900-SDAG-NEXT: v_pk_min_f16 v8, v8, v21
+; GFX900-SDAG-NEXT: v_pk_min_f16 v9, v9, v22
+; GFX900-SDAG-NEXT: v_pk_min_f16 v10, v10, v23
+; GFX900-SDAG-NEXT: v_pk_min_f16 v11, v11, v24
+; GFX900-SDAG-NEXT: v_pk_min_f16 v12, v12, v25
+; GFX900-SDAG-NEXT: v_pk_min_f16 v13, v13, v26
+; GFX900-SDAG-NEXT: v_pk_min_f16 v14, v14, v27
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX900-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v17, v17
+; GFX900-GISEL-NEXT: v_pk_min_f16 v1, v1, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v18, v18
+; GFX900-GISEL-NEXT: v_pk_min_f16 v2, v2, v16
+; GFX900-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v19, v19
+; GFX900-GISEL-NEXT: v_pk_min_f16 v3, v3, v16
+; GFX900-GISEL-NEXT: buffer_load_dword v16, off, s[0:3], s32
+; GFX900-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX900-GISEL-NEXT: v_pk_max_f16 v17, v20, v20
+; GFX900-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX900-GISEL-NEXT: v_pk_max_f16 v18, v21, v21
+; GFX900-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX900-GISEL-NEXT: v_pk_max_f16 v19, v22, v22
+; GFX900-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX900-GISEL-NEXT: v_pk_max_f16 v20, v23, v23
+; GFX900-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX900-GISEL-NEXT: v_pk_max_f16 v21, v24, v24
+; GFX900-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX900-GISEL-NEXT: v_pk_max_f16 v22, v25, v25
+; GFX900-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX900-GISEL-NEXT: v_pk_max_f16 v23, v26, v26
+; GFX900-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX900-GISEL-NEXT: v_pk_max_f16 v24, v27, v27
+; GFX900-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX900-GISEL-NEXT: v_pk_max_f16 v25, v28, v28
+; GFX900-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX900-GISEL-NEXT: v_pk_max_f16 v26, v29, v29
+; GFX900-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX900-GISEL-NEXT: v_pk_max_f16 v27, v30, v30
+; GFX900-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX900-GISEL-NEXT: v_pk_min_f16 v4, v4, v17
+; GFX900-GISEL-NEXT: v_pk_min_f16 v5, v5, v18
+; GFX900-GISEL-NEXT: v_pk_min_f16 v6, v6, v19
+; GFX900-GISEL-NEXT: v_pk_min_f16 v7, v7, v20
+; GFX900-GISEL-NEXT: v_pk_min_f16 v8, v8, v21
+; GFX900-GISEL-NEXT: v_pk_min_f16 v9, v9, v22
+; GFX900-GISEL-NEXT: v_pk_min_f16 v10, v10, v23
+; GFX900-GISEL-NEXT: v_pk_min_f16 v11, v11, v24
+; GFX900-GISEL-NEXT: v_pk_min_f16 v12, v12, v25
+; GFX900-GISEL-NEXT: v_pk_min_f16 v13, v13, v26
+; GFX900-GISEL-NEXT: v_pk_min_f16 v14, v14, v27
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX900-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX900-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: scratch_load_dword v31, off, s32
+; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX950-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX950-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX950-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX950-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX950-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX950-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX950-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX950-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX950-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX950-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX950-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX950-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX950-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX950-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX950-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX950-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX950-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX950-SDAG-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX950-SDAG-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX950-SDAG-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX950-SDAG-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX950-SDAG-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX950-SDAG-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX950-SDAG-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX950-SDAG-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX950-SDAG-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX950-SDAG-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX950-SDAG-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX950-SDAG-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX950-SDAG-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX950-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX950-SDAG-NEXT: s_nop 0
+; GFX950-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: scratch_load_dword v31, off, s32
+; GFX950-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX950-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX950-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX950-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX950-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX950-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX950-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX950-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX950-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX950-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX950-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX950-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX950-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX950-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX950-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX950-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX950-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX950-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX950-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX950-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX950-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX950-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX950-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX950-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX950-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX950-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX950-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX950-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX950-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX950-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX950-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX950-GISEL-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX950-GISEL-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX950-GISEL-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX950-GISEL-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX950-GISEL-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX950-GISEL-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX950-GISEL-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX950-GISEL-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX950-GISEL-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX950-GISEL-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX950-GISEL-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX950-GISEL-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX950-GISEL-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX950-GISEL-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX950-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX950-GISEL-NEXT: s_nop 0
+; GFX950-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX10-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX10-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX10-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX10-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX10-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX10-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX10-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX10-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX10-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX10-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX10-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX10-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX10-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX10-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX10-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX10-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX10-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX10-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX10-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX10-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX10-SDAG-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX10-SDAG-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX10-SDAG-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX10-SDAG-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX10-SDAG-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX10-SDAG-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX10-SDAG-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX10-SDAG-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX10-SDAG-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX10-SDAG-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX10-SDAG-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX10-SDAG-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX10-SDAG-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX10-SDAG-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX10-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX10-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX10-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX10-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX10-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX10-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX10-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX10-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX10-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX10-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX10-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX10-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX10-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX10-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX10-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX10-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX10-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX10-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX10-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX10-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX10-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX10-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX10-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX10-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX10-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX10-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX10-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX10-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX10-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX10-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX10-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX10-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX10-GISEL-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX10-GISEL-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX10-GISEL-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX10-GISEL-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX10-GISEL-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX10-GISEL-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX10-GISEL-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX10-GISEL-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX10-GISEL-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX10-GISEL-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX10-GISEL-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX10-GISEL-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX10-GISEL-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX10-GISEL-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX10-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX10-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX11-SDAG-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-SDAG-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX11-SDAG-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-SDAG-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX11-SDAG-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-SDAG-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX11-SDAG-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-SDAG-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX11-SDAG-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-SDAG-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX11-SDAG-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-SDAG-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX11-SDAG-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-SDAG-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX11-SDAG-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-SDAG-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX11-SDAG-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-SDAG-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX11-SDAG-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-SDAG-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX11-SDAG-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-SDAG-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX11-SDAG-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX11-SDAG-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX11-SDAG-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX11-SDAG-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX11-SDAG-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX11-SDAG-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX11-SDAG-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX11-SDAG-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX11-SDAG-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX11-SDAG-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX11-SDAG-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX11-SDAG-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX11-SDAG-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX11-SDAG-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX11-SDAG-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX11-SDAG-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX11-SDAG-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX11-SDAG-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX11-SDAG-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX11-SDAG-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX11-SDAG-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX11-SDAG-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX11-SDAG-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX11-SDAG-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-GISEL-NEXT: v_pk_max_f16 v0, v0, v0
+; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v16, v16
+; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v1
+; GFX11-GISEL-NEXT: v_pk_max_f16 v17, v17, v17
+; GFX11-GISEL-NEXT: v_pk_max_f16 v2, v2, v2
+; GFX11-GISEL-NEXT: v_pk_max_f16 v18, v18, v18
+; GFX11-GISEL-NEXT: v_pk_max_f16 v3, v3, v3
+; GFX11-GISEL-NEXT: v_pk_max_f16 v19, v19, v19
+; GFX11-GISEL-NEXT: v_pk_max_f16 v4, v4, v4
+; GFX11-GISEL-NEXT: v_pk_max_f16 v20, v20, v20
+; GFX11-GISEL-NEXT: v_pk_max_f16 v5, v5, v5
+; GFX11-GISEL-NEXT: v_pk_max_f16 v21, v21, v21
+; GFX11-GISEL-NEXT: v_pk_max_f16 v6, v6, v6
+; GFX11-GISEL-NEXT: v_pk_max_f16 v22, v22, v22
+; GFX11-GISEL-NEXT: v_pk_max_f16 v7, v7, v7
+; GFX11-GISEL-NEXT: v_pk_max_f16 v23, v23, v23
+; GFX11-GISEL-NEXT: v_pk_max_f16 v8, v8, v8
+; GFX11-GISEL-NEXT: v_pk_max_f16 v24, v24, v24
+; GFX11-GISEL-NEXT: v_pk_max_f16 v9, v9, v9
+; GFX11-GISEL-NEXT: v_pk_max_f16 v25, v25, v25
+; GFX11-GISEL-NEXT: v_pk_max_f16 v10, v10, v10
+; GFX11-GISEL-NEXT: v_pk_max_f16 v26, v26, v26
+; GFX11-GISEL-NEXT: v_pk_max_f16 v11, v11, v11
+; GFX11-GISEL-NEXT: v_pk_max_f16 v27, v27, v27
+; GFX11-GISEL-NEXT: v_pk_max_f16 v12, v12, v12
+; GFX11-GISEL-NEXT: v_pk_max_f16 v28, v28, v28
+; GFX11-GISEL-NEXT: v_pk_max_f16 v13, v13, v13
+; GFX11-GISEL-NEXT: v_pk_max_f16 v29, v29, v29
+; GFX11-GISEL-NEXT: v_pk_max_f16 v14, v14, v14
+; GFX11-GISEL-NEXT: v_pk_max_f16 v30, v30, v30
+; GFX11-GISEL-NEXT: v_pk_max_f16 v15, v15, v15
+; GFX11-GISEL-NEXT: v_pk_min_f16 v0, v0, v16
+; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v17
+; GFX11-GISEL-NEXT: v_pk_min_f16 v2, v2, v18
+; GFX11-GISEL-NEXT: v_pk_min_f16 v3, v3, v19
+; GFX11-GISEL-NEXT: v_pk_min_f16 v4, v4, v20
+; GFX11-GISEL-NEXT: v_pk_min_f16 v5, v5, v21
+; GFX11-GISEL-NEXT: v_pk_min_f16 v6, v6, v22
+; GFX11-GISEL-NEXT: v_pk_min_f16 v7, v7, v23
+; GFX11-GISEL-NEXT: v_pk_min_f16 v8, v8, v24
+; GFX11-GISEL-NEXT: v_pk_min_f16 v9, v9, v25
+; GFX11-GISEL-NEXT: v_pk_min_f16 v10, v10, v26
+; GFX11-GISEL-NEXT: v_pk_min_f16 v11, v11, v27
+; GFX11-GISEL-NEXT: v_pk_min_f16 v12, v12, v28
+; GFX11-GISEL-NEXT: v_pk_min_f16 v13, v13, v29
+; GFX11-GISEL-NEXT: v_pk_min_f16 v14, v14, v30
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX11-GISEL-NEXT: v_pk_max_f16 v16, v31, v31
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_pk_min_f16 v15, v15, v16
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v31
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32 nv
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call <32 x half> @llvm.minimumnum.v32f16(<32 x half> %x, <32 x half> %y)
+ ret <32 x half> %result
+}
+
+define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v3
+; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v3, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v3, v3
+; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v1, v2
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX10-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX10-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_dual_min_f32 v0, v0, v2 :: v_dual_min_f32 v1, v1, v3
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-GISEL-NEXT: v_dual_min_f32 v0, v0, v2 :: v_dual_min_f32 v1, v1, v3
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -4402,98 +8431,203 @@ define <2 x float> @v_minimumnum_v2f32_nnan(<2 x float> %x, <2 x float> %y) #1 {
}
define <3 x float> @v_minimumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v3f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v3f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v4
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v5
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_v3f32:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX9-NEXT: v_max_f32_e32 v3, v4, v4
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX9-NEXT: v_max_f32_e32 v3, v5, v5
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v3f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v3
-; GFX10-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX10-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v3f32:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
-; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
-; GFX11-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_dual_min_f32 v0, v0, v3 :: v_dual_min_f32 v1, v1, v4
-; GFX11-NEXT: v_min_f32_e32 v2, v2, v5
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v3f32:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX1170-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v3f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX12-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v3f32:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
-; GFX1251-NEXT: v_min_num_f32_e32 v2, v2, v5
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
+; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
+; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v4, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v5, v5
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v4, v4
+; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v5, v5
+; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX10-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX10-SDAG-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
+; GFX10-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX10-GISEL-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v3, v3, v3 :: v_dual_max_f32 v0, v0, v0
+; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v1, v1, v1
+; GFX11-SDAG-NEXT: v_dual_max_f32 v5, v5, v5 :: v_dual_max_f32 v2, v2, v2
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_dual_min_f32 v0, v0, v3 :: v_dual_min_f32 v1, v1, v4
+; GFX11-SDAG-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v3, v3, v3
+; GFX11-GISEL-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v4, v4, v4
+; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v5, v5, v5
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_dual_min_f32 v0, v0, v3 :: v_dual_min_f32 v1, v1, v4
+; GFX11-GISEL-NEXT: v_min_f32_e32 v2, v2, v5
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x float> @llvm.minimumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -4568,111 +8702,232 @@ define <3 x float> @v_minimumnum_v3f32_nnan(<3 x float> %x, <3 x float> %y) #1 {
}
define <4 x float> @v_minimumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v4f32:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX7-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v4f32:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v4
-; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; GFX8-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v5
-; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v1
-; GFX8-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v6
-; GFX8-NEXT: v_mul_f32_e32 v2, 1.0, v2
-; GFX8-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX8-NEXT: v_mul_f32_e32 v4, 1.0, v7
-; GFX8-NEXT: v_mul_f32_e32 v3, 1.0, v3
-; GFX8-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_v4f32:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX9-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX9-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX9-NEXT: v_max_f32_e32 v4, v5, v5
-; GFX9-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX9-NEXT: v_min_f32_e32 v1, v1, v4
-; GFX9-NEXT: v_max_f32_e32 v4, v6, v6
-; GFX9-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX9-NEXT: v_min_f32_e32 v2, v2, v4
-; GFX9-NEXT: v_max_f32_e32 v4, v7, v7
-; GFX9-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX9-NEXT: v_min_f32_e32 v3, v3, v4
-; GFX9-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v4f32:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f32_e32 v4, v4, v4
-; GFX10-NEXT: v_max_f32_e32 v0, v0, v0
-; GFX10-NEXT: v_max_f32_e32 v5, v5, v5
-; GFX10-NEXT: v_max_f32_e32 v1, v1, v1
-; GFX10-NEXT: v_max_f32_e32 v6, v6, v6
-; GFX10-NEXT: v_max_f32_e32 v2, v2, v2
-; GFX10-NEXT: v_max_f32_e32 v7, v7, v7
-; GFX10-NEXT: v_max_f32_e32 v3, v3, v3
-; GFX10-NEXT: v_min_f32_e32 v0, v0, v4
-; GFX10-NEXT: v_min_f32_e32 v1, v1, v5
-; GFX10-NEXT: v_min_f32_e32 v2, v2, v6
-; GFX10-NEXT: v_min_f32_e32 v3, v3, v7
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v4f32:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
-; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
-; GFX11-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
-; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_dual_min_f32 v0, v0, v4 :: v_dual_min_f32 v1, v1, v5
-; GFX11-NEXT: v_dual_min_f32 v2, v2, v6 :: v_dual_min_f32 v3, v3, v7
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v4f32:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX1170-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v4f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX12-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v4f32:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
-; GFX1251-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX7-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-SDAG-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX7-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-SDAG-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v4
+; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v5
+; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v6
+; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
+; GFX8-GISEL-NEXT: v_mul_f32_e32 v4, 1.0, v7
+; GFX8-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v5, v5
+; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v6, v6
+; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX9-SDAG-NEXT: v_max_f32_e32 v4, v7, v7
+; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-SDAG-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v5, v5
+; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v1, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v6, v6
+; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v4
+; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX9-GISEL-NEXT: v_max_f32_e32 v4, v7, v7
+; GFX9-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-SDAG-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-SDAG-NEXT: v_max_f32_e32 v6, v6, v6
+; GFX10-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-SDAG-NEXT: v_max_f32_e32 v7, v7, v7
+; GFX10-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-SDAG-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX10-SDAG-NEXT: v_min_f32_e32 v1, v1, v5
+; GFX10-SDAG-NEXT: v_min_f32_e32 v2, v2, v6
+; GFX10-SDAG-NEXT: v_min_f32_e32 v3, v3, v7
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
+; GFX10-GISEL-NEXT: v_max_f32_e32 v4, v4, v4
+; GFX10-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
+; GFX10-GISEL-NEXT: v_max_f32_e32 v5, v5, v5
+; GFX10-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
+; GFX10-GISEL-NEXT: v_max_f32_e32 v6, v6, v6
+; GFX10-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
+; GFX10-GISEL-NEXT: v_max_f32_e32 v7, v7, v7
+; GFX10-GISEL-NEXT: v_min_f32_e32 v0, v0, v4
+; GFX10-GISEL-NEXT: v_min_f32_e32 v1, v1, v5
+; GFX10-GISEL-NEXT: v_min_f32_e32 v2, v2, v6
+; GFX10-GISEL-NEXT: v_min_f32_e32 v3, v3, v7
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
+; GFX11-SDAG-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-SDAG-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
+; GFX11-SDAG-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_dual_min_f32 v0, v0, v4 :: v_dual_min_f32 v1, v1, v5
+; GFX11-SDAG-NEXT: v_dual_min_f32 v2, v2, v6 :: v_dual_min_f32 v3, v3, v7
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
+; GFX11-GISEL-NEXT: v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
+; GFX11-GISEL-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
+; GFX11-GISEL-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_dual_min_f32 v0, v0, v4 :: v_dual_min_f32 v1, v1, v5
+; GFX11-GISEL-NEXT: v_dual_min_f32 v2, v2, v6 :: v_dual_min_f32 v3, v3, v7
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1170-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1170-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX12-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX12-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x float> @llvm.minimumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -4751,97 +9006,203 @@ define <4 x float> @v_minimumnum_v4f32_nnan(<4 x float> %x, <4 x float> %y) #1 {
}
define <2 x double> @v_minimumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v2f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX7-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v2f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX8-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v2f64:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX900-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v2f64:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX950-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-NEXT: v_min_f64 v[2:3], v[2:3], v[4:5]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v2f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX10-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v2f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
-; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v2f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
-; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v2f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v2f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX7-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX7-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX8-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX8-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX900-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX900-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[4:5]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[6:7], v[6:7]
+; GFX950-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[4:5]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX10-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX10-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]
+; GFX11-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[4:5]
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[2:3], v[2:3], v[6:7]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -4895,135 +9256,277 @@ define <2 x double> @v_minimumnum_v2f64_nnan(<2 x double> %x, <2 x double> %y) #
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v2f64_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
- %result = call nnan <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
- ret <2 x double> %result
-}
-
-define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v3f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX7-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX7-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v3f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX8-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX8-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v3f64:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX900-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX900-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v3f64:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX950-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
-; GFX950-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-NEXT: v_min_f64 v[4:5], v[4:5], v[6:7]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v3f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX10-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX10-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v3f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
-; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX11-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v3f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
-; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[8:9]
-; GFX1170-NEXT: v_min_num_f64 v[4:5], v[4:5], v[10:11]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v3f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_v3f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
-; GFX1251-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
-; GFX1251-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+ %result = call nnan <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
+ ret <2 x double> %result
+}
+
+define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
+; GFX7-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX7-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX7-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX7-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX7-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX8-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX8-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX8-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX8-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX900-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX900-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX900-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX900-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[6:7]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[8:9], v[8:9]
+; GFX950-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[10:11], v[10:11]
+; GFX950-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[6:7]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX10-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX10-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX10-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX10-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX11-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[6:7]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX11-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[10:11]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[8:9]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[4:5], v[4:5], v[10:11]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[6:7]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[2:3], v[2:3], v[8:9]
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[4:5], v[4:5], v[10:11]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[6:9], v[6:9], v[6:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x double> @llvm.minimumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -5102,140 +9605,299 @@ define <3 x double> @v_minimumnum_v3f64_nnan(<3 x double> %x, <3 x double> %y) #
}
define <4 x double> @v_minimumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
-; GFX7-LABEL: v_minimumnum_v4f64:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX7-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX7-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX7-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX7-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX7-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX7-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX7-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v4f64:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX8-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX8-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX8-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX8-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX8-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX8-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX8-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX900-LABEL: v_minimumnum_v4f64:
-; GFX900: ; %bb.0:
-; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX900-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX900-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX900-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX900-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX900-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX900-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX900-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX900-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX900-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX900-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX900-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX900-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX900-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX950-LABEL: v_minimumnum_v4f64:
-; GFX950: ; %bb.0:
-; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX950-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX950-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX950-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX950-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
-; GFX950-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX950-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
-; GFX950-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
-; GFX950-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX950-NEXT: v_min_f64 v[4:5], v[4:5], v[8:9]
-; GFX950-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
-; GFX950-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX950-NEXT: v_min_f64 v[6:7], v[6:7], v[8:9]
-; GFX950-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX10-LABEL: v_minimumnum_v4f64:
-; GFX10: ; %bb.0:
-; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX10-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX10-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX10-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX10-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX10-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX10-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX10-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX10-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-LABEL: v_minimumnum_v4f64:
-; GFX11: ; %bb.0:
-; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
-; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
-; GFX11-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
-; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
-; GFX11-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
-; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
-; GFX11-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
-; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
-; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
-; GFX11-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
-; GFX11-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)
-; GFX11-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
-; GFX11-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-LABEL: v_minimumnum_v4f64:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
-; GFX1170-NEXT: v_min_num_f64 v[2:3], v[2:3], v[10:11]
-; GFX1170-NEXT: v_min_num_f64 v[4:5], v[4:5], v[12:13]
-; GFX1170-NEXT: v_min_num_f64 v[6:7], v[6:7], v[14:15]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v4f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v4f64:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX7-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX7-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX7-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX7-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX7-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX7-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX7-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX7-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX7-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX7-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX7-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX7-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX7-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX7-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX7-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX7-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX8-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX8-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX8-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX8-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX8-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX8-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX8-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX8-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX8-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX8-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX8-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX8-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX8-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX8-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX8-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX900-SDAG: ; %bb.0:
+; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX900-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX900-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX900-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX900-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX900-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX900-GISEL: ; %bb.0:
+; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX900-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX900-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX900-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX900-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX900-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX900-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX900-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX900-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX900-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX900-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX900-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX900-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX950-SDAG: ; %bb.0:
+; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
+; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
+; GFX950-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[8:9]
+; GFX950-SDAG-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
+; GFX950-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[8:9]
+; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX950-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX950-GISEL: ; %bb.0:
+; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX950-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX950-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[10:11], v[10:11]
+; GFX950-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[12:13], v[12:13]
+; GFX950-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[8:9]
+; GFX950-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX950-GISEL-NEXT: v_max_f64 v[8:9], v[14:15], v[14:15]
+; GFX950-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[8:9]
+; GFX950-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX10-SDAG: ; %bb.0:
+; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX10-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX10-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX10-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX10-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX10-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX10-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX10-GISEL: ; %bb.0:
+; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX10-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX10-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX10-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX10-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX10-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX10-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX10-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX10-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX10-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX10-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX10-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX11-SDAG: ; %bb.0:
+; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-SDAG-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-SDAG-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-SDAG-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX11-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-SDAG-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX11-SDAG-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX11-SDAG-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX11-SDAG-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-SDAG-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX11-GISEL: ; %bb.0:
+; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-GISEL-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11-GISEL-NEXT: v_max_f64 v[8:9], v[8:9], v[8:9]
+; GFX11-GISEL-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11-GISEL-NEXT: v_max_f64 v[10:11], v[10:11], v[10:11]
+; GFX11-GISEL-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
+; GFX11-GISEL-NEXT: v_max_f64 v[12:13], v[12:13], v[12:13]
+; GFX11-GISEL-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
+; GFX11-GISEL-NEXT: v_max_f64 v[14:15], v[14:15], v[14:15]
+; GFX11-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[8:9]
+; GFX11-GISEL-NEXT: v_min_f64 v[2:3], v[2:3], v[10:11]
+; GFX11-GISEL-NEXT: v_min_f64 v[4:5], v[4:5], v[12:13]
+; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-GISEL-NEXT: v_min_f64 v[6:7], v[6:7], v[14:15]
+; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[2:3], v[2:3], v[10:11]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[4:5], v[4:5], v[12:13]
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[6:7], v[6:7], v[14:15]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[8:9], v[8:9], v[8:9]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[10:11], v[10:11], v[10:11]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[4:5], v[4:5], v[4:5]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[12:13], v[12:13], v[12:13]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[6:7], v[6:7], v[6:7]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[14:15], v[14:15], v[14:15]
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[8:9]
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[2:3], v[2:3], v[10:11]
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[4:5], v[4:5], v[12:13]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[6:7], v[6:7], v[14:15]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[12:13], v[12:13], v[12:13]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[14:15], v[14:15], v[14:15]
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x double> @llvm.minimumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -5322,14 +9984,23 @@ define <4 x double> @v_minimumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
}
define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
-; GFX7-LABEL: v_minimumnum_f16_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_minimumnum_f16_no_ieee:
; GFX8: ; %bb.0:
@@ -5361,64 +10032,137 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1170-TRUE16: ; %bb.0:
-; GFX1170-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1170-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-FAKE16-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1170-FAKE16: ; %bb.0:
-; GFX1170-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1170-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-LABEL: v_minimumnum_f16_no_ieee:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-FAKE16-LABEL: v_minimumnum_f16_no_ieee:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1251-TRUE16: ; %bb.0:
-; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
-; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-LABEL: v_minimumnum_f16_no_ieee:
-; GFX1251-FAKE16: ; %bb.0:
-; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
-; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1170-TRUE16-SDAG: ; %bb.0:
+; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1170-TRUE16-GISEL: ; %bb.0:
+; GFX1170-TRUE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1170-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1170-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1170-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1170-FAKE16-SDAG: ; %bb.0:
+; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-FAKE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1170-FAKE16-GISEL: ; %bb.0:
+; GFX1170-FAKE16-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1170-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1170-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX12-TRUE16-SDAG: ; %bb.0:
+; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX12-TRUE16-GISEL: ; %bb.0:
+; GFX12-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX12-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX12-TRUE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX12-FAKE16-SDAG: ; %bb.0:
+; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-FAKE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX12-FAKE16-GISEL: ; %bb.0:
+; GFX12-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
define half @v_minimumnum_f16_nan_no_ieee(half %x, half %y) #0 {
-; GFX7-LABEL: v_minimumnum_f16_nan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_f16_nan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_f16_nan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_minimumnum_f16_nan_no_ieee:
; GFX8: ; %bb.0:
@@ -5530,28 +10274,57 @@ define float @v_minimumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX11-NEXT: v_min_f32_e32 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f32_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f32_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f32_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f32_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f32_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -5644,28 +10417,60 @@ define double @v_minimumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_f64_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_f64_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_f64_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[0:1], v[0:1], v[0:1]
+; GFX1170-GISEL-NEXT: v_max_num_f64 v[2:3], v[2:3], v[2:3]
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_min_num_f64 v[0:1], v[0:1], v[2:3]
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_f64_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_f64_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -5728,30 +10533,55 @@ define double @v_minimumnum_f64_nnan_no_ieee(double %x, double %y) #0 {
}
define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v0, v1
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_minimumnum_v2f16_no_ieee:
; GFX9: ; %bb.0:
@@ -5771,57 +10601,114 @@ define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX11-NEXT: v_pk_min_f16 v0, v0, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v2f16_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1170-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
define <2 x half> @v_minimumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
-; GFX7-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v2, v2, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v1
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v3, 16, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v0, v1
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -5868,42 +10755,79 @@ define <2 x half> @v_minimumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y)
}
define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y) #0 {
-; GFX7-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX9-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX9: ; %bb.0:
-; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-NEXT: v_pk_min_f16 v1, v1, v3
-; GFX9-NEXT: v_pk_min_f16 v0, v0, v2
-; GFX9-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX9-SDAG: ; %bb.0:
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-SDAG-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX9-GISEL: ; %bb.0:
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: v_pk_min_f16 v0, v0, v2
+; GFX9-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
+; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
; GFX10: ; %bb.0:
@@ -5919,75 +10843,141 @@ define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX1170: ; %bb.0:
-; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX1170-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1170-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX1170-GISEL: ; %bb.0:
+; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
define <4 x half> @v_minimumnum_v4f16_nnan_no_ieee(<4 x half> %x, <4 x half> %y) #0 {
-; GFX7-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
-; GFX7: ; %bb.0:
-; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v4
-; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v0
-; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v6
-; GFX7-NEXT: v_min_f32_e32 v4, v4, v5
-; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v7
-; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3
-; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1
-; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2
-; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0
-; GFX7-NEXT: v_min_f32_e32 v5, v6, v5
-; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v4
-; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v5
-; GFX7-NEXT: v_min_f32_e32 v1, v1, v3
-; GFX7-NEXT: v_min_f32_e32 v0, v0, v2
-; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0
-; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1
-; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
-; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
-; GFX7-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX8-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
-; GFX8: ; %bb.0:
-; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
-; GFX8-NEXT: v_min_f16_e32 v1, v1, v3
-; GFX8-NEXT: v_min_f16_e32 v0, v0, v2
-; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
-; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
-; GFX8-NEXT: s_setpc_b64 s[30:31]
+; GFX7-SDAG-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
+; GFX7-SDAG: ; %bb.0:
+; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v5, 16, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v6, 16, v0
+; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v7, 16, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6
+; GFX7-SDAG-NEXT: v_min_f32_e32 v4, v4, v5
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v7
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-SDAG-NEXT: v_min_f32_e32 v5, v6, v5
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5
+; GFX7-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-SDAG-NEXT: v_min_f32_e32 v0, v0, v2
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v5
+; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v3
+; GFX7-SDAG-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX7-GISEL-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
+; GFX7-GISEL: ; %bb.0:
+; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v6, 16, v1
+; GFX7-GISEL-NEXT: v_lshrrev_b32_e32 v7, 16, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v4, v4
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v0, v0, v5
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v6, v7
+; GFX7-GISEL-NEXT: v_min_f32_e32 v2, v4, v2
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v2
+; GFX7-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
+; GFX7-GISEL-NEXT: v_min_f32_e32 v3, v5, v6
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v3
+; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-GISEL-NEXT: v_or_b32_e32 v0, v0, v2
+; GFX7-GISEL-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; GFX7-GISEL-NEXT: v_or_b32_e32 v1, v1, v2
+; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-SDAG-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
+; GFX8-SDAG: ; %bb.0:
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v1, v3
+; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v2
+; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v5
+; GFX8-SDAG-NEXT: v_or_b32_e32 v1, v1, v4
+; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX8-GISEL-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
+; GFX8-GISEL: ; %bb.0:
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-GISEL-NEXT: v_min_f16_e32 v4, v0, v2
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v1, v3
+; GFX8-GISEL-NEXT: v_min_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
+; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
+; GFX8-GISEL-NEXT: v_or_b32_e32 v1, v2, v1
+; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
; GFX9: ; %bb.0:
@@ -6043,21 +11033,5 @@ attributes #0 = { "amdgpu-ieee"="false" nounwind }
attributes #1 = { nounwind }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX10-SDAG: {{.*}}
-; GFX11-FAKE16-SDAG: {{.*}}
-; GFX11-SDAG: {{.*}}
-; GFX11-TRUE16-SDAG: {{.*}}
-; GFX1170-FAKE16-SDAG: {{.*}}
-; GFX1170-SDAG: {{.*}}
-; GFX1170-TRUE16-SDAG: {{.*}}
-; GFX12-FAKE16-SDAG: {{.*}}
-; GFX12-SDAG: {{.*}}
-; GFX12-TRUE16-SDAG: {{.*}}
-; GFX1251-FAKE16-SDAG: {{.*}}
-; GFX1251-SDAG: {{.*}}
-; GFX1251-TRUE16-SDAG: {{.*}}
-; GFX7-SDAG: {{.*}}
-; GFX8-SDAG: {{.*}}
-; GFX9-SDAG: {{.*}}
-; GFX900-SDAG: {{.*}}
-; GFX950-SDAG: {{.*}}
+; GFX900: {{.*}}
+; GFX950: {{.*}}
>From ee325748c48b323c8451135e863cf3c5e5b5200c Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Fri, 3 Jul 2026 12:22:16 +0800
Subject: [PATCH 6/7] fix bug
---
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +-
llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll | 89 ++----
llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll | 89 ++----
llvm/test/CodeGen/AMDGPU/maximumnum.ll | 248 ++++++-----------
llvm/test/CodeGen/AMDGPU/minimumnum.ll | 274 +++++++------------
5 files changed, 243 insertions(+), 461 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 269bffb9b7f39..69b3303987e75 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -8750,7 +8750,7 @@ SDValue SITargetLowering::lowerFMINNUM_FMAXNUM(SDValue Op,
// ieee_mode. Currently a combine can produce the ieee version for non-ieee
// mode functions, but this happens to be OK since it's only done in cases
// where there is known no sNaN.
- if (IsIEEEMode)
+ if (IsIEEEMode && !Subtarget->hasIEEEMinimumMaximumInsts())
return expandFMINNUM_FMAXNUM(Op.getNode(), DAG);
if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
@@ -8769,7 +8769,7 @@ SITargetLowering::lowerFMINIMUMNUM_FMAXIMUMNUM(SDValue Op,
const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
bool IsIEEEMode = Info->getMode().IEEE;
- if (IsIEEEMode)
+ if (IsIEEEMode && !Subtarget->hasIEEEMinimumMaximumInsts())
return expandFMINIMUMNUM_FMAXIMUMNUM(Op.getNode(), DAG);
if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 ||
diff --git a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
index bf07c31524ca2..c76d1742d99f4 100644
--- a/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
@@ -1401,34 +1401,19 @@ define <3 x half> @v_max3_v3f16_maximumnum_maximumnum__v_v_v_0(<3 x half> %a, <3
; GFX11-NEXT: v_pk_max_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-SDAG-TRUE16-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:
-; GFX12-SDAG-TRUE16: ; %bb.0:
-; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.h, v0.h, v2.h, v4.h
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v4.l
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v1.l, v1.l, v3.l, v5.l
-; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-FAKE16-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:
-; GFX12-SDAG-FAKE16: ; %bb.0:
-; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v4
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v1, v1, v3, v5
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v2, v7, v6, v8
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v2
-; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX12-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %a, <3 x half> %b)
%max3 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)
ret <3 x half> %max3
@@ -1619,41 +1604,19 @@ define <4 x half> @v_max3_v4f16_maximumnum_maximumnum__v_v_v_0(<4 x half> %a, <4
; GFX11-NEXT: v_pk_max_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-SDAG-TRUE16-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:
-; GFX12-SDAG-TRUE16: ; %bb.0:
-; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v1.h, v1.h, v3.h, v5.h
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.h, v0.h, v2.h, v4.h
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v2.l, v4.l
-; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v1.l, v1.l, v3.l, v5.l
-; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-FAKE16-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:
-; GFX12-SDAG-FAKE16: ; %bb.0:
-; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v2, v4
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v1, v1, v3, v5
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v8, v9, v8, v10
-; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v6, v7, v6, v11
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v8
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v6
-; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX12-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)
%max3 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)
ret <4 x half> %max3
diff --git a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
index accee7cb077c4..bb34d552f6058 100644
--- a/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
@@ -1401,34 +1401,19 @@ define <3 x half> @v_min3_v3f16_minimumnum_minimumnum__v_v_v_0(<3 x half> %a, <3
; GFX11-NEXT: v_pk_min_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-SDAG-TRUE16-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:
-; GFX12-SDAG-TRUE16: ; %bb.0:
-; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.h, v0.h, v2.h, v4.h
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v4.l
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v1.l, v1.l, v3.l, v5.l
-; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-FAKE16-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:
-; GFX12-SDAG-FAKE16: ; %bb.0:
-; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v4
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v1, v1, v3, v5
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v2, v7, v6, v8
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v2
-; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX12-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %a, <3 x half> %b)
%min3 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)
ret <3 x half> %min3
@@ -1619,41 +1604,19 @@ define <4 x half> @v_min3_v4f16_minimumnum_minimumnum__v_v_v_0(<4 x half> %a, <4
; GFX11-NEXT: v_pk_min_f16 v1, v1, v4
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-SDAG-TRUE16-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:
-; GFX12-SDAG-TRUE16: ; %bb.0:
-; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v1.h, v1.h, v3.h, v5.h
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.h, v0.h, v2.h, v4.h
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v2.l, v4.l
-; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v1.l, v1.l, v3.l, v5.l
-; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-FAKE16-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:
-; GFX12-SDAG-FAKE16: ; %bb.0:
-; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
-; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v4
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v2, v4
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v1, v1, v3, v5
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v8, v9, v8, v10
-; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v6, v7, v6, v11
-; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v8
-; GFX12-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v6
-; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX12-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX12-NEXT: s_setpc_b64 s[30:31]
%tmp0 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)
%min3 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)
ret <4 x half> %min3
diff --git a/llvm/test/CodeGen/AMDGPU/maximumnum.ll b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
index 8aef100354799..719831e2f9191 100644
--- a/llvm/test/CodeGen/AMDGPU/maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
@@ -5002,12 +5002,12 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX11-GISEL-NEXT: v_pk_max_f16 v1, v1, v3
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_maximumnum_v3f16:
; GFX1170-GISEL: ; %bb.0:
@@ -5021,23 +5021,16 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-FAKE16-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v3
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_maximumnum_v3f16:
; GFX12-GISEL: ; %bb.0:
@@ -5055,24 +5048,13 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-FAKE16-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v3
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_v3f16:
; GFX1251-GISEL: ; %bb.0:
@@ -5086,14 +5068,6 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_v3f16:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v3
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -5187,57 +5161,31 @@ define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_v3f16_nnan:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v3f16_nnan:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v3f16_nnan:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v3f16_nnan:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_maximumnum_v3f16_nnan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-LABEL: v_maximumnum_v3f16_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-GISEL-LABEL: v_maximumnum_v3f16_nnan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -10109,10 +10057,8 @@ define <4 x double> @v_maximumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[12:15]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_maximumnum_v4f64:
@@ -10202,15 +10148,23 @@ define <4 x double> @v_maximumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_maximumnum_v4f64_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[12:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x double> @llvm.maximumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -11075,57 +11029,31 @@ define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX11-NEXT: v_pk_max_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_maximum_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-GISEL-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
diff --git a/llvm/test/CodeGen/AMDGPU/minimumnum.ll b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
index 29c5139015d57..f64c1192ccb9a 100644
--- a/llvm/test/CodeGen/AMDGPU/minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
@@ -1,42 +1,42 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX900,GFX9-SDAG,GFX900-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX900,GFX9-GISEL,GFX900-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX900,GFX9-GISEL,GFX900-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-SDAG,GFX950-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX950-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX950-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16,GFX11-SDAG,GFX11-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16,GFX11-GISEL,GFX11-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16,GFX11-GISEL,GFX11-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16,GFX11-SDAG,GFX11-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16,GFX11-GISEL,GFX11-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16,GFX11-GISEL,GFX11-FAKE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-TRUE16,GFX1170-SDAG,GFX1170-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-TRUE16,GFX1170-GISEL,GFX1170-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-TRUE16,GFX1170-GISEL,GFX1170-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-FAKE16,GFX1170-SDAG,GFX1170-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-FAKE16,GFX1170-GISEL,GFX1170-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-FAKE16,GFX1170-GISEL,GFX1170-FAKE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16,GFX12-SDAG,GFX12-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16,GFX12-GISEL,GFX12-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16,GFX12-GISEL,GFX12-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-SDAG,GFX12-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-GISEL,GFX12-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-GISEL,GFX12-FAKE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-SDAG,GFX1251-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-GISEL,GFX1251-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-GISEL,GFX1251-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-SDAG,GFX1251-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX7-SDAG-LABEL: v_minimumnum_f16:
@@ -4770,12 +4770,12 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX11-GISEL-NEXT: v_pk_min_f16 v1, v1, v3
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-TRUE16-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX1170-TRUE16-SDAG: ; %bb.0:
-; GFX1170-TRUE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-TRUE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1170-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX1170-SDAG: ; %bb.0:
+; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1170-GISEL-LABEL: v_minimumnum_v3f16:
; GFX1170-GISEL: ; %bb.0:
@@ -4789,23 +4789,16 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-FAKE16-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX1170-FAKE16-SDAG: ; %bb.0:
-; GFX1170-FAKE16-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-FAKE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v1, v1, v3
-; GFX1170-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-TRUE16-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX12-TRUE16-SDAG: ; %bb.0:
-; GFX12-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
-; GFX12-TRUE16-SDAG-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: v_minimumnum_v3f16:
; GFX12-GISEL: ; %bb.0:
@@ -4823,24 +4816,13 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-FAKE16-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX12-FAKE16-SDAG: ; %bb.0:
-; GFX12-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v1, v1, v3
-; GFX12-FAKE16-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX1251-TRUE16-SDAG: ; %bb.0:
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-TRUE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v1.l, v1.l, v3.l
-; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_v3f16:
; GFX1251-GISEL: ; %bb.0:
@@ -4854,14 +4836,6 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_v3f16:
-; GFX1251-FAKE16-SDAG: ; %bb.0:
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-FAKE16-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v1, v1, v3
-; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -4955,57 +4929,31 @@ define <3 x half> @v_minimumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_v3f16_nnan:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v3f16_nnan:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v3f16_nnan:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v3f16_nnan:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_minimumnum_v3f16_nnan:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-LABEL: v_minimumnum_v3f16_nnan:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-GISEL-LABEL: v_minimumnum_v3f16_nnan:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -9877,10 +9825,8 @@ define <4 x double> @v_minimumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX1251-SDAG: ; %bb.0:
; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[4:7], v[4:7], v[12:15]
; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX1251-GISEL-LABEL: v_minimumnum_v4f64:
@@ -9970,15 +9916,23 @@ define <4 x double> @v_minimumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-LABEL: v_minimumnum_v4f64_nnan:
-; GFX1251: ; %bb.0:
-; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-NEXT: s_wait_kmcnt 0x0
-; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
-; GFX1251-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
-; GFX1251-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
-; GFX1251-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
-; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[4:7], v[4:7], v[12:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x double> @llvm.minimumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -10843,57 +10797,31 @@ define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX11-NEXT: v_pk_min_f16 v1, v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1170-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX1170-SDAG: ; %bb.0:
-; GFX1170-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX1170-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1170-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX1170-GISEL: ; %bb.0:
-; GFX1170-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1170-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1170-GISEL-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX12-SDAG: ; %bb.0:
-; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
-; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
-; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-SDAG-NEXT: v_pk_minimum_f16 v1, v1, v3
-; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX12-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX12-GISEL: ; %bb.0:
-; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
-; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
-; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+; GFX1170-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX1170: ; %bb.0:
+; GFX1170-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX1170-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1170-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1170-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-SDAG-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX1251-SDAG: ; %bb.0:
-; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-SDAG-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3
-; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+; GFX12-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX12: ; %bb.0:
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX12-NEXT: s_setpc_b64 s[30:31]
;
-; GFX1251-GISEL-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
-; GFX1251-GISEL: ; %bb.0:
-; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
-; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
-; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
+; GFX1251-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
>From c089c13c3f99ddac7b80e2b321957f842c2d89a8 Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Fri, 3 Jul 2026 12:37:09 +0800
Subject: [PATCH 7/7] fix test
---
llvm/test/CodeGen/AMDGPU/minimumnum.ll | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/minimumnum.ll b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
index f64c1192ccb9a..558da7722eba1 100644
--- a/llvm/test/CodeGen/AMDGPU/minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
@@ -1,42 +1,42 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX900,GFX9-SDAG,GFX900-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX900,GFX9-GISEL,GFX900-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX900,GFX9-GISEL,GFX900-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-SDAG,GFX950-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX950-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX950-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16,GFX11-SDAG,GFX11-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16,GFX11-GISEL,GFX11-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16,GFX11-GISEL,GFX11-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16,GFX11-SDAG,GFX11-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16,GFX11-GISEL,GFX11-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16,GFX11-GISEL,GFX11-FAKE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-TRUE16,GFX1170-SDAG,GFX1170-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-TRUE16,GFX1170-GISEL,GFX1170-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-TRUE16,GFX1170-GISEL,GFX1170-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-FAKE16,GFX1170-SDAG,GFX1170-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-FAKE16,GFX1170-GISEL,GFX1170-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1170,GFX1170-FAKE16,GFX1170-GISEL,GFX1170-FAKE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16,GFX12-SDAG,GFX12-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16,GFX12-GISEL,GFX12-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16,GFX12-GISEL,GFX12-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-SDAG,GFX12-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-GISEL,GFX12-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-GISEL,GFX12-FAKE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-SDAG,GFX1251-TRUE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-GISEL,GFX1251-TRUE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-GISEL,GFX1251-TRUE16-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-SDAG,GFX1251-FAKE16-SDAG %s
-; xUN: llc -global-isel -mtriple=amdgcnamd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
+; xUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX7-SDAG-LABEL: v_minimumnum_f16:
More information about the llvm-commits
mailing list