[llvm] [OpenMPOpt] Null generic-mode wrappers for SPMDized kernels (PR #207611)
Robert Imschweiler via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 5 14:21:16 PDT 2026
https://github.com/ro-i created https://github.com/llvm/llvm-project/pull/207611
If a kernel gets SPMDized, it doesn't need the wrapper function that is passed to __kmpc_parallel_60. Keeping the dead wrapper function can lead to lots of misleading "local memory global used by non-kernel function" AMDGPU backend warnings.
Let OpenMPOpt null the wrapper argument such that DCE can then remove the corresponding dead functions.
Claude assisted with this patch.
>From a678529cf80674f8d23ebbf33c3961fb96487b9c Mon Sep 17 00:00:00 2001
From: Robert Imschweiler <robert.imschweiler at amd.com>
Date: Sun, 5 Jul 2026 15:51:09 -0500
Subject: [PATCH] [OpenMPOpt] Null generic-mode wrappers for SPMDized kernels
If a kernel gets SPMDized, it doesn't need the wrapper function that is
passed to __kmpc_parallel_60. Keeping the dead wrapper function can lead
to lots of misleading "local memory global used by non-kernel function"
AMDGPU backend warnings.
Let OpenMPOpt null the wrapper argument such that DCE can then remove
the corresponding dead functions.
Claude assisted with this patch.
---
llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 63 +++++++++++++++
.../get_hardware_num_threads_in_block_fold.ll | 2 +-
.../OpenMP/is_spmd_exec_mode_fold.ll | 2 +-
.../OpenMP/spmd_parallel_wrapper_removal.ll | 80 +++++++++++++++++++
llvm/test/Transforms/OpenMP/spmdization.ll | 16 ++--
.../Transforms/OpenMP/spmdization_assumes.ll | 2 +-
6 files changed, 154 insertions(+), 11 deletions(-)
create mode 100644 llvm/test/Transforms/OpenMP/spmd_parallel_wrapper_removal.ll
diff --git a/llvm/lib/Transforms/IPO/OpenMPOpt.cpp b/llvm/lib/Transforms/IPO/OpenMPOpt.cpp
index 012ea3aad490d..5fb8e12124c6f 100644
--- a/llvm/lib/Transforms/IPO/OpenMPOpt.cpp
+++ b/llvm/lib/Transforms/IPO/OpenMPOpt.cpp
@@ -650,6 +650,13 @@ struct OMPInformationCache : public InformationCache {
/// Indicates if we have already linked in the OpenMP device library.
bool OpenMPPostLink = false;
+
+ /// Kernels that OpenMPOpt transformed from generic to SPMD mode. Recorded at
+ /// the transform (changeToSPMDMode) so later cleanup does not have to
+ /// re-derive the mode. Such kernels no longer run a generic-mode state
+ /// machine, so the parallel data-sharing wrapper passed to __kmpc_parallel_60
+ /// is dead in them.
+ SmallPtrSet<Function *, 8> SPMDizedKernels;
};
template <typename Ty, bool InsertInvalidates = true>
@@ -969,6 +976,12 @@ struct OpenMPOpt {
// TODO: This should be folded into buildCustomStateMachine.
Changed |= rewriteDeviceCodeStateMachine();
+ // Drop the parallel data-sharing wrapper from __kmpc_parallel_60 calls in
+ // SPMD kernels, where the runtime never uses it, so the (otherwise dead)
+ // wrapper can be eliminated instead of lingering as a non-kernel LDS
+ // user.
+ Changed |= removeSPMDParallelWrappers();
+
if (remarksEnabled())
analysisGlobalization();
} else {
@@ -1983,6 +1996,11 @@ struct OpenMPOpt {
/// the cases we can avoid taking the address of a function.
bool rewriteDeviceCodeStateMachine();
+ /// In SPMD kernels the parallel data-sharing wrapper passed to
+ /// __kmpc_parallel_60 is never used by the runtime; null it out so the dead
+ /// wrapper (and any LDS it references) can be removed.
+ bool removeSPMDParallelWrappers();
+
///
///}}
@@ -2250,6 +2268,47 @@ bool OpenMPOpt::rewriteDeviceCodeStateMachine() {
return Changed;
}
+bool OpenMPOpt::removeSPMDParallelWrappers() {
+ // Nothing to clean up unless we SPMD-ized at least one kernel.
+ if (OMPInfoCache.SPMDizedKernels.empty())
+ return false;
+
+ OMPInformationCache::RuntimeFunctionInfo &KernelParallelRFI =
+ OMPInfoCache.RFIs[OMPRTL___kmpc_parallel_60];
+ if (!KernelParallelRFI || !KernelParallelRFI.Declaration)
+ return false;
+
+ const unsigned WrapperFunctionArgNo = 6;
+ bool Changed = false;
+ for (User *U : KernelParallelRFI.Declaration->users()) {
+ auto *CI = dyn_cast<CallInst>(U);
+ if (!CI || CI->getCalledOperand() != KernelParallelRFI.Declaration ||
+ CI->arg_size() <= WrapperFunctionArgNo)
+ continue;
+
+ Value *Wrapper = CI->getArgOperand(WrapperFunctionArgNo);
+ if (isa<ConstantPointerNull>(Wrapper))
+ continue;
+
+ // Only drop the wrapper for a parallel region reached from a single kernel
+ // that we transformed to SPMD mode. A region also reachable from a
+ // generic-mode kernel still needs its wrapper for that kernel's state
+ // machine, and getUniqueKernelFor conservatively bails on such shared
+ // regions. (Mirrors the unique-kernel requirement in
+ // rewriteDeviceCodeStateMachine.)
+ Kernel K = getUniqueKernelFor(*CI->getFunction());
+ if (!K || !OMPInfoCache.SPMDizedKernels.contains(K))
+ continue;
+
+ CI->setArgOperand(
+ WrapperFunctionArgNo,
+ ConstantPointerNull::get(cast<PointerType>(Wrapper->getType())));
+ Changed = true;
+ }
+
+ return Changed;
+}
+
/// Abstract Attribute for tracking ICV values.
struct AAICVTracker : public StateWrapper<BooleanState, AbstractAttribute> {
using Base = StateWrapper<BooleanState, AbstractAttribute>;
@@ -4301,6 +4360,10 @@ struct AAKernelInfoFunction : AAKernelInfo {
++NumOpenMPTargetRegionKernelsSPMD;
+ // Record that this kernel now runs SPMD so post-Attributor cleanup can drop
+ // the now-dead parallel data-sharing wrapper without re-deriving the mode.
+ OMPInfoCache.SPMDizedKernels.insert(Kernel);
+
auto Remark = [&](OptimizationRemark OR) {
return OR << "Transformed generic-mode kernel to SPMD-mode.";
};
diff --git a/llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll b/llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
index 8078c96feb5df..1e37431675ec7 100644
--- a/llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
+++ b/llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
@@ -78,7 +78,7 @@ define weak ptx_kernel void @kernel2(ptr %dyn) "kernel" #0 {
; CHECK-NEXT: call void @helper0() #[[ATTR1]]
; CHECK-NEXT: call void @helper1() #[[ATTR1]]
; CHECK-NEXT: call void @helper2() #[[ATTR1]]
-; CHECK-NEXT: call void @__kmpc_parallel_60(ptr null, i32 [[TMP0]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__, ptr @__omp_outlined___wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 0, i32 0)
+; CHECK-NEXT: call void @__kmpc_parallel_60(ptr null, i32 [[TMP0]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0, i32 0)
; CHECK-NEXT: call void @__kmpc_target_deinit()
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll b/llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
index d3101d410e083..3cf469f00ad60 100644
--- a/llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
+++ b/llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
@@ -49,7 +49,7 @@ define weak ptx_kernel void @will_be_spmd() "kernel" {
; CHECK: user_code.entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr null) #[[ATTR3:[0-9]+]]
; CHECK-NEXT: call void @is_spmd_helper2()
-; CHECK-NEXT: call void @__kmpc_parallel_60(ptr null, i32 [[TMP0]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__, ptr @__omp_outlined___wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 0, i32 0)
+; CHECK-NEXT: call void @__kmpc_parallel_60(ptr null, i32 [[TMP0]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 0, i32 0)
; CHECK-NEXT: call void @__kmpc_target_deinit()
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Transforms/OpenMP/spmd_parallel_wrapper_removal.ll b/llvm/test/Transforms/OpenMP/spmd_parallel_wrapper_removal.ll
new file mode 100644
index 0000000000000..0b89b940286b1
--- /dev/null
+++ b/llvm/test/Transforms/OpenMP/spmd_parallel_wrapper_removal.ll
@@ -0,0 +1,80 @@
+; RUN: opt --mtriple=amdgcn-amd-amdhsa -S -passes=openmp-opt < %s | FileCheck %s
+
+; When OpenMPOpt transforms a generic-mode kernel to SPMD mode, its generic-mode
+; worker state machine is gone, so the parallel data-sharing wrapper (argument
+; index 6 of __kmpc_parallel_60) is dead. OpenMPOpt nulls that argument so the
+; otherwise-dead wrapper -- and any LDS it references -- can be eliminated instead
+; of lingering as a non-kernel function that uses LDS (which the AMDGPU backend
+; warns about). A kernel that stays in generic mode still needs its wrapper for
+; the worker state machine, so it must be left untouched.
+
+%struct.ident_t = type { i32, i32, i32, i32, ptr }
+%struct.KernelEnvironmentTy = type { %struct.ConfigurationEnvironmentTy, ptr, ptr }
+%struct.ConfigurationEnvironmentTy = type { i8, i8, i8, i32, i32, i32, i32, i32, i32 }
+
+ at 0 = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00", align 1
+ at 1 = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 0, ptr @0 }, align 8
+
+; The SPMD-amenable kernel is promoted: ExecMode 1 (GENERIC) -> 3 (GENERIC_SPMD).
+; CHECK: @spmd_kernel_environment = {{.*}}ConfigurationEnvironmentTy { i8 0, i8 0, i8 3
+ at spmd_kernel_environment = local_unnamed_addr constant %struct.KernelEnvironmentTy { %struct.ConfigurationEnvironmentTy { i8 1, i8 0, i8 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, ptr @1, ptr null }
+; The kernel with an unguardable side effect stays generic: ExecMode remains 1.
+; CHECK: @generic_kernel_environment = {{.*}}ConfigurationEnvironmentTy { i8 1, i8 0, i8 1
+ at generic_kernel_environment = local_unnamed_addr constant %struct.KernelEnvironmentTy { %struct.ConfigurationEnvironmentTy { i8 1, i8 0, i8 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 }, ptr @1, ptr null }
+
+define weak amdgpu_kernel void @spmd_kernel() "kernel" {
+ %init = call i32 @__kmpc_target_init(ptr @spmd_kernel_environment, ptr null)
+ call void @spmd_outlined(ptr null, ptr null)
+ call void @__kmpc_target_deinit()
+ ret void
+}
+
+define weak amdgpu_kernel void @generic_kernel() "kernel" {
+ %init = call i32 @__kmpc_target_init(ptr @generic_kernel_environment, ptr null)
+ call void @generic_outlined(ptr null, ptr null)
+ call void @__kmpc_target_deinit()
+ ret void
+}
+
+; SPMD kernel: the wrapper (arg 6) is nulled.
+; CHECK-LABEL: define internal void @spmd_outlined(
+; CHECK: call void @__kmpc_parallel_60(ptr @1, i32 0, i32 1, i32 -1, i32 -1, ptr @spmd_body, ptr null, ptr null, i64 0, i32 0)
+define internal void @spmd_outlined(ptr %.global_tid., ptr %.bound_tid.) {
+ call void @__kmpc_parallel_60(ptr @1, i32 0, i32 1, i32 -1, i32 -1, ptr @spmd_body, ptr @spmd_body_wrapper, ptr null, i64 0, i32 0)
+ ret void
+}
+
+; Generic kernel: the wrapper (arg 6) is preserved.
+; CHECK-LABEL: define internal void @generic_outlined(
+; CHECK: call void @__kmpc_parallel_60(ptr @1, i32 0, i32 1, i32 -1, i32 -1, ptr @generic_body, ptr @generic_body_wrapper, ptr null, i64 0, i32 0)
+define internal void @generic_outlined(ptr %.global_tid., ptr %.bound_tid.) {
+ call void @unknown()
+ call void @__kmpc_parallel_60(ptr @1, i32 0, i32 1, i32 -1, i32 -1, ptr @generic_body, ptr @generic_body_wrapper, ptr null, i64 0, i32 0)
+ ret void
+}
+
+define internal void @spmd_body(ptr %.global_tid., ptr %.bound_tid.) {
+ ret void
+}
+define internal void @spmd_body_wrapper(i16 zeroext %0, i32 %1) {
+ call void @spmd_body(ptr null, ptr null)
+ ret void
+}
+define internal void @generic_body(ptr %.global_tid., ptr %.bound_tid.) {
+ ret void
+}
+define internal void @generic_body_wrapper(i16 zeroext %0, i32 %1) {
+ call void @generic_body(ptr null, ptr null)
+ ret void
+}
+
+declare void @unknown()
+declare i32 @__kmpc_target_init(ptr, ptr)
+declare void @__kmpc_target_deinit()
+declare void @__kmpc_parallel_60(ptr, i32, i32, i32, i32, ptr, ptr, ptr, i64, i32)
+declare fastcc i32 @__kmpc_get_hardware_thread_id_in_block()
+declare void @__kmpc_barrier_simple_spmd(ptr, i32)
+
+!llvm.module.flags = !{!0, !1}
+!0 = !{i32 7, !"openmp", i32 51}
+!1 = !{i32 7, !"openmp-device", i32 51}
diff --git a/llvm/test/Transforms/OpenMP/spmdization.ll b/llvm/test/Transforms/OpenMP/spmdization.ll
index d5c66f3933a1e..cbfde90da0eff 100644
--- a/llvm/test/Transforms/OpenMP/spmdization.ll
+++ b/llvm/test/Transforms/OpenMP/spmdization.ll
@@ -440,7 +440,7 @@ define internal void @__omp_outlined__(ptr noalias %.global_tid., ptr noalias %.
; AMDGPU: [[FOR_BODY]]:
; AMDGPU-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; AMDGPU-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4, !tbaa [[INT_TBAA12]]
-; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__1, ptr @__omp_outlined__1_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
+; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__1, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
;
@@ -460,7 +460,7 @@ define internal void @__omp_outlined__(ptr noalias %.global_tid., ptr noalias %.
; NVPTX: [[FOR_BODY]]:
; NVPTX-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; NVPTX-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4, !tbaa [[INT_TBAA12]]
-; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__1, ptr @__omp_outlined__1_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
+; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__1, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
;
@@ -925,7 +925,7 @@ define internal void @__omp_outlined__2(ptr noalias %.global_tid., ptr noalias %
; AMDGPU: [[FOR_BODY]]:
; AMDGPU-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; AMDGPU-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4, !tbaa [[INT_TBAA12]]
-; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__3, ptr @__omp_outlined__3_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
+; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__3, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
;
@@ -947,7 +947,7 @@ define internal void @__omp_outlined__2(ptr noalias %.global_tid., ptr noalias %
; NVPTX: [[FOR_BODY]]:
; NVPTX-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; NVPTX-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4, !tbaa [[INT_TBAA12]]
-; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__3, ptr @__omp_outlined__3_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
+; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__3, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 0, i32 0)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
;
@@ -1423,7 +1423,7 @@ define internal void @__omp_outlined__4(ptr noalias %.global_tid., ptr noalias %
; AMDGPU-NEXT: store ptr addrspacecast (ptr addrspace(3) @x_shared to ptr), ptr addrspace(5) [[CAPTURED_VARS_ADDRS]], align 8, !tbaa [[ANYPTR_TBAA20:![0-9]+]]
; AMDGPU-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; AMDGPU-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4, !tbaa [[INT_TBAA12]]
-; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__5, ptr @__omp_outlined__5_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
+; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__5, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
;
@@ -1444,7 +1444,7 @@ define internal void @__omp_outlined__4(ptr noalias %.global_tid., ptr noalias %
; NVPTX-NEXT: store ptr addrspacecast (ptr addrspace(3) @x_shared to ptr), ptr addrspace(5) [[CAPTURED_VARS_ADDRS]], align 8, !tbaa [[ANYPTR_TBAA20:![0-9]+]]
; NVPTX-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; NVPTX-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4, !tbaa [[INT_TBAA12]]
-; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__5, ptr @__omp_outlined__5_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
+; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__5, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
;
@@ -1963,7 +1963,7 @@ define internal void @__omp_outlined__6(ptr noalias %.global_tid., ptr noalias %
; AMDGPU-NEXT: store ptr addrspacecast (ptr addrspace(3) @x_shared.1 to ptr), ptr addrspace(5) [[CAPTURED_VARS_ADDRS]], align 8, !tbaa [[ANYPTR_TBAA20]]
; AMDGPU-NEXT: [[TMP2:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; AMDGPU-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(5) [[TMP2]], align 4, !tbaa [[INT_TBAA12]]
-; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__7, ptr @__omp_outlined__7_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
+; AMDGPU-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__7, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
;
@@ -1998,7 +1998,7 @@ define internal void @__omp_outlined__6(ptr noalias %.global_tid., ptr noalias %
; NVPTX-NEXT: store ptr addrspacecast (ptr addrspace(3) @x_shared1 to ptr), ptr addrspace(5) [[CAPTURED_VARS_ADDRS]], align 8, !tbaa [[ANYPTR_TBAA20]]
; NVPTX-NEXT: [[TMP2:%.*]] = addrspacecast ptr [[DOTGLOBAL_TID_]] to ptr addrspace(5)
; NVPTX-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(5) [[TMP2]], align 4, !tbaa [[INT_TBAA12]]
-; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__7, ptr @__omp_outlined__7_wrapper, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
+; NVPTX-NEXT: call void @__kmpc_parallel_60(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__7, ptr null, ptr [[CAPTURED_VARS_ADDRS_CAST]], i64 1, i32 0)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
;
diff --git a/llvm/test/Transforms/OpenMP/spmdization_assumes.ll b/llvm/test/Transforms/OpenMP/spmdization_assumes.ll
index 689b9af0cc3fe..3eedcc7b57e21 100644
--- a/llvm/test/Transforms/OpenMP/spmdization_assumes.ll
+++ b/llvm/test/Transforms/OpenMP/spmdization_assumes.ll
@@ -55,7 +55,7 @@ define weak ptx_kernel void @__omp_offloading_fd02_404433c2_main_l5(ptr %dyn, pt
; CHECK-NEXT: call void @__kmpc_barrier_simple_spmd(ptr @[[GLOB2]], i32 [[TMP2]])
; CHECK-NEXT: br label %[[REGION_EXIT:.*]]
; CHECK: [[REGION_EXIT]]:
-; CHECK-NEXT: call void @__kmpc_parallel_60(ptr nonnull @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__, ptr @__omp_outlined___wrapper, ptr nonnull [[CAPTURED_VARS_ADDRS]], i64 0, i32 0) #[[ATTR3]]
+; CHECK-NEXT: call void @__kmpc_parallel_60(ptr nonnull @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @__omp_outlined__, ptr null, ptr nonnull [[CAPTURED_VARS_ADDRS]], i64 0, i32 0) #[[ATTR3]]
; CHECK-NEXT: call void @__kmpc_target_deinit() #[[ATTR3]]
; CHECK-NEXT: br label %[[COMMON_RET]]
;
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