[llvm] [SelectionDAG] Fold VECREDUCE_ADD of a constant BUILD_VECTOR (PR #207560)

[Ankit Kumar Tiwari via llvm-commits]

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@@ -7797,6 +7786,23 @@ SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
     // Early-out if we failed to constant fold a bitcast.
     if (Opcode == ISD::BITCAST)
       return SDValue();
+
+    // Constant fold VECREDUCE_ADD with a BUILD_VECTOR of integer constants.
+    if (Opcode == ISD::VECREDUCE_ADD && N1.getOpcode() == ISD::BUILD_VECTOR &&
+        ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
+      unsigned EltBits = N1.getValueType().getScalarSizeInBits();
+      APInt Acc = APInt::getZero(EltBits);
+      bool HasUndef = false;
+      for (SDValue Elt : N1->op_values()) {
+        if (Elt.isUndef() || cast<ConstantSDNode>(Elt)->isOpaque()) {
+          HasUndef = true;
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ankit-cybertron wrote:

Done, removed the flag -- just returning SDValue() now. 

https://github.com/llvm/llvm-project/pull/207560