[llvm] c98a157 - [SLP][NFC]Update test to avoid instructions folding, NFC
via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 4 14:56:53 PDT 2026
Author: Alexey Bataev
Date: 2026-07-04T17:56:49-04:00
New Revision: c98a157d7d76f982d3e1a12db23b47196ac358d4
URL: https://github.com/llvm/llvm-project/commit/c98a157d7d76f982d3e1a12db23b47196ac358d4
DIFF: https://github.com/llvm/llvm-project/commit/c98a157d7d76f982d3e1a12db23b47196ac358d4.diff
LOG: [SLP][NFC]Update test to avoid instructions folding, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/207544
Added:
Modified:
llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll b/llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
index 70ed8d43ec5f0..8b39816480c1e 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
@@ -1,32 +1,57 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux -mattr=+avx2 < %s | FileCheck %s
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux -mattr=+avx2 < %s -slp-threshold=-7| FileCheck %s
-define void @test() {
+define void @test(i8 %a, i8 %b, ptr %p) {
; CHECK-LABEL: define void @test(
-; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: i8 [[A:%.*]], i8 [[B:%.*]], ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[ARRAYIDX51_1_I:%.*]] = getelementptr i8, ptr [[P]], i64 4
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i8> poison, i8 [[B]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> [[TMP0]], i8 [[A]], i32 1
+; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i8> [[TMP1]] to <2 x i16>
; CHECK-NEXT: br label %[[COND_END_I:.*]]
; CHECK: [[COND_END_I]]:
-; CHECK-NEXT: #dbg_value(!DIArgList(i32 0, i32 poison), [[META3:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_or, DW_OP_stack_value), [[META5:![0-9]+]])
-; CHECK-NEXT: [[TMP0:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> zeroinitializer, <2 x i32> zeroinitializer)
-; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> [[TMP0]]
-; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i32> [[TMP1]], <i32 0, i32 16>
-; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], zeroinitializer
-; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP3]], zeroinitializer
-; CHECK-NEXT: [[TMP5:%.*]] = or <2 x i32> [[TMP4]], zeroinitializer
-; CHECK-NEXT: store <2 x i32> [[TMP5]], ptr null, align 4
+; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i16> [[TMP2]], i32 0
+; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP3]] to i32
+; CHECK-NEXT: [[ADD46_I30:%.*]] = or i32 0, [[TMP4]]
+; CHECK-NEXT: [[TMP5:%.*]] = or <2 x i16> zeroinitializer, [[TMP2]]
+; CHECK-NEXT: #dbg_value(!DIArgList(i32 0, i8 [[A]]), [[META3:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_or, DW_OP_stack_value), [[META7:![0-9]+]])
+; CHECK-NEXT: [[TMP6:%.*]] = tail call i32 @llvm.umin.i32(i32 [[ADD46_I30]], i32 0)
+; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i32> <i32 0, i32 poison>, i32 [[TMP6]], i32 1
+; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i16> [[TMP2]], i32 1
+; CHECK-NEXT: [[TMP9:%.*]] = zext i16 [[TMP8]] to i32
+; CHECK-NEXT: [[ADD49_1_I:%.*]] = or i32 0, [[TMP9]]
+; CHECK-NEXT: [[TMP10:%.*]] = icmp slt <2 x i16> [[TMP5]], zeroinitializer
+; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x i1> <i1 poison, i1 false>, <2 x i1> [[TMP10]], <2 x i32> <i32 3, i32 1>
+; CHECK-NEXT: [[TMP12:%.*]] = select <2 x i1> [[TMP11]], <2 x i32> zeroinitializer, <2 x i32> [[TMP7]]
+; CHECK-NEXT: [[TMP13:%.*]] = shl <2 x i32> [[TMP12]], <i32 16, i32 0>
+; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i32> [[TMP13]], i32 0
+; CHECK-NEXT: [[OP_RDX:%.*]] = or i32 0, [[TMP14]]
+; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i32> [[TMP13]], i32 1
+; CHECK-NEXT: [[OP_RDX1:%.*]] = or i32 [[OP_RDX]], [[TMP15]]
+; CHECK-NEXT: store i32 [[OP_RDX1]], ptr null, align 4
+; CHECK-NEXT: [[TMP16:%.*]] = tail call i32 @llvm.umin.i32(i32 [[ADD49_1_I]], i32 0)
+; CHECK-NEXT: [[TMP17:%.*]] = shufflevector <2 x i1> <i1 false, i1 poison>, <2 x i1> [[TMP10]], <2 x i32> <i32 0, i32 2>
+; CHECK-NEXT: [[TMP18:%.*]] = insertelement <2 x i32> <i32 poison, i32 0>, i32 [[TMP16]], i32 0
+; CHECK-NEXT: [[TMP19:%.*]] = select <2 x i1> [[TMP17]], <2 x i32> zeroinitializer, <2 x i32> [[TMP18]]
+; CHECK-NEXT: [[TMP20:%.*]] = shl <2 x i32> [[TMP19]], <i32 16, i32 0>
+; CHECK-NEXT: [[TMP21:%.*]] = extractelement <2 x i32> [[TMP20]], i32 0
+; CHECK-NEXT: [[OP_RDX2:%.*]] = or i32 0, [[TMP21]]
+; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i32> [[TMP20]], i32 1
+; CHECK-NEXT: [[OP_RDX3:%.*]] = or i32 [[OP_RDX2]], [[TMP22]]
+; CHECK-NEXT: store i32 [[OP_RDX3]], ptr [[ARRAYIDX51_1_I]], align 4
; CHECK-NEXT: ret void
;
entry:
- %arrayidx51.1.i = getelementptr i8, ptr null, i64 4
- %retval.sroa.3.0.insert.ext.i.i = zext i8 0 to i32
- %retval.sroa.2.0.insert.ext.i.i = zext i8 0 to i32
+ %arrayidx51.1.i = getelementptr i8, ptr %p, i64 4
+ %retval.sroa.3.0.insert.ext.i.i = zext i8 %a to i32
+ %retval.sroa.2.0.insert.ext.i.i = zext i8 %b to i32
br label %cond.end.i
cond.end.i:
%add46.i30 = or i32 0, %retval.sroa.2.0.insert.ext.i.i
%add49.i = or i32 0, %retval.sroa.3.0.insert.ext.i.i
- #dbg_value(i32 %add49.i, !8, !DIExpression(), !16)
+ #dbg_value(i32 %add49.i, !8, !DIExpression(), !16)
%0 = tail call i32 @llvm.umin.i32(i32 %add46.i30, i32 0)
%cmp.i14.i.i.i = icmp slt i32 %add49.i, 0
%block_color.sroa.7.0.insert.ext.i = select i1 %cmp.i14.i.i.i, i32 0, i32 0
@@ -61,12 +86,14 @@ cond.end.i:
!8 = !DILocalVariable(name: "sb", arg: 4, scope: !9)
!9 = distinct !DISubprogram(name: "color_rgba", unit: !0, type: !17)
!16 = !DILocation(scope: !9)
+!17 = !DISubroutineType(types: !18)
+!18 = !{null}
;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: [[META1:![0-9]+]], isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
-; CHECK: [[META1]] = !DIFile(filename: "q.cpp", directory: {{.*}})
+; CHECK: [[META1]] = !DIFile(filename: "{{.*}}q.cpp", directory: {{.*}})
; CHECK: [[META3]] = !DILocalVariable(name: "sb", arg: 4, scope: [[META4:![0-9]+]])
-; CHECK: [[META4]] = distinct !DISubprogram(name: "color_rgba", scope: null, type: [[TYPE:![0-9]+]], spFlags: DISPFlagDefinition, unit: [[META0]])
-; CHECK: [[META5]] = !DILocation(line: 0, scope: [[META4]])
+; CHECK: [[META4]] = distinct !DISubprogram(name: "color_rgba", scope: null, type: [[META5:![0-9]+]], spFlags: DISPFlagDefinition, unit: [[META0]])
+; CHECK: [[META5]] = !DISubroutineType(types: [[META6:![0-9]+]])
+; CHECK: [[META6]] = !{null}
+; CHECK: [[META7]] = !DILocation(line: 0, scope: [[META4]])
;.
-!17 = !DISubroutineType(types: !18)
-!18 = !{null}
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