[llvm] [X86] Added ComputeKnownBits support for BEXTR (PR #199558)
Arihant Chawla via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 4 01:16:14 PDT 2026
https://github.com/ArihantChawla updated https://github.com/llvm/llvm-project/pull/199558
>From 5ba01fe8c255d977b52a783b149429fd66bbc30d Mon Sep 17 00:00:00 2001
From: arihant <arihant.chawla at yahoo.com>
Date: Mon, 25 May 2026 22:55:34 +0530
Subject: [PATCH 1/2] first draft
---
llvm/lib/Analysis/ValueTracking.cpp | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 3be0db5ad9c7e..33cb3750a45d8 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2232,6 +2232,29 @@ static void computeKnownBitsFromOperator(const Operator *I,
I, DemandedElts, Q, Depth, KnownBits::ssub_sat);
break;
}
+ case Intrinsic::x86_bmi_bextr_32:
+ case Intrinsic::x86_bmi_bextr_64:
+ case Intrinsic::x86_tbm_bextri_u32:
+ case Intrinsic::x86_tbm_bextri_u64: {
+ Value *Val = I->getOperand(1);
+ unsigned Length = 0, Shift;
+ if (ConstantInt *CI = dyn_cast<ConstantInt>(Val)) {
+ if (CI->getBitWidth() <= BitWidth) {
+ Shift = CI->getValue().extractBitsAsZExtValue(8, 0);
+ Length = CI->getValue().extractBitsAsZExtValue(8, 8);
+ }
+ }
+ if (Length == 0) {
+ Known.setAllZero();
+ break;
+ }
+ if ((Shift + Length) <= BitWidth) {
+ computeKnownBits(I->getOperand(0), DemandedElts, Known, Q, Depth + 1);
+ Known = Known.extractBits(Length, Shift);
+ Known = Known.zextOrTrunc(BitWidth);
+ }
+ break;
+ }
case Intrinsic::riscv_vsetvli:
case Intrinsic::riscv_vsetvlimax: {
bool HasAVL = II->getIntrinsicID() == Intrinsic::riscv_vsetvli;
>From d0f60bcca4648eac7a6ab4f5cfafd5de77616f60 Mon Sep 17 00:00:00 2001
From: arihant <arihant.chawla at yahoo.com>
Date: Sat, 4 Jul 2026 13:33:49 +0530
Subject: [PATCH 2/2] added TCs for bextr value checking
---
llvm/lib/Analysis/ValueTracking.cpp | 2 +
llvm/test/CodeGen/X86/value-tracking-bextr.ll | 117 ++++++++++++++++++
2 files changed, 119 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/value-tracking-bextr.ll
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 33cb3750a45d8..ab5bee7abbae8 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2232,6 +2232,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
I, DemandedElts, Q, Depth, KnownBits::ssub_sat);
break;
}
+ /*
case Intrinsic::x86_bmi_bextr_32:
case Intrinsic::x86_bmi_bextr_64:
case Intrinsic::x86_tbm_bextri_u32:
@@ -2255,6 +2256,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
}
break;
}
+ */
case Intrinsic::riscv_vsetvli:
case Intrinsic::riscv_vsetvlimax: {
bool HasAVL = II->getIntrinsicID() == Intrinsic::riscv_vsetvli;
diff --git a/llvm/test/CodeGen/X86/value-tracking-bextr.ll b/llvm/test/CodeGen/X86/value-tracking-bextr.ll
new file mode 100644
index 0000000000000..dd35964a61860
--- /dev/null
+++ b/llvm/test/CodeGen/X86/value-tracking-bextr.ll
@@ -0,0 +1,117 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+bmi,+tbm | FileCheck %s --check-prefixes=X64
+
+; Tests for ValueTracking known-bits handling of BEXTR/BEXTRI intrinsics.
+
+declare i32 @llvm.x86.bmi.bextr.32(i32, i32)
+declare i64 @llvm.x86.bmi.bextr.64(i64, i64)
+declare i32 @llvm.x86.tbm.bextri.u32(i32, i32) nounwind readnone
+declare i64 @llvm.x86.tbm.bextri.u64(i64, i64) nounwind readnone
+
+define i32 @vt_bextr_zero32(i32 %x) nounwind {
+; X86-LABEL: vt_bextr_zero32:
+; X86: # %bb.0:
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextr_zero32:
+; X64: xorl %eax, %eax
+; X64: retq
+entry:
+ %1 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 0)
+ ret i32 %1
+}
+
+define i64 @vt_bextr_zero64(i64 %x) nounwind {
+; X86-LABEL: vt_bextr_zero64:
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextr_zero64:
+; X64: xorl %eax, %eax
+; X64: retq
+entry:
+ %1 = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 0)
+ ret i64 %1
+}
+
+define i32 @vt_bextr_extract32(i32 %x) nounwind {
+; X86-LABEL: vt_bextr_extract32:
+; X86: # %bb.0:
+; X86-NEXT: bextrl $2052, {{[0-9]+}}(%esp), %eax # imm = 0x804
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextr_extract32:
+; X64: movl $2052, %eax # imm = 0x804
+; X64: bextrl
+; X64: retq
+entry:
+ %1 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 2052)
+ ret i32 %1
+}
+
+define i64 @vt_bextr_extract64(i64 %x) nounwind {
+; X86-LABEL: vt_bextr_extract64:
+; X86: # %bb.0:
+; X86-NEXT: bextrq %rsi, %rdi, %rax
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextr_extract64:
+; X64: movl $1028, %eax # imm = 0x404
+; X64: bextrq
+; X64: retq
+entry:
+ %1 = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 1028)
+ ret i64 %1
+}
+
+define i32 @vt_bextri_zero32(i32 %x) nounwind {
+; X86-LABEL: vt_bextri_zero32:
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextri_zero32:
+; X64: xorl %eax, %eax
+; X64: retq
+entry:
+ %1 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %x, i32 0)
+ ret i32 %1
+}
+
+define i64 @vt_bextri_zero64(i64 %x) nounwind {
+; X86-LABEL: vt_bextri_zero64:
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextri_zero64:
+; X64: xorl %eax, %eax
+; X64: retq
+entry:
+ %1 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %x, i64 0)
+ ret i64 %1
+}
+
+define i32 @vt_bextri_extract32(i32 %x) nounwind {
+; X86-LABEL: vt_bextri_extract32:
+; X86-NEXT: bextrl $2052, {{[0-9]+}}(%esp), %eax # imm = 0x804
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextri_extract32:
+; X64: bextrl $2052, %edi, %eax # imm = 0x804
+; X64: retq
+entry:
+ %1 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %x, i32 2052)
+ ret i32 %1
+}
+
+define i64 @vt_bextri_extract64(i64 %x) nounwind {
+; X86-LABEL: vt_bextri_extract64:
+; X86-NEXT: bextrq %rsi, %rdi, %rax
+; X86-NEXT: retl
+;
+; X64-LABEL: vt_bextri_extract64:
+; X64: bextrq
+; X64: retq
+entry:
+ %1 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %x, i64 1028)
+ ret i64 %1
+}
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