[llvm] [LoopDataPrefetch] Add support for target-specific memory intrinsics (PR #207358)
Shanzhi Chen via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 3 02:39:32 PDT 2026
https://github.com/chenshanzhi created https://github.com/llvm/llvm-project/pull/207358
Handle target-specific memory intrinsics in LoopDataPrefetch pass. This feature is enabled by default for AArch64 and disabled for other targets.
>From 7b3d3fbce682101eeb511ce843307691dbfff246 Mon Sep 17 00:00:00 2001
From: Shanzhi Chen <chenshanzhi at huawei.com>
Date: Fri, 3 Jul 2026 17:36:49 +0800
Subject: [PATCH] [LoopDataPrefetch] Add support for target-specific memory
intrinsics
Handle target-specific memory intrinsics in LoopDataPrefetch pass.
This feature is enabled by default for AArch64 and disabled for other targets.
---
.../llvm/Analysis/TargetTransformInfo.h | 4 ++++
.../llvm/Analysis/TargetTransformInfoImpl.h | 1 +
llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 ++++
llvm/include/llvm/MC/MCSubtargetInfo.h | 5 ++++
llvm/lib/Analysis/TargetTransformInfo.cpp | 4 ++++
llvm/lib/MC/MCSubtargetInfo.cpp | 4 ++++
llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 +++
.../Transforms/Scalar/LoopDataPrefetch.cpp | 24 +++++++++++++++++++
8 files changed, 49 insertions(+)
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 10c0509460b95..14fb0b76519d9 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1463,6 +1463,10 @@ class TargetTransformInfo {
/// \return True if prefetching should also be done for writes.
LLVM_ABI bool enableWritePrefetching() const;
+ /// \return True if prefetching should also be done for target-specific
+ /// memory intrinsics.
+ LLVM_ABI bool enableTgtMemIntrinsicPrefetching() const;
+
/// \return if target want to issue a prefetch in address space \p AS.
LLVM_ABI bool shouldPrefetchAddressSpace(unsigned AS) const;
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 5645cc63a6944..a453b3e1c2249 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -712,6 +712,7 @@ class LLVM_ABI TargetTransformInfoImplBase {
}
virtual unsigned getMaxPrefetchIterationsAhead() const { return UINT_MAX; }
virtual bool enableWritePrefetching() const { return false; }
+ virtual bool enableTgtMemIntrinsicPrefetching() const { return false; }
virtual bool shouldPrefetchAddressSpace(unsigned AS) const { return !AS; }
virtual InstructionCost getPartialReductionCost(
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 55163eb1976bf..e28943dcf86e0 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -880,6 +880,10 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return getST()->enableWritePrefetching();
}
+ bool enableTgtMemIntrinsicPrefetching() const override {
+ return getST()->enableTgtMemIntrinsicPrefetching();
+ }
+
bool shouldPrefetchAddressSpace(unsigned AS) const override {
return getST()->shouldPrefetchAddressSpace(AS);
}
diff --git a/llvm/include/llvm/MC/MCSubtargetInfo.h b/llvm/include/llvm/MC/MCSubtargetInfo.h
index 0393dea60b938..a0db55e37c859 100644
--- a/llvm/include/llvm/MC/MCSubtargetInfo.h
+++ b/llvm/include/llvm/MC/MCSubtargetInfo.h
@@ -342,6 +342,11 @@ class LLVM_ABI MCSubtargetInfo {
///
virtual bool enableWritePrefetching() const;
+ /// \return True if prefetching should also be done for target-specific
+ /// memory intrinsics.
+ ///
+ virtual bool enableTgtMemIntrinsicPrefetching() const;
+
/// Return the minimum stride necessary to trigger software
/// prefetching.
///
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp
index cdccd04f4c9ea..727e5d3270b30 100644
--- a/llvm/lib/Analysis/TargetTransformInfo.cpp
+++ b/llvm/lib/Analysis/TargetTransformInfo.cpp
@@ -912,6 +912,10 @@ bool TargetTransformInfo::enableWritePrefetching() const {
return TTIImpl->enableWritePrefetching();
}
+bool TargetTransformInfo::enableTgtMemIntrinsicPrefetching() const {
+ return TTIImpl->enableTgtMemIntrinsicPrefetching();
+}
+
bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
return TTIImpl->shouldPrefetchAddressSpace(AS);
}
diff --git a/llvm/lib/MC/MCSubtargetInfo.cpp b/llvm/lib/MC/MCSubtargetInfo.cpp
index 2cae4643641a3..df447703bc416 100644
--- a/llvm/lib/MC/MCSubtargetInfo.cpp
+++ b/llvm/lib/MC/MCSubtargetInfo.cpp
@@ -406,6 +406,10 @@ bool MCSubtargetInfo::enableWritePrefetching() const {
return false;
}
+bool MCSubtargetInfo::enableTgtMemIntrinsicPrefetching() const {
+ return false;
+}
+
unsigned MCSubtargetInfo::getMinPrefetchStride(unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
unsigned NumPrefetches,
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h
index 101b0a700b41a..31b16772c5237 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -286,6 +286,9 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
unsigned getMaxPrefetchIterationsAhead() const override {
return MaxPrefetchIterationsAhead;
}
+ bool enableTgtMemIntrinsicPrefetching() const override {
+ return true;
+ }
Align getPrefFunctionAlignment() const {
return PrefFunctionAlignment;
}
diff --git a/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp b/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
index fe20c24318e12..cc8a961d928db 100644
--- a/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
@@ -40,6 +40,11 @@ static cl::opt<bool>
PrefetchWrites("loop-prefetch-writes", cl::Hidden, cl::init(false),
cl::desc("Prefetch write addresses"));
+static cl::opt<bool>
+PrefetchTgtMemIntrinsics("loop-prefetch-tgt-mem-intrinsics", cl::Hidden,
+ cl::init(false),
+ cl::desc("Prefetch addresses from target-specific memory intrinsics"));
+
static cl::opt<unsigned>
PrefetchDistance("prefetch-distance",
cl::desc("Number of instructions to prefetch ahead"),
@@ -102,6 +107,12 @@ class LoopDataPrefetch {
return TTI->enableWritePrefetching();
}
+ bool doPrefetchTgtMemIntrinsics() {
+ if (PrefetchTgtMemIntrinsics.getNumOccurrences() > 0)
+ return PrefetchTgtMemIntrinsics;
+ return TTI->enableTgtMemIntrinsicPrefetching();
+ }
+
AssumptionCache *AC;
DominatorTree *DT;
LoopInfo *LI;
@@ -334,6 +345,19 @@ bool LoopDataPrefetch::runOnLoop(Loop *L) {
if (!doPrefetchWrites()) continue;
MemI = SMemI;
PtrValue = SMemI->getPointerOperand();
+ } else if (IntrinsicInst *IntrI = dyn_cast<IntrinsicInst>(&I)) {
+ if (!doPrefetchTgtMemIntrinsics())
+ continue;
+ MemIntrinsicInfo IntrInfo;
+ bool IsTgtMemIntrinsic = TTI->getTgtMemIntrinsic(IntrI, IntrInfo);
+ if (!IsTgtMemIntrinsic)
+ continue;
+ if (!IntrInfo.isUnordered())
+ continue;
+ if (IntrInfo.WriteMem && !doPrefetchWrites())
+ continue;
+ MemI = IntrI;
+ PtrValue = IntrInfo.PtrVal;
} else continue;
unsigned PtrAddrSpace = PtrValue->getType()->getPointerAddressSpace();
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