[llvm] [RISCV] Report "too many operands" for surplus operands in AsmParser (PR #207142)

[Craig Topper via llvm-commits]

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@@ -14,19 +17,13 @@ sfence.w.inval 0x10 # CHECK: :[[@LINE]]:1: error: invalid instruction
 
 sfence.inval.ir 0x10 # CHECK: :[[@LINE]]:1: error: invalid instruction
 
-hfence.vvma zero, a1, a2
-# CHECK: :[[#@LINE-1]]:1: error: invalid instruction, any one of the following would fix this:
-# CHECK: :[[#@LINE-2]]:13: note: invalid operand for instruction
-# CHECK: :[[#@LINE-3]]:19: note: invalid operand for instruction
+hfence.vvma zero, a1, a2 # CHECK: :[[@LINE]]:13: error: too many operands for instruction
 
-hfence.vvma a0, 0x10 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
+hfence.vvma a0, 0x10 # CHECK: :[[@LINE]]:13: error: too many operands for instruction
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topperc wrote:

In this case, there is a 2 operand version that takes two registers. So it's not always too many operands. But I don't if that can be reported.

https://github.com/llvm/llvm-project/pull/207142