[llvm] a1baf39 - [SLP][NFC]Remove undefs from tests, NFC
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 2 10:14:51 PDT 2026
Author: Alexey Bataev
Date: 2026-07-02T13:14:46-04:00
New Revision: a1baf39dc1d8a34a10c877ee4217c57e53edeed9
URL: https://github.com/llvm/llvm-project/commit/a1baf39dc1d8a34a10c877ee4217c57e53edeed9
DIFF: https://github.com/llvm/llvm-project/commit/a1baf39dc1d8a34a10c877ee4217c57e53edeed9.diff
LOG: [SLP][NFC]Remove undefs from tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/207233
Added:
Modified:
llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll b/llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
index a059c9bdbcbcd..5b8ef03947412 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -mtriple=x86_64-unknown-linux -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,DEFAULT,SSE2
; RUN: opt < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64-v2 -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,DEFAULT,SSE4
-; RUN: opt < %s -mtriple=x86_64-unknown-linux -mcpu=corei7-avx -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,DEFAULT,AVX,AVX1
-; RUN: opt < %s -mtriple=x86_64-unknown-linux -mcpu=core-avx2 -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,DEFAULT,AVX,AVX2
+; RUN: opt < %s -mtriple=x86_64-unknown-linux -mcpu=corei7-avx -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,DEFAULT,AVX1
+; RUN: opt < %s -mtriple=x86_64-unknown-linux -mcpu=core-avx2 -passes=slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,DEFAULT,AVX2
; RUN: opt < %s -mtriple=x86_64-unknown-linux -mcpu=skx -passes=slp-vectorizer -S -slp-threshold=-100 | FileCheck %s --check-prefixes=CHECK,THRESH
@arr = local_unnamed_addr global [32 x i32] zeroinitializer, align 16
@@ -1070,31 +1070,29 @@ define i8 @umin_intrinsic_rdx_v16i8(ptr %p0) {
define void @PR49730() {
; CHECK-LABEL: @PR49730(
-; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> <i32 2, i32 2, i32 1, i32 undef>, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 1>)
-; CHECK-NEXT: [[TMP2:%.*]] = sub nsw <4 x i32> undef, [[TMP1]]
-; CHECK-NEXT: [[T12:%.*]] = sub nsw i32 undef, undef
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> <i32 2, i32 2, i32 1, i32 9>, <4 x i32> <i32 5, i32 4, i32 7, i32 1>)
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw <4 x i32> <i32 1, i32 6, i32 8, i32 10>, [[TMP1]]
+; CHECK-NEXT: [[T12:%.*]] = sub nsw i32 12, 11
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> [[TMP2]])
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP3]], i32 [[T12]])
-; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP4]], i32 undef)
+; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP4]], i32 3)
; CHECK-NEXT: [[T14:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP5]], i32 93)
; CHECK-NEXT: ret void
;
- %t = call i32 @llvm.smin.i32(i32 undef, i32 2)
- %t1 = sub nsw i32 undef, %t
- %t2 = call i32 @llvm.umin.i32(i32 undef, i32 %t1)
- %t3 = call i32 @llvm.smin.i32(i32 undef, i32 2)
- %t4 = sub nsw i32 undef, %t3
+ %t = call i32 @llvm.smin.i32(i32 5, i32 2)
+ %t1 = sub nsw i32 1, %t
+ %t2 = call i32 @llvm.umin.i32(i32 3, i32 %t1)
+ %t3 = call i32 @llvm.smin.i32(i32 4, i32 2)
+ %t4 = sub nsw i32 6, %t3
%t5 = call i32 @llvm.umin.i32(i32 %t2, i32 %t4)
- %t6 = call i32 @llvm.smin.i32(i32 undef, i32 1)
- %t7 = sub nuw nsw i32 undef, %t6
+ %t6 = call i32 @llvm.smin.i32(i32 7, i32 1)
+ %t7 = sub nuw nsw i32 8, %t6
%t8 = call i32 @llvm.umin.i32(i32 %t5, i32 %t7)
- %t9 = call i32 @llvm.smin.i32(i32 undef, i32 1)
- %t10 = sub nsw i32 undef, %t9
+ %t9 = call i32 @llvm.smin.i32(i32 9, i32 1)
+ %t10 = sub nsw i32 10, %t9
%t11 = call i32 @llvm.umin.i32(i32 %t8, i32 %t10)
- %t12 = sub nsw i32 undef, undef
+ %t12 = sub nsw i32 12, 11
%t13 = call i32 @llvm.umin.i32(i32 %t11, i32 %t12)
%t14 = call i32 @llvm.umin.i32(i32 %t13, i32 93)
ret void
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; AVX: {{.*}}
diff --git a/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll b/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
index e7189b6e74237..70f2e1a4cc725 100644
--- a/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
+++ b/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
@@ -42,7 +42,7 @@ define <4 x float> @simple_select(<4 x float> %a, <4 x float> %b, <4 x i32> %c)
declare void @llvm.assume(i1) nounwind
; This entire tree is ephemeral, don't vectorize any of it.
-define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
+define void @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
; CHECK-LABEL: @simple_select_eph(
; CHECK-NEXT: [[C0:%.*]] = extractelement <4 x i32> [[C:%.*]], i32 0
; CHECK-NEXT: [[C1:%.*]] = extractelement <4 x i32> [[C]], i32 1
@@ -77,7 +77,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
; CHECK-NEXT: [[Q6:%.*]] = fadd float [[Q4]], [[Q5]]
; CHECK-NEXT: [[QI:%.*]] = fcmp olt float [[Q6]], [[Q5]]
; CHECK-NEXT: call void @llvm.assume(i1 [[QI]])
-; CHECK-NEXT: ret <4 x float> undef
+; CHECK-NEXT: ret void
;
%c0 = extractelement <4 x i32> %c, i32 0
%c1 = extractelement <4 x i32> %c, i32 1
@@ -112,7 +112,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
%q6 = fadd float %q4, %q5
%qi = fcmp olt float %q6, %q5
call void @llvm.assume(i1 %qi)
- ret <4 x float> undef
+ ret void
}
; Insert in an order
diff erent from the vector indices to make sure it
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