[llvm] [X86] Add vXi64 MULHU lowering, keeping full-width products scalar (PR #206983)

[Phoebe Wang via llvm-commits]

phoebewang wrote:

Add data pre-https://github.com/llvm/llvm-project/pull/169819

SPR (Max 9480)

```
udiv_vec     ns med=  0.776 [0.776..0.776]  MHz=3500
div_vec      ns med=  0.768 [0.649..0.768]  MHz=3500
wyhash       ns med=  0.785 [0.783..0.785]  MHz=3500
fp_adv c0    ns med=  0.768 [0.767..0.768]  MHz=3500
fp_adv c1    ns med=  1.782 [1.781..1.785]  MHz=3400
```

ICL (Platinum 8380)
```
udiv_vec     ns med=  0.926 [0.926..0.926]  MHz=3000
div_vec      ns med=  0.966 [0.962..0.969]  MHz=3000
wyhash       ns med=  1.187 [1.186..1.187]  MHz=3000
fp_adv c0    ns med=  0.928 [0.927..0.928]  MHz=3000
fp_adv c1    ns med=  2.032 [2.031..2.033]  MHz=3000
```

https://github.com/llvm/llvm-project/pull/206983