https://github.com/walkerkd created https://github.com/llvm/llvm-project/pull/207174
Extend the C1-Nano scheduling model to add support for SME instructions. These instructions differ from legacy scheduling model instruction definitions in that they are sent to the CME co-processor when in streaming mode. Modelling these instructions requires several changes to the scheduling model
- definitions of CME processor resources. Instructions sent to this co-processor are modelled as having latency derived from the SME software optimization guide (SWOG),
- predicating the process resource groups for instructions sent to the CME co-processor when in streaming mode, tests for all SME instructions in the software optimization guide
Currently the C1-Nano SWOG lacks details of the following, so are not currently implemented:
- instructions added by SME but don't require the processor to be in streaming mode
C1-Nano SWOG: https://developer.arm.com/documentation/109590/0001
SME SWOG: https://developer.arm.com/documentation/111048/0103
The changes are modelled on the addition to the C1-Ultra scheduling model to support SME.
>From d7f0d033c63a0bf3b90579f341170dfce8f22d95 Mon Sep 17 00:00:00 2001
From: Keith Walker <keith.walker at arm.com>
Date: Wed, 1 Jul 2026 15:58:57 +0100
Subject: [PATCH] [AArch64] SME definitions for C1-Nano scheduling model
Extend the C1-Nano scheduling model to add support for SME instructions.
These instructions differ from legacy scheduling model instruction
definitions in that they are sent to the CME co-processor when in
streaming mode. Modelling these instructions requires several changes
to the scheduling model
- definitions of CME processor resources. Instructions sent to this
co-processor are modelled as having latency derived from the SME
software optimization guide (SWOG),
- predicating the process resource groups for instructions sent to the
CME co-processor when in streaming mode, tests for all SME instructions
in the software optimization guide
Currently the C1-Nano SWOG lacks details of the following, so are not currently
implemented:
- instructions added by SME but don't require the processor to be in streaming mode
C1-Nano SWOG: https://developer.arm.com/documentation/109590/0001
SME SWOG: https://developer.arm.com/documentation/111048/0103
The changes are modelled on the addition to the C1-Ultra scheduling model to
support SME.
---
llvm/lib/Target/AArch64/AArch64SchedC1Nano.td | 2688 ++++---
.../Cortex/C1Nano-basic-instructions.s | 2577 +++---
.../AArch64/Cortex/C1Nano-bf16-instructions.s | 69 +-
.../Cortex/C1Nano-complxnum-instructions.s | 55 +-
.../Cortex/C1Nano-crypto-instructions.s | 109 +-
.../C1Nano-flag-manipulation-instructions.s | 59 +-
.../Cortex/C1Nano-fp16fml-instructions.s | 79 +-
.../Cortex/C1Nano-fptoint-instructions.s | 71 +-
.../AArch64/Cortex/C1Nano-i8mm-instructions.s | 65 +-
.../AArch64/Cortex/C1Nano-js-instructions.s | 49 +-
.../AArch64/Cortex/C1Nano-mops-instructions.s | 323 +-
.../AArch64/Cortex/C1Nano-mte-instructions.s | 257 +-
.../AArch64/Cortex/C1Nano-neon-instructions.s | 3165 ++++----
.../Cortex/C1Nano-ptraut-instructions.s | 159 +-
.../Cortex/C1Nano-rcpc-immo-instructions.s | 73 +-
.../C1Nano-streaming-cme-instructions.s | 287 +
.../C1Nano-streaming-sme-only-instructions.s | 943 +++
.../AArch64/Cortex/C1Nano-sve-instructions.s | 6879 +++++++++--------
.../C1Ultra-streaming-cme-instructions.s | 16 +-
.../Cortex/C1Ultra-sve-sme-instructions.s | 71 +
.../Inputs/streaming-cme-instructions.s | 3 -
.../AArch64/Inputs/sve-sme-instructions.s | 5 +
22 files changed, 10282 insertions(+), 7720 deletions(-)
create mode 100644 llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-cme-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-sme-only-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-sme-instructions.s
create mode 100644 llvm/test/tools/llvm-mca/AArch64/Inputs/sve-sme-instructions.s
diff --git a/llvm/lib/Target/AArch64/AArch64SchedC1Nano.td b/llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
index 8ca3f655b644e..b2b2a25a02c49 100644
--- a/llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
+++ b/llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
@@ -7,10 +7,14 @@
//===----------------------------------------------------------------------===//
//
// This file defines the machine model for the ARM C1-Nano processor.
-// Information is taken from the C1 Nano Core Software Optimization Guide
+// Information is taken from the Arm C1-Nano Core Software Optimization Guide
//
// https://developer.arm.com/documentation/109590/0001
//
+// and the Arm C1-Scalable Matrix Extension 2 Software Optimization Guide
+//
+// https://developer.arm.com/documentation/111048/0103
+//
//===----------------------------------------------------------------------===//
// ===---------------------------------------------------------------------===//
@@ -23,12 +27,12 @@ def C1NanoModel : SchedMachineModel {
// 2 is best case, 4 is normal case.
// 3 seems to be a good tradeoff
let PostRAScheduler = 1; // Enable PostRA scheduler pass.
- let CompleteModel = 1; // Covers instructions applicable to C1-Nano.
+ let CompleteModel = 0; // Covers instructions applicable to C1-Nano.
- list<Predicate> UnsupportedFeatures = !listconcat(SMEUnsupported.F,
- SVE2p1Unsupported.F,
- [HasSVE2p1, HasSVEB16B16,
- HasCPA, HasCSSC]);
+ list<Predicate> UnsupportedFeatures = !listconcat(SVE2Unsupported.F,
+ SME2Unsupported.F,
+ [HasSVEB16B16,
+ HasCPA, HasMTE, HasCSSC]);
}
@@ -73,6 +77,28 @@ def C1NanoUnit2VMC : ProcResGroup<[C1NanoUnitVMC, C1NanoUnitVMC]>;
def C1NanoUnit4VMC : ProcResGroup<[C1NanoUnitVMC, C1NanoUnitVMC, C1NanoUnitVMC, C1NanoUnitVMC]>;
def C1NanoUnit2VALU0: ProcResGroup<[C1NanoUnitVALU0, C1NanoUnitVALU0]>;
+// Define the CME coprocessor pipelines from the C1-SME2 guide.
+def C1NanoUnitCMELD : ProcResource<1>; // LD
+def C1NanoUnitCMEST : ProcResource<1>; // ST
+def C1NanoUnitCMEPF : ProcResource<1>; // PF
+def C1NanoUnitCMEVX0ALU : ProcResource<1>; // VX0ALU
+def C1NanoUnitCMEVX1ALU : ProcResource<1>; // VX1ALU
+def C1NanoUnitCMEVX0FPDOT : ProcResource<1>; // VX0FPDOT
+def C1NanoUnitCMEVX1FPDOT : ProcResource<1>; // VX1FPDOT
+def C1NanoUnitCMEVX0MUL : ProcResource<1>; // VX0MUL
+def C1NanoUnitCMEVX1MUL : ProcResource<1>; // VX1MUL
+def C1NanoUnitCMEPERMF : ProcResource<3>; // PERMF
+def C1NanoUnitCMEPERMS : ProcResource<2>; // PERMS
+def C1NanoUnitCMEMC : ProcResource<1>; // MC
+def C1NanoUnitCMEMML0 : ProcResource<2>; // MML0
+def C1NanoUnitCMEMML1 : ProcResource<1>; // MML1
+def C1NanoUnitCMERNMRET : ProcResource<3>; // RNMRET
+
+def C1NanoUnitCMEVXALU : ProcResGroup<[C1NanoUnitCMEVX0ALU, C1NanoUnitCMEVX1ALU]>;
+def C1NanoUnitCMEVXFPDOT : ProcResGroup<[C1NanoUnitCMEVX0FPDOT,
+ C1NanoUnitCMEVX1FPDOT]>;
+def C1NanoUnitCMEVXMUL : ProcResGroup<[C1NanoUnitCMEVX0MUL, C1NanoUnitCMEVX1MUL]>;
+def C1NanoUnitCMEPERM : ProcResGroup<[C1NanoUnitCMEPERMS, C1NanoUnitCMEPERMF]>;
// These latencies are modeled without taking into account forwarding paths
// (the software optimisation guide lists latencies taking into account
// typical forwarding paths).
@@ -83,43 +109,69 @@ def : WriteRes<WriteIEReg, [C1NanoUnitALU]> { let Latency = 1; } // ALU of Exte
def : WriteRes<WriteExtr, [C1NanoUnitALU]> { let Latency = 2; } // EXTR from a reg pair
def : WriteRes<WriteIS, [C1NanoUnitALU]> { let Latency = 2; } // Shift/Scale
-// MAC
-def : WriteRes<WriteIM32, [C1NanoUnitMAC]> { let Latency = 3; } // 32-bit Multiply
-def : WriteRes<WriteIM64, [C1NanoUnitMAC]> { let Latency = 4; let ReleaseAtCycles = [2];} // 64-bit Multiply
+// Define commonly used read types.
+def : ReadAdvance<ReadVLD, 0>;
+def : ReadAdvance<ReadExtrHi, 0>;
+def : ReadAdvance<ReadAdrBase, 0>;
+def : ReadAdvance<ReadST, 1>;
+def : ReadAdvance<ReadI, 0>;
+def : ReadAdvance<ReadISReg, 0>;
+def : ReadAdvance<ReadIEReg, 0>;
+
+// MUL
+def : ReadAdvance<ReadIM, 0>;
+def : ReadAdvance<ReadIMA, 2>;
// Div
-def : WriteRes<WriteID32, [C1NanoUnitDiv]> {
- let Latency = 12; let ReleaseAtCycles = [12];
-}
-def : WriteRes<WriteID64, [C1NanoUnitDiv]> {
- let Latency = 20; let ReleaseAtCycles = [20];
-}
+def : ReadAdvance<ReadID, 0>;
-//===----------------------------------------------------------------------===//
-// Define customized scheduler read/write types specific to the C1-Nano
-//===----------------------------------------------------------------------===//
+// -----------------------------------------------------------------------------
+// Forwarding
-class C1NanoWrite<int n, ProcResourceKind res> : SchedWriteRes<[res]> {
- let Latency = n;
+def C1NanoWrite_ADRP : SchedWriteRes<[C1NanoUnitALU]> { let Latency = 1; }
+def C1NanoWrite_LDR : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 2; }
+def C1NanoRd_LDR : SchedReadAdvance<2, [C1NanoWrite_ADRP, C1NanoWrite_LDR]>;
+def : SchedAlias<ReadAdrBase, C1NanoRd_LDR>;
+
+class C1NanoWriteVMACBypass : SchedWriteRes<[C1NanoUnitVMAC]> {
+ let Latency = 4;
}
-//===----------------------------------------------------------------------===//
+def C1NanoWriteVMACB64 : C1NanoWriteVMACBypass;
+def C1NanoWriteVMACB128 : C1NanoWriteVMACBypass;
+def C1NanoWriteVMACH64 : C1NanoWriteVMACBypass;
+def C1NanoWriteVMACH128 : C1NanoWriteVMACBypass;
+def C1NanoWriteVMACS64 : C1NanoWriteVMACBypass;
+def C1NanoWriteVMACS128 : C1NanoWriteVMACBypass;
+def C1NanoWriteVMACD128 : C1NanoWriteVMACBypass;
+
+// SIMD MAC forwarding - reduces latency to 1 cycle when conditions are met
+// for accumulator dependencies with matching destination element/register size.
+def C1NanoReadVMACB64 : SchedReadAdvance<3, [C1NanoWriteVMACB64]>;
+def C1NanoReadVMACB128 : SchedReadAdvance<3, [C1NanoWriteVMACB128]>;
+def C1NanoReadVMACH64 : SchedReadAdvance<3, [C1NanoWriteVMACH64]>;
+def C1NanoReadVMACH128 : SchedReadAdvance<3, [C1NanoWriteVMACH128]>;
+def C1NanoReadVMACS64 : SchedReadAdvance<3, [C1NanoWriteVMACS64]>;
+def C1NanoReadVMACS128 : SchedReadAdvance<3, [C1NanoWriteVMACS128]>;
+def C1NanoReadVMACD128 : SchedReadAdvance<3, [C1NanoWriteVMACD128]>;
+def : ReadAdvance<ReadVMAC, 0>;
+def : ReadAdvance<ReadVMACAccum, 0>;
+
+// -----------------------------------------------------------------------------
+
// Define generic 2 micro-op types
def C1NanoWrite_10c_1VMAC_1VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVMAC]> {
let Latency = 10;
let NumMicroOps = 2;
}
-def C1NanoWrite_10cyc_2VMAC_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU, C1NanoUnitVMAC, C1NanoUnitVMAC]> {
- let Latency = 10;
- let NumMicroOps = 2;
-}
-
def C1NanoWrite_14c_2VMAC_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU, C1NanoUnitVMAC, C1NanoUnitVMAC]> {
let Latency = 14;
let NumMicroOps = 2;
}
+def C1NanoWrite_0c : SchedWriteRes<[]> { let Latency = 0; }
+def C1NanoWrite_1B : SchedWriteRes<[C1NanoUnitB]> {}
def C1NanoWrite_1c_1ALU : SchedWriteRes<[C1NanoUnitALU]> { let Latency = 1; }
def C1NanoWrite_2c_1ALU : SchedWriteRes<[C1NanoUnitALU]> { let Latency = 2; }
def C1NanoWrite_1c_1ALU0 : SchedWriteRes<[C1NanoUnitALU0]> { let Latency = 1; }
@@ -127,13 +179,14 @@ def C1NanoWrite_2c_1ALU0 : SchedWriteRes<[C1NanoUnitALU0]> { let Latency = 2; }
def C1NanoWrite_3c_1ALU0 : SchedWriteRes<[C1NanoUnitALU0]> { let Latency = 3; }
def C1NanoWrite_5c_1ALU0 : SchedWriteRes<[C1NanoUnitALU0]> { let Latency = 5; }
def C1NanoWrite_2c_1Ld : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 2; }
+def C1NanoWrite_2c_1Ld_SI : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 2; let SingleIssue = 1; }
def C1NanoWrite_3c_1Ld : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 3; }
def C1NanoWrite_1c_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 1; }
+def C1NanoWrite_3c_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 3; }
def C1NanoWrite_2c_1MAC : SchedWriteRes<[C1NanoUnitMAC]> { let Latency = 2; }
def C1NanoWrite_2c_1PAC : SchedWriteRes<[C1NanoUnitPAC]> { let Latency = 2; }
def C1NanoWrite_4c_1PAC : SchedWriteRes<[C1NanoUnitPAC]> { let Latency = 4; }
def C1NanoWrite_5c_1PAC : SchedWriteRes<[C1NanoUnitPAC]> { let Latency = 5; }
-def C1NanoWrite_0c_1VALU : SchedWriteRes<[C1NanoUnitALU]> { let Latency = 0; }
def C1NanoWrite_2c_1VALU : SchedWriteRes<[C1NanoUnitVALU]> { let Latency = 2; }
def C1NanoWrite_3c_1VALU : SchedWriteRes<[C1NanoUnitVALU]> { let Latency = 3; }
def C1NanoWrite_3c_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 3; }
@@ -143,210 +196,320 @@ def C1NanoWrite_4c_1VALU0 : SchedWriteRes<[C1NanoUnitVALU0]> { let Latency = 4;
def C1NanoWrite_4c_1VMAC : SchedWriteRes<[C1NanoUnitVMAC]> { let Latency = 4; }
let BeginGroup = 1 in {
- def C1NanoWrite_1c_1r_2ALU : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitALU]> { let Latency = 1; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_1c_2r_2ALU : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitALU]> { let Latency = 1; let ReleaseAtCycles = [2, 2]; }
- def C1NanoWrite_2c_2r_2ALU : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitALU]> { let Latency = 2; let ReleaseAtCycles = [2, 2]; }
- def C1NanoWrite_4c_3r_2ALU : SchedWriteRes<[C1NanoUnitALU,C1NanoUnitALU]> { let Latency = 4; let ReleaseAtCycles = [3, 3]; }
- def C1NanoWrite_6c_4r_1MAC : SchedWriteRes<[C1NanoUnitMAC]> { let Latency = 6; let ReleaseAtCycles = [4]; }
- def C1NanoWrite_2c_4r_2Ld : SchedWriteRes<[C1NanoUnitLd, C1NanoUnitLd]> { let Latency = 2; let ReleaseAtCycles = [4, 4]; }
+ def C1NanoWrite_1c_2ALU_1rc : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitALU]> { let Latency = 1; let ReleaseAtCycles = [1, 1]; }
+ def C1NanoWrite_1c_2ALU_2rc : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitALU]> { let Latency = 1; let ReleaseAtCycles = [2, 2]; }
+ def C1NanoWrite_2c_2ALU_2rc : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitALU]> { let Latency = 2; let ReleaseAtCycles = [2, 2]; }
+ def C1NanoWrite_4c_2ALU_3rc : SchedWriteRes<[C1NanoUnitALU,C1NanoUnitALU]> { let Latency = 4; let ReleaseAtCycles = [3, 3]; }
+ def C1NanoWrite_6c_1MAC_4rc : SchedWriteRes<[C1NanoUnitMAC]> { let Latency = 6; let ReleaseAtCycles = [4]; }
+ def C1NanoWrite_2c_2Ld_4rc : SchedWriteRes<[C1NanoUnitLd, C1NanoUnitLd]> { let Latency = 2; let ReleaseAtCycles = [4, 4]; }
def C1NanoWrite_3c_2Ld : SchedWriteRes<[C1NanoUnitLd, C1NanoUnitLd]> { let Latency = 3; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_1c_2r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 1; let ReleaseAtCycles = [2]; }
- def C1NanoWrite_3c_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 3; }
- def C1NanoWrite_3c_r2_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 3; let ReleaseAtCycles = [2]; }
- def C1NanoWrite_5c_r3_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [3]; }
- def C1NanoWrite_5c_r4_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [4]; }
- def C1NanoWrite_7c_6r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 7; let ReleaseAtCycles = [6]; }
- def C1NanoWrite_7c_7r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 7; let ReleaseAtCycles = [7]; }
- def C1NanoWrite_9c_7r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 9; let ReleaseAtCycles = [7]; }
- def C1NanoWrite_1c_1r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 1; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_2c_1r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 2; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_3c_1VALU_RC0 : SchedWriteRes<[C1NanoUnitVALU]> { let Latency = 3; }
- def C1NanoWrite_3c_1r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 3; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_4c_1r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 4; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_4c_4r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 4; let ReleaseAtCycles = [4, 4]; }
- def C1NanoWrite_5c_1r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_5c_2r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [2, 2]; }
- def C1NanoWrite_5c_3r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [3, 3]; }
- def C1NanoWrite_5c_5r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [5, 5]; }
- def C1NanoWrite_6c_3r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 6; let ReleaseAtCycles = [3, 3]; }
- def C1NanoWrite_6c_4r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 6; let ReleaseAtCycles = [4, 4]; }
- def C1NanoWrite_7c_4r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 7; let ReleaseAtCycles = [4, 4]; }
- def C1NanoWrite_8c_4r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 8; let ReleaseAtCycles = [4, 4]; }
- def C1NanoWrite_8c_5r_1VALU : SchedWriteRes<[C1NanoUnitVALU]> { let Latency = 8; let ReleaseAtCycles = [5]; }
- def C1NanoWrite_8c_5r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 8; let ReleaseAtCycles = [5, 5]; }
- def C1NanoWrite_9c_7r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 9; let ReleaseAtCycles = [7, 7]; }
- def C1NanoWrite_16c_9r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 16; let ReleaseAtCycles = [9, 9]; }
- def C1NanoWrite_23c_25r_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 32; let ReleaseAtCycles = [25, 25]; }
- def C1NanoWrite_4c_1r_2VALU0_2 : SchedWriteRes<[C1NanoUnit2VALU0]> { let Latency = 4; let ReleaseAtCycles = [1]; }
- def C1NanoWrite_6c_4r_2VALU0 : SchedWriteRes<[C1NanoUnitVALU0]> { let Latency = 6; let ReleaseAtCycles = [4]; }
- def C1NanoWrite_8c_5r_1VALU0_2 : SchedWriteRes<[C1NanoUnit2VALU0]> { let Latency = 8; let ReleaseAtCycles = [5]; }
- def C1NanoWrite_12c_5r_1VALU0 : SchedWriteRes<[C1NanoUnitVALU0]> { let Latency = 12; let ReleaseAtCycles = [5]; }
- def C1NanoWrite_4c_1r_2VMAC : SchedWriteRes<[C1NanoUnitVMAC, C1NanoUnitVMAC]> { let Latency = 4; let ReleaseAtCycles = [1, 1]; }
- def C1NanoWrite_3c_2r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 3; let ReleaseAtCycles = [2]; }
- def C1NanoWrite_8c_5r_1VMC_2 : SchedWriteRes<[C1NanoUnit2VMC]> { let Latency = 8; let ReleaseAtCycles = [5]; }
- def C1NanoWrite_8c_5r_1VMC_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 8; let ReleaseAtCycles = [5]; }
- def C1NanoWrite_8c_5r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 8; let ReleaseAtCycles = [5]; }
- def C1NanoWrite_8c_5r_2VMC_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 8; let ReleaseAtCycles = [5, 5]; }
- def C1NanoWrite_9c_7r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 9; let ReleaseAtCycles = [7]; }
- def C1NanoWrite_11c_5r_1VMC_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 11; let ReleaseAtCycles = [5]; }
- def C1NanoWrite_12c_9r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 12; let ReleaseAtCycles = [9]; }
- def C1NanoWrite_12c_9r_1VMC_2 : SchedWriteRes<[C1NanoUnit2VMC]> { let Latency = 12; let ReleaseAtCycles = [9]; }
- def C1NanoWrite_12c_9r_2VMC_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 12; let ReleaseAtCycles = [9, 9]; }
- def C1NanoWrite_13c_5r_2VMC_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 13; let ReleaseAtCycles = [5, 5]; }
- def C1NanoWrite_13c_10r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 13; let ReleaseAtCycles = [10]; }
- def C1NanoWrite_13c_10r_1VMC_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 13; let ReleaseAtCycles = [10]; }
- def C1NanoWrite_13c_10r_2VMC : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 13; let ReleaseAtCycles = [10, 10]; }
- def C1NanoWrite_13c_11r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 13; let ReleaseAtCycles = [11]; }
- def C1NanoWrite_14c_9r_1VMC_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 14; let ReleaseAtCycles = [9]; }
- def C1NanoWrite_15c_12r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 15; let ReleaseAtCycles = [12]; }
- def C1NanoWrite_21c_19r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 21; let ReleaseAtCycles = [19]; }
- def C1NanoWrite_22c_19r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 22; let ReleaseAtCycles = [19]; }
- def C1NanoWrite_22c_19r_1VMC_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 22; let ReleaseAtCycles = [19]; }
- def C1NanoWrite_22c_19r_2VMC_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 22; let ReleaseAtCycles = [19, 19]; }
- def C1NanoWrite_25c_19r_1VMC_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 25; let ReleaseAtCycles = [19]; }
- def C1NanoWrite_26c_23r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 26; let ReleaseAtCycles = [23]; }
- def C1NanoWrite_37c_35r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 37; let ReleaseAtCycles = [35]; }
- def C1NanoWrite_68c_66r_1VMC : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 68; let ReleaseAtCycles = [66]; }
+ def C1NanoWrite_1c_1LdSt_2rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 1; let ReleaseAtCycles = [2]; }
+// def C1NanoWrite_3c_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 3; }
+ def C1NanoWrite_3c_1LdSt_2rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 3; let ReleaseAtCycles = [2]; }
+// def C1NanoWrite_5c_1LdSt_3rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [3]; }
+// def C1NanoWrite_5c_1LdSt_4rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [4]; }
+ def C1NanoWrite_7c_1LdSt_6rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 7; let ReleaseAtCycles = [6]; }
+ def C1NanoWrite_7c_1LdSt_7rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 7; let ReleaseAtCycles = [7]; }
+ def C1NanoWrite_9c_1LdSt_7rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 9; let ReleaseAtCycles = [7]; }
+ def C1NanoWrite_1c_2VALU_1rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 1; let ReleaseAtCycles = [1, 1]; }
+ def C1NanoWrite_2c_2VALU_1rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 2; let ReleaseAtCycles = [1, 1]; }
+ def C1NanoWrite_3c_1VALU_0rc : SchedWriteRes<[C1NanoUnitVALU]> { let Latency = 3; }
+ def C1NanoWrite_3c_2VALU_1rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 3; let ReleaseAtCycles = [1, 1]; }
+ def C1NanoWrite_4c_2VALU_1rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 4; let ReleaseAtCycles = [1, 1]; }
+ def C1NanoWrite_4c_2VALU_4rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 4; let ReleaseAtCycles = [4, 4]; }
+ def C1NanoWrite_5c_2VALU_1rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [1, 1]; }
+ def C1NanoWrite_5c_2VALU_2rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [2, 2]; }
+ def C1NanoWrite_5c_2VALU_3rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [3, 3]; }
+ def C1NanoWrite_5c_2VALU_5rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 5; let ReleaseAtCycles = [5, 5]; }
+ def C1NanoWrite_6c_2VALU_3rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 6; let ReleaseAtCycles = [3, 3]; }
+ def C1NanoWrite_6c_2VALU_4rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 6; let ReleaseAtCycles = [4, 4]; }
+ def C1NanoWrite_7c_2VALU_4rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 7; let ReleaseAtCycles = [4, 4]; }
+ def C1NanoWrite_8c_2VALU_4rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 8; let ReleaseAtCycles = [4, 4]; }
+ def C1NanoWrite_8c_1VALU_5rc : SchedWriteRes<[C1NanoUnitVALU]> { let Latency = 8; let ReleaseAtCycles = [5]; }
+ def C1NanoWrite_8c_2VALU_5rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 8; let ReleaseAtCycles = [5, 5]; }
+ def C1NanoWrite_9c_2VALU_7rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 9; let ReleaseAtCycles = [7, 7]; }
+ def C1NanoWrite_16c_2VALU_9rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 16; let ReleaseAtCycles = [9, 9]; }
+ def C1NanoWrite_23c_2VALU_25rc : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 32; let ReleaseAtCycles = [25, 25]; }
+ def C1NanoWrite_4c_2VALU_1rc0_2 : SchedWriteRes<[C1NanoUnit2VALU0]> { let Latency = 4; let ReleaseAtCycles = [1]; }
+ def C1NanoWrite_6c_2VALU_4rc0 : SchedWriteRes<[C1NanoUnitVALU0]> { let Latency = 6; let ReleaseAtCycles = [4]; }
+ def C1NanoWrite_8c_1VALU_5rc0_2 : SchedWriteRes<[C1NanoUnit2VALU0]> { let Latency = 8; let ReleaseAtCycles = [5]; }
+ def C1NanoWrite_12c_1VALU0_5rc : SchedWriteRes<[C1NanoUnitVALU0]> { let Latency = 12; let ReleaseAtCycles = [5]; }
+ def C1NanoWrite_4c_2VMAC_1rc : SchedWriteRes<[C1NanoUnitVMAC, C1NanoUnitVMAC]> { let Latency = 4; let ReleaseAtCycles = [1, 1]; }
+ def C1NanoWrite_3c_1VMC_2rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 3; let ReleaseAtCycles = [2]; }
+ def C1NanoWrite_8c_1VMC_5rc_2 : SchedWriteRes<[C1NanoUnit2VMC]> { let Latency = 8; let ReleaseAtCycles = [5]; }
+ def C1NanoWrite_8c_1VMC_5rc_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 8; let ReleaseAtCycles = [5]; }
+ def C1NanoWrite_8c_1VMC_5rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 8; let ReleaseAtCycles = [5]; }
+ def C1NanoWrite_8c_2VMC_5rc_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 8; let ReleaseAtCycles = [5, 5]; }
+ def C1NanoWrite_9c_1VMC_7rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 9; let ReleaseAtCycles = [7]; }
+ def C1NanoWrite_11c_1VMC_5rc_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 11; let ReleaseAtCycles = [5]; }
+ def C1NanoWrite_12c_1VMC_9rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 12; let ReleaseAtCycles = [9]; }
+ def C1NanoWrite_12c_1VMC_9rc_2 : SchedWriteRes<[C1NanoUnit2VMC]> { let Latency = 12; let ReleaseAtCycles = [9]; }
+ def C1NanoWrite_12c_2VMC_9rc_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 12; let ReleaseAtCycles = [9, 9]; }
+ def C1NanoWrite_13c_2VMC_5rc_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 13; let ReleaseAtCycles = [5, 5]; }
+ def C1NanoWrite_13c_1VMC_10rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 13; let ReleaseAtCycles = [10]; }
+ def C1NanoWrite_13c_1VMC_10rc_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 13; let ReleaseAtCycles = [10]; }
+ def C1NanoWrite_13c_2VMC_10rc : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 13; let ReleaseAtCycles = [10, 10]; }
+ def C1NanoWrite_13c_1VMC_11rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 13; let ReleaseAtCycles = [11]; }
+ def C1NanoWrite_14c_1VMC_9rc_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 14; let ReleaseAtCycles = [9]; }
+ def C1NanoWrite_15c_1VMC_12rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 15; let ReleaseAtCycles = [12]; }
+ def C1NanoWrite_21c_1VMC_19rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 21; let ReleaseAtCycles = [19]; }
+ def C1NanoWrite_22c_1VMC_19rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 22; let ReleaseAtCycles = [19]; }
+ def C1NanoWrite_22c_1VMC_19rc_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 22; let ReleaseAtCycles = [19]; }
+ def C1NanoWrite_22c_2VMC_19rc_2 : SchedWriteRes<[C1NanoUnit2VMC, C1NanoUnit2VMC]> { let Latency = 22; let ReleaseAtCycles = [19, 19]; }
+ def C1NanoWrite_25c_1VMC_19rc_4 : SchedWriteRes<[C1NanoUnit4VMC]> { let Latency = 25; let ReleaseAtCycles = [19]; }
+ def C1NanoWrite_26c_1VMC_23rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 26; let ReleaseAtCycles = [23]; }
+ def C1NanoWrite_37c_1VMC_35rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 37; let ReleaseAtCycles = [35]; }
+ def C1NanoWrite_68c_1VMC_66rc : SchedWriteRes<[C1NanoUnitVMC]> { let Latency = 68; let ReleaseAtCycles = [66]; }
}
-def C1NanoWrite_3c_1r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 3; let ReleaseAtCycles = [1]; }
-def C1NanoWrite_4c_1r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [1]; }
-def C1NanoWrite_4c_2r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [2]; }
-def C1NanoWrite_4c_3r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [3]; }
-def C1NanoWrite_4c_4r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [4]; }
-def C1NanoWrite_5c_1r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [1]; }
-def C1NanoWrite_5c_3r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [3]; }
-def C1NanoWrite_5c_4r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [4]; }
-def C1NanoWrite_5c_5r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [5]; }
-def C1NanoWrite_5c_6r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [6]; }
-def C1NanoWrite_5c_2r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [2]; }
-def C1NanoWrite_5c_8r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [8]; }
-def C1NanoWrite_6c_5r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 6; let ReleaseAtCycles = [5]; }
+def C1NanoWrite_3c_1LdSt_1rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 3; let ReleaseAtCycles = [1]; }
+def C1NanoWrite_4c_1LdSt_1rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [1]; }
+def C1NanoWrite_4c_1LdSt_2rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [2]; }
+def C1NanoWrite_4c_1LdSt_3rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [3]; }
+def C1NanoWrite_4c_1LdSt_4rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 4; let ReleaseAtCycles = [4]; }
+def C1NanoWrite_5c_1LdSt_1rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [1]; }
+def C1NanoWrite_5c_1LdSt_3rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [3]; }
+def C1NanoWrite_5c_1LdSt_4rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [4]; }
+def C1NanoWrite_5c_1LdSt_5rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [5]; }
+def C1NanoWrite_5c_1LdSt_6rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [6]; }
+def C1NanoWrite_5c_1LdSt_2rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [2]; }
+def C1NanoWrite_5c_1LdSt_8rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 5; let ReleaseAtCycles = [8]; }
+def C1NanoWrite_6c_1LdSt_5rc : SchedWriteRes<[C1NanoUnitLdSt]> { let Latency = 6; let ReleaseAtCycles = [5]; }
+
def C1NanoWrite_1c_2ALU : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitALU]> { let Latency = 1; }
-def C1NanoWrite_1c_2VALU : SchedWriteRes<[C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 1; }
def C1NanoWrite_1c_1PAC_1B: SchedWriteRes<[C1NanoUnitPAC, C1NanoUnitB]> { let Latency = 1; let NumMicroOps = 2; }
-def C1NanoWrite_1c_1r_1ALU_1LdSt : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitLdSt]> { let Latency = 1; let ReleaseAtCycles = [1, 1]; }
-def C1NanoWrite_2c_2r_1ALU_1LdSt : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitLdSt]> { let Latency = 2; let ReleaseAtCycles = [2, 2]; }
-def C1NanoWrite_3c_3r_1ALU_1LdSt : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitLdSt]> { let Latency = 3; let ReleaseAtCycles = [3, 3]; }
+def C1NanoWrite_1c_1ALU_1LdSt_1rc : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitLdSt]> { let Latency = 1; let ReleaseAtCycles = [1, 1]; }
+def C1NanoWrite_2c_1ALU_1LdSt_2rc : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitLdSt]> { let Latency = 2; let ReleaseAtCycles = [2, 2]; }
+def C1NanoWrite_3c_1ALU_1LdSt_3rc : SchedWriteRes<[C1NanoUnitALU, C1NanoUnitLdSt]> { let Latency = 3; let ReleaseAtCycles = [3, 3]; }
let RetireOOO = 1 in {
- def C1NanoWrite_0r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { }
- def C1NanoWrite_2r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [2]; }
- def C1NanoWrite_3r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [3]; }
- def C1NanoWrite_4r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [4]; }
- def C1NanoWrite_6r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [6]; }
- def C1NanoWrite_7r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [7]; }
- def C1NanoWrite_8r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [8]; }
- def C1NanoWrite_9r_1LdSt : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [9]; }
+ def C1NanoWrite_1LdSt_0rc : SchedWriteRes<[C1NanoUnitLdSt]> { }
+ def C1NanoWrite_1LdSt_2rc : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [2]; }
+ def C1NanoWrite_1LdSt_3rc : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [3]; }
+ def C1NanoWrite_1LdSt_4rc : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [4]; }
+ def C1NanoWrite_1LdSt_6rc : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [6]; }
+ def C1NanoWrite_1LdSt_7rc : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [7]; }
+ def C1NanoWrite_1LdSt_8rc : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [8]; }
+ def C1NanoWrite_1LdSt_9rc : SchedWriteRes<[C1NanoUnitLdSt]> { let ReleaseAtCycles = [9]; }
+ def C1NanoWrite_3c_1VMAC : SchedWriteRes<[C1NanoUnitVMAC]> { let Latency = 4; }
}
-// Load
-def : WriteRes<WriteLD, [C1NanoUnitLd]> { let Latency = 2; }
-def : WriteRes<WriteLDIdx, [C1NanoUnitLd]> { let Latency = 2; }
-def : WriteRes<WriteLDHi, [C1NanoUnitLd]> { let Latency = 2; }
-
// Pre/Post Indexing - Performed as part of address generation
-def : WriteRes<WriteAdr, []> { let Latency = 0; }
-
-// Store
-let RetireOOO = 1 in {
-def : WriteRes<WriteST, [C1NanoUnitLdSt]> { let Latency = 1; }
-def : WriteRes<WriteSTP, [C1NanoUnitLdSt]> { let Latency = 1; }
-def : WriteRes<WriteSTIdx, [C1NanoUnitLdSt]> { let Latency = 1; }
-}
-def : WriteRes<WriteSTX, [C1NanoUnitLdSt]> { let Latency = 3; }
-
-// Vector Store - Similar to vector loads, can take 1-3 cycles to issue.
-def : WriteRes<WriteVST, [C1NanoUnitLdSt]> { let Latency = 5;
- let ReleaseAtCycles = [2];}
+def : SchedAlias<WriteAdr, C1NanoWrite_0c>;
def : WriteRes<WriteAtomic, []> { let Unsupported = 1; }
-// Branch
-def : WriteRes<WriteBr, [C1NanoUnitB]>;
-def : WriteRes<WriteBrReg, [C1NanoUnitB]>;
-def : WriteRes<WriteSys, [C1NanoUnitB]>;
-def : WriteRes<WriteBarrier, [C1NanoUnitB]>;
-def : WriteRes<WriteHint, [C1NanoUnitB]>;
-
-// FP ALU
-// As WriteF result is produced in F5 and it can be mostly forwarded
-// to consumer at F1, the effectively Latency is set as 4.
-def : WriteRes<WriteF, [C1NanoUnitVALU]> { let Latency = 4; }
-def : WriteRes<WriteFCmp, [C1NanoUnitVALU, C1NanoUnitVALU]> { let Latency = 3; }
-def : WriteRes<WriteFCvt, [C1NanoUnitVALU]> { let Latency = 4; }
-def : WriteRes<WriteFCopy, [C1NanoUnitVALU]> { let Latency = 3; }
-def : WriteRes<WriteFImm, [C1NanoUnitVALU]> { let Latency = 3; }
-
+def : SchedAlias<WriteSys, C1NanoWrite_1B>;
+def : SchedAlias<WriteBarrier, C1NanoWrite_1B>;
+def : SchedAlias<WriteHint, C1NanoWrite_1B>;
def : SchedAlias<WriteVd, C1NanoWrite_4c_1VALU>;
def : SchedAlias<WriteVq, C1NanoWrite_4c_1VALU>;
-// FP Mul, Div, Sqrt. Div/Sqrt are not pipelined
-def : WriteRes<WriteFMul, [C1NanoUnitVMAC]> { let Latency = 4; }
+//===----------------------------------------------------------------------===//
+// Define customized scheduler read/write types specific to C1 Nano.
+//===----------------------------------------------------------------------===//
-let RetireOOO = 1 in {
-def : WriteRes<WriteFDiv, [C1NanoUnitVMC]> { let Latency = 22;
- let ReleaseAtCycles = [29]; }
-def C1NanoWriteVMAC : SchedWriteRes<[C1NanoUnitVMAC]> { let Latency = 4; }
+// The approach for modelling SME instructions should not be taken as accurate.
+// This is due to limitations of tablegen and the actual behaviour we want to
+// to model. The CME is a co-processor. Accurate modelling would allow for us
+// to model core-to-processor communication latencies. This is out of the scope
+// of what we can achieve at the present. As a consequence we model instructions
+// that run on the CME as by only modelling their execution latency once issued
+// rather than modelling the more complex relationship between the C1-Ultra and
+// the CME co-processor and how that will affect execution latencies. Developers
+// must therefore take latencies for SME instructions as inaccurate.
+//
+// We have several classes of SME instructions that we need to model.
+//
+// 1. SVE instructions added by SME and available when not in streaming SVE mode
+// 2. SVE instructions added by SME but not sent to CME when in streaming SVE mode
+// 3. FP/SVE/ASIMD instructions sent to CME when in streaming SVE mode
+// 4. SME instructions sent to CME and only available in streaming SVE mode
+//
+// We cannot currently model the instructions of type (1) and (2) as the
+// C1-Nano SWOG and C1-Nano SWOG does not currently contain the required details
+// for these instructions. The C1-SME2 SWOG does however contains the required
+// details for instructions of type (3) and (4).
+//
+// To model instructions of type (3) we recognise that llvm-mca doesn't include
+// information of whether we are in streaming SVE mode. However, for the sake of
+// completeness we model this class of instructions by adding
+// an llvm-mca attribute (mca-streaming-sched) which is interpreted as the core
+// being in streaming SVE mode. This allows us to at least have some data on how
+// these instructions may be scheduled when in streaming SVE mode using llvm-mca
+// if the core supports SME and this attribute is enabled. Otherwise, we default
+// to the plain non-streaming SVE mode scheduling information.
+//
+// Similarly, to model instructions of type (4) we just extend the scheduling model
+// to add definitions for this class of instructions which are "gated" via the
+// SMESchedPred predicate and mca-streaming-sched attribute. The purpose of
+// having these definitions is that information on how these instructions are
+// scheduled on the CME coprocessor is useful for analysis.
+
+// SME2 related read write types
+
+class C1NanoCMEWrite<int LatencyCycles, list<ProcResourceKind> Resources>
+ : SchedWriteRes<Resources> {
+ let Latency = LatencyCycles;
}
-class C1NanoWriteVMACBypass : SchedWriteRes<[C1NanoUnitVMAC]> {
- let Latency = 4;
+class C1NanoCMEWriteRC<int LatencyCycles, list<ProcResourceKind> Resources,
+ list<int> ReleaseCycles>
+ : SchedWriteRes<Resources> {
+ let Latency = LatencyCycles;
+ let ReleaseAtCycles = ReleaseCycles;
}
-def C1NanoWriteVMACB64 : C1NanoWriteVMACBypass;
-def C1NanoWriteVMACB128 : C1NanoWriteVMACBypass;
-def C1NanoWriteVMACH64 : C1NanoWriteVMACBypass;
-def C1NanoWriteVMACH128 : C1NanoWriteVMACBypass;
-def C1NanoWriteVMACS64 : C1NanoWriteVMACBypass;
-def C1NanoWriteVMACS128 : C1NanoWriteVMACBypass;
-def C1NanoWriteVMACD128 : C1NanoWriteVMACBypass;
+class C1NanoStreamingSchedWrite<SchedWrite StreamingWrite, SchedWrite BaseWrite>
+ : SchedWriteVariant<[
+ SchedVar<SMEMCStreamingSchedPred, [StreamingWrite]>,
+ SchedVar<NoSchedPred, [BaseWrite]>
+ ]>;
-//===----------------------------------------------------------------------===//
-// Subtarget-specific SchedRead types.
+// -----------------------------------------------------------------------------
-def : ReadAdvance<ReadVLD, 0>;
-def : ReadAdvance<ReadExtrHi, 0>;
-def : ReadAdvance<ReadAdrBase, 0>;
-def : ReadAdvance<ReadST, 1>;
+// Detailed CME scheduling derived from the SME2 software optimization guide.
+
+def C1NanoWrite_1c_1CMERNMRET : C1NanoCMEWrite<1, [C1NanoUnitCMERNMRET]>;
+
+def C1NanoWrite_2c_1CMELD : C1NanoCMEWrite<2, [C1NanoUnitCMELD]>;
+def C1NanoWrite_2c_1CMELD_1rc : C1NanoCMEWriteRC<2, [C1NanoUnitCMELD], [1]>;
+
+def C1NanoWrite_2c_1Ld_1CMELD : C1NanoCMEWrite<2, [C1NanoUnitLd, C1NanoUnitCMELD]>;
+
+def C1NanoWrite_2c_1CMEST : C1NanoCMEWrite<2, [C1NanoUnitCMEST]>;
+def C1NanoWrite_2c_1CMEST_1rc : C1NanoCMEWriteRC<2, [C1NanoUnitCMEST], [1]>;
+
+def C1NanoWrite_2c_1LdSt_1CMEST : C1NanoCMEWrite<2, [C1NanoUnitLdSt, C1NanoUnitCMEST]>;
+def C1NanoWrite_2c_2LdSt_1CMEST : C1NanoCMEWrite<2, [C1NanoUnitLdSt, C1NanoUnitLdSt,
+ C1NanoUnitCMEST]>;
+def C1NanoWrite_2c_3LdSt_1CMEST : C1NanoCMEWrite<2, [C1NanoUnitLdSt, C1NanoUnitLdSt, C1NanoUnitLdSt,
+ C1NanoUnitCMEST]>;
+def C1NanoWrite_2c_4LdSt_1CMEST : C1NanoCMEWrite<2, [C1NanoUnitLdSt, C1NanoUnitLdSt, C1NanoUnitLdSt,
+ C1NanoUnitCMEST]>;
+
+def C1NanoWrite_1c_1CMEPERM : C1NanoCMEWrite<1, [C1NanoUnitCMEPERM]>;
+def C1NanoWrite_1c_1CMEPERM_1rc : C1NanoCMEWriteRC<1, [C1NanoUnitCMEPERM], [1]>;
+def C1NanoWrite_4c_1CMEPERM : C1NanoCMEWrite<4, [C1NanoUnitCMEPERM]>;
+def C1NanoWrite_4c_1CMEPERM_2rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEPERM], [2]>;
+def C1NanoWrite_5c_1CMEPERM_2rc : C1NanoCMEWriteRC<5, [C1NanoUnitCMEPERM], [2]>;
+
+def C1NanoWrite_4c_1CMEPERMF : C1NanoCMEWrite<4, [C1NanoUnitCMEPERMF]>;
+def C1NanoWrite_4c_1CMEPERMF_1rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEPERMF], [1]>;
+def C1NanoWrite_5c_1CMEPERMF_2rc : C1NanoCMEWriteRC<5, [C1NanoUnitCMEPERMF], [2]>;
+def C1NanoWrite_7c_1CMEPERMF_4rc : C1NanoCMEWriteRC<7, [C1NanoUnitCMEPERMF], [4]>;
+
+def C1NanoWrite_12c_1CMEPERMF_1CMEVX0ALU_2rc
+ : C1NanoCMEWriteRC<12, [C1NanoUnitCMEPERMF, C1NanoUnitCMEVX0ALU], [6, 2]>;
+def C1NanoWrite_12c_1CMEPERMF_1CMEVXALU_2d3rc
+ : C1NanoCMEWriteRC<12, [C1NanoUnitCMEPERMF, C1NanoUnitCMEVXALU], [4, 3]>;
+def C1NanoWrite_4c_1CMEPERMF_1CMEVXALU_1d1rc
+ : C1NanoCMEWriteRC<4, [C1NanoUnitCMEPERMF, C1NanoUnitCMEVXALU], [1, 2]>;
+def C1NanoWrite_8c_1CMEPERMF_1CMEVXALU_1rc
+ : C1NanoCMEWriteRC<8, [C1NanoUnitCMEPERMF, C1NanoUnitCMEVXALU], [3, 2]>;
+
+def C1NanoWrite_8c_1CMEPERMF_1CMEVX0ALU_1rc
+ : C1NanoCMEWriteRC<8, [C1NanoUnitCMEPERMF, C1NanoUnitCMEVX0ALU], [1, 1]>;
+def C1NanoWrite_8c_1CMEPERMF_1CMEPERMS_1rc : C1NanoCMEWriteRC<8, [C1NanoUnitCMEPERMF,
+ C1NanoUnitCMEPERM],
+ [1, 2]>;
+def C1NanoWrite_16c_1CMEPERMS_1CMEVXALU_2d3rc
+ : C1NanoCMEWriteRC<16, [C1NanoUnitCMEPERM, C1NanoUnitCMEVXALU], [3, 3]>;
+def C1NanoWrite_7c_1CMEPERMF_1CMEVXALU_1rc
+ : C1NanoCMEWriteRC<7, [C1NanoUnitCMEVXALU, C1NanoUnitCMEPERMF], [1, 2]>;
+def C1NanoWrite_8c_1CMEPERMS_1CMEVXALU_1rc : C1NanoCMEWriteRC<8, [C1NanoUnitCMEPERM,
+ C1NanoUnitCMEVXALU],
+ [2, 1]>;
+
+def C1NanoWrite_4c_1CMEMML0_3rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEMML0], [3]>;
+def C1NanoWrite_4c_1CMEMML0_4rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEMML0], [4]>;
+
+def C1NanoWrite_4c_1CMEVXALU : C1NanoCMEWrite<4, [C1NanoUnitCMEVXALU]>;
+def C1NanoWrite_4c_1CMEVXALU_2rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEVXALU], [2]>;
+def C1NanoWrite_4c_1CMEVXALU_4rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEVXALU], [4]>;
+
+def C1NanoWrite_20c_1CMEPERMS_1CMEVXALU_1d2rc
+ : C1NanoCMEWriteRC<20, [C1NanoUnitCMEPERM, C1NanoUnitCMEVXALU], [4, 4]>;
+def C1NanoWrite_24c_1CMEPERMS_1CMEVXALU_2d5rc
+ : C1NanoCMEWriteRC<24, [C1NanoUnitCMEPERM, C1NanoUnitCMEVXALU], [5, 5]>;
+
+def C1NanoWrite_4c_1CMEVX0ALU : C1NanoCMEWrite<4, [C1NanoUnitCMEVX0ALU]>;
+
+def C1NanoWrite_4c_1CMEPERMF_1CMEVX0ALU_1rc
+ : C1NanoCMEWriteRC<4, [C1NanoUnitCMEPERMF, C1NanoUnitCMEVXALU], [1, 1]>;
+def C1NanoWrite_4c_1CMEPERMF_1CMEVX0ALU_2rc
+ : C1NanoCMEWriteRC<4, [C1NanoUnitCMEPERMF, C1NanoUnitCMEVX0ALU], [2, 2]>;
+
+def C1NanoWrite_4c_1CMEVXFPDOT : C1NanoCMEWrite<4, [C1NanoUnitCMEVXFPDOT]>;
+
+def C1NanoWrite_4c_1CMEVXMUL : C1NanoCMEWrite<4, [C1NanoUnitCMEVXMUL]>;
+
+def C1NanoWrite_2c_1CMEPF_2rc : C1NanoCMEWriteRC<2, [C1NanoUnitCMEPF], [2]>;
+
+def C1NanoWrite_5c_1CMEVXALU_1rc : C1NanoCMEWriteRC<5, [C1NanoUnitCMEVXALU], [2]>;
+def C1NanoWrite_5c_1CMEVXALU_4rc : C1NanoCMEWriteRC<5, [C1NanoUnitCMEVXALU], [4]>;
+def C1NanoWrite_6c_1CMEVXALU_4rc : C1NanoCMEWriteRC<6, [C1NanoUnitCMEVXALU], [4]>;
+def C1NanoWrite_7c_1CMEVXALU_4rc : C1NanoCMEWriteRC<7, [C1NanoUnitCMEVXALU], [4]>;
+def C1NanoWrite_8c_1CMEVXALU_1rc : C1NanoCMEWriteRC<8, [C1NanoUnitCMEVXALU], [2]>;
+def C1NanoWrite_11c_1CMEVXALU_2rc : C1NanoCMEWriteRC<11, [C1NanoUnitCMEVXALU], [2]>;
+
+def C1NanoWrite_7c_1Ld_1CMELD : C1NanoCMEWrite<7, [C1NanoUnitLd, C1NanoUnitCMELD]>;
+def C1NanoWrite_11c_1LdSt_1CMEST : C1NanoCMEWrite<11, [C1NanoUnitLdSt, C1NanoUnitCMEST]>;
+
+def C1NanoWrite_4c_1CMEMML0 : C1NanoCMEWrite<4, [C1NanoUnitCMEMML0]>;
+def C1NanoWrite_4c_1CMEMML0_1rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEMML0], [1]>;
+def C1NanoWrite_4c_1CMEMML0_2rc : C1NanoCMEWriteRC<4, [C1NanoUnitCMEMML0], [2]>;
+def C1NanoWrite_5c_1CMEMML0_1rc : C1NanoCMEWriteRC<5, [C1NanoUnitCMEMML0], [1]>;
+def C1NanoWrite_1c_1CMEMML0_2rc : C1NanoCMEWriteRC<1, [C1NanoUnitCMEMML0], [2]>;
+def C1NanoWrite_2c_1CMEMML0_1rc : C1NanoCMEWriteRC<2, [C1NanoUnitCMEMML0], [1]>;
+def C1NanoWrite_2c_1CMEMML0_2rc : C1NanoCMEWriteRC<2, [C1NanoUnitCMEMML0], [2]>;
+
+def C1NanoWrite_9c_1CMEMML1 : C1NanoCMEWrite<9, [C1NanoUnitCMEMML1]>;
+def C1NanoWrite_9c_1CMEMML1_2rc : C1NanoCMEWriteRC<9, [C1NanoUnitCMEMML1], [2]>;
+def C1NanoWrite_9c_1CMEMML1_5rc : C1NanoCMEWriteRC<9, [C1NanoUnitCMEMML1], [5]>;
+def C1NanoWrite_13c_1CMEMML1_1CMEPERMF_5rc
+ : C1NanoCMEWriteRC<13, [C1NanoUnitCMEMML1, C1NanoUnitCMEPERMF], [5, 3]>;
+
+def C1NanoWrite_10c_1CMEMC_10rc : C1NanoCMEWriteRC<10, [C1NanoUnitCMEMC], [10]>;
+def C1NanoWrite_11c_1CMEMC_11rc : C1NanoCMEWriteRC<11, [C1NanoUnitCMEMC], [11]>;
+def C1NanoWrite_12c_1CMEMC_12rc : C1NanoCMEWriteRC<12, [C1NanoUnitCMEMC], [12]>;
+def C1NanoWrite_17c_1CMEMC_17rc : C1NanoCMEWriteRC<17, [C1NanoUnitCMEMC], [17]>;
+def C1NanoWrite_25c_1CMEMC_25rc : C1NanoCMEWriteRC<25, [C1NanoUnitCMEMC], [25]>;
-def : ReadAdvance<ReadI, 0>;
-def : ReadAdvance<ReadISReg, 0>;
-def : ReadAdvance<ReadIEReg, 0>;
+def C1NanoWriteISReg : SchedWriteVariant<[
+ SchedVar<RegShiftedPred, [WriteISReg]>,
+ SchedVar<NoSchedPred, [WriteI]>]>;
+def : InstRW<[C1NanoWriteISReg], (instregex ".*rs$")>;
+//===----------------------------------------------------------------------===//
+// Define customized scheduler read/write types specific to the C1-Nano
+//===----------------------------------------------------------------------===//
-// MUL
-def : ReadAdvance<ReadIM, 0>;
-def : ReadAdvance<ReadIMA, 2>;
+class C1NanoWrite<int n, ProcResourceKind res> : SchedWriteRes<[res]> {
+ let Latency = n;
+}
-// Div
-def : ReadAdvance<ReadID, 0>;
+//===----------------------------------------------------------------------===//
+// Instruction scheduling classes.
+//===----------------------------------------------------------------------===//
-// Forwarded types
-def C1NanoWr_ADRP : SchedWriteRes<[C1NanoUnitALU]> { let Latency = 1; }
-def C1NanoWr_LDR : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 2; }
-def C1NanoRd_LDR : SchedReadAdvance<2, [C1NanoWr_ADRP, C1NanoWr_LDR]>;
-def : SchedAlias<ReadAdrBase, C1NanoRd_LDR>;
+// Branch instructions
+// -----------------------------------------------------------------------------
-// SIMD MAC forwarding - reduces latency to 1 cycle when conditions are met
-// for accumulator dependencies with matching destination element/register size.
-def C1NanoReadVMACB64 : SchedReadAdvance<3, [C1NanoWriteVMACB64]>;
-def C1NanoReadVMACB128 : SchedReadAdvance<3, [C1NanoWriteVMACB128]>;
-def C1NanoReadVMACH64 : SchedReadAdvance<3, [C1NanoWriteVMACH64]>;
-def C1NanoReadVMACH128 : SchedReadAdvance<3, [C1NanoWriteVMACH128]>;
-def C1NanoReadVMACS64 : SchedReadAdvance<3, [C1NanoWriteVMACS64]>;
-def C1NanoReadVMACS128 : SchedReadAdvance<3, [C1NanoWriteVMACS128]>;
-def C1NanoReadVMACD128 : SchedReadAdvance<3, [C1NanoWriteVMACD128]>;
-def : ReadAdvance<ReadVMAC, 0>;
-def : ReadAdvance<ReadVMACAccum, 0>;
+// Branch, immed
+// Compare and branch
+def : SchedAlias<WriteBr, C1NanoWrite_1B>;
-//===----------------------------------------------------------------------===//
-// Subtarget-specific InstRWs.
+// Branch, register
+def : SchedAlias<WriteBrReg, C1NanoWrite_1B>;
-// Address generation
-def : InstRW<[C1NanoWr_ADRP], (instrs ADR, ADRP)>;
+// Arithmetic and logical operations
+// -----------------------------------------------------------------------------
+
+// Arithmetic, basic, flagset
+def : InstRW<[C1NanoWrite_1c_2ALU], (instregex "^(ADCS|SBCS)(W|X)(r|i)$")>;
// CMP/CMN are implemented via ADDS/SUBS with Rd = ZR.
def C1NanoWriteISRegCmp : SchedWriteVariant<[
@@ -354,99 +517,29 @@ def C1NanoWriteISRegCmp : SchedWriteVariant<[
SchedVar<RegShiftedPred, [WriteISReg]>,
SchedVar<NoSchedPred, [WriteI]>]>;
-// Arithmetic, basic, flagset
-def : InstRW<[C1NanoWrite_1c_2ALU], (instregex "^(ADCS|SBCS)(W|X)(r|i)$")>;
-
// Conditional compare
def : InstRW<[C1NanoWrite_1c_2ALU], (instregex "^(CCMN|CCMP)(W|X)(r|i)$")>;
-// Variable shift
-def : InstRW<[WriteI], (instregex "(ASR|LSL|LSR|ROR)V[WX]r")>;
-
-// ROR (immediate) is implemented as an EXTR (EXTR Rd, Rs, Rs, #Imm).
-// Keep EXTR's base latency, but model the ROR (immediate) as 1-cycle.
-def C1NanoWriteExtrRORImm : SchedWriteVariant<[
- SchedVar<IsRORImmIdiomPred, [WriteI]>,
- SchedVar<NoSchedPred, [WriteExtr]>]>;
-def : InstRW<[C1NanoWriteExtrRORImm], (instrs EXTRWrri, EXTRXrri)>;
-
-// LSL/LSR (immediate) and UXTB are implemented as UBFM aliases.
-// Keep UBFM's base latency, but model these aliases as 1-cycle.
-def C1NanoWriteISFastUBFMImm : SchedWriteVariant<[
- SchedVar<IsFastUBFMImmPred, [WriteI]>,
- SchedVar<NoSchedPred, [WriteIS]>]>;
-def : InstRW<[C1NanoWriteISFastUBFMImm], (instrs UBFMWri, UBFMXri)>;
-
-// ASR (immediate) is implemented as an SBFM alias.
-// Keep SBFM's base latency, but model ASR (immediate) as 1-cycle.
-def C1NanoWriteISFastSBFMImm : SchedWriteVariant<[
- SchedVar<IsFastSBFMImmPred, [WriteI]>,
- SchedVar<NoSchedPred, [WriteIS]>]>;
-def : InstRW<[C1NanoWriteISFastSBFMImm], (instrs SBFMWri, SBFMXri)>;
-
-// FP conditional compare
-// def : InstRW<[C1NanoWrite_5c_5r_2VALU], (instregex "FCCMP")>;
+// Divide and multiply instructions
+// -----------------------------------------------------------------------------
-def C1NanoWriteISReg : SchedWriteVariant<[
- SchedVar<RegShiftedPred, [WriteISReg]>,
- SchedVar<NoSchedPred, [WriteI]>]>;
-def : InstRW<[C1NanoWriteISReg], (instregex ".*rs$")>;
+// SDIV, UDIV
+def : WriteRes<WriteID32, [C1NanoUnitDiv]> {
+ let Latency = 12; let ReleaseAtCycles = [12];
+}
+def : WriteRes<WriteID64, [C1NanoUnitDiv]> {
+ let Latency = 20; let ReleaseAtCycles = [20];
+}
-// Reverse bits
-def : InstRW<[WriteI], (instrs RBITWr, RBITXr)>;
+// MAC
+def : WriteRes<WriteIM32, [C1NanoUnitMAC]> { let Latency = 3; } // 32-bit Multiply
+def : WriteRes<WriteIM64, [C1NanoUnitMAC]> { let Latency = 4; let ReleaseAtCycles = [2];} // 64-bit Multiply
// Multiply accumulate long
def : InstRW<[C1NanoWrite_2c_1MAC], (instregex "[SU]M(ADD|SUB)L")>;
// Multiply high
-def : InstRW<[C1NanoWrite_6c_4r_1MAC], (instregex "[SU]MULHr")>;
-
-// ASIMD FP compare
-def : InstRW<[C1NanoWrite_3c_1VALU],
- (instregex "^(FACGE|FACGT|FCMEQ|FCMGE|FCMGT|FCMLE|FCMLT)(v|16|32|64)")>;
-
-// ASIMD FP, complex add
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCADDv")>;
-
-// ASIMD reverse bits.
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "RBITv")>;
-
-// ASIMD count
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(CLS|CLZ|CNT)v")>;
-
-// ASIMD scalar DUP (asm mnemonic is "mov", e.g. "mov b0, v0.b[1]").
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "DUPi")>;
-
-// ASIMD transfer, element to gen reg
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]MOVvi")>;
-
-// ASIMD transfer from vector element to GPR with sign-extension.
-// ASIMD move between vector elements (asm mnemonic is "mov", e.g. "mov v2.b[0], v0.b[0]").
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "INSvi(8|16|32|64)lane")>;
-
-// ASIMD transfer, gen reg to element
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "INSvi(8|16|32|64)gpr")>;
-
-// FP scalar load instructions
-// -----------------------------------------------------------------------------
-
-// Load vector reg, literal
-def : InstRW<[C1NanoWrite_3c_1Ld], (instrs LDRSl, LDRDl, LDRQl)>;
-
-// Load vector reg, unscaled immediate
-def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LDUR[BHSDQ]i")>;
-
-// Load vector register, unsigned immediate
-def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LDR[BHSDQ]ui")>;
-
-// Load vector register, register offset
-def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LDR[BHSDQ]ro[WX]")>;
-
-// FP scalar store instructions
-// -----------------------------------------------------------------------------
-
-// Store vector pair, immediate offset, Q-form
-def : InstRW<[C1NanoWrite_1c_2r_1LdSt], (instregex "STN?PQ(i|post|pre)")>;
+def : InstRW<[C1NanoWrite_6c_1MAC_4rc], (instregex "[SU]MULHr")>;
// Pointer Authentication Instructions (v8.3 PAC)
// -----------------------------------------------------------------------------
@@ -475,294 +568,253 @@ def : InstRW<[C1NanoWrite_4c_1PAC], (instrs XPACD, XPACI, XPACLRI)>;
// Miscellaneous data-processing instructions
// -----------------------------------------------------------------------------
+// Address generation
+def : InstRW<[C1NanoWrite_ADRP], (instrs ADR, ADRP)>;
+
// Convert floating-point condition flags
-def : InstRW<[C1NanoWrite_1c_2r_2ALU], (instregex "^(AX|XA)FLAG")>;
+def : InstRW<[C1NanoWrite_1c_2ALU_2rc], (instregex "^(AX|XA)FLAG")>;
// Flag set instructions
-def : InstRW<[C1NanoWrite_2c_2r_2ALU], (instregex "^SETF(8|16)")>;
+def : InstRW<[C1NanoWrite_2c_2ALU_2rc], (instregex "^SETF(8|16)")>;
// Flag manipulation instructions, rotate and select
-def : InstRW<[C1NanoWrite_1c_1r_2ALU], (instrs RMIF)>;
+def : InstRW<[C1NanoWrite_1c_2ALU_1rc], (instrs RMIF)>;
// Flag manipulation instructions, invert carry
-def : InstRW<[C1NanoWrite_1c_2r_2ALU], (instrs CFINV)>;
-
-// Load instructions
-// -----------------------------------------------------------------------------
-def C1NanoWriteVLD1 : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 2; }
-def C1NanoWriteVLD1SI : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 2; let SingleIssue = 1; }
-def C1NanoWriteLDP1 : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 2; }
-def C1NanoWriteLDP3 : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 3; }
-def C1NanoWriteLDPFP : SchedWriteRes<[C1NanoUnitLd]> { let Latency = 3; }
-
-// Integer loads, immediate and register offset.
-def : InstRW<[C1NanoWr_LDR, C1NanoRd_LDR], (instregex "^LDR[WX]ui$")>;
-def : InstRW<[C1NanoWr_LDR, C1NanoRd_LDR], (instregex "^LDR[WX]ro[WX]$")>;
-
-// Load register, immediate pre-index / post-index
-def : InstRW<[WriteAdr, C1NanoWr_LDR, C1NanoWr_LDR], (instregex "LDR[WX](pre|post)")>;
-
-// Load vector register, immediate pre-index / post-index
-def : InstRW<[WriteAdr, C1NanoWriteLDPFP, C1NanoWriteLDPFP], (instregex "LDR[BHSDQ](pre|post)")>;
-
-def : InstRW<[C1NanoWriteLDP1], (instregex "LDPSWi")>;
-def : InstRW<[C1NanoWriteLDP1], (instregex "LDN?P[WX]i")>;
-def : InstRW<[C1NanoWriteLDP3,C1NanoWriteLDP3], (instregex "LDN?P[SDQ]i")>;
-def : InstRW<[WriteAdr, C1NanoWriteLDP1, C1NanoWriteLDP1], (instregex "LDPSW(pre|post)")>;
-def : InstRW<[WriteAdr, C1NanoWriteVLD1SI, C1NanoWriteLDP1], (instregex "LDPW(pre|post)")>;
-def : InstRW<[WriteAdr, C1NanoWriteVLD1, C1NanoWriteLDP1], (instregex "LDPX(pre|post)")>;
-def : InstRW<[WriteAdr, C1NanoWriteLDPFP, C1NanoWriteLDP1], (instregex "LDP[SDQ](pre|post)")>;
-def : InstRW<[WriteI], (instrs COPY)>;
-
-//---
-// Vector Loads - 128-bit per cycle
-//---
-// 1-element structures
-
-def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LD1Onev(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-def : InstRW<[C1NanoWrite_3c_1r_1LdSt], (instregex "LD1Twov(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-def : InstRW<[C1NanoWrite_4c_2r_1LdSt], (instregex "LD1Threev(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-def : InstRW<[C1NanoWrite_4c_2r_1LdSt], (instregex "LD1Fourv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LD1i(8|16|32|64)$")>; // single element
-def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LD1Rv(8b|4h|2s|1d|16b|8h|4s|2d)$")>; // replicate
-
-def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld], (instregex "LD1Onev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_3c_1r_1LdSt], (instregex "LD1Twov(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_2r_1LdSt], (instregex "LD1Threev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_2r_1LdSt], (instregex "LD1Fourv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld], (instregex "LD1i(8|16|32|64)_POST$")>; // single element
-def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld], (instregex "LD1Rv(8b|4h|2s|1d|16b|8h|4s|2d)_POST$")>; // replicate
-
-// 2-element structures
-
-def : InstRW<[C1NanoWrite_4c_1r_1LdSt], (instregex "LD2Twov(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-def : InstRW<[C1NanoWrite_4c_4r_1LdSt], (instregex "LD2i(8|16|32|64)$")>;
-def : InstRW<[C1NanoWrite_3c_1r_1LdSt], (instregex "LD2Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-
-def : InstRW<[WriteAdr, C1NanoWrite_4c_1r_1LdSt], (instregex "LD2Twov(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_4r_1LdSt], (instregex "LD2i(8|16|32|64)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_3c_1r_1LdSt], (instregex "LD2Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-
-// 3-element structures
-
-def : InstRW<[C1NanoWrite_5c_3r_1LdSt], (instregex "LD3Threev(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-def : InstRW<[C1NanoWrite_5c_5r_1LdSt], (instregex "LD3i(8|16|32|64)$")>;
-def : InstRW<[C1NanoWrite_4c_2r_1LdSt], (instregex "LD3Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[C1NanoWrite_1c_2ALU_2rc], (instrs CFINV)>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_3r_1LdSt], (instregex "LD3Threev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_5r_1LdSt], (instregex "LD3i(8|16|32|64)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_2r_1LdSt], (instregex "LD3Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-
-// 4-element structures
-
-def : InstRW<[C1NanoWrite_5c_3r_1LdSt], (instregex "LD4Fourv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-def : InstRW<[C1NanoWrite_6c_5r_1LdSt], (instregex "LD4i(8|16|32|64)$")>;
-def : InstRW<[C1NanoWrite_4c_2r_1LdSt], (instregex "LD4Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
-
-def : InstRW<[WriteAdr, C1NanoWrite_5c_3r_1LdSt], (instregex "LD4Fourv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_6c_5r_1LdSt], (instregex "LD4i(8|16|32|64)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_2r_1LdSt], (instregex "LD4Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
-
-//---
-// Vector Stores
-//---
-// 1 Element structures
-
-def : InstRW<[C1NanoWrite_4c_1r_1LdSt], (instregex "ST1i(8|16|32|64)$")>;
-def : InstRW<[C1NanoWrite_4c_1r_1LdSt], (instregex "ST1Onev(8b|4h|2s|1d)$")>;
-def : InstRW<[C1NanoWrite_4c_1r_1LdSt], (instregex "ST1Onev(16b|8h|4s|2d)$")>;
-def : InstRW<[C1NanoWrite_4c_1r_1LdSt], (instregex "ST1Twov(8b|4h|2s|1d)$")>;
-def : InstRW<[C1NanoWrite_4c_2r_1LdSt], (instregex "ST1Twov(16b|8h|4s|2d)$")>;
-// TODO: Handle the special case of ASIMD store, 1 element, multiple, 3 reg, D-form when:
-// Throughput=1/3 when the access is aligned and crosses 16B boundary, one more cycle is needed
-def : InstRW<[C1NanoWrite_4c_2r_1LdSt], (instregex "ST1Threev(8b|4h|2s|1d)$")>;
-def : InstRW<[C1NanoWrite_4c_3r_1LdSt], (instregex "ST1Threev(16b|8h|4s|2d)$")>;
-def : InstRW<[C1NanoWrite_4c_2r_1LdSt], (instregex "ST1Fourv(8b|4h|2s|1d)$")>;
-def : InstRW<[C1NanoWrite_4c_4r_1LdSt], (instregex "ST1Fourv(16b|8h|4s|2d)$")>;
-
-def : InstRW<[WriteAdr, C1NanoWrite_4c_1r_1LdSt], (instregex "ST1i(8|16|32|64)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_1r_1LdSt], (instregex "ST1Onev(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_1r_1LdSt], (instregex "ST1Onev(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_1r_1LdSt], (instregex "ST1Twov(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_2r_1LdSt], (instregex "ST1Twov(16b|8h|4s|2d)_POST$")>;
-// TODO: Handle the special case of ASIMD store, 1 element, multiple, 3 reg, D-form when:
-// Throughput=1/3 when the access is aligned and crosses 16B boundary, one more cycle is needed
-def : InstRW<[WriteAdr, C1NanoWrite_4c_2r_1LdSt], (instregex "ST1Threev(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_3r_1LdSt], (instregex "ST1Threev(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_2r_1LdSt], (instregex "ST1Fourv(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_4c_4r_1LdSt], (instregex "ST1Fourv(16b|8h|4s|2d)_POST$")>;
-
-// 2 Element structures
-def : InstRW<[C1NanoWrite_5c_2r_1LdSt], (instregex "ST2i(8|16|32|64)$")>;
-def : InstRW<[C1NanoWrite_5c_1r_1LdSt], (instregex "ST2Twov(8b|4h|2s)$")>;
-def : InstRW<[C1NanoWrite_5c_2r_1LdSt], (instregex "ST2Twov(16b|8h|4s|2d)$")>;
-
-def : InstRW<[WriteAdr, C1NanoWrite_5c_2r_1LdSt], (instregex "ST2i(8|16|32|64)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_1r_1LdSt], (instregex "ST2Twov(8b|4h|2s)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_2r_1LdSt], (instregex "ST2Twov(16b|8h|4s|2d)_POST$")>;
-
-// 3 Element structures
-def : InstRW<[C1NanoWrite_5c_4r_1LdSt], (instregex "ST3i(8|16|32|64)$")>;
-def : InstRW<[C1NanoWrite_5c_4r_1LdSt], (instregex "ST3Threev(8b|4h|2s)$")>;
-def : InstRW<[C1NanoWrite_5c_6r_1LdSt], (instregex "ST3Threev(16b|8h|4s|2d)$")>;
-
-def : InstRW<[WriteAdr, C1NanoWrite_5c_4r_1LdSt], (instregex "ST3i(8|16|32|64)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_4r_1LdSt], (instregex "ST3Threev(8b|4h|2s)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_6r_1LdSt], (instregex "ST3Threev(16b|8h|4s|2d)_POST$")>;
-
-// 4 Element structures
-def : InstRW<[C1NanoWrite_5c_8r_1LdSt], (instregex "ST4i(8|16|32|64)$")>;
-def : InstRW<[C1NanoWrite_5c_4r_1LdSt], (instregex "ST4Fourv(8b|4h|2s)$")>;
-def : InstRW<[C1NanoWrite_5c_8r_1LdSt], (instregex "ST4Fourv(16b|8h|4s|2d)$")>;
-
-def : InstRW<[WriteAdr, C1NanoWrite_5c_8r_1LdSt], (instregex "ST4i(8|16|32|64)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_4r_1LdSt], (instregex "ST4Fourv(8b|4h|2s)_POST$")>;
-def : InstRW<[WriteAdr, C1NanoWrite_5c_8r_1LdSt], (instregex "ST4Fourv(16b|8h|4s|2d)_POST$")>;
+// Variable shift
+def : InstRW<[WriteI], (instregex "(ASR|LSL|LSR|ROR)V[WX]r")>;
-//---
-// Floating Point Conversions, MAC, DIV, SQRT
-//---
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^DUP(v2i64|v2i32|v4i32|v4i16|v8i16|v8i8|v16i8)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^XTN")>;
+// Reverse bits
+def : InstRW<[WriteI], (instrs RBITWr, RBITXr)>;
-// FP convert, from vec to gen reg
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCVT[ALMNPZ][SU](S|U)?(W|X)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCVT(X)?[ALMNPXZ](S|U|N)?v")>;
+// ROR (immediate) is implemented as an EXTR (EXTR Rd, Rs, Rs, #Imm).
+// Keep EXTR's base latency, but model the ROR (immediate) as 1-cycle.
+def C1NanoWriteExtrRORImm : SchedWriteVariant<[
+ SchedVar<IsRORImmIdiomPred, [WriteI]>,
+ SchedVar<NoSchedPred, [WriteExtr]>]>;
+def : InstRW<[C1NanoWriteExtrRORImm], (instrs EXTRWrri, EXTRXrri)>;
-// FP convert, Javascript from vec to gen reg
-def : InstRW<[C1NanoWrite_4c_2VALU], (instrs FJCVTZS)>;
+// LSL/LSR (immediate) and UXTB are implemented as UBFM aliases.
+// Keep UBFM's base latency, but model these aliases as 1-cycle.
+def C1NanoWriteISFastUBFMImm : SchedWriteVariant<[
+ SchedVar<IsFastUBFMImmPred, [WriteI]>,
+ SchedVar<NoSchedPred, [WriteIS]>]>;
+def : InstRW<[C1NanoWriteISFastUBFMImm], (instrs UBFMWri, UBFMXri)>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^(S|U)CVTF(S|U)(W|X)(H|S|D)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^(S|U)CVTF(h|s|d)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^(S|U)CVTFv")>;
+// ASR (immediate) is implemented as an SBFM alias.
+// Keep SBFM's base latency, but model ASR (immediate) as 1-cycle.
+def C1NanoWriteISFastSBFMImm : SchedWriteVariant<[
+ SchedVar<IsFastSBFMImmPred, [WriteI]>,
+ SchedVar<NoSchedPred, [WriteIS]>]>;
+def : InstRW<[C1NanoWriteISFastSBFMImm], (instrs SBFMWri, SBFMXri)>;
-// MOPS instructions
+// Load instructions
// -----------------------------------------------------------------------------
-//Memory Copy Forward-only Prologue
-def : InstRW<[C1NanoWrite_2c_2r_1ALU_1LdSt], (instregex "^CPYFP")>;
+def : SchedAlias<WriteLD, C1NanoWrite_2c_1Ld>;
+def : SchedAlias<WriteLDIdx, C1NanoWrite_2c_1Ld>;
+def : SchedAlias<WriteLDHi, C1NanoWrite_2c_1Ld>;
-// Memory Copy Forward-only Main
-// Note: we model the base latency here.
+// Integer loads, immediate and register offset.
+def : InstRW<[C1NanoWrite_LDR, C1NanoRd_LDR], (instregex "^LDR[WX]ui$")>;
+def : InstRW<[C1NanoWrite_LDR, C1NanoRd_LDR], (instregex "^LDR[WX]ro[WX]$")>;
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^CPYFM")>;
+// Load register, immediate pre-index / post-index
+def : InstRW<[WriteAdr, C1NanoWrite_LDR, C1NanoWrite_LDR], (instregex "LDR[WX](pre|post)")>;
-// Memory Copy Forward-only Epilogue
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^CPYFE")>;
+// Load vector register, immediate pre-index / post-index
+def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld, C1NanoWrite_3c_1Ld], (instregex "LDR[BHSDQ](pre|post)")>;
+
+def : InstRW<[C1NanoWrite_2c_1Ld], (instregex "LDPSWi")>;
+def : InstRW<[C1NanoWrite_2c_1Ld], (instregex "LDN?P[WX]i")>;
+def : InstRW<[C1NanoWrite_3c_1Ld, C1NanoWrite_3c_1Ld], (instregex "LDN?P[SDQ]i")>;
+def : InstRW<[WriteAdr, C1NanoWrite_2c_1Ld, C1NanoWrite_2c_1Ld], (instregex "LDPSW(pre|post)")>;
+def : InstRW<[WriteAdr, C1NanoWrite_2c_1Ld_SI, C1NanoWrite_2c_1Ld], (instregex "LDPW(pre|post)")>;
+def : InstRW<[WriteAdr, C1NanoWrite_2c_1Ld_SI, C1NanoWrite_2c_1Ld], (instregex "LDPX(pre|post)")>;
+def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld, C1NanoWrite_2c_1Ld], (instregex "LDP[SDQ](pre|post)")>;
+def : InstRW<[WriteI], (instrs COPY)>;
-// Memory Copy Prologue
-def : InstRW<[C1NanoWrite_3c_3r_1ALU_1LdSt], (instregex "^CPYP")>;
+// Store instructions
+// -----------------------------------------------------------------------------
-// Memory Copy Main
-// Note: we model the base latency here.
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^CPYM")>;
+let RetireOOO = 1 in {
+def : WriteRes<WriteST, [C1NanoUnitLdSt]> { let Latency = 1; }
+def : WriteRes<WriteSTP, [C1NanoUnitLdSt]> { let Latency = 1; }
+def : WriteRes<WriteSTIdx, [C1NanoUnitLdSt]> { let Latency = 1; }
+}
+def : SchedAlias<WriteSTX, C1NanoWrite_3c_1LdSt>;
-// Memory Copy Epilogue
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^CPYE")>;
+// Vector Store - Similar to vector loads, can take 1-3 cycles to issue.
+def : WriteRes<WriteVST, [C1NanoUnitLdSt]> { let Latency = 5;
+ let ReleaseAtCycles = [2];}
-// Memory Set Prologue
-def : InstRW<[C1NanoWrite_2c_2r_1ALU_1LdSt], (instregex "^SETP")>;
+// Tag Data processing
+// -----------------------------------------------------------------------------
+// Arithmetic, immediate to logical address tag
+def : InstRW<[C1NanoWrite_2c_1ALU], (instrs ADDG, SUBG)>;
-// Memory Set Main
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^SETM")>;
+// Insert Random Tags
+def : InstRW<[C1NanoWrite_4c_2ALU_3rc], (instrs IRG, IRGstack)>;
-// Memory Set Epilogue
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^SETE")>;
+// Insert Tag Mask
+// Subtract Pointer
+// Subtract Pointer, flagset
+def : InstRW<[C1NanoWrite_2c_1ALU], (instrs GMI, SUBP, SUBPS)>;
-// Memory Set with tag setting Prologue
-def : InstRW<[C1NanoWrite_2c_2r_1ALU_1LdSt], (instregex "^SETGP")>;
+// Tag Load instructions
+// -----------------------------------------------------------------------------
+// Load allocation tag
+def : InstRW<[C1NanoWrite_2c_1Ld], (instrs LDG)>;
-// Memory Set with tag setting Main
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^SETGM")>;
+// Load multiple allocation tags
+def : InstRW<[C1NanoWrite_2c_2Ld_4rc], (instrs LDGM)>;
-// Memory Set with tag setting Epilogue
-def : InstRW<[C1NanoWrite_1c_1r_1ALU_1LdSt], (instregex "^MOPSSETGE")>;
+// Tag store instructions
+// -----------------------------------------------------------------------------
+// Store allocation tags to one granule, post-index
+// Store allocation tags to one granule, pre-index
+// Store allocation tag to one granule, zeroing, post-index
+// Store Allocation Tag to one granule, zeroing, pre-index
+// Store allocation tags to one granule, signed offset
+// Store allocation tag and reg pair to memory, signed offset
+// Store allocation tag and reg pair to memory, post-Index
+// Store allocation tag and reg pair to memory, pre-Index
+// Store multiple allocation tags
+def : InstRW<[C1NanoWrite_1c_1LdSt], (instrs STGPreIndex, STGPostIndex,
+ STZGPreIndex, STZGPostIndex,
+ STGPpre, STGPpost,
+ STGi, STZGi,
+ STGPi, STGM, STZGM)>;
+// Store allocation tags to two granules, post-index
+// Store allocation tags to two granules, pre-index
+// Store allocation tag to two granules, zeroing, post-index
+// Store Allocation Tag to two granules, zeroing, pre-index
+// Store allocation tag to two granules, zeroing, signed offset
+def : InstRW<[C1NanoWrite_1c_1LdSt_2rc], (instrs ST2GPreIndex, ST2GPostIndex,
+ STZ2GPreIndex, STZ2GPostIndex,
+ ST2Gi, STZ2Gi)>;
// FP scalar data processing instructions
// -----------------------------------------------------------------------------
+// FP conditional compare
+def : InstRW<[C1NanoWrite_5c_2VALU_5rc], (instregex "FCCMP")>;
+
// FP divide, H-form
-def : InstRW<[C1NanoWrite_8c_5r_1VMC_4], (instrs FDIVHrr)>;
+def : InstRW<[C1NanoWrite_8c_1VMC_5rc_4], (instrs FDIVHrr)>;
// FP divide, S-form
-def : InstRW<[C1NanoWrite_13c_10r_1VMC_4], (instrs FDIVSrr)>;
+def : InstRW<[C1NanoWrite_13c_1VMC_10rc_4], (instrs FDIVSrr)>;
// FP divide, D-form
-def : InstRW<[C1NanoWrite_22c_19r_1VMC_4], (instrs FDIVDrr)>;
+def : InstRW<[C1NanoWrite_22c_1VMC_19rc_4], (instrs FDIVDrr)>;
// FP square root, H-form
-def : InstRW<[C1NanoWrite_11c_5r_1VMC_4], (instrs FSQRTHr)>;
+def : InstRW<[C1NanoWrite_11c_1VMC_5rc_4], (instrs FSQRTHr)>;
// FP square root, S-form
-def : InstRW<[C1NanoWrite_14c_9r_1VMC_4], (instrs FSQRTSr)>;
+def : InstRW<[C1NanoWrite_14c_1VMC_9rc_4], (instrs FSQRTSr)>;
// FP square root, D-form
-def : InstRW<[C1NanoWrite_25c_19r_1VMC_4], (instrs FSQRTDr)>;
+def : InstRW<[C1NanoWrite_25c_1VMC_19rc_4], (instrs FSQRTDr)>;
-// ASIMD FP data processing instructions
+// FP data processing instructions
// -----------------------------------------------------------------------------
+// As WriteF result is produced in F5 and it can be mostly forwarded
+// to consumer at F1, the effectively Latency is set as 4.
-// ASIMD FP, arith, normal
-def : InstRW<[C1NanoWriteVMAC], (instregex "^FN?M(ADD|SUB)")>;
-
-// ASIMD FP, complex multiply add
-def : InstRW<[C1NanoWriteVMAC], (instregex "^FCMLAv")>;
+// FP absolute value
+// FP arithmetic
+// FP min/max
+// FP negate
+// FP select
+def : SchedAlias<WriteF, C1NanoWrite_4c_1VALU>;
-// ASIMD FP, multiply accumulate
-def : InstRW<[C1NanoWriteVMAC], (instregex "^FML(A|S)v")>;
+// FP compare
+def : SchedAlias<WriteFCmp, C1NanoWrite_3c_2VALU>;
-// ASIMD FP divide, D-form, F61
-def : InstRW<[C1NanoWrite_8c_5r_1VMC_2], (instrs FDIVv4f16)>;
-
-// ASIMD FP divide, D-form, F32
-def : InstRW<[C1NanoWrite_13c_5r_2VMC_2], (instrs FDIVv2f32)>;
+// FP Mul, Div, Sqrt. Div/Sqrt are not pipelined
+def : WriteRes<WriteFMul, [C1NanoUnitVMAC]> { let Latency = 4; }
-// ASIMD FP divide, Q-form, F16
-def : InstRW<[C1NanoWrite_8c_5r_2VMC_2], (instrs FDIVv8f16)>;
+let RetireOOO = 1 in {
+def : WriteRes<WriteFDiv, [C1NanoUnitVMC]> { let Latency = 22;
+ let ReleaseAtCycles = [29]; }
+}
-// ASIMD FP divide, Q-form, F32
-def : InstRW<[C1NanoWrite_13c_10r_2VMC], (instrs FDIVv4f32)>;
+// FP scalar miscellaneous instructions
+// -----------------------------------------------------------------------------
-// ASIMD FP divide, Q-form, F64
-def : InstRW<[C1NanoWrite_22c_19r_2VMC_2], (instrs FDIVv2f64)>;
+// FP convert, Javascript from vec to gen reg
+def : SchedAlias<WriteFCvt, C1NanoWrite_4c_1VALU>;
-// ASIMD FP square root, D-form, F16
-def : InstRW<[C1NanoWrite_8c_5r_1VMC_2], (instrs FSQRTv4f16)>;
+// FP move, immed
+// FP move, register
+def C1NanoWrite_4c_1CMEVXALU_or_3c_1VALU_CME:
+ C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>;
-// ASIMD FP square root, D-form, F32
-def : InstRW<[C1NanoWrite_12c_9r_1VMC_2], (instrs FSQRTv2f32)>;
+def : SchedAlias<WriteFImm, C1NanoWrite_4c_1CMEVXALU_or_3c_1VALU_CME>;
-// ASIMD FP square root, Q-form, F16
-def : InstRW<[C1NanoWrite_8c_5r_2VMC_2], (instrs FSQRTv8f16)>;
+// FP transfer, from vec to gen reg
+def : SchedAlias<WriteFCopy, C1NanoWrite_4c_1CMEVXALU_or_3c_1VALU_CME>;
-// ASIMD FP square root, Q-form, F32
-def : InstRW<[C1NanoWrite_12c_9r_2VMC_2], (instrs FSQRTv4f32)>;
+// FP scalar load instructions
+// -----------------------------------------------------------------------------
-// ASIMD FP square root, Q-form, F64
-def : InstRW<[C1NanoWrite_22c_19r_2VMC_2], (instrs FSQRTv2f64)>;
+// Load vector reg, literal
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_3c_1Ld>],
+ (instregex "^LDR[SDQ]l$")>;
-def : InstRW<[C1NanoWrite_3c_2VALU], (instrs FCSELHrrr, FCSELSrrr, FCSELDrrr)>;
+// Load vector reg, unscaled immediate
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_3c_1Ld>],
+ (instregex "LDUR[BHSDQ]i")>;
-// ASIMD FP multiply
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "FMULX?(16|32|64|v)")>;
+// Load vector register, unsigned immediate
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_3c_1Ld>],
+ (instregex "LDR[BHSDQ]ui")>;
-// ASIMD FP multiply accumulate long
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "FML[AS]L2?(v|lane)")>;
+// Load vector register, register offset
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_3c_1Ld>],
+ (instregex "LDR[BHSDQ]ro[WX]")>;
-// ASIMD miscellaneous instructions
+// FP scalar store instructions
// -----------------------------------------------------------------------------
-// ASIMD move, FP immediate
-def : InstRW<[C1NanoWrite_2c_1VALU], (instrs FMOVSr, FMOVDr)>;
+// Store vector pair, immediate offset, Q-form
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_2LdSt_1CMEST,
+ C1NanoWrite_1c_1LdSt_2rc>],
+ (instregex "STN?PQ(i|post|pre)")>;
-// ASIMD move, FP transfer, from reg to vec reg
-def : InstRW<[C1NanoWrite_3c_1VALU], (instrs FMOVv2f32_ns, FMOVv4f32_ns, FMOVv2f64_ns, FMOVv4f16_ns, FMOVv8f16_ns)>;
+//---
+// Floating Point Conversions, MAC, DIV, SQRT
+//---
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^DUP(v2i64|v2i32|v4i32|v4i16|v8i16|v8i8|v16i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^XTN")>;
-// ASIMD reciprocal estimate
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "FRECP[EX]v", "URECPEv", "[FU]RSQRTEv")>;
+// FP convert, from vec to gen reg
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVT[ALMNPZ][SU](S|U)?(W|X)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVT(X)?[ALMNPXZ](S|U|N)?v")>;
-// ASIMD reciprocal step
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "FR(ECPS|SQRTS)(16|32|64|v)")>;
+// FP convert, Javascript from vec to gen reg
+def : InstRW<[C1NanoWrite_4c_2VALU], (instrs FJCVTZS)>;
+
+def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^(S|U)CVTF(S|U)(W|X)(H|S|D)")>;
+def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^(S|U)CVTF(h|s|d)")>;
+def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^(S|U)CVTFv")>;
// ASIMD integer instructions
// -----------------------------------------------------------------------------
@@ -770,66 +822,99 @@ def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "FR(ECPS|SQRTS)(16|32|64|v)")>;
// ASIMD absolute diff
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]ABDv(2i32|4i16|8i8)")>;
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]ABDv(16i8|4i32|8i16)")>;
+
// ASIMD move, integer immediate
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^MOVI(v|D)")>;
+
// ASIMD reverse
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^REV(16|32|64)v")>;
+
// ASIMD absolute diff accum
-def : InstRW<[C1NanoWrite_5c_3r_2VALU], (instregex "[SU]ABAL?v")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEVXALU_1rc,
+ C1NanoWrite_5c_2VALU_3rc>],
+ (instregex "[SU]ABAL?v")>;
+
// ASIMD absolute diff long
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]ABDLv")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEVXALU_1rc,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]ABDLv")>;
+
// ASIMD arith, basic
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "(ABS|ADD|SUB|NEG)v",
"[SU](HADDv|HSUBv)")>;
+
// ASIMD, arith, basic, long, saturate
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "SADDLv", "UADDLv", "SADDWv",
"UADDWv", "SSUBLv", "USUBLv", "SSUBWv", "USUBWv")>;
+
// ASIMD, arith, complex
def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "ADDHNv", "SUBHNv")>;
def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "([SU]QADD|[SU]QSUB|SQNEG|SUQADD|USQADD)v(16i8|2i64|4i32|8i16)$")>;
+
// ASIMD, arith, complex, rounding, add and subtract
-def : InstRW<[C1NanoWrite_6c_3r_2VALU], (instregex "RADDHNv", "RSUBHNv")>;
+def : InstRW<[C1NanoWrite_6c_2VALU_3rc], (instregex "RADDHNv", "RSUBHNv")>;
+
// ASIMD, arith, complex, rounding halving addition
def : InstRW<[C1NanoWrite_2c_1VALU], (instregex "[SU]RHADDv")>;
+
// ASIMD, arith, pair-wise
-//def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]ADDLPv", "ADDPv")>;
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]ADDLPv", "ADDPv")>;
+
// ASIMD arith, reduce
-def : InstRW<[C1NanoWrite_3c_1r_2VALU], (instregex "ADDVv(8|16)")>;
+def : InstRW<[C1NanoWrite_3c_2VALU_1rc], (instregex "ADDVv(8|16)")>;
+
// ASIMD, arith, reduce 4H/4S
-def : InstRW<[C1NanoWrite_4c_1r_2VALU], (instregex "SADDLVv", "UADDLVv", "ADDVv4")>;
+def : InstRW<[C1NanoWrite_4c_2VALU_1rc], (instregex "SADDLVv", "UADDLVv", "ADDVv4")>;
+
// ASIMD compare
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "CM(EQ|GE|GT|HI|HS|LE|LT)v(1i64|2i32|4i16|8i8)")>;
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "CM(EQ|GE|GT|HI|HS|LE|LT)v(2i64|4i32|8i16|16i8)")>;
+
// ASIMD compare test
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "CMTSTv(1i64|2i32|4i16|8i8)")>;
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "CMTSTv(2i64|4i32|8i16|16i8)")>;
+
// ASIMD unzip/zip/transpose
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(TRN|UZP|ZIP)[12]v")>;
+
// ASIMD extract
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^EXTv")>;
+
// ASIMD table lookup / table lookup extension
def : InstRW<[C1NanoWrite_4c_1VALU], (instrs TBLv8i8One, TBLv16i8One)>;
-def : InstRW<[C1NanoWrite_5c_2r_2VALU], (instrs TBLv8i8Two, TBLv16i8Two)>;
-def : InstRW<[C1NanoWrite_6c_3r_2VALU], (instrs TBLv8i8Three, TBLv16i8Three)>;
-def : InstRW<[C1NanoWrite_7c_4r_2VALU], (instrs TBLv8i8Four, TBLv16i8Four)>;
-def : InstRW<[C1NanoWrite_5c_2r_2VALU], (instrs TBXv8i8One, TBXv16i8One)>;
-def : InstRW<[C1NanoWrite_6c_3r_2VALU], (instrs TBXv8i8Two, TBXv16i8Two)>;
-def : InstRW<[C1NanoWrite_7c_4r_2VALU], (instrs TBXv8i8Three, TBXv16i8Three)>;
-def : InstRW<[C1NanoWrite_8c_5r_2VALU], (instrs TBXv8i8Four, TBXv16i8Four)>;
+def : InstRW<[C1NanoWrite_5c_2VALU_2rc], (instrs TBLv8i8Two, TBLv16i8Two)>;
+def : InstRW<[C1NanoWrite_6c_2VALU_3rc], (instrs TBLv8i8Three, TBLv16i8Three)>;
+def : InstRW<[C1NanoWrite_7c_2VALU_4rc], (instrs TBLv8i8Four, TBLv16i8Four)>;
+def : InstRW<[C1NanoWrite_5c_2VALU_2rc], (instrs TBXv8i8One, TBXv16i8One)>;
+def : InstRW<[C1NanoWrite_6c_2VALU_3rc], (instrs TBXv8i8Two, TBXv16i8Two)>;
+def : InstRW<[C1NanoWrite_7c_2VALU_4rc], (instrs TBXv8i8Three, TBXv16i8Three)>;
+def : InstRW<[C1NanoWrite_8c_2VALU_5rc], (instrs TBXv8i8Four, TBXv16i8Four)>;
+
// ASIMD logical
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "(AND|EOR|NOT|ORN)v8i8",
"(ORR|BIC)v(2i32|4i16|8i8)$", "MVNIv(2i|2s|4i16)")>;
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "(AND|EOR|NOT|ORN)v16i8",
"(ORR|BIC)v(16i8|4i32|8i16)$", "MVNIv(4i32|4s|8i16)")>;
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(BIF|BIT|BSL)v")>;
+
// ASIMD max/min, basic
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU](MIN|MAX)P?v(2i32|4i16|8i8)")>;
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU](MIN|MAX)P?v(16i8|4i32|8i16)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU](MIN|MAX)P?v(2i32|4i16|8i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU](MIN|MAX)P?v(16i8|4i32|8i16)")>;
+
// ASIMD max/min, reduce
-def : InstRW<[C1NanoWrite_4c_1r_2VALU], (instregex "[SU](MAX|MIN)Vv")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_2VALU_1rc>],
+ (instregex "[SU](MAX|MIN)Vv")>;
+
// ASIMD FP max/min, reduce.
-def : InstRW<[C1NanoWrite_4c_1r_2VALU], (instregex "^F(MAX|MIN)(NM)?Vv")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_2VALU_1rc>],
+ (instregex "^F(MAX|MIN)(NM)?Vv")>;
+
// ASIMD multiply, by element
def : InstRW<[C1NanoWriteVMACH64], (instregex "^MULv4i16_indexed$")>;
def : InstRW<[C1NanoWriteVMACH128], (instregex "^MULv8i16_indexed$")>;
@@ -837,6 +922,7 @@ def : InstRW<[C1NanoWriteVMACS64], (instregex "^MULv2i32_indexed$")>;
def : InstRW<[C1NanoWriteVMACS128], (instregex "^MULv4i32_indexed$")>;
def : InstRW<[C1NanoWrite_4c_1VMAC],
(instregex "SQR?DMULHv(1i16|1i32|2i32|4i16|4i32|8i16)(_indexed)?$")>;
+
// ASIMD multiply
def : InstRW<[C1NanoWriteVMACB64], (instregex "^MULv8i8$")>;
def : InstRW<[C1NanoWriteVMACB128], (instregex "^MULv16i8$")>;
@@ -844,7 +930,10 @@ def : InstRW<[C1NanoWriteVMACH64], (instregex "^MULv4i16$")>;
def : InstRW<[C1NanoWriteVMACH128], (instregex "^MULv8i16$")>;
def : InstRW<[C1NanoWriteVMACS64], (instregex "^MULv2i32$")>;
def : InstRW<[C1NanoWriteVMACS128], (instregex "^MULv4i32$")>;
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^PMULv(8i8|16i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^PMULv(8i8|16i8)")>;
+
// ASIMD multiply accumulate
def : InstRW<[C1NanoWriteVMACB64, C1NanoReadVMACB64], (instregex "^ML[AS]v8i8$")>;
def : InstRW<[C1NanoWriteVMACB128, C1NanoReadVMACB128], (instregex "^ML[AS]v16i8$")>;
@@ -856,8 +945,12 @@ def : InstRW<[C1NanoWriteVMACH64, C1NanoReadVMACH64], (instregex "^ML[AS]v4i16_i
def : InstRW<[C1NanoWriteVMACH128, C1NanoReadVMACH128], (instregex "^ML[AS]v8i16_indexed$")>;
def : InstRW<[C1NanoWriteVMACS64, C1NanoReadVMACS64], (instregex "^ML[AS]v2i32_indexed$")>;
def : InstRW<[C1NanoWriteVMACS128, C1NanoReadVMACS128], (instregex "^ML[AS]v4i32_indexed$")>;
+
// ASIMD multiply accumulate half
-def : InstRW<[C1NanoWrite_4c_1VMAC, ReadVMACAccum], (instregex "SQRDML[AS]H[vi]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>,
+ ReadVMACAccum], (instregex "SQRDML[AS]H[vi]")>;
+
// ASIMD multiply accumulate long
def : InstRW<[C1NanoWriteVMACH128, C1NanoReadVMACH128],
(instregex "^[SU]ML[AS]Lv(8i8|16i8)_(v8i16|indexed)$")>;
@@ -865,66 +958,432 @@ def : InstRW<[C1NanoWriteVMACS128, C1NanoReadVMACS128],
(instregex "^[SU]ML[AS]Lv(4i16|8i16)_(v4i32|indexed)$")>;
def : InstRW<[C1NanoWriteVMACD128, C1NanoReadVMACD128],
(instregex "^[SU]ML[AS]Lv(2i32|4i32)_(v2i64|indexed)$")>;
+
// ASIMD multiply accumulate long #2
-def : InstRW<[C1NanoWrite_4c_1VMAC, ReadVMACAccum], (instregex "SQDML[AS]L[iv]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>, ReadVMACAccum],
+ (instregex "SQDML[AS]L[iv]")>;
+
// ASIMD dot product
def : InstRW<[C1NanoWriteVMACS64, C1NanoReadVMACS64], (instregex "^(S|U|SU|US)DOTv8i8$")>;
def : InstRW<[C1NanoWriteVMACS128, C1NanoReadVMACS128], (instregex "^(S|U|SU|US)DOTv16i8$")>;
+
// ASIMD dot product, by scalar
def : InstRW<[C1NanoWriteVMACS64, C1NanoReadVMACS64], (instregex "^(S|U|SU|US)DOTlanev8i8$")>;
def : InstRW<[C1NanoWriteVMACS128, C1NanoReadVMACS128], (instregex "^(S|U|SU|US)DOTlanev16i8$")>;
+
// ASIMD multiply long
def : InstRW<[C1NanoWriteVMACH128], (instregex "^[SU]MULLv(8i8|16i8)_(v8i16|indexed)$")>;
def : InstRW<[C1NanoWriteVMACS128], (instregex "^[SU]MULLv(4i16|8i16)_(v4i32|indexed)$")>;
def : InstRW<[C1NanoWriteVMACD128], (instregex "^[SU]MULLv(2i32|4i32)_(v2i64|indexed)$")>;
def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "SQDMULL[iv]")>;
+
// ASIMD polynomial (8x8) multiply long
-def : InstRW<[C1NanoWrite_3c_1VALU], (instrs PMULLv8i8, PMULLv16i8)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instrs PMULLv8i8, PMULLv16i8)>;
+
// ASIMD pairwise add and accumulate
-def : InstRW<[C1NanoWrite_5c_3r_2VALU], (instregex "[SU]ADALPv")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_5c_2VALU_3rc>],
+ (instregex "[SU]ADALPv")>;
+
// ASIMD shift accumulate
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]SRA(d|v2i32|v4i16|v8i8)")>;
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]SRAv(16i8|2i64|4i32|8i16)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]SRA(d|v2i32|v4i16|v8i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]SRAv(16i8|2i64|4i32|8i16)")>;
+
// ASIMD shift accumulate #2
-def : InstRW<[C1NanoWrite_5c_3r_2VALU], (instregex "[SU]RSRA[vd]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_5c_2VALU_3rc>],
+ (instregex "[SU]RSRA[vd]")>;
+
// ASIMD shift by immed
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "SHLd$", "SHLv",
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "SHLd$", "SHLv",
"SLId$", "SRId$", "[SU]SHR[vd]", "SHRNv(8i8|4i16|2i32)")>;
+
// ASIMD shift by immediate and insert, basic
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^SLIv.*_shift", "^SRIv.*_shift")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "SHRNv(16i8|8i16|4i32)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^SLIv.*_shift", "^SRIv.*_shift")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "SHRNv(16i8|8i16|4i32)")>;
+
// ASIMD shift by immed
// SXTL and UXTL are aliases for SHLL
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[US]?SHLLv")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[US]?SHLLv")>;
+
// ASIMD shift by immed #2
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]RSHR(d|v2i32|v4i16|v8i8)",
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]RSHR(d|v2i32|v4i16|v8i8)",
"[SU]RSHRv(16i8|2i64|4i32|8i16)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "RSHRNv(2i32|4i16|8i8)",
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "RSHRNv(2i32|4i16|8i8)",
"RSHRNv(16i8|4i32|8i16)")>;
+
// ASIMD shift by register
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]SHLv(1i64|2i32|4i16|8i8)")>;
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]SHLv(2i64|4i32|8i16|16i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]SHLv(1i64|2i32|4i16|8i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]SHLv(2i64|4i32|8i16|16i8)")>;
+
// ASIMD shift by register #2
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]RSHLv(1i64|2i32|4i16|8i8)")>;
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]RSHLv(2i64|4i32|8i16|16i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]RSHLv(1i64|2i32|4i16|8i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "[SU]RSHLv(2i64|4i32|8i16|16i8)")>;
+
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "[SU]QSHLv(1i64|2i32|4i16|8i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "[SU]QSHLv(2i64|4i32|8i16|16i8)")>;
+
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "[SU]QRSHLv(1i64|2i32|4i16|8i8)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "[SU]QRSHLv(2i64|4i32|8i16|16i8)")>;
+
+// ASIMD FP data processing instructions
+// -----------------------------------------------------------------------------
+
+// ASIMD FP, arith, normal
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VMAC>],
+ (instregex "^FN?M(ADD|SUB)")>;
+
+// ASIMD FP compare
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^(FACGE|FACGT|FCMEQ|FCMGE|FCMGT|FCMLE|FCMLT)(v|16|32|64)")>;
+
+// ASIMD FP, complex add
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCADDv")>;
+
+// ASIMD FP, complex multiply add
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VMAC>],
+ (instregex "^FCMLAv")>;
+
+// ASIMD FP, multiply accumulate
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VMAC>],
+ (instregex "^FML(A|S)v")>;
+
+// ASIMD FP divide, D-form, F61
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_8c_1VMC_5rc_2>],
+ (instrs FDIVv4f16)>;
+
+// ASIMD FP divide, D-form, F32
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_13c_2VMC_5rc_2>],
+ (instrs FDIVv2f32)>;
+
+// ASIMD FP divide, Q-form, F16
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_8c_2VMC_5rc_2>],
+ (instrs FDIVv8f16)>;
+
+// ASIMD FP divide, Q-form, F32
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_13c_2VMC_10rc>],
+ (instrs FDIVv4f32)>;
+
+// ASIMD FP divide, Q-form, F64
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_22c_2VMC_19rc_2>],
+ (instrs FDIVv2f64)>;
+
+// ASIMD FP square root, D-form, F16
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_8c_1VMC_5rc_2>],
+ (instrs FSQRTv4f16)>;
+
+// ASIMD FP square root, D-form, F32
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_12c_1VMC_9rc_2>],
+ (instrs FSQRTv2f32)>;
+
+// ASIMD FP square root, Q-form, F16
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_8c_2VMC_5rc_2>],
+ (instrs FSQRTv8f16)>;
+
+// ASIMD FP square root, Q-form, F32
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_12c_2VMC_9rc_2>],
+ (instrs FSQRTv4f32)>;
+
+// ASIMD FP square root, Q-form, F64
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_22c_2VMC_19rc_2>],
+ (instrs FSQRTv2f64)>;
+
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_2VALU>],
+ (instrs FCSELHrrr, FCSELSrrr, FCSELDrrr)>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "[SU]QSHLv(1i64|2i32|4i16|8i8)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "[SU]QSHLv(2i64|4i32|8i16|16i8)")>;
+// ASIMD FP multiply
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "FMULX?(16|32|64|v)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "[SU]QRSHLv(1i64|2i32|4i16|8i8)")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "[SU]QRSHLv(2i64|4i32|8i16|16i8)")>;
+// ASIMD FP multiply accumulate long
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "FML[AS]L2?(v|lane)")>;
// ASIMD BFloat16 (BF16) instructions
// -----------------------------------------------------------------------------
+// ASIMD convert, F32 to BF16
+// Scalar convert, F32 to BF16
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instrs BFCVTN, BFCVTN2, BFCVT)>;
+
// ASIMD dot product
-def : InstRW<[C1NanoWrite_10c_1VMAC_1VALU], (instregex "^BFDOTv", "^BF16DOT")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_10c_1VMAC_1VALU>],
+ (instregex "^BFDOTv", "^BF16DOT")>;
// ASIMD matrix multiply accumulate
-def : InstRW<[C1NanoWrite_14c_2VMAC_2VALU], (instregex "^BFMMLA$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_14c_2VMAC_2VALU>],
+ (instregex "^BFMMLA$")>;
// ASIMD multiply accumulate long
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^BFMLAL[BT]$", "^BFMLAL[BT]Idx$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^BFMLAL[BT]$", "^BFMLAL[BT]Idx$")>;
+
+// ASIMD miscellaneous instructions
+// -----------------------------------------------------------------------------
+
+// ASIMD count
+def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(CLS|CLZ|CNT)v")>;
+
+// ASIMD scalar DUP (asm mnemonic is "mov", e.g. "mov b0, v0.b[1]").
+def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "DUPi")>;
+
+// ASIMD transfer, element to gen reg
+def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "[SU]MOVvi")>;
+
+// ASIMD transfer from vector element to GPR with sign-extension.
+// ASIMD move between vector elements (asm mnemonic is "mov", e.g. "mov v2.b[0], v0.b[0]").
+def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "INSvi(8|16|32|64)lane")>;
+
+// ASIMD transfer, gen reg to element
+def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "INSvi(8|16|32|64)gpr")>;
+
+// ASIMD move, FP immediate
+def : InstRW<[C1NanoWrite_2c_1VALU], (instrs FMOVSr, FMOVDr)>;
+
+// ASIMD move, FP transfer, from reg to vec reg
+def : InstRW<[C1NanoWrite_3c_1VALU], (instrs FMOVv2f32_ns, FMOVv4f32_ns, FMOVv2f64_ns, FMOVv4f16_ns, FMOVv8f16_ns)>;
+
+// ASIMD reciprocal estimate
+def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "FRECP[EX]v", "URECPEv", "[FU]RSQRTEv")>;
+
+// ASIMD reciprocal step
+def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "FR(ECPS|SQRTS)(16|32|64|v)")>;
+
+// ASIMD reverse bits.
+def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "RBITv")>;
+
+// ASIMD load instructions
+// -----------------------------------------------------------------------------
+
+// ASIMD load, 1 element, multiple, 1 reg, D-form
+// ASIMD load, 1 element, multiple, 1 reg, Q-form
+def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LD1Onev(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld], (instregex "LD1Onev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 1 element, multiple, 2 reg, D-form
+// ASIMD load, 1 element, multiple, 2 reg, Q-form
+def : InstRW<[C1NanoWrite_3c_1LdSt_1rc], (instregex "LD1Twov(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_3c_1LdSt_1rc], (instregex "LD1Twov(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 1 element, multiple, 3 reg, D-form
+// ASIMD load, 1 element, multiple, 3 reg, Q-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_2rc], (instregex "LD1Threev(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_2rc], (instregex "LD1Threev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 1 element, multiple, 4 reg, D-form
+// ASIMD load, 1 element, multiple, 4 reg, Q-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_2rc], (instregex "LD1Fourv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_2rc], (instregex "LD1Fourv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 1 element, one lane, B/H/S
+// ASIMD load, 1 element, one lane, D
+def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LD1i(8|16|32|64)$")>; // single element
+def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld], (instregex "LD1i(8|16|32|64)_POST$")>; // single element
+
+// ASIMD load, 1 element, all lanes, D-form, B/H/S
+// ASIMD load, 1 element, all lanes, D-form, D
+def : InstRW<[C1NanoWrite_3c_1Ld], (instregex "LD1Rv(8b|4h|2s|1d|16b|8h|4s|2d)$")>; // replicate
+def : InstRW<[WriteAdr, C1NanoWrite_3c_1Ld], (instregex "LD1Rv(8b|4h|2s|1d|16b|8h|4s|2d)_POST$")>; // replicate
+
+// ASIMD load, 2 element, multiple, D-form, B/H/S
+// ASIMD load, 2 element, multiple, Q-form, B/H/S
+// ASIMD load, 2 element, multiple, Q-form, D
+def : InstRW<[C1NanoWrite_4c_1LdSt_1rc], (instregex "LD2Twov(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_1rc], (instregex "LD2Twov(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 2 element, one lane, B/H
+// ASIMD load, 2 element, one lane, S
+// ASIMD load, 2 element, one lane, D
+def : InstRW<[C1NanoWrite_4c_1LdSt_4rc], (instregex "LD2i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_4rc], (instregex "LD2i(8|16|32|64)_POST$")>;
+
+// ASIMD load, 2 element, all lanes, D-form, B/H/S
+// ASIMD load, 2 element, all lanes, D-form, D
+// ASIMD load, 2 element, all lanes, Q-form
+def : InstRW<[C1NanoWrite_3c_1LdSt_1rc], (instregex "LD2Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_3c_1LdSt_1rc], (instregex "LD2Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 3 element, multiple, D-form, B/H/S
+// ASIMD load, 3 element, multiple, Q-form, B/H/S
+// ASIMD load, 3 element, multiple, Q-form, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_3rc], (instregex "LD3Threev(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_3rc], (instregex "LD3Threev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 3 element, one lane, B/H
+// ASIMD load, 3 element, one lane, S
+// ASIMD load, 3 element, one lane, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_5rc], (instregex "LD3i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_5rc], (instregex "LD3i(8|16|32|64)_POST$")>;
+
+// ASIMD load, 3 element, all lanes, D-form, B/H/S
+// ASIMD load, 3 element, all lanes, D-form, D
+// ASIMD load, 3 element, all lanes, Q-form, B/H/S
+// ASIMD load, 3 element, all lanes, Q-form, D
+def : InstRW<[C1NanoWrite_4c_1LdSt_2rc], (instregex "LD3Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_2rc], (instregex "LD3Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 4 element, multiple, D-form, B/H/S
+// ASIMD load, 4 element, multiple, Q-form, B/H/S
+// ASIMD load, 4 element, multiple, Q-form, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_3rc], (instregex "LD4Fourv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_3rc], (instregex "LD4Fourv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD load, 4 element, one lane, B/H
+// ASIMD load, 4 element, one lane, S
+// ASIMD load, 4 element, one lane, D
+def : InstRW<[C1NanoWrite_6c_1LdSt_5rc], (instregex "LD4i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_6c_1LdSt_5rc], (instregex "LD4i(8|16|32|64)_POST$")>;
+
+// ASIMD load, 4 element, all lanes, D-form, B/H/S
+// ASIMD load, 4 element, all lanes, D-form, D
+// ASIMD load, 4 element, all lanes, Q-form, B/H/S
+// ASIMD load, 4 element, all lanes, Q-form, D
+def : InstRW<[C1NanoWrite_4c_1LdSt_2rc], (instregex "LD4Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_2rc], (instregex "LD4Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>;
+
+// ASIMD store instructions
+// -----------------------------------------------------------------------------
+
+// ASIMD store, 1 element, multiple, 1 reg, D-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1Onev(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1Onev(8b|4h|2s|1d)_POST$")>;
+
+// ASIMD store, 1 element, multiple, 1 reg, Q-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1Onev(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1Onev(16b|8h|4s|2d)_POST$")>;
+
+// ASIMD store, 1 element, multiple, 2 reg, D-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1Twov(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1Twov(8b|4h|2s|1d)_POST$")>;
+
+// ASIMD store, 1 element, multiple, 2 reg, Q-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_2rc], (instregex "ST1Twov(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_2rc], (instregex "ST1Twov(16b|8h|4s|2d)_POST$")>;
+
+// ASIMD store, 1 element, multiple, 3 reg, D-form
+// TODO: Handle the special case of ASIMD store, 1 element, multiple, 3 reg, D-form when:
+// Throughput=1/3 when the access is aligned and crosses 16B boundary, one more cycle is needed
+def : InstRW<[C1NanoWrite_4c_1LdSt_2rc], (instregex "ST1Threev(8b|4h|2s|1d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_2rc], (instregex "ST1Threev(8b|4h|2s|1d)_POST$")>;
+
+// ASIMD store, 1 element, multiple, 3 reg, Q-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_3rc], (instregex "ST1Threev(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_3rc], (instregex "ST1Threev(16b|8h|4s|2d)_POST$")>;
+
+// ASIMD store, 1 element, multiple, 4 reg, D-form
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_2rc], (instregex "ST1Fourv(8b|4h|2s|1d)_POST$")>;
+def : InstRW<[C1NanoWrite_4c_1LdSt_2rc], (instregex "ST1Fourv(8b|4h|2s|1d)$")>;
+
+// ASIMD store, 1 element, multiple, 4 reg, Q-form
+def : InstRW<[C1NanoWrite_4c_1LdSt_4rc], (instregex "ST1Fourv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_4rc], (instregex "ST1Fourv(16b|8h|4s|2d)_POST$")>;
+
+// ASIMD store, 1 element, one lane, B/H/S
+// ASIMD store, 1 element, one lane, D
+def : InstRW<[C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_4c_1LdSt_1rc], (instregex "ST1i(8|16|32|64)_POST$")>;
+
+// ASIMD store, 2 element, multiple, D-form, B/H/S
+def : InstRW<[C1NanoWrite_5c_1LdSt_2rc], (instregex "ST2i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_2rc], (instregex "ST2i(8|16|32|64)_POST$")>;
+
+// ASIMD store, 2 element, multiple, Q-form, B/H/S
+// ASIMD store, 2 element, multiple, Q-form, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_1rc], (instregex "ST2Twov(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_1rc], (instregex "ST2Twov(8b|4h|2s)_POST$")>;
+
+// ASIMD store, 2 element, one lane, B/H/S
+// ASIMD store, 2 element, one lane, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_2rc], (instregex "ST2Twov(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_2rc], (instregex "ST2Twov(16b|8h|4s|2d)_POST$")>;
+
+// ASIMD store, 3 element, multiple, D-form, B/H/S
+def : InstRW<[C1NanoWrite_5c_1LdSt_4rc], (instregex "ST3Threev(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_4rc], (instregex "ST3Threev(8b|4h|2s)_POST$")>;
+
+// ASIMD store, 3 element, multiple, Q-form, B/H/S
+// ASIMD store, 3 element, multiple, Q-form, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_6rc], (instregex "ST3Threev(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_6rc], (instregex "ST3Threev(16b|8h|4s|2d)_POST$")>;
+
+// ASIMD store, 3 element, one lane, B/H
+// ASIMD store, 3 element, one lane, S
+// ASIMD store, 3 element, one lane, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_4rc], (instregex "ST3i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_4rc], (instregex "ST3i(8|16|32|64)_POST$")>;
+
+// ASIMD store, 4 element, multiple, D-form, B/H/S
+def : InstRW<[C1NanoWrite_5c_1LdSt_4rc], (instregex "ST4Fourv(8b|4h|2s)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_4rc], (instregex "ST4Fourv(8b|4h|2s)_POST$")>;
+
+// ASIMD store, 4 element, multiple, Q-form, B/H/S
+// ASIMD store, 4 element, multiple, Q-form, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_8rc], (instregex "ST4Fourv(16b|8h|4s|2d)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_8rc], (instregex "ST4Fourv(16b|8h|4s|2d)_POST$")>;
+
+// ASIMD store, 4 element, one lane, B/H/S
+// ASIMD store, 4 element, one lane, D
+def : InstRW<[C1NanoWrite_5c_1LdSt_8rc], (instregex "ST4i(8|16|32|64)$")>;
+def : InstRW<[WriteAdr, C1NanoWrite_5c_1LdSt_8rc], (instregex "ST4i(8|16|32|64)_POST$")>;
// Cryptography extensions
// -----------------------------------------------------------------------------
@@ -933,10 +1392,10 @@ def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^BFMLAL[BT]$", "^BFMLAL[BT]Idx$
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^AES[DE]rr$", "^AESI?MCrr")>;
// Crypto polynomial (64x64) multiply long
-def : InstRW<[C1NanoWrite_3c_2r_1VMC], (instrs PMULLv1i64, PMULLv2i64)>;
+def : InstRW<[C1NanoWrite_3c_1VMC_2rc], (instrs PMULLv1i64, PMULLv2i64)>;
// Crypto SHA1 hash acceleration op
-def : InstRW<[C1NanoWrite_3c_1r_2VALU], (instregex "^SHA1H")>;
+def : InstRW<[C1NanoWrite_3c_2VALU_1rc], (instregex "^SHA1H")>;
// Crypto SHA1 schedule acceleration ops
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^SHA1(SU0|SU1)")>;
@@ -949,19 +1408,18 @@ def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^SHA1[CMP]", "^SHA256H2?")>;
def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^SHA256SU[01]")>;
// Crypto SHA512 hash acceleration ops
-def : InstRW<[C1NanoWrite_9c_7r_1VMC], (instregex "^SHA512(H|H2|SU0|SU1)")>;
+def : InstRW<[C1NanoWrite_9c_1VMC_7rc], (instregex "^SHA512(H|H2|SU0|SU1)")>;
// Crypto SHA3 ops
def : InstRW<[C1NanoWrite_3c_1VALU], (instrs BCAX, EOR3, RAX1)>;
def : InstRW<[C1NanoWrite_4c_1VALU], (instrs XAR)>;
-
// Crypto SM3 ops
-def : InstRW<[C1NanoWrite_9c_7r_1VMC], (instregex "^SM3PARTW[12]$", "^SM3SS1$",
+def : InstRW<[C1NanoWrite_9c_1VMC_7rc], (instregex "^SM3PARTW[12]$", "^SM3SS1$",
"^SM3TT[12][AB]$")>;
// Crypto SM4 ops
-def : InstRW<[C1NanoWrite_9c_7r_1VMC], (instrs SM4E, SM4ENCKEY)>;
+def : InstRW<[C1NanoWrite_9c_1VMC_7rc], (instrs SM4E, SM4ENCKEY)>;
// CRC
// -----------------------------------------------------------------------------
@@ -1016,12 +1474,12 @@ def : InstRW<[C1NanoWrite_1c_1ALU0],
def : InstRW<[C1NanoWrite_1c_1ALU0],
(instregex "^(DEC|INC)P_XP_[BHSD]")>;
-def : InstRW<[C1NanoWrite_2c_1r_2VALU],
+def : InstRW<[C1NanoWrite_2c_2VALU_1rc],
(instregex "^(SQDEC|SQINC|UQDEC|UQINC)P_XP_[BHSD]",
"^(UQDEC|UQINC)P_WP_[BHSD]")>;
// Predicate counting scalar, active predicate, saturating, 32-bit.
-def : InstRW<[C1NanoWrite_1c_1r_2VALU],
+def : InstRW<[C1NanoWrite_1c_2VALU_1rc],
(instregex "^(SQDEC|SQINC)P_XPWd_[BHSD]")>;
// Predicate counting vector, active predicate
@@ -1066,69 +1524,31 @@ def : InstRW<[C1NanoWrite_1c_1ALU0], (instrs PUNPKHI_PP, PUNPKLO_PP)>;
// Predicate zip/unzip
def : InstRW<[C1NanoWrite_1c_1ALU0], (instregex "^(ZIP|UZP)[12]_PPP_[BHSDQ]")>;
-
-// Tag Data processing
-// -----------------------------------------------------------------------------
-// Arithmetic, immediate to logical address tag
-def : InstRW<[C1NanoWrite_2c_1ALU], (instrs ADDG, SUBG)>;
-
-// Insert Random Tags
-def : InstRW<[C1NanoWrite_4c_3r_2ALU], (instrs IRG, IRGstack)>;
-
-// Insert Tag Mask
-// Subtract Pointer
-// Subtract Pointer, flagset
-def : InstRW<[C1NanoWrite_2c_1ALU], (instrs GMI, SUBP, SUBPS)>;
-
-// Tag Load instructions
-// -----------------------------------------------------------------------------
-// Load allocation tag
-def : InstRW<[C1NanoWrite_2c_1Ld], (instrs LDG)>;
-
-// Load multiple allocation tags
-def : InstRW<[C1NanoWrite_2c_4r_2Ld], (instrs LDGM)>;
-
-// Tag store instructions
-// -----------------------------------------------------------------------------
-// Store allocation tags to one granule, post-index
-// Store allocation tags to one granule, pre-index
-// Store allocation tag to one granule, zeroing, post-index
-// Store Allocation Tag to one granule, zeroing, pre-index
-// Store allocation tags to one granule, signed offset
-// Store allocation tag and reg pair to memory, signed offset
-// Store allocation tag and reg pair to memory, post-Index
-// Store allocation tag and reg pair to memory, pre-Index
-// Store multiple allocation tags
-def : InstRW<[C1NanoWrite_1c_1LdSt], (instrs STGPreIndex, STGPostIndex,
- STZGPreIndex, STZGPostIndex,
- STGPpre, STGPpost,
- STGi, STZGi,
- STGPi, STGM, STZGM)>;
-// Store allocation tags to two granules, post-index
-// Store allocation tags to two granules, pre-index
-// Store allocation tag to two granules, zeroing, post-index
-// Store Allocation Tag to two granules, zeroing, pre-index
-// Store allocation tag to two granules, zeroing, signed offset
-def : InstRW<[C1NanoWrite_1c_2r_1LdSt], (instrs ST2GPreIndex, ST2GPostIndex,
- STZ2GPreIndex, STZ2GPostIndex,
- ST2Gi, STZ2Gi)>;
-
// SVE integer instructions
// -----------------------------------------------------------------------------
// Arithmetic, absolute diff
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^[SU]ABD_(ZPmZ|ZPZZ)_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^[SU]ABD_(ZPmZ|ZPZZ)_[BHSD]")>;
// Arithmetic, absolute diff accum
-def : InstRW<[C1NanoWrite_5c_3r_2VALU], (instregex "^[SU]ABA_ZZZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_5c_2VALU_3rc>],
+ (instregex "^[SU]ABA_ZZZ_[BHSD]")>;
// Arithmetic, absolute diff accum long
-def : InstRW<[C1NanoWrite_5c_3r_2VALU], (instregex "^[SU]ABAL[TB]_ZZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEVXALU_1rc,
+ C1NanoWrite_5c_2VALU_3rc>],
+ (instregex "^[SU]ABAL[TB]_ZZZ_[HSD]")>;
// Arithmetic, absolute diff long
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^[SU]ABDL[TB]_ZZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^[SU]ABDL[TB]_ZZZ_[HSD]")>;
// Arithmetic, basic
-def : InstRW<[C1NanoWrite_3c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
(instregex "^(ABS|CNOT|NEG)_ZPmZ_[BHSD]",
"^(ADD|SUB)_ZPmZ_[BHSD]",
"^(ADD|SUB)_ZPZZ_[BHSD]",
@@ -1139,7 +1559,8 @@ def : InstRW<[C1NanoWrite_3c_1VALU],
"^[SU]H(ADD|SUB|SUBR)_(ZPmZ|ZPZZ)_[BHSD]",
"^UADDW[BT]_ZZZ_[HSD]",
"^[SU]RHADD_ZPmZ_[BHSD]")>;
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^SADDW[BT]_ZZZ_[HSD]",
"^[SU]ADDL[BT]_ZZZ_[HSD]",
"^[SU]SUB[LW][BT]_ZZZ_[HSD]",
@@ -1148,7 +1569,8 @@ def : InstRW<[C1NanoWrite_4c_1VALU],
"^SUBR_(ZPmZ|ZPZZ|ZI)_[BHSD]")>;
// Arithmetic, complex
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^SQ(ABS|NEG)_ZPmZ_[BHSD]",
"^SQ(ADD|SUB|SUBR)_ZPmZ_?[BHSD]",
"^[SU]Q(ADD|SUB)_ZZZ_[BHSD]",
@@ -1156,20 +1578,28 @@ def : InstRW<[C1NanoWrite_4c_1VALU],
"^(ADD|SUB)HN[BT]_ZZZ_[BHS]",
"^(SUQ|UQ|USQ)ADD_ZPmZ_[BHSD]",
"^(UQSUB|UQSUBR)_ZPmZ_[BHSD]")>;
-def : InstRW<[C1NanoWrite_6c_3r_2VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_6c_2VALU_3rc>],
(instregex "^R(ADD|SUB)HN[BT]_ZZZ_[BHS]")>;
// Arithmetic, large integer
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^(AD|SB)CL[BT]_ZZZ_[SD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^(AD|SB)CL[BT]_ZZZ_[SD]")>;
// Arithmetic, pairwise add
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^ADDP_ZPmZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^ADDP_ZPmZ_[BHSD]")>;
// Arithmetic, pairwise add and accum long
-def : InstRW<[C1NanoWrite_6c_4r_2VALU], (instregex "^[SU]ADALP_ZPmZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEVXALU_1rc,
+ C1NanoWrite_6c_2VALU_4rc>],
+ (instregex "^[SU]ADALP_ZPmZ_[HSD]")>;
// Arithmetic, shift
-def : InstRW<[C1NanoWrite_3c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
(instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
"^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
"^(ASR|LSL|LSR)_ZPmI_[BHSD]",
@@ -1179,25 +1609,30 @@ def : InstRW<[C1NanoWrite_3c_1VALU],
"^(ASR|LSL|LSR)_ZZI_[BHSD]",
"^(ASRR|LSLR|LSRR)_ZPmZ_[BHSD]")>;
// Arithmetic, shift right for divide
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^ASRD_ZPmI_[BHSD]",
"^ASRD_ZPZI_[BHSD]")>;
// Arithmetic, shift and accumulate
-def : InstRW<[C1NanoWrite_3c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEVXALU_1rc,
+ C1NanoWrite_3c_1VALU>],
(instregex "^(SSRA|USRA)_ZZI_[BHSD]")>;
-def : InstRW<[C1NanoWrite_5c_3r_2VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEVXALU_1rc,
+ C1NanoWrite_5c_2VALU_3rc>],
(instregex "^(SRSRA|URSRA)_ZZI_[BHSD]")>;
// Arithmetic, shift by immediate
// Arithmetic, shift by immediate and insert
-def : InstRW<[C1NanoWrite_3c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
(instregex "^(SHRNB|SHRNT|SSHLLB|SSHLLT|USHLLB|USHLLT|SLI|SRI)_ZZI_[BHSD]")>;
// Arithmetic, shift complex
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^(SQ)?RSHRU?N[BT]_ZZI_[BHS]",
"^(SQRSHL|SQRSHLR|SQSHL|SQSHLR|UQRSHL|UQRSHLR|UQSHL|UQSHLR)_(ZPmZ|ZPZZ)_[BHSD]",
"^(SQSHL|SQSHLU|UQSHL)_(ZPmI|ZPZI)_[BHSD]",
@@ -1205,430 +1640,638 @@ def : InstRW<[C1NanoWrite_4c_1VALU],
"^UQR?SHRN[BT]_ZZI_[BHS]")>;
// Arithmetic, shift rounding
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^(SRSHL|SRSHR|SRSHLR|URSHL|URSHLR|URSHR)_(ZPmZ|ZPZZ|ZPZI)_[BHSD]",
"^[SU]RSHR_ZPmI_[BHSD]")>;
// Bit manipulation
-def : InstRW<[C1NanoWrite_13c_11r_1VMC],
+def : InstRW<[C1NanoWrite_13c_1VMC_11rc],
(instregex "^(BDEP|BEXT|BGRP)_ZZZ_B")>;
-def : InstRW<[C1NanoWrite_21c_19r_1VMC],
+def : InstRW<[C1NanoWrite_21c_1VMC_19rc],
(instregex "^(BDEP|BEXT|BGRP)_ZZZ_H")>;
-def : InstRW<[C1NanoWrite_37c_35r_1VMC],
+def : InstRW<[C1NanoWrite_37c_1VMC_35rc],
(instregex "^(BDEP|BEXT|BGRP)_ZZZ_S")>;
-def : InstRW<[C1NanoWrite_68c_66r_1VMC],
+def : InstRW<[C1NanoWrite_68c_1VMC_66rc],
(instregex "^(BDEP|BEXT|BGRP)_ZZZ_D")>;
// Bitwise select
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(BSL|BSL1N|BSL2N|NBSL)_ZZZZ")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^(BSL|BSL1N|BSL2N|NBSL)_ZZZZ")>;
// Count/reverse bits
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(CLS|CLZ|RBIT)_ZPmZ_[BHSD]")>;
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^CNT_ZPmZ_[BH]")>;
-def : InstRW<[C1NanoWrite_6c_4r_2VALU], (instregex "^CNT_ZPmZ_S")>;
-def : InstRW<[C1NanoWrite_9c_7r_2VALU], (instregex "^CNT_ZPmZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^(CLS|CLZ|RBIT)_ZPmZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^CNT_ZPmZ_[BH]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_6c_2VALU_4rc>],
+ (instregex "^CNT_ZPmZ_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_9c_2VALU_7rc>],
+ (instregex "^CNT_ZPmZ_D")>;
// Broadcast logical bitmask immediate to vector.
-def : InstRW<[C1NanoWrite_4c_1VALU], (instrs DUPM_ZI)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instrs DUPM_ZI)>;
// Compare and set flags
-def : InstRW<[C1NanoWrite_5c_1r_2VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVX0ALU,
+ C1NanoWrite_5c_2VALU_1rc>],
(instregex "^CMP(EQ|GE|GT|HI|HS|LE|LO|LS|LT|NE)_PPzZ[IZ]_[BHSD]",
"^CMP(EQ|GE|GT|HI|HS|LE|LO|LS|LT|NE)_WIDE_PPzZZ_[BHS]")>;
// Complex add
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^CADD_ZZI_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^CADD_ZZI_[BHSD]")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^SQCADD_ZZI_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^SQCADD_ZZI_[BHSD]")>;
// Complex dot product 8-bit element
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instrs CDOT_ZZZ_S, CDOT_ZZZI_S)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instrs CDOT_ZZZ_S, CDOT_ZZZI_S)>;
// Complex dot product 16-bit element
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instrs CDOT_ZZZ_D, CDOT_ZZZI_D)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instrs CDOT_ZZZ_D, CDOT_ZZZI_D)>;
// Complex multiply-add B, H, S element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^CMLA_ZZZ_[BHS]",
- "^CMLA_ZZZI_[HS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^CMLA_ZZZ_[BHS]", "^CMLA_ZZZI_[HS]")>;
// Complex multiply-add D element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instrs CMLA_ZZZ_D)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instrs CMLA_ZZZ_D)>;
// Conditional extract operations, scalar form
-def : InstRW<[C1NanoWrite_4c_4r_2VALU], (instregex "^CLAST[AB]_RPZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEPERMF_1CMEVX0ALU_2rc,
+ C1NanoWrite_4c_2VALU_4rc>],
+ (instregex "^CLAST[AB]_RPZ_[BHSD]")>;
// Conditional extract operations, SIMD&FP scalar and vector forms
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^CLAST[AB]_[VZ]PZ_[BHSD]",
- "^COMPACT_ZPZ_[SD]",
- "^SPLICE_ZPZZ?_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF_1rc,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^CLAST[AB]_[VZ]PZ_[BHSD]",
+ "^COMPACT_ZPZ_[SD]",
+ "^SPLICE_ZPZZ?_[BHSD]")>;
// Convert to floating point, 64b to float or convert to double
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^[SU]CVTF_ZPmZ_Dto[SD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^[SU]CVTF_ZPmZ_Dto[SD]")>;
// Convert to floating point, 64b to half
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^[SU]CVTF_ZPmZ_DtoH")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^[SU]CVTF_ZPmZ_DtoH")>;
// Convert to floating point, 32b to single or half
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^[SU]CVTF_ZPmZ_Sto[HS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^[SU]CVTF_ZPmZ_Sto[HS]")>;
// Convert to floating point, 32b to double
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^[SU]CVTF_ZPmZ_StoD")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^[SU]CVTF_ZPmZ_StoD")>;
// Convert to floating point, 16b to half
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^[SU]CVTF_ZPmZ_HtoH")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^[SU]CVTF_ZPmZ_HtoH")>;
// Copy, scalar
-def : InstRW<[C1NanoWrite_3c_1VALU],(instregex "^CPY_ZPmR_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEPERMF_1CMEPERMS_1rc,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^CPY_ZPmR_[BHSD]")>;
// Copy, scalar SIMD&FP or imm
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^CPY_ZPm[IV]_[BHSD]",
- "^CPY_ZPzI_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEPERMF_1CMEPERMS_1rc,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^CPY_ZPm[IV]_[BHSD]", "^CPY_ZPzI_[BHSD]")>;
// Divides, 32 bit
-def : InstRW<[C1NanoWrite_15c_12r_1VMC], (instregex "^[SU]DIVR?_(ZPmZ|ZPZZ)_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_15c_1VMC_12rc>],
+ (instregex "^[SU]DIVR?_(ZPmZ|ZPZZ)_S")>;
// Divides, 64 bit
-def : InstRW<[C1NanoWrite_26c_23r_1VMC], (instregex "^[SU]DIVR?_(ZPmZ|ZPZZ)_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEMC_12rc,
+ C1NanoWrite_26c_1VMC_23rc>],
+ (instregex "^[SU]DIVR?_(ZPmZ|ZPZZ)_D")>;
// Dot product, 8 bit
-def : InstRW<[C1NanoWrite_4c_1VMAC, ReadVMACAccum], (instregex "^[SU]DOT_ZZZI?_BtoS")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>, ReadVMACAccum],
+ (instregex "^[SU]DOT_ZZZI?_BtoS")>;
// Dot product, 8 bit, using signed and unsigned integers
-def : InstRW<[C1NanoWrite_4c_1VMAC, ReadVMACAccum], (instrs SUDOT_ZZZI, USDOT_ZZZI, USDOT_ZZZ)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>, ReadVMACAccum],
+ (instrs SUDOT_ZZZI, USDOT_ZZZI, USDOT_ZZZ)>;
// Dot product, 16 bit
-def : InstRW<[C1NanoWrite_4c_1VMAC, ReadVMACAccum], (instregex "^[SU]DOT_ZZZI?_HtoD")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>, ReadVMACAccum],
+ (instregex "^[SU]DOT_ZZZI?_HtoD")>;
// Duplicate, immediate and indexed form
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^DUP_ZI_[BHSD]",
- "^DUP_ZZI_[BHSDQ]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERM,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^DUP_ZI_[BHSD]", "^DUP_ZZI_[BHSDQ]")>;
// Duplicate, scalar form
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^DUP_ZR_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^DUP_ZR_[BHSD]")>;
// Extend, sign or zero
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^[SU]XTB_ZPmZ_[HSD]",
- "^[SU]XTH_ZPmZ_[SD]",
- "^[SU]XTW_ZPmZ_[D]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^[SU]XTB_ZPmZ_[HSD]",
+ "^[SU]XTH_ZPmZ_[SD]",
+ "^[SU]XTW_ZPmZ_[D]")>;
// Extract
-def : InstRW<[C1NanoWrite_3c_1VALU], (instrs EXT_ZZI, EXT_ZZI_CONSTRUCTIVE, EXT_ZZI_B)>;
+def : InstRW<[C1NanoWrite_3c_1VALU],
+ (instrs EXT_ZZI)>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERM],
+ (instrs EXT_ZZI_CONSTRUCTIVE, EXT_ZZI_B)>;
// Extract narrow saturating
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^[SU]QXTN[BT]_ZZ_[BHS]",
- "^SQXTUN[BT]_ZZ_[BHS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^[SU]QXTN[BT]_ZZ_[BHS]", "^SQXTUN[BT]_ZZ_[BHS]")>;
// Extract/insert operation, SIMD and FP scalar form
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^LAST[AB]_VPZ_[BHSD]",
- "^INSR_ZV_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF_1rc,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^LAST[AB]_VPZ_[BHSD]", "^INSR_ZV_[BHSD]")>;
+
+// Extract operation, scalar
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_8c_2VALU_4rc>],
+ (instregex "^LAST[AB]_RPZ_[BHSD]")>;
-// Extract/insert operation, scalar
-def : InstRW<[C1NanoWrite_8c_4r_2VALU], (instregex "^LAST[AB]_RPZ_[BHSD]")>;
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^INSR_ZR_[BHSD]")>;
+// Insert operation, scalar
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_8c_1CMEPERMF_1CMEVXALU_1rc,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^INSR_ZR_[BHSD]")>;
// Histogram operations
-def : InstRW<[C1NanoWrite_6c_4r_2VALU0], (instregex "^HISTCNT_ZPzZZ_[SD]",
- "^HISTSEG_ZZZ")>;
+def : InstRW<[C1NanoWrite_6c_2VALU_4rc0],
+ (instregex "^HISTCNT_ZPzZZ_[SD]", "^HISTSEG_ZZZ")>;
// Horizontal operations, B, H, S form, immediate operands only
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^INDEX_II_[BHS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^INDEX_II_[BHS]")>;
// Horizontal operations, B, H, S form, scalar, immediate operands/ scalar
// operands only / immediate, scalar operands
-def : InstRW<[C1NanoWrite_4c_1r_2VMAC], (instregex "^INDEX_(IR|RI|RR)_[BHS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF_1CMEVXALU_1d1rc,
+ C1NanoWrite_4c_2VMAC_1rc>],
+ (instregex "^INDEX_(IR|RI|RR)_[BHS]")>;
// Horizontal operations, D form, immediate operands only
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instrs INDEX_II_D)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF_1CMEVXALU_1d1rc,
+ C1NanoWrite_4c_1VMAC>],
+ (instrs INDEX_II_D)>;
// Horizontal operations, D form, scalar, immediate operands / scalar operands
// only / immediate, scalar operands
-def : InstRW<[C1NanoWrite_4c_1r_2VMAC], (instregex "^INDEX_(IR|RI|RR)_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_2VMAC_1rc>],
+ (instregex "^INDEX_(IR|RI|RR)_D")>;
// Logical
-def : InstRW<[C1NanoWrite_3c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
(instregex "^(AND|EOR|ORR)_ZI",
"^(AND|BIC|EOR|EON|ORR|NAND|NOR)_ZZZ",
"^(AND|BIC|EOR|NOT|ORR)_ZPmZ_[BHSD]",
"^(AND|BIC|EOR|NOT|ORR)_ZPZZ_[BHSD]")>;
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^EOR(BT|TB)_ZZZ_[BHSD]")>;
// Max/min, basic and pairwise
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^[SU](MAX|MIN)_ZI_[BHSD]",
- "^[SU](MAX|MIN)P?_(ZPmZ|ZPZZ)_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^[SU](MAX|MIN)_ZI_[BHSD]",
+ "^[SU](MAX|MIN)P?_(ZPmZ|ZPZZ)_[BHSD]")>;
// Matching operations
-def : InstRW<[C1NanoWrite_8c_4r_2VALU], (instregex "^N?MATCH_PPzZZ_[BH]")>;
+def : InstRW<[C1NanoWrite_8c_2VALU_4rc], (instregex "^N?MATCH_PPzZZ_[BH]")>;
// Matrix multiply-accumulate
def : InstRW<[C1NanoWrite_4c_1VMAC], (instrs SMMLA_ZZZ, UMMLA_ZZZ, USMMLA_ZZZ)>;
// Move prefix
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^MOVPRFX_ZP[mz]Z_[BHSD]",
- "^MOVPRFX_ZZ")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERM,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^MOVPRFX_ZP[mz]Z_[BHSD]", "^MOVPRFX_ZZ")>;
// Multiply, B, H, S element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ|ZPZZ)_[BHS]",
- "^[SU]MULH_(ZPmZ|ZZZ|ZPZZ)_[BHS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ|ZPZZ)_[BHS]",
+ "^[SU]MULH_(ZPmZ|ZZZ|ZPZZ)_[BHS]")>;
// Multiply, D element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ|ZPZZ)_D",
- "^[SU]MULH_(ZPmZ|ZZZ|ZPZZ)_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ|ZPZZ)_D",
+ "^[SU]MULH_(ZPmZ|ZZZ|ZPZZ)_D")>;
// Multiply long
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^[SU]MULL[BT]_ZZZI_[SD]",
- "^[SU]MULL[BT]_ZZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^[SU]MULL[BT]_ZZZI_[SD]",
+ "^[SU]MULL[BT]_ZZZ_[HSD]")>;
// Multiply accumulate, B, H, S element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^ML[AS]_(ZZZI|ZPZZZ)_[BHS]",
- "^(ML[AS]|MAD|MSB)_ZPmZZ_[BHS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^ML[AS]_(ZZZI|ZPZZZ)_[BHS]",
+ "^(ML[AS]|MAD|MSB)_ZPmZZ_[BHS]")>;
// Multiply accumulate, D element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^ML[AS]_(ZZZI|ZPZZZ)_D",
- "^(ML[AS]|MAD|MSB)_ZPmZZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^ML[AS]_(ZZZI|ZPZZZ)_D",
+ "^(ML[AS]|MAD|MSB)_ZPmZZ_D")>;
// Multiply accumulate long
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^[SU]ML[AS]L[BT]_ZZZ_[HSD]",
- "^[SU]ML[AS]L[BT]_ZZZI_[SD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^[SU]ML[AS]L[BT]_ZZZ_[HSD]",
+ "^[SU]ML[AS]L[BT]_ZZZI_[SD]")>;
// Multiply accumulate saturating doubling long regular
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^SQDML[AS](LB|LT|LBT)_ZZZ_[HSD]",
- "^SQDML[AS](LB|LT)_ZZZI_[SD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^SQDML[AS](LB|LT|LBT)_ZZZ_[HSD]",
+ "^SQDML[AS](LB|LT)_ZZZI_[SD]")>;
// Multiply saturating doubling high, B, H, S element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^SQDMULH_ZZZ_[BHS]",
- "^SQDMULH_ZZZI_[HS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^SQDMULH_ZZZ_[BHS]",
+ "^SQDMULH_ZZZI_[HS]")>;
// Multiply saturating doubling high, D element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instrs SQDMULH_ZZZ_D, SQDMULH_ZZZI_D)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instrs SQDMULH_ZZZ_D, SQDMULH_ZZZI_D)>;
// Multiply saturating doubling long
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^SQDMULL[BT]_ZZZ_[HSD]",
- "^SQDMULL[BT]_ZZZI_[SD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^SQDMULL[BT]_ZZZ_[HSD]",
+ "^SQDMULL[BT]_ZZZI_[SD]")>;
// Multiply saturating rounding doubling regular/complex accumulate, B, H, S
// element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^SQRDML[AS]H_ZZZ_[BHS]",
- "^SQRDCMLAH_ZZZ_[BHS]",
- "^SQRDML[AS]H_ZZZI_[HS]",
- "^SQRDCMLAH_ZZZI_[HS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^SQRDML[AS]H_ZZZ_[BHS]",
+ "^SQRDCMLAH_ZZZ_[BHS]",
+ "^SQRDML[AS]H_ZZZI_[HS]",
+ "^SQRDCMLAH_ZZZI_[HS]")>;
// Multiply saturating rounding doubling regular/complex accumulate, D element
// size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^SQRDML[AS]H_ZZZI?_D",
- "^SQRDCMLAH_ZZZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^SQRDML[AS]H_ZZZI?_D",
+ "^SQRDCMLAH_ZZZ_D")>;
// Multiply saturating rounding doubling regular/complex, B, H, S element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^SQRDMULH_ZZZ_[BHS]",
- "^SQRDMULH_ZZZI_[HS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^SQRDMULH_ZZZ_[BHS]",
+ "^SQRDMULH_ZZZI_[HS]")>;
// Multiply saturating rounding doubling regular/complex, D element size
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^SQRDMULH_ZZZI?_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^SQRDMULH_ZZZI?_D")>;
// Multiply/multiply long, (8x8) polynomial
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^PMUL_ZZZ_B", "^PMULL[BT]_ZZZ_H")>;
-def : InstRW<[C1NanoWrite_9c_7r_1VMC], (instregex "^PMULL[BT]_ZZZ_[DQ]")>;
+def : InstRW<[C1NanoWrite_9c_1VMC_7rc], (instregex "^PMULL[BT]_ZZZ_[DQ]")>;
// Predicate counting vector
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^(DEC|INC)[HWD]_ZPiI")>;
-def : InstRW<[C1NanoWrite_4c_1VALU],
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
(instregex "^(SQDEC|SQINC|UQDEC|UQINC)[HWD]_ZPiI")>;
// Reciprocal estimate
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^URECPE_ZPmZ_S", "^URSQRTE_ZPmZ_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^URECPE_ZPmZ_S", "^URSQRTE_ZPmZ_S")>;
// Reduction, arithmetic, B form
-def : InstRW<[C1NanoWrite_4c_1VALU0], (instregex "^[SU](ADD|MAX|MIN)V_VPZ_B")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEPERMF_1CMEVXALU_2d3rc,
+ C1NanoWrite_4c_1VALU0>],
+ (instregex "^[SU](ADD|MAX|MIN)V_VPZ_B")>;
// Reduction, arithmetic, H form
-def : InstRW<[C1NanoWrite_4c_1VALU0], (instregex "^[SU](ADD|MAX|MIN)V_VPZ_H")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEPERMF_1CMEVXALU_2d3rc,
+ C1NanoWrite_4c_1VALU0>],
+ (instregex "^[SU](ADD|MAX|MIN)V_VPZ_H")>;
// Reduction, arithmetic, S form
-def : InstRW<[C1NanoWrite_4c_1VALU0], (instregex "^[SU](ADD|MAX|MIN)V_VPZ_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEPERMF_1CMEVXALU_2d3rc,
+ C1NanoWrite_4c_1VALU0>],
+ (instregex "^[SU](ADD|MAX|MIN)V_VPZ_S")>;
// Reduction, arithmetic, D form
-def : InstRW<[C1NanoWrite_4c_1VALU0], (instregex "^[SU](ADD|MAX|MIN)V_VPZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEPERMF_1CMEVXALU_2d3rc,
+ C1NanoWrite_4c_1VALU0>],
+ (instregex "^[SU](ADD|MAX|MIN)V_VPZ_D")>;
// Reduction, logical
-def : InstRW<[C1NanoWrite_4c_1VALU0], (instregex "^(ANDV|EORV|ORV)_VPZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEPERMF_1CMEVXALU_2d3rc,
+ C1NanoWrite_4c_1VALU0>],
+ (instregex "^(ANDV|EORV|ORV)_VPZ_[BHSD]")>;
// Reverse, vector
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^REV_ZZ_[BHSD]",
- "^REVB_ZPmZ_[HSD]",
- "^REVH_ZPmZ_[SD]",
- "^REVW_ZPmZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERM,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^REV_ZZ_[BHSD]",
+ "^REVB_ZPmZ_[HSD]",
+ "^REVH_ZPmZ_[SD]",
+ "^REVW_ZPmZ_D")>;
+
+def : InstRW<[C1NanoCMEWriteRC<4, [C1NanoUnitCMEPERM], [2]>],
+ (instregex "^REVD_ZPmZ")>;
// Select, vector form
-def : InstRW<[C1NanoWrite_2c_1VALU], (instregex "^SEL_ZPZZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_1c_1CMEPERM_1rc,
+ C1NanoWrite_2c_1VALU>],
+ (instregex "^SEL_ZPZZ_[BHSD]")>;
// Table lookup
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^TBL_ZZZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF_1rc,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^TBL_ZZZ_[BHSD]")>;
// Table lookup, double table
-def : InstRW<[C1NanoWrite_8c_5r_2VALU], (instregex "^TBL_ZZZZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF_1rc,
+ C1NanoWrite_8c_2VALU_5rc>],
+ (instregex "^TBL_ZZZZ_[BHSD]")>;
// Table lookup extension
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^TBX_ZZZ_[BHSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERMF_1rc,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^TBX_ZZZ_[BHSD]")>;
// Transpose, vector form
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^TRN[12]_ZZZ_[BHSDQ]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERM,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^TRN[12]_ZZZ_[BHSDQ]")>;
// Unpack and extend
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^[SU]UNPK(HI|LO)_ZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERM,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^[SU]UNPK(HI|LO)_ZZ_[HSD]")>;
// Zip/unzip
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(UZP|ZIP)[12]_ZZZ_[BHSDQ]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEPERM,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^(UZP|ZIP)[12]_ZZZ_[BHSDQ]")>;
-// SVE floating-point instructions
+// SVE FP data processing instructions
// -----------------------------------------------------------------------------
// Floating point absolute value/difference
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FAB[SD]_ZPmZ_[HSD]",
- "^FAB[SD]_ZPZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FAB[SD]_ZPmZ_[HSD]", "^FAB[SD]_ZPZZ_[HSD]")>;
// Floating point arithmetic
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^F(ADD|SUB)_(ZPm[IZ]|ZZZ|ZPZI|ZPZZ)_[HSD]",
- "^FADDP_ZPmZZ_[HSD]",
- "^FNEG_ZPmZ_[HSD]",
- "^FSUBR_(ZPm[IZ]|ZPZ[IZ])_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^F(ADD|SUB)_(ZPm[IZ]|ZZZ|ZPZI|ZPZZ)_[HSD]",
+ "^FADDP_ZPmZZ_[HSD]",
+ "^FNEG_ZPmZ_[HSD]",
+ "^FSUBR_(ZPm[IZ]|ZPZ[IZ])_[HSD]")>;
// Floating point associative add, F16
-def : InstRW<[C1NanoWrite_23c_25r_2VALU], (instrs FADDA_VPZ_H)>;
+def : InstRW<[C1NanoWrite_23c_2VALU_25rc], (instrs FADDA_VPZ_H)>;
// Floating point associative add, F32
-def : InstRW<[C1NanoWrite_16c_9r_2VALU], (instrs FADDA_VPZ_S)>;
+def : InstRW<[C1NanoWrite_16c_2VALU_9rc], (instrs FADDA_VPZ_S)>;
// Floating point associative add, F64
-// RThoughput should be 5/2 but we cannot have fractional values so using 3
-def : InstRW<[C1NanoWrite_8c_5r_1VALU], (instrs FADDA_VPZ_D)>;
+def : InstRW<[C1NanoWrite_8c_1VALU_5rc], (instrs FADDA_VPZ_D)>;
// Floating point compare
-def : InstRW<[C1NanoWrite_4c_1r_2VALU], (instregex "^FACG[ET]_PPzZZ_[HSD]",
- "^FCM(EQ|GE|GT|NE)_PPzZ[0Z]_[HSD]",
- "^FCM(LE|LT)_PPzZ0_[HSD]",
- "^FCMUO_PPzZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVX0ALU,
+ C1NanoWrite_4c_2VALU_1rc>],
+ (instregex "^FACG[ET]_PPzZZ_[HSD]",
+ "^FCM(EQ|GE|GT|NE)_PPzZ[0Z]_[HSD]",
+ "^FCM(LE|LT)_PPzZ0_[HSD]",
+ "^FCMUO_PPzZZ_[HSD]")>;
// Floating point complex add
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCADD_ZPmZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCADD_ZPmZ_[HSD]")>;
// Floating point complex multiply add
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FCMLA_ZPmZZ_[HSD]",
- "^FCMLA_ZZZI_[HS]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FCMLA_ZPmZZ_[HSD]", "^FCMLA_ZZZI_[HS]")>;
// Floating point convert, long or narrow (F16 to F32 or F32 to F16)
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCVT_ZPmZ_(HtoS|StoH)",
- "^FCVTLT_ZPmZ_HtoS",
- "^FCVTNT_ZPmZ_StoH")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVT_ZPmZ_(HtoS|StoH)",
+ "^FCVTLT_ZPmZ_HtoS",
+ "^FCVTNT_ZPmZ_StoH")>;
// Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32
// or F64 to F16)
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCVT_ZPmZ_(HtoD|StoD|DtoS|DtoH)",
- "^FCVTLT_ZPmZ_StoD",
- "^FCVTNT_ZPmZ_DtoS")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVT_ZPmZ_(HtoD|StoD|DtoS|DtoH)",
+ "^FCVTLT_ZPmZ_StoD",
+ "^FCVTNT_ZPmZ_DtoS")>;
// Floating point convert, round to odd
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCVTX_ZPmZ_DtoS", "FCVTXNT_ZPmZ_DtoS")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVTX_ZPmZ_DtoS", "FCVTXNT_ZPmZ_DtoS")>;
// Floating point base2 log, F16
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FLOGB_(ZPmZ|ZPZZ)_H")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FLOGB_(ZPmZ|ZPZZ)_H")>;
// Floating point base2 log, F32
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FLOGB_(ZPmZ|ZPZZ)_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FLOGB_(ZPmZ|ZPZZ)_S")>;
// Floating point base2 log, F64
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FLOGB_(ZPmZ|ZPZZ)_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FLOGB_(ZPmZ|ZPZZ)_D")>;
// Floating point convert to integer, F16
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCVTZ[SU]_ZPmZ_HtoH")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVTZ[SU]_ZPmZ_HtoH")>;
// Floating point convert to integer, F32
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FCVTZ[SU]_ZPmZ_(HtoS|StoS)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVTZ[SU]_ZPmZ_(HtoS|StoS)")>;
// Floating point convert to integer, F64
-def : InstRW<[C1NanoWrite_4c_1VALU],
- (instregex "^FCVTZ[SU]_ZPmZ_(HtoD|StoD|DtoS|DtoD)")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FCVTZ[SU]_ZPmZ_(HtoD|StoD|DtoS|DtoD)")>;
// Floating point copy
-def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^FCPY_ZPmI_[HSD]",
- "^FDUP_ZI_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_1c_1CMEPERM,
+ C1NanoWrite_3c_1VALU>],
+ (instregex "^FCPY_ZPmI_[HSD]", "^FDUP_ZI_[HSD]")>;
// Floating point divide, F16
-def : InstRW<[C1NanoWrite_8c_5r_1VMC], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_H")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_10c_1CMEMC_10rc,
+ C1NanoWrite_8c_1VMC_5rc>],
+ (instregex "^FDIVR?_(ZPmZ|ZPZZ)_H")>;
// Floating point divide, F32
-def : InstRW<[C1NanoWrite_13c_10r_1VMC], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_11c_1CMEMC_11rc,
+ C1NanoWrite_13c_1VMC_10rc>],
+ (instregex "^FDIVR?_(ZPmZ|ZPZZ)_S")>;
// Floating point divide, F64
-def : InstRW<[C1NanoWrite_22c_19r_1VMC], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_17c_1CMEMC_17rc,
+ C1NanoWrite_22c_1VMC_19rc>],
+ (instregex "^FDIVR?_(ZPmZ|ZPZZ)_D")>;
// Floating point min/max pairwise
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^F(MAX|MIN)(NM)?P_ZPmZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^F(MAX|MIN)(NM)?P_ZPmZZ_[HSD]")>;
// Floating point min/max
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^F(MAX|MIN)(NM)?_(ZPm[IZ]|ZPZZ|ZPZI)_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^F(MAX|MIN)(NM)?_(ZPm[IZ]|ZPZZ|ZPZI)_[HSD]")>;
// Floating point multiply
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^(FSCALE|FMULX)_(ZPmZ|ZPZZ)_[HSD]",
- "^FMUL_(ZPm[IZ]|ZZZI?|ZPZI|ZPZZ)_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^(FSCALE|FMULX)_(ZPmZ|ZPZZ)_[HSD]",
+ "^FMUL_(ZPm[IZ]|ZZZI?|ZPZI|ZPZZ)_[HSD]")>;
// Floating point multiply accumulate
-def : InstRW<[C1NanoWrite_4c_1VMAC],
- (instregex "^FML[AS]_(ZPmZZ|ZZZI|ZPZZZ)_[HSD]",
- "^(FMAD|FNMAD|FNML[AS]|FN?MSB)_(ZPmZZ|ZPZZZ)_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FML[AS]_(ZPmZZ|ZZZI|ZPZZZ)_[HSD]",
+ "^(FMAD|FNMAD|FNML[AS]|FN?MSB)_(ZPmZZ|ZPZZZ)_[HSD]")>;
// Floating point multiply add/sub accumulate long
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FML[AS]L[BT]_ZZZI?_SHH")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FML[AS]L[BT]_ZZZI?_SHH")>;
// Floating point reciprocal estimate, F16
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FRECPE_ZZ_H", "^FRECPX_ZPmZ_H",
- "^FRSQRTE_ZZ_H")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FR(ECP|SQRT)E_ZZ_H", "^FRECPX_ZPmZ_H")>;
// Floating point reciprocal estimate, F32
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FRECPE_ZZ_S", "^FRECPX_ZPmZ_S",
- "^FRSQRTE_ZZ_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FR(ECP|SQRT)E_ZZ_S", "^FRECPX_ZPmZ_S")>;
+
// Floating point reciprocal estimate, F64
-def : InstRW<[C1NanoWrite_4c_1VMAC],(instregex "^FRECPE_ZZ_D", "^FRECPX_ZPmZ_D",
- "^FRSQRTE_ZZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^FR(ECP|SQRT)E_ZZ_D", "^FRECPX_ZPmZ_D")>;
// Floating point reciprocal step
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^F(RECPS|RSQRTS)_ZZZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^F(RECPS|RSQRTS)_ZZZ_[HSD]")>;
// Floating point reduction
-def : InstRW<[C1NanoWrite_4c_1VALU0], (instregex "^F(MAX|MIN)(NM)?V_VPZ_[HSD]")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXMUL,
+ C1NanoWrite_4c_1VALU0>],
+ (instregex "^F(MAX|MIN)(NM)?V_VPZ_[HSD]")>;
// Floating point reduction, F16
-def : InstRW<[C1NanoWrite_12c_5r_1VALU0], (instregex "^FADDV_VPZ_H")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_24c_1CMEPERMS_1CMEVXALU_2d5rc,
+ C1NanoWrite_12c_1VALU0_5rc>],
+ (instregex "^FADDV_VPZ_H")>;
// Floating point reduction, F32
-def : InstRW<[C1NanoWrite_8c_5r_1VALU0_2], (instregex "^FADDV_VPZ_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_20c_1CMEPERMS_1CMEVXALU_1d2rc,
+ C1NanoWrite_8c_1VALU_5rc0_2>],
+ (instregex "^FADDV_VPZ_S")>;
// Floating point reduction, F64
-def : InstRW<[C1NanoWrite_4c_1r_2VALU0_2], (instregex "^FADDV_VPZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_16c_1CMEPERMS_1CMEVXALU_2d3rc,
+ C1NanoWrite_4c_2VALU_1rc0_2>],
+ (instregex "^FADDV_VPZ_D")>;
// Floating point round to integral, F16
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FRINT[AIMNPXZ]_ZPmZ_H")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FRINT[AIMNPXZ]_ZPmZ_H")>;
// Floating point round to integral, F32
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FRINT[AIMNPXZ]_ZPmZ_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FRINT[AIMNPXZ]_ZPmZ_S")>;
// Floating point round to integral, F64
-def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^FRINT[AIMNPXZ]_ZPmZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instregex "^FRINT[AIMNPXZ]_ZPmZ_D")>;
// Floating point square root, F16
-def : InstRW<[C1NanoWrite_8c_5r_1VMC], (instregex "^FSQRT_ZPmZ_H")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_10c_1CMEMC_10rc,
+ C1NanoWrite_8c_1VMC_5rc>],
+ (instregex "^FSQRT_ZPmZ_H")>;
// Floating point square root, F32
-def : InstRW<[C1NanoWrite_12c_9r_1VMC], (instregex "^FSQRT_ZPmZ_S")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_12c_1CMEMC_12rc,
+ C1NanoWrite_12c_1VMC_9rc>],
+ (instregex "^FSQRT_ZPmZ_S")>;
// Floating point square root, F64
-def : InstRW<[C1NanoWrite_22c_19r_1VMC], (instregex "^FSQRT_ZPmZ_D")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_25c_1CMEMC_25rc,
+ C1NanoWrite_22c_1VMC_19rc>],
+ (instregex "^FSQRT_ZPmZ_D")>;
// Floating point trigonometric exponentiation
def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FEXPA_ZZ_[HSD]")>;
@@ -1640,66 +2283,89 @@ def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FTMAD_ZZI_[HSD]")>;
def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^FTSMUL_ZZZ_[HSD]")>;
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^FTSSEL_ZZZ_[HSD]")>;
-
// SVE BFloat16 (BF16) instructions
// -----------------------------------------------------------------------------
// Convert, F32 to BF16
-def : InstRW<[C1NanoWrite_4c_1VALU], (instrs BFCVT_ZPmZ, BFCVTNT_ZPmZ)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VALU>],
+ (instrs BFCVT_ZPmZ, BFCVTNT_ZPmZ)>;
// Dot product
-def : InstRW<[C1NanoWrite_10c_1VMAC_1VALU], (instrs BFDOT_ZZI, BFDOT_ZZZ)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXFPDOT,
+ C1NanoWrite_10c_1VMAC_1VALU>],
+ (instrs BFDOT_ZZI, BFDOT_ZZZ)>;
// Matrix multiply accumulate
-def : InstRW<[C1NanoWrite_14c_2VMAC_2VALU], (instregex "^BFMMLA_ZZZ")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_14c_2VMAC_2VALU>],
+ (instregex "^BFMMLA_ZZZ")>;
// Multiply accumulate long
-def : InstRW<[C1NanoWrite_4c_1VMAC], (instregex "^BFMLAL[BT]_ZZZ(I)?")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_4c_1VMAC>],
+ (instregex "^BFMLAL[BT]_ZZZ(I)?")>;
// SVE Load instructions
// -----------------------------------------------------------------------------
// Load vector
-def : InstRW<[C1NanoWrite_3c_2Ld], (instrs LDR_ZXI)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_2Ld>],
+ (instrs LDR_ZXI)>;
// Load predicate
-def : InstRW<[C1NanoWrite_3c_1LdSt], (instrs LDR_PXI)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_1LdSt>],
+ (instrs LDR_PXI)>;
// Contiguous load, scalar + imm
-def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LD1[BHWD]_IMM$",
- "^LD1S?B_[HSD]_IMM$",
- "^LD1S?H_[SD]_IMM$",
- "^LD1S?W_D_IMM$" )>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_2Ld>],
+ (instregex "^LD1[BHWD]_IMM$",
+ "^LD1S?B_[HSD]_IMM$",
+ "^LD1S?H_[SD]_IMM$",
+ "^LD1S?W_D_IMM$" )>;
// Contiguous load, scalar + scalar
-def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LD1[BHWD]$",
- "^LD1S?B_[HSD]$",
- "^LD1S?H_[SD]$",
- "^LD1S?W_D$" )>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_2Ld>],
+ (instregex "^LD1[BHWD]$",
+ "^LD1S?B_[HSD]$",
+ "^LD1S?H_[SD]$",
+ "^LD1S?W_D$" )>;
// Contiguous load broadcast, scalar + imm
-def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LD1R[BHWD]_IMM$",
- "^LD1RSW_IMM$",
- "^LD1RS?B_[HSD]_IMM$",
- "^LD1RS?H_[SD]_IMM$",
- "^LD1RS?W_D_IMM$",
- "^LD1RQ_[BHWD]_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_2Ld>],
+ (instregex "^LD1R[BHWD]_IMM$",
+ "^LD1RSW_IMM$",
+ "^LD1RS?B_[HSD]_IMM$",
+ "^LD1RS?H_[SD]_IMM$",
+ "^LD1RS?W_D_IMM$",
+ "^LD1RQ_[BHWD]_IMM$")>;
// Contiguous load broadcast, scalar + scalar
-def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LD1RQ_[BHWD]$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_2Ld>],
+ (instregex "^LD1RQ_[BHWD]$")>;
// Non temporal load, scalar + imm
-def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LDNT1[BHWD]_ZRI$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_2Ld>],
+ (instregex "^LDNT1[BHWD]_ZRI$")>;
// Non temporal load, scalar + scalar
-def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LDNT1[BHWD]_ZRR$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_2Ld>],
+ (instregex "^LDNT1[BHWD]_ZRR$")>;
// Non temporal gather load, vector + scalar 32-bit element size
-def : InstRW<[C1NanoWrite_9c_7r_1LdSt], (instregex "^LDNT1[BHW]_ZZR_S$",
+def : InstRW<[C1NanoWrite_9c_1LdSt_7rc], (instregex "^LDNT1[BHW]_ZZR_S$",
"^LDNT1S[BH]_ZZR_S$")>;
// Non temporal gather load, vector + scalar 64-bit element size
-def : InstRW<[C1NanoWrite_7c_6r_1LdSt], (instregex "^LDNT1S?[BHW]_ZZR_D$")>;
-def : InstRW<[C1NanoWrite_7c_6r_1LdSt], (instrs LDNT1D_ZZR_D)>;
+def : InstRW<[C1NanoWrite_7c_1LdSt_6rc], (instregex "^LDNT1S?[BHW]_ZZR_D$")>;
+def : InstRW<[C1NanoWrite_7c_1LdSt_6rc], (instrs LDNT1D_ZZR_D)>;
// Contiguous first faulting load, scalar + scalar
def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LDFF1[BHWD]$",
@@ -1714,139 +2380,188 @@ def : InstRW<[C1NanoWrite_3c_2Ld], (instregex "^LDNF1[BHWD]_IMM$",
"^LDNF1S?W_D_IMM$")>;
// Contiguous Load two structures to two vectors, scalar + imm
-def : InstRW<[C1NanoWrite_3c_1LdSt], (instregex "^LD2[BHWD]_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_1LdSt>],
+ (instregex "^LD2[BHWD]_IMM$")>;
// Contiguous Load two structures to two vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_3c_r2_1LdSt], (instregex "^LD2[BHWD]$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_3c_1LdSt_2rc>],
+ (instregex "^LD2[BHWD]$")>;
// Contiguous Load three structures to three vectors, scalar + imm
-def : InstRW<[C1NanoWrite_5c_r3_1LdSt], (instregex "^LD3[BHWD]_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_5c_1LdSt_3rc>],
+ (instregex "^LD3[BHWD]_IMM$")>;
// Contiguous Load three structures to three vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_5c_r4_1LdSt], (instregex "^LD3[BHWD]$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_5c_1LdSt_4rc>],
+ (instregex "^LD3[BHWD]$")>;
// Contiguous Load four structures to four vectors, scalar + imm
-def : InstRW<[C1NanoWrite_5c_r3_1LdSt], (instregex "^LD4[BHWD]_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_5c_1LdSt_3rc>],
+ (instregex "^LD4[BHWD]_IMM$")>;
// Contiguous Load four structures to four vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_5c_r4_1LdSt], (instregex "^LD4[BHWD]$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1Ld_1CMELD,
+ C1NanoWrite_5c_1LdSt_4rc>],
+ (instregex "^LD4[BHWD]$")>;
// Gather load, vector + imm, 32-bit element size
-def : InstRW<[C1NanoWrite_9c_7r_1LdSt], (instregex "^GLD(FF)?1S?[BH]_S_IMM$",
+def : InstRW<[C1NanoWrite_9c_1LdSt_7rc], (instregex "^GLD(FF)?1S?[BH]_S_IMM$",
"^GLD(FF)?1W_IMM$")>;
// Gather load, vector + imm, 64-bit element size
-def : InstRW<[C1NanoWrite_7c_6r_1LdSt], (instregex "^GLD(FF)?1S?[BHW]_D_IMM$",
+def : InstRW<[C1NanoWrite_7c_1LdSt_6rc], (instregex "^GLD(FF)?1S?[BHW]_D_IMM$",
"^GLD(FF)?1D_IMM$")>;
// Gather load, 64-bit element size
-def : InstRW<[C1NanoWrite_7c_6r_1LdSt],
+def : InstRW<[C1NanoWrite_7c_1LdSt_6rc],
(instregex "^GLD(FF)?1S?[BHW]_D_[SU]XTW(_SCALED)?$",
"^GLD(FF)?1S?[BHW]_D(_SCALED)?$",
"^GLD(FF)?1D_[SU]XTW(_SCALED)?$",
"^GLD(FF)?1D(_SCALED)?$")>;
// Gather load, 32-bit scaled offset
-def : InstRW<[C1NanoWrite_7c_7r_1LdSt],
+def : InstRW<[C1NanoWrite_7c_1LdSt_7rc],
(instregex "^GLD(FF)?1S?[HW]_S_[SU]XTW_SCALED$",
"^GLD(FF)?1W_[SU]XTW_SCALED")>;
// Gather load, 32-bit unpacked unscaled offset
-def : InstRW<[C1NanoWrite_7c_6r_1LdSt], (instregex "^GLD(FF)?1S?[BH]_S_[SU]XTW$",
+def : InstRW<[C1NanoWrite_7c_1LdSt_6rc], (instregex "^GLD(FF)?1S?[BH]_S_[SU]XTW$",
"^GLD(FF)?1W_[SU]XTW$")>;
def : InstRW<[C1NanoWrite<0, C1NanoUnitVALU>], (instregex "^PRF(B|H|W|D).*")>;
+
// SVE Store instructions
// -----------------------------------------------------------------------------
// Store from predicate reg
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instrs STR_PXI)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1LdSt_1CMEST,
+ C1NanoWrite_1LdSt_0rc>],
+ (instrs STR_PXI)>;
// Store from vector reg
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instrs STR_ZXI)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1LdSt_1CMEST,
+ C1NanoWrite_1LdSt_0rc>],
+ (instrs STR_ZXI)>;
// Contiguous store, scalar + imm
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instregex "^ST1[BHWD]_IMM$",
- "^ST1B_[HSD]_IMM$",
- "^ST1H_[SD]_IMM$",
- "^ST1W_D_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1LdSt_1CMEST,
+ C1NanoWrite_1LdSt_0rc>],
+ (instregex "^ST1[BHWD]_IMM$",
+ "^ST1B_[HSD]_IMM$",
+ "^ST1H_[SD]_IMM$",
+ "^ST1W_D_IMM$")>;
// Contiguous store, scalar + scalar
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instregex "^ST1H(_[SD])?$")>;
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instregex "^ST1[BWD]$",
- "^ST1B_[HSD]$",
- "^ST1W_D$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1LdSt_1CMEST,
+ C1NanoWrite_1LdSt_0rc>],
+ (instregex "^ST1H(_[SD])?$",
+ "^ST1[BWD]$",
+ "^ST1B_[HSD]$",
+ "^ST1W_D$")>;
// Contiguous store two structures from two vectors, scalar + imm
-def : InstRW<[C1NanoWrite_2r_1LdSt], (instregex "^ST2[BHWD]_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_2LdSt_1CMEST,
+ C1NanoWrite_1LdSt_2rc>],
+ (instregex "^ST2[BHWD]_IMM$")>;
// Contiguous store two structures from two vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_2r_1LdSt], (instrs ST2H)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_2LdSt_1CMEST,
+ C1NanoWrite_1LdSt_2rc>],
+ (instrs ST2H)>;
// Contiguous store two structures from two vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_2r_1LdSt], (instregex "^ST2[BWD]$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_2LdSt_1CMEST,
+ C1NanoWrite_1LdSt_2rc>],
+ (instregex "^ST2[BWD]$")>;
// Contiguous store three structures from three vectors, scalar + imm
-def : InstRW<[C1NanoWrite_6r_1LdSt], (instregex "^ST3[BHW]_IMM$")>;
-def : InstRW<[C1NanoWrite_3r_1LdSt], (instregex "^ST3D_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_1LdSt_6rc>],
+ (instregex "^ST3[BHW]_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_1LdSt_3rc>],
+ (instregex "^ST3D_IMM$")>;
// Contiguous store three structures from three vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_6r_1LdSt], (instregex "^ST3[BHW]$")>;
-def : InstRW<[C1NanoWrite_3r_1LdSt], (instregex "^ST3D$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_1LdSt_6rc>],
+ (instregex "^ST3[BHW]$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_1LdSt_3rc>],
+ (instregex "^ST3D$")>;
// Contiguous store four structures from four vectors, scalar + imm
-def : InstRW<[C1NanoWrite_8r_1LdSt], (instregex "^ST4[BHW]_IMM$")>;
-def : InstRW<[C1NanoWrite_4r_1LdSt], (instregex "^ST4D_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_3LdSt_1CMEST,
+ C1NanoWrite_1LdSt_8rc>],
+ (instregex "^ST4[BHW]_IMM$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_4c_1CMEVXALU,
+ C1NanoWrite_1LdSt_4rc>],
+ (instregex "^ST4D_IMM$")>;
// Contiguous store four structures from four vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_8r_1LdSt], (instregex "^ST4[BHW]$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_4LdSt_1CMEST,
+ C1NanoWrite_1LdSt_8rc>],
+ (instregex "^ST4[BHW]$")>;
// Contiguous store four structures from four vectors, scalar + scalar
-def : InstRW<[C1NanoWrite_4r_1LdSt], (instregex "^ST4D$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_4LdSt_1CMEST,
+ C1NanoWrite_1LdSt_4rc>],
+ (instregex "^ST4D$")>;
// Non temporal store, scalar + imm
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instregex "^STNT1[BHWD]_ZRI$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1LdSt_1CMEST,
+ C1NanoWrite_1LdSt_0rc>],
+ (instregex "^STNT1[BHWD]_ZRI$")>;
// Non temporal store, scalar + scalar
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instrs STNT1H_ZRR)>;
-def : InstRW<[C1NanoWrite_0r_1LdSt], (instregex "^STNT1[BWD]_ZRR$")>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1LdSt_1CMEST,
+ C1NanoWrite_1LdSt_0rc>],
+ (instrs STNT1H_ZRR)>;
+def : InstRW<[C1NanoStreamingSchedWrite<C1NanoWrite_2c_1LdSt_1CMEST,
+ C1NanoWrite_1LdSt_0rc>],
+ (instregex "^STNT1[BWD]_ZRR$")>;
// Scatter non temporal store, vector + scalar 32-bit element size
-def : InstRW<[C1NanoWrite_9r_1LdSt], (instregex "^STNT1[BHW]_ZZR_S")>;
+def : InstRW<[C1NanoWrite_1LdSt_9rc], (instregex "^STNT1[BHW]_ZZR_S")>;
// Scatter non temporal store, vector + scalar 64-bit element size
-def : InstRW<[C1NanoWrite_7r_1LdSt], (instregex "^STNT1[BHWD]_ZZR_D")>;
+def : InstRW<[C1NanoWrite_1LdSt_7rc], (instregex "^STNT1[BHWD]_ZZR_D")>;
// Scatter store vector + imm 32-bit element size
-def : InstRW<[C1NanoWrite_9r_1LdSt], (instregex "^SST1[BH]_S_IMM$",
+def : InstRW<[C1NanoWrite_1LdSt_9rc], (instregex "^SST1[BH]_S_IMM$",
"^SST1W_IMM$")>;
// Scatter store vector + imm 64-bit element size
-def : InstRW<[C1NanoWrite_7r_1LdSt], (instregex "^SST1[BHW]_D_IMM$",
+def : InstRW<[C1NanoWrite_1LdSt_7rc], (instregex "^SST1[BHW]_D_IMM$",
"^SST1D_IMM$")>;
// Scatter store, 32-bit scaled offset
-def : InstRW<[C1NanoWrite_9r_1LdSt],
+def : InstRW<[C1NanoWrite_1LdSt_9rc],
(instregex "^SST1(H_S|W)_[SU]XTW_SCALED$")>;
// Scatter store, 32-bit unpacked unscaled offset
-def : InstRW<[C1NanoWrite_7r_1LdSt], (instregex "^SST1[BHW]_D_[SU]XTW$",
+def : InstRW<[C1NanoWrite_1LdSt_7rc], (instregex "^SST1[BHW]_D_[SU]XTW$",
"^SST1D_[SU]XTW$")>;
// Scatter store, 32-bit unpacked scaled offset
-def : InstRW<[C1NanoWrite_7r_1LdSt], (instregex "^SST1[HW]_D_[SU]XTW_SCALED$",
+def : InstRW<[C1NanoWrite_1LdSt_7rc], (instregex "^SST1[HW]_D_[SU]XTW_SCALED$",
"^SST1D_[SU]XTW_SCALED$")>;
// Scatter store, 32-bit unscaled offset
-def : InstRW<[C1NanoWrite_9r_1LdSt], (instregex "^SST1[BH]_S_[SU]XTW$",
+def : InstRW<[C1NanoWrite_1LdSt_9rc], (instregex "^SST1[BH]_S_[SU]XTW$",
"^SST1W_[SU]XTW$")>;
// Scatter store, 64-bit scaled offset
-def : InstRW<[C1NanoWrite_7r_1LdSt], (instregex "^SST1[HW]_D_SCALED$",
+def : InstRW<[C1NanoWrite_1LdSt_7rc], (instregex "^SST1[HW]_D_SCALED$",
"^SST1D_SCALED$")>;
// Scatter store, 64-bit unscaled offset
-def : InstRW<[C1NanoWrite_7r_1LdSt], (instregex "^SST1[BHW]_D$",
+def : InstRW<[C1NanoWrite_1LdSt_7rc], (instregex "^SST1[BHW]_D$",
"^SST1D$")>;
// SVE Miscellaneous instructions
@@ -1876,9 +2591,250 @@ def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^AES[DE]_ZZZ_B$",
def : InstRW<[C1NanoWrite_3c_1VALU], (instregex "^(BCAX|EOR3)_ZZZZ$")>;
def : InstRW<[C1NanoWrite_4c_1VALU], (instregex "^XAR_ZZZI_[BHSD]$")>;
-def : InstRW<[C1NanoWrite_3c_1VALU_RC0], (instregex "^RAX1_ZZZ_D$")>;
+def : InstRW<[C1NanoWrite_3c_1VALU_0rc], (instregex "^RAX1_ZZZ_D$")>;
// Crypto SM4 ops
-def : InstRW<[C1NanoWrite_9c_7r_1VMC], (instregex "^SM4E(KEY)?_ZZZ_S$")>;
+def : InstRW<[C1NanoWrite_9c_1VMC_7rc], (instregex "^SM4E(KEY)?_ZZZ_S$")>;
+
+// MOPS instructions
+// -----------------------------------------------------------------------------
+
+//Memory Copy Forward-only Prologue
+def : InstRW<[C1NanoWrite_2c_1ALU_1LdSt_2rc], (instregex "^CPYFP")>;
+
+// Memory Copy Forward-only Main
+// Note: we model the base latency here.
+
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^CPYFM")>;
+
+// Memory Copy Forward-only Epilogue
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^CPYFE")>;
+
+// Memory Copy Prologue
+def : InstRW<[C1NanoWrite_3c_1ALU_1LdSt_3rc], (instregex "^CPYP")>;
+
+// Memory Copy Main
+// Note: we model the base latency here.
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^CPYM")>;
+
+// Memory Copy Epilogue
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^CPYE")>;
+
+// Memory Set Prologue
+def : InstRW<[C1NanoWrite_2c_1ALU_1LdSt_2rc], (instregex "^SETP")>;
+
+// Memory Set Main
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^SETM")>;
+
+// Memory Set Epilogue
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^SETE")>;
+
+// Memory Set with tag setting Prologue
+def : InstRW<[C1NanoWrite_2c_1ALU_1LdSt_2rc], (instregex "^SETGP")>;
+
+// Memory Set with tag setting Main
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^SETGM")>;
+
+// Memory Set with tag setting Epilogue
+def : InstRW<[C1NanoWrite_1c_1ALU_1LdSt_1rc], (instregex "^MOPSSETGE")>;
+
+// SVE instructions added by SME and only available in Streaming SVE mode
+// -----------------------------------------------------------------------------
+// Instructions added by SME and only available in streaming SVE mode
+// For these, we return the CME write as a default even if not in streaming.
+
+
+// Horizontal and vertical ZA reductions.
+def : InstRW<[C1NanoWrite_4c_1CMEVXALU_4rc],
+ (instregex "^ADDHA_MPPZ_(S(_PSEUDO_S)?|D(_PSEUDO_D)?)$",
+ "^ADDVA_MPPZ_(S(_PSEUDO_S)?|D(_PSEUDO_D)?)$")>;
+
+// Outer-product ZA updates.
+def : InstRW<[C1NanoWrite_2c_1CMEMML0_2rc],
+ (instregex "^BMOPA_MPPZZ_S(_PSEUDO)?$", "^BMOPS_MPPZZ_S(_PSEUDO)?$",
+ "^(SMOPA|UMOPA|SMOPS|UMOPS)_MPPZZ_(S|D|HtoS)(_PSEUDO)?$",
+ "^(SUMOPA|USMOPA|SUMOPS|USMOPS)_MPPZZ_(S|D)(_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEMML0_2rc],
+ (instregex "^(F?MOPA|F?MOPS)_MPPZZ_(S|D|H)(_PSEUDO)?$",
+ "^F?MOP(AL|SL)_MPPZZ(_PSEUDO)?$",
+ "^(BFMOPA|BFMOPS)_MPPZZ(_H)?(_PSEUDO)?$")>;
+
+
+// Multi vector floating point absolute maximum. These are missing from the CME
+// SWOG but are present in the C1-Ultra SWOG as being sent to CME
+def : InstRW<[C1NanoWrite_4c_1CMEVXALU],
+ (instregex "^FA(MAX|MIN)_(ZZZ|ZPmZ|ZPZZ)")>;
+
+// ZA accumulators updated through multi-vector add/subtract operations.
+def : InstRW<[C1NanoWrite_2c_1CMEMML0_1rc],
+ (instregex "^(ADD|SUB)_VG2_M2(Z|ZZ|Z2Z)_[SD](_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_2c_1CMEMML0_2rc],
+ (instregex "^(ADD|SUB)_VG4_M4(Z|ZZ|Z4Z)_[SD](_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEMML0_1rc],
+ (instregex "^(FADD|FSUB|BFADD|BFSUB)_VG2_M2Z_[HSD](_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEMML0_2rc],
+ (instregex "^(FADD|FSUB|BFADD|BFSUB)_VG4_M4Z_[HSD](_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_5c_1CMEVXALU_1rc],
+ (instregex "^ADD_VG2_2ZZ_")>;
+def : InstRW<[C1NanoWrite_6c_1CMEVXALU_4rc],
+ (instregex "^ADD_VG4_4ZZ_")>;
+
+// Streaming-only clamp, convert and shift families.
+def : InstRW<[C1NanoWrite_5c_1CMEVXALU_1rc],
+ (instregex "^FCLAMP_VG2_2Z2Z_", "^BFCLAMP_VG2_2ZZZ",
+ "^(S|U)CLAMP_VG2_2Z2Z_", "^(FMAX|FMIN)_VG2_2(ZZ|Z2Z)_",
+ "^FA(MAX|MIN)_2Z2Z_", "^SQDMULH_VG2_2ZZ_",
+ "^(S|U)RSHL_VG2_2ZZ_")>;
+def : InstRW<[C1NanoWrite_7c_1CMEVXALU_4rc],
+ (instregex "^FCLAMP_VG4_4Z4Z_", "^BFCLAMP_VG4_4ZZZ",
+ "^(S|U)CLAMP_VG4_4Z4Z_")>;
+def : InstRW<[C1NanoWrite_4c_1CMEVXALU_2rc],
+ (instregex "^(S|U)(MAX|MIN)_VG2_2(ZZ|Z2Z)_",
+ "^(FMAXNM|FMINNM)_VG2_2(ZZ|Z2Z)_",
+ "^SQDMULH_VG2_2Z2Z_", "^(S|U)RSHL_VG2_2Z2Z_",
+ "^(SQRSHR|UQRSHR)_VG2_Z2ZI_",
+ "^(FRINT(A|M|N|P))_2Z2Z_")>;
+def : InstRW<[C1NanoWrite_4c_1CMEVXALU_4rc],
+ (instregex "^(S|U)(MAX|MIN)_VG4_4Z4Z_",
+ "^(S|U)RSHL_VG4_4Z4Z_")>;
+def : InstRW<[C1NanoWrite_5c_1CMEVXALU_4rc],
+ (instregex "^(S|U)(MAX|MIN)_VG4_4ZZ_",
+ "^(FMAX|FMIN|FMAXNM|FMINNM)_VG4_4(ZZ|Z4Z)_",
+ "^(BFMAX|BFMIN|BFMAXNM|BFMINNM)_VG4_4(Z2Z|ZZ)_",
+ "^SQDMULH_VG4_4(ZZ|Z4Z)_", "^(FRINT(A|M|N|P))_4Z4Z_",
+ "^FSCALE_4(ZZ|Z4Z)_")>;
+def : InstRW<[C1NanoWrite_4c_1CMEVXALU_2rc],
+ (instregex "^(BFMAX|BFMIN|BFMAXNM|BFMINNM)_VG2_2(ZZ|Z2Z)_",
+ "^FCVTZS_2Z2Z_StoS$",
+ "^FCVTZU_2Z2Z_StoS$", "^F[12]CVT_2?ZZ_BtoH$",
+ "^F[12]CVTL(T_ZZ|_2ZZ)_BtoH$",
+ "^FCVT_Z2Z_(HtoB|StoH)$", "^FCVT_2ZZ_H_S$",
+ "^FCVTL_2ZZ_H_S$", "^FCVT_Z4Z_StoB$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEVXMUL],
+ (instregex "^FSCALE_2(ZZ|Z2Z)_")>;
+def : InstRW<[C1NanoWrite_6c_1CMEVXALU_4rc],
+ (instregex "^(S|U)RSHL_VG4_4ZZ_")>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERMF_1CMEVX0ALU_1rc],
+ (instregex "^(S|U)CVTF_2Z2Z_StoS$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERMF_1CMEVX0ALU_2rc],
+ (instregex "^(S|U)CVTF_4Z4Z_StoS$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEVXALU_4rc],
+ (instregex "^FCVTZS_4Z4Z_StoS$", "^FCVTZU_4Z4Z_StoS$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERMF_1CMEVXALU_1d1rc],
+ (instregex "^FCVTN(B|T)?_Z2Z_(StoB|HtoB|StoH)$", "^FCVTN_Z4Z_StoB$")>;
+def : InstRW<[C1NanoWrite_7c_1CMEPERMF_1CMEVXALU_1rc],
+ (instregex "^BFCVTN_Z2Z_(StoH|HtoB)$")>;
+def : InstRW<[C1NanoWrite_11c_1CMEVXALU_2rc],
+ (instregex "^BFCVT_Z2Z_(StoH|HtoB)$", "^BF[12]CVT_2?ZZ_BtoH$",
+ "^BF[12]CVTL(T_ZZ|_2ZZ)_BtoH$")>;
+def : InstRW<[C1NanoWrite_8c_1CMEPERMS_1CMEVXALU_1rc],
+ (instregex "^(SQCVT|UQCVT|SQCVTU|SQCVTN|SQCVTUN|UQCVTN)_Z4Z_",
+ "^(SQCVT|UQCVT|SQCVTU|SQCVTN|UQCVTN)_Z2Z_StoH",
+ "^SQRSHRU_VG2_Z2ZI_",
+ "^(SQRSHRN|UQRSHRN)_Z2ZI_StoH",
+ "^(SQRSHR|UQRSHR|SQRSHRU|SQRSHRN|UQRSHRN|SQRSHRUN)_VG4_Z4ZI_")>;
+
+// SME integer and floating-point dot and multiply-accumulate families.
+def : InstRW<[C1NanoWrite_4c_1CMEMML0],
+ (instregex "^FMLALL_M(ZZI|ZZ)_BtoS(_PSEUDO)?$",
+ "^BFMLAL_MZZ", "^BFMLSL_MZZ",
+ "^FMLAL(_VG2)?_MZZ(_BtoH)?", "^FMLSL_MZZ")>;
+def : InstRW<[C1NanoWrite_2c_1CMEMML0_1rc],
+ (instregex "^(SUDOT|USDOT)_VG2_M2(ZZI|ZZ|Z2Z)_BToS(_PSEUDO)?$",
+ "^(SDOT|UDOT)_VG2_M2(ZZI|ZZ|Z2Z)_(BtoS|BToS|HtoS|HToS|HtoD)(_PSEUDO)?",
+ "^(SMLAL|UMLAL|SMLSL|UMLSL)_(MZZI|MZZ|VG2_M2)",
+ "^(SMLALL|UMLALL|USMLALL|SMLSLL|UMLSLL)_(MZZI|MZZ|VG2_M2ZZI|VG2_M2ZZ|VG2_M2Z2Z)_(BtoS|HtoD)(_PSEUDO)?$",
+ "^(SUMLALL|USMLALL)_(VG2_M2ZZI|VG2_M2ZZ|VG2_M2Z2Z|MZZI|MZZ)_BtoS(_PSEUDO)?$",
+ "^(SVDOT|UVDOT)_VG2_M2ZZI_")>;
+def : InstRW<[C1NanoWrite_2c_1CMEMML0_2rc],
+ (instregex "^(SUDOT|USDOT)_VG4_M4(ZZI|ZZ|Z4Z)_BToS(_PSEUDO)?$",
+ "^(SDOT|UDOT)_VG4_M4(ZZI|ZZ|Z4Z)_(BtoS|BToS|HtoS|HtoD|HToS|HtoS)(_PSEUDO)?",
+ "^(SMLAL|UMLAL|SMLSL|UMLSL)_VG4_M4",
+ "^(SMLALL|UMLALL|USMLALL|SMLSLL|UMLSLL)_(VG4_M4ZZI|VG4_M4ZZ|VG4_M4Z4Z)_(BtoS|HtoD)(_PSEUDO)?$",
+ "^(SUMLALL|USMLALL)_(VG4_M4ZZI|VG4_M4ZZ|VG4_M4Z4Z)_BtoS(_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEMML0_1rc],
+ (instregex "^(FDOT|BFDOT|FMLA|FMLS|BFMLA|BFMLS)_VG2_M2(ZZI|ZZ|Z2Z)(_BtoH|_BtoS|_HtoS|_[HSD])?(_PSEUDO)?$",
+ "^(FMLAL|FMLSL|BFMLAL|BFMLSL)_VG2_M2(ZZI|ZZ|Z2Z)(_BtoH|_HtoS)?(_PSEUDO)?$",
+ "^BFMUL_2(ZZ|Z2Z)$",
+ "^FMLALL_VG2_M2(ZZI|ZZ|Z2Z)_BtoS(_PSEUDO)?$",
+ "^(FVDOT|BFVDOT)_VG2_M2ZZI_(HtoS|BtoH)(_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEMML0_2rc],
+ (instregex "^(FDOT|BFDOT|FMLA|FMLS|BFMLA|BFMLS)_VG4_M4(ZZI|ZZ|Z4Z)(_BtoH|_BtoS|_HtoS|_[HSD])?(_PSEUDO)?$",
+ "^(FMLAL|FMLSL|BFMLAL|BFMLSL)_VG4_M4(ZZI|ZZ|Z4Z)(_BtoH|_HtoS)?(_PSEUDO)?$",
+ "^BFMUL_4(ZZ|Z4Z)$",
+ "^FMLALL_VG4_M4(ZZI|ZZ|Z4Z)_BtoS(_PSEUDO)?$",
+ "^FVDOT[BT]_VG4_M2ZZI_(BtoS|BtoH)(_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEMML0_3rc],
+ (instregex "^(SUVDOT|USVDOT)_VG4_M4ZZI_")>;
+def : InstRW<[C1NanoWrite_4c_1CMEMML0_4rc],
+ (instregex "^(SVDOT|UVDOT)_VG4_M4ZZI_")>;
+
+// Streaming-only misc and ZA move instructions.
+def : InstRW<[C1NanoWrite_4c_1CMEPERM],
+ (instregex "^(SUNPK|UUNPK)_VG2_2ZZ_", "^(ZIP|UZP)_VG2_2ZZZ")>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERM_2rc],
+ (instregex "^(SUNPK|UUNPK)_VG4_4Z2Z_",
+ "^(ZIP|UZP)_VG4_4Z4Z")>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERM],
+ (instregex "^SEL_VG2_2ZC2Z2Z_")>;
+def : InstRW<[C1NanoWrite_5c_1CMEPERM_2rc],
+ (instregex "^SEL_VG4_4ZC4Z4Z_")>;
+def : InstRW<[C1NanoWrite_5c_1CMEMML0_1rc],
+ (instregex "^MOVA_MXI2Z_", "^MOVA_VG2_MXI2Z(_PSEUDO)?$",
+ "^INSERT_MXIPZ")>;
+def : InstRW<[C1NanoWrite_2c_1CMEMML0_2rc],
+ (instregex "^MOVA_MXI4Z_", "^MOVA_VG4_MXI4Z(_PSEUDO)?$")>;
+def : InstRW<[C1NanoWrite_9c_1CMEMML1],
+ (instregex "^MOVA_2ZMXI_", "^EXTRACT_ZPMXI_")>;
+def : InstRW<[C1NanoWrite_9c_1CMEMML1_2rc],
+ (instregex "^MOVA_4ZMXI_")>;
+def : InstRW<[C1NanoWrite_9c_1CMEMML1_5rc],
+ (instregex "^MOVA_VG2_2ZMXI$")>;
+def : InstRW<[C1NanoWrite_13c_1CMEMML1_1CMEPERMF_5rc],
+ (instregex "^MOVA_VG4_4ZMXI$")>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERMF_1rc],
+ (instrs MOVT_TIX)>;
+def : InstRW<[C1NanoWrite_8c_1CMEPERMF_1CMEVX0ALU_1rc],
+ (instrs MOVT_XTI)>;
+def : InstRW<[C1NanoWrite_4c_1CMEPERMF_1rc],
+ (instregex "^LUTI(2|4)?_(Z2ZZI|ZZZI|2ZZZ|ZTZI)")>;
+def : InstRW<[C1NanoWrite_5c_1CMEPERMF_2rc],
+ (instregex "^LUTI[24](_S)?_2ZTZI_")>;
+def : InstRW<[C1NanoWrite_7c_1CMEPERMF_4rc],
+ (instregex "^LUTI[24](_S)?_4ZTZI_")>;
+def : InstRW<[C1NanoWrite_1c_1CMEMML0_2rc],
+ (instregex "^ZERO_M(_PSEUDO)?")>;
+def : InstRW<[C1NanoWrite_1c_1CMERNMRET],
+ (instregex "^ZERO_T(_PSEUDO)?")>;
+def : InstRW<[C1NanoWrite_2c_1CMELD],
+ (instregex "^LD(NT)?1(B|H|W|D)_2Z(_.*)?$",
+ "^LDR_(PPXI|TX(_PSEUDO)?)$",
+ "^LDR_ZZXI(_STRIDED_CONTIGUOUS)?$")>;
+def : InstRW<[C1NanoWrite_2c_1CMELD_1rc],
+ // 3-reg fill pseudos expand to repeated 1-reg loads, so reuse the
+ // widest SME load bucket when there is no dedicated guide row.
+ (instregex "^LD(NT)?1(B|H|W|D)_4Z(_.*)?$",
+ "^LDR_ZZZXI$",
+ "^LDR_ZZZZXI(_STRIDED_CONTIGUOUS)?$")>;
+def : InstRW<[C1NanoWrite_7c_1Ld_1CMELD],
+ (instregex "^LD1_MXIPXX_[HV](_PSEUDO)?_[BDHSQ]$")>;
+def : InstRW<[C1NanoWrite_7c_1Ld_1CMELD],
+ (instregex "^LDR_ZA(_PSEUDO)?")>;
+def : InstRW<[C1NanoWrite_2c_1CMEST],
+ (instregex "^([Ss][Tt](NT)?1([Bb]|[Hh]|[Ww]|[Dd]))_2[Zz](_.*)?$",
+ "^STR_(PPXI|TX(_PSEUDO)?)$",
+ "^STR_ZZXI(_STRIDED_CONTIGUOUS)?$")>;
+def : InstRW<[C1NanoWrite_2c_1CMEST_1rc],
+ // 3-reg spill pseudos expand to repeated 1-reg stores, so reuse the
+ // widest SME store bucket when there is no dedicated guide row.
+ (instregex "^([Ss][Tt](NT)?1([Bb]|[Hh]|[Ww]|[Dd]))_4[Zz](_.*)?$",
+ "^STR_ZZZXI$",
+ "^STR_ZZZZXI(_STRIDED_CONTIGUOUS)?$")>;
+def : InstRW<[C1NanoWrite_11c_1LdSt_1CMEST],
+ (instregex "^ST1_MXIPXX_[HV]_[BDHSQ]$")>;
+def : InstRW<[C1NanoWrite_11c_1LdSt_1CMEST],
+ (instregex "^STR_ZA(_PSEUDO)?")>;
+def : InstRW<[C1NanoWrite_2c_1CMEPF_2rc],
+ (instrs RPRFM)>;
}
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s
index ad19cad01f7c5..7f60ccd8082fe 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s
@@ -517,20 +517,20 @@
# CHECK-NEXT: 1 3 1.00 fcmp d23, #0.0
# CHECK-NEXT: 1 3 1.00 fcmpe d26, d22
# CHECK-NEXT: 1 3 1.00 fcmpe d29, #0.0
-# CHECK-NEXT: 1 3 1.00 fccmp s1, s31, #0, eq
-# CHECK-NEXT: 1 3 1.00 fccmp s3, s0, #15, hs
-# CHECK-NEXT: 1 3 1.00 fccmp s31, s15, #13, hs
-# CHECK-NEXT: 1 3 1.00 fccmp d9, d31, #0, le
-# CHECK-NEXT: 1 3 1.00 fccmp d3, d0, #15, gt
-# CHECK-NEXT: 1 3 1.00 fccmp d31, d5, #7, ne
-# CHECK-NEXT: 1 3 1.00 fccmp h31, h3, #11, hs
-# CHECK-NEXT: 1 3 1.00 fccmpe h6, h1, #12, ne
-# CHECK-NEXT: 1 3 1.00 fccmpe s1, s31, #0, eq
-# CHECK-NEXT: 1 3 1.00 fccmpe s3, s0, #15, hs
-# CHECK-NEXT: 1 3 1.00 fccmpe s31, s15, #13, hs
-# CHECK-NEXT: 1 3 1.00 fccmpe d9, d31, #0, le
-# CHECK-NEXT: 1 3 1.00 fccmpe d3, d0, #15, gt
-# CHECK-NEXT: 1 3 1.00 fccmpe d31, d5, #7, ne
+# CHECK-NEXT: 1 5 5.00 fccmp s1, s31, #0, eq
+# CHECK-NEXT: 1 5 5.00 fccmp s3, s0, #15, hs
+# CHECK-NEXT: 1 5 5.00 fccmp s31, s15, #13, hs
+# CHECK-NEXT: 1 5 5.00 fccmp d9, d31, #0, le
+# CHECK-NEXT: 1 5 5.00 fccmp d3, d0, #15, gt
+# CHECK-NEXT: 1 5 5.00 fccmp d31, d5, #7, ne
+# CHECK-NEXT: 1 5 5.00 fccmp h31, h3, #11, hs
+# CHECK-NEXT: 1 5 5.00 fccmpe h6, h1, #12, ne
+# CHECK-NEXT: 1 5 5.00 fccmpe s1, s31, #0, eq
+# CHECK-NEXT: 1 5 5.00 fccmpe s3, s0, #15, hs
+# CHECK-NEXT: 1 5 5.00 fccmpe s31, s15, #13, hs
+# CHECK-NEXT: 1 5 5.00 fccmpe d9, d31, #0, le
+# CHECK-NEXT: 1 5 5.00 fccmpe d3, d0, #15, gt
+# CHECK-NEXT: 1 5 5.00 fccmpe d31, d5, #7, ne
# CHECK-NEXT: 1 3 1.00 fcsel s3, s20, s9, pl
# CHECK-NEXT: 1 3 1.00 fcsel d9, d10, d11, mi
# CHECK-NEXT: 1 3 1.00 fcsel h26, h2, h11, hs
@@ -780,28 +780,28 @@
# CHECK-NEXT: 1 3 0.50 * ldr q0, #-1048576
# CHECK-NEXT: 1 2 0.50 U prfm pldl1strm, #0
# CHECK-NEXT: 1 2 0.50 U prfm #25, #0
-# CHECK-NEXT: 2 3 1.00 * * U stxrb w18, w8, [sp]
-# CHECK-NEXT: 2 3 1.00 * * U stxrh w24, w15, [x16]
-# CHECK-NEXT: 2 3 1.00 * * U stxr w5, w6, [x17]
-# CHECK-NEXT: 2 3 1.00 * * U stxr w1, x10, [x21]
+# CHECK-NEXT: 1 3 1.00 * * U stxrb w18, w8, [sp]
+# CHECK-NEXT: 1 3 1.00 * * U stxrh w24, w15, [x16]
+# CHECK-NEXT: 1 3 1.00 * * U stxr w5, w6, [x17]
+# CHECK-NEXT: 1 3 1.00 * * U stxr w1, x10, [x21]
# CHECK-NEXT: 1 2 0.50 * * U ldxrb w30, [x0]
# CHECK-NEXT: 1 2 0.50 * * U ldxrh w17, [x4]
# CHECK-NEXT: 1 2 0.50 * * U ldxr w22, [sp]
# CHECK-NEXT: 1 2 0.50 * * U ldxr x11, [x29]
-# CHECK-NEXT: 2 3 1.00 * * U stxp w12, w11, w10, [sp]
-# CHECK-NEXT: 2 3 1.00 * * U stxp wzr, x27, x9, [x12]
+# CHECK-NEXT: 1 3 1.00 * * U stxp w12, w11, w10, [sp]
+# CHECK-NEXT: 1 3 1.00 * * U stxp wzr, x27, x9, [x12]
# CHECK-NEXT: 2 2 1.00 * * U ldxp w0, wzr, [sp]
# CHECK-NEXT: 2 2 1.00 * * U ldxp x17, x0, [x18]
-# CHECK-NEXT: 2 3 1.00 * * U stlxrb w12, w22, [x0]
-# CHECK-NEXT: 2 3 1.00 * * U stlxrh w10, w1, [x1]
-# CHECK-NEXT: 2 3 1.00 * * U stlxr w9, w2, [x2]
-# CHECK-NEXT: 2 3 1.00 * * U stlxr w9, x3, [sp]
+# CHECK-NEXT: 1 3 1.00 * * U stlxrb w12, w22, [x0]
+# CHECK-NEXT: 1 3 1.00 * * U stlxrh w10, w1, [x1]
+# CHECK-NEXT: 1 3 1.00 * * U stlxr w9, w2, [x2]
+# CHECK-NEXT: 1 3 1.00 * * U stlxr w9, x3, [sp]
# CHECK-NEXT: 1 2 0.50 * * U ldaxrb w8, [x4]
# CHECK-NEXT: 1 2 0.50 * * U ldaxrh w7, [x5]
# CHECK-NEXT: 1 2 0.50 * * U ldaxr w6, [sp]
# CHECK-NEXT: 1 2 0.50 * * U ldaxr x5, [x6]
-# CHECK-NEXT: 2 3 1.00 * * U stlxp w4, w5, w6, [sp]
-# CHECK-NEXT: 2 3 1.00 * * U stlxp wzr, x6, x7, [x1]
+# CHECK-NEXT: 1 3 1.00 * * U stlxp w4, w5, w6, [sp]
+# CHECK-NEXT: 1 3 1.00 * * U stlxp wzr, x6, x7, [x1]
# CHECK-NEXT: 2 2 1.00 * * U ldaxp w5, w18, [sp]
# CHECK-NEXT: 2 2 1.00 * * U ldaxp x6, x19, [x22]
# CHECK-NEXT: 1 1 1.00 * U stlrb w24, [sp]
@@ -1254,1259 +1254,1280 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: 260.50 260.50 27.00 64.00 178.50 328.50 89.00 - 136.50 136.50 8.50 8.50 67.00
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: 260.50 260.50 27.00 - - - - - - - - - - - - - - - - - - - - - 64.00 172.50 322.50 89.00 - 192.50 192.50 8.50 8.50 67.00
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w2, w3, #4095
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w30, w29, #1, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w13, w5, #4095, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x5, x7, #1638
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w20, wsp, #801
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add wsp, wsp, #1104
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add wsp, w30, #4084
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x0, x24, #291
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x3, x24, #4095, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x8, sp, #1074
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add sp, x29, #3816
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w0, wsp, #4077
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w4, w20, #546, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub sp, sp, #288
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub wsp, w19, #16
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w13, w23, #291, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w2, #4095
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w20, wsp, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x3, #1, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp wsp, #2342
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp sp, #20, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x30, #4095
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x4, sp, #3822
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w3, #291, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn wsp, #1365
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn sp, #1092, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov x10, #-63432
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add wsp, wsp, w10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x25, x9, w25, uxtb
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w3, w5, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add wzr, w3, w5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w20, wzr, w4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w4, w6, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w11, w13, w15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w9, w3, wzr, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w17, w29, w20, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w21, w22, w23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w24, w25, w26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w27, w28, w29, lsr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w2, w3, w4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w5, w6, w7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add w8, w9, w10, asr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x3, x5, x7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add xzr, x3, x5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x20, xzr, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x4, x6, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x11, x13, x15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x9, x3, xzr, lsl #10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x17, x29, x20, lsl #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x21, x22, x23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x24, x25, x26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x27, x28, x29, lsr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x2, x3, x4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x5, x6, x7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - add x8, x9, x10, asr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w3, w5, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w17, wsp, w25
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x13, x23, w8, uxtb
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w3, w5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w20, wzr, w4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w4, w6, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w11, w13, w15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w9, w3, wzr, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w17, w29, w20, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w21, w22, w23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w24, w25, w26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w27, w28, w29, lsr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w2, w3, w4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w5, w6, w7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds w8, w9, w10, asr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x3, x5, x7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x3, x5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x20, xzr, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x4, x6, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x11, x13, x15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x9, x3, xzr, lsl #10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x17, x29, x20, lsl #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x21, x22, x23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x24, x25, x26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x27, x28, x29, lsr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x2, x3, x4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x5, x6, x7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adds x8, x9, x10, asr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w3, w5, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub wzr, w3, w5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w4, w6, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w11, w13, w15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w9, w3, wzr, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w17, w29, w20, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w21, w22, w23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w24, w25, w26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w27, w28, w29, lsr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w2, w3, w4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w5, w6, w7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w8, w9, w10, asr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x3, x5, x7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub xzr, x3, x5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x4, x6, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x11, x13, x15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x9, x3, xzr, lsl #10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x17, x29, x20, lsl #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x21, x22, x23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x24, x25, x26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x27, x28, x29, lsr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x2, x3, x4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x5, x6, x7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x8, x9, x10, asr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub w13, wsp, w10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sub x16, x2, w19, uxtb
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x13, x15, x14, sxtx #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w3, w5, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w3, w5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w4, w6, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w11, w13, w15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w9, w3, wzr, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w17, w29, w20, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w21, w22, w23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w24, w25, w26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w27, w28, w29, lsr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w2, w3, w4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w5, w6, w7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs w8, w9, w10, asr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x3, x5, x7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x3, x5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x4, x6, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x11, x13, x15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x9, x3, xzr, lsl #10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x17, x29, x20, lsl #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x21, x22, x23, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x24, x25, x26, lsr #18
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x27, x28, x29, lsr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x2, x3, x4, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x5, x6, x7, asr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subs x8, x9, x10, asr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn wzr, w4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w5, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w6, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w8, w9, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w10, w11, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w12, w13, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w14, w15, lsr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w16, w17, lsr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w18, w19, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w20, w21, asr #22
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn w22, w23, asr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x0, x3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn xzr, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x5, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x6, x7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x8, x9, lsl #15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x10, x11, lsl #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x12, x13, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x14, x15, lsr #41
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x16, x17, lsr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x18, x19, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x20, x21, asr #55
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmn x22, x23, asr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w0, w3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp wzr, w4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w5, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w6, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w8, w9, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w10, w11, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w12, w13, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w14, w15, lsr #21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w18, w19, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w20, w21, asr #22
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp w22, w23, asr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp wsp, w26
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x16, w27, uxtb
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x0, x3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp xzr, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x5, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x6, x7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x8, x9, lsl #15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x10, x11, lsl #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x12, x13, lsr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x14, x15, lsr #41
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x16, x17, lsr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x18, x19, asr #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x20, x21, asr #55
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp x22, x23, asr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp wzr, w0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cmp xzr, x0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov sp, x30
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov wsp, w20
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov x11, sp
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov w24, wsp
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc w29, w27, w25
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc wzr, w3, w4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc w9, wzr, w10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc w20, w0, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc x29, x27, x25
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc xzr, x3, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc x9, xzr, x10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adc x20, x0, xzr
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs w29, w27, w25
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs wzr, w3, w4
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs w9, wzr, w10
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs w20, w0, wzr
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs x29, x27, x25
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs xzr, x3, x4
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs x9, xzr, x10
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - adcs x20, x0, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbc w29, w27, w25
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbc wzr, w3, w4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc w9, w10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbc w20, w0, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbc x29, x27, x25
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbc xzr, x3, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc x9, x10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbc x20, x0, xzr
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - sbcs w29, w27, w25
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - sbcs wzr, w3, w4
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs w9, w10
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - sbcs w20, w0, wzr
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - sbcs x29, x27, x25
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - sbcs xzr, x3, x4
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs x9, x10
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - sbcs x20, x0, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc w3, w12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc wzr, w9
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc w23, wzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc x29, x30
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc xzr, x0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ngc x0, xzr
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs w3, w12
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs wzr, w9
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs w23, wzr
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs x29, x30
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs xzr, x0
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ngcs x0, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfx x1, x2, #3, #2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr x3, x4, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr wzr, wzr, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfx w12, w9, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ubfiz x4, x5, #52, #11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ubfx xzr, x4, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ubfiz x4, xzr, #1, #6
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr x5, x6, #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfi x4, x5, #52, #11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil xzr, x4, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfc x4, #1, #6
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil x5, x6, #12, #52
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sxtb w1, w2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sxtb xzr, w3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sxth w9, w10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sxth x0, w1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sxtw x3, w30
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - uxtb w1, w2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - uxth w9, w10
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ubfx x3, x30, #0, #32
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w3, w2, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w9, w10, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr x20, x21, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w1, wzr, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr w3, w2, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr w9, w10, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr x20, x21, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr wzr, wzr, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl w9, w10, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl x20, x21, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl w1, wzr, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfiz x2, x3, #63, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfiz x9, x10, #5, #59
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfiz w11, w12, #31, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfiz w13, w14, #29, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfiz xzr, xzr, #10, #11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfx w9, w10, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr x2, x3, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr x19, x20, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr x9, x10, #5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w9, w10, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w11, w12, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w13, w14, #29
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - sbfx xzr, xzr, #10, #11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfi x2, x3, #63, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfi x9, x10, #5, #59
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfi w11, w12, #31, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfi w13, w14, #29, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfc xzr, #10, #11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil w9, w10, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil x2, x3, #63, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil x19, x20, #0, #64
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil x9, x10, #5, #59
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil w9, w10, #0, #32
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil w11, w12, #31, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil w13, w14, #29, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bfxil xzr, xzr, #10, #11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl x2, x3, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl x9, x10, #5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl w11, w12, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl w13, w14, #29
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ubfiz xzr, xzr, #10, #11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ubfx w9, w10, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr x2, x3, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr x19, x20, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr x9, x10, #5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr w9, w10, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr w11, w12, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr w13, w14, #29
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ubfx xzr, xzr, #10, #11
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - cbz w5, #4
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - cbz x5, #0
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - cbnz x2, #-4
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - cbnz x26, #1048572
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - cbz wzr, #0
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - cbnz xzr, #0
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - cbnz w21, test
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - b.ne #4
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - b.ge #1048572
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - b.ge #-4
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp w1, #31, #0, eq
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp w3, #0, #15, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp wzr, #15, #13, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp x9, #31, #0, le
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp x3, #0, #15, gt
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp xzr, #5, #7, ne
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn w1, #31, #0, eq
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn w3, #0, #15, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn wzr, #15, #13, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn x9, #31, #0, le
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn x3, #0, #15, gt
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn xzr, #5, #7, ne
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp w1, wzr, #0, eq
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp w3, w0, #15, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp wzr, w15, #13, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp x9, xzr, #0, le
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp x3, x0, #15, gt
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmp xzr, x5, #7, ne
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn w1, wzr, #0, eq
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn w3, w0, #15, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn wzr, w15, #13, hs
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn x9, xzr, #0, le
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn x3, x0, #15, gt
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - ccmn xzr, x5, #7, ne
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel w1, w0, w19, ne
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel wzr, w5, w9, eq
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel w9, wzr, w30, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel w1, w28, wzr, mi
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel x19, x23, x29, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel xzr, x3, x4, ge
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel x5, xzr, x6, hs
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csel x7, x8, xzr, lo
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc w1, w0, w19, ne
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc wzr, w5, w9, eq
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc w9, wzr, w30, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc w1, w28, wzr, mi
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc x19, x23, x29, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc xzr, x3, x4, ge
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc x5, xzr, x6, hs
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc x7, x8, xzr, lo
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv w1, w0, w19, ne
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv wzr, w5, w9, eq
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv w9, wzr, w30, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv w1, w28, wzr, mi
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv x19, x23, x29, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv xzr, x3, x4, ge
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv x5, xzr, x6, hs
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv x7, x8, xzr, lo
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg w1, w0, w19, ne
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg wzr, w5, w9, eq
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg w9, wzr, w30, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg w1, w28, wzr, mi
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg x19, x23, x29, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg xzr, x3, x4, ge
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg x5, xzr, x6, hs
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg x7, x8, xzr, lo
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cset w3, eq
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cset x9, pl
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csetm w20, ne
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csetm x30, ge
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc w2, wzr, wzr, al
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv x3, xzr, xzr, nv
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinc w3, w5, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinc wzr, w4, le
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cset w9, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinc x3, x5, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinc xzr, x4, le
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cset x9, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc w5, w6, w6, nv
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinc x1, x2, x2, al
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinv w3, w5, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinv wzr, w4, le
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csetm w9, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinv x3, x5, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cinv xzr, x4, le
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csetm x9, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv x1, x0, x0, al
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csinv w9, w8, w8, nv
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cneg w3, w5, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cneg wzr, w4, le
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cneg w9, wzr, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cneg x3, x5, gt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cneg xzr, x4, le
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cneg x9, xzr, lt
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - csneg x4, x8, x8, al
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rbit w0, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rbit x18, x3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rev16 w17, w1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rev16 x5, x2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rev w18, w0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rev32 x20, x1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rev x22, x2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - clz w24, w3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - clz x26, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cls w3, w5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - cls x20, x5
-# CHECK-NEXT: - - - 12.00 - - - - - - - - - udiv w0, w7, w10
-# CHECK-NEXT: - - - 20.00 - - - - - - - - - udiv x9, x22, x4
-# CHECK-NEXT: - - - 12.00 - - - - - - - - - sdiv w12, w21, w0
-# CHECK-NEXT: - - - 20.00 - - - - - - - - - sdiv x13, x2, x1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl w11, w12, w13
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl x14, x15, x16
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr w17, w18, w19
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr x20, x21, x22
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w23, w24, w25
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr x26, x27, x28
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ror w0, w1, w2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ror x3, x4, x5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl w6, w7, w8
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsl x9, x10, x11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr w12, w13, w14
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - lsr x15, x16, x17
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr w18, w19, w20
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - asr x21, x22, x23
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ror w24, w25, w26
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ror x27, x28, x29
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32cb w30, w23, w15
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32cb wzr, w12, w14
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32cb w28, w10, w11
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32b w27, w12, w15
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32h w3, w15, w21
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32w w9, w18, w24
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32x w19, w6, x25
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32ch w25, w26, w16
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32cw w27, w12, w23
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - crc32cx w21, w28, x5
-# CHECK-NEXT: - - - - - - 4.00 - - - - - - smulh x30, x29, x28
-# CHECK-NEXT: - - - - - - 4.00 - - - - - - smulh xzr, x27, x26
-# CHECK-NEXT: - - - - - - 4.00 - - - - - - umulh x30, x29, x28
-# CHECK-NEXT: - - - - - - 4.00 - - - - - - umulh x23, x30, xzr
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - madd w1, w3, w7, w4
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - madd wzr, w0, w9, w11
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - madd w13, wzr, w4, w4
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - madd w19, w30, wzr, w29
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - mul w4, w5, w6
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - madd x1, x3, x7, x4
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - madd xzr, x0, x9, x11
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - madd x13, xzr, x4, x4
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - madd x19, x30, xzr, x29
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - mul x4, x5, x6
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - msub w1, w3, w7, w4
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - msub wzr, w0, w9, w11
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - msub w13, wzr, w4, w4
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - msub w19, w30, wzr, w29
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - mneg w4, w5, w6
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - msub x1, x3, x7, x4
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - msub xzr, x0, x9, x11
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - msub x13, xzr, x4, x4
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - msub x19, x30, xzr, x29
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - mneg x4, x5, x6
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smaddl x3, w5, w2, x9
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smaddl xzr, w10, w11, x12
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smaddl x13, wzr, w14, x15
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smaddl x16, w17, wzr, x18
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smull x19, w20, w21
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smsubl x3, w5, w2, x9
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smsubl xzr, w10, w11, x12
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smsubl x13, wzr, w14, x15
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smsubl x16, w17, wzr, x18
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smnegl x19, w20, w21
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umaddl x3, w5, w2, x9
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umaddl xzr, w10, w11, x12
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umaddl x13, wzr, w14, x15
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umaddl x16, w17, wzr, x18
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umull x19, w20, w21
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umsubl x3, w5, w2, x9
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umsubl x16, w17, wzr, x18
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umnegl x19, w20, w21
-# CHECK-NEXT: - - - - - - 4.00 - - - - - - smulh x23, x22, xzr
-# CHECK-NEXT: - - - - - - 4.00 - - - - - - umulh x23, x22, xzr
-# CHECK-NEXT: - - - - - - 2.00 - - - - - - mul x19, x20, xzr
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - mneg w21, w22, w23
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smull x11, w13, w17
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umull x11, w13, w17
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - smnegl x11, w13, w17
-# CHECK-NEXT: - - - - - - 1.00 - - - - - - umnegl x11, w13, w17
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - extr w3, w5, w7, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - extr w11, w13, w17, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - extr x3, x5, x7, #15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - extr x11, x13, x17, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ror x19, x23, #24
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ror x29, xzr, #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ror w9, w13, #31
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmp h5, h21
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmp h5, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmpe h22, h21
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmpe h13, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmp s3, s5
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmp s31, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmpe s29, s30
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmpe s15, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmp d4, d12
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmp d23, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmpe d26, d22
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmpe d29, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmp s1, s31, #0, eq
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmp s3, s0, #15, hs
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmp s31, s15, #13, hs
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmp d9, d31, #0, le
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmp d3, d0, #15, gt
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmp d31, d5, #7, ne
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmp h31, h3, #11, hs
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmpe h6, h1, #12, ne
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmpe s1, s31, #0, eq
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmpe s3, s0, #15, hs
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmpe s31, s15, #13, hs
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmpe d9, d31, #0, le
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmpe d3, d0, #15, gt
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fccmpe d31, d5, #7, ne
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcsel s3, s20, s9, pl
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcsel d9, d10, d11, mi
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcsel h26, h2, h11, hs
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov h18, h28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov s0, s1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs s2, s3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg h2, h9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg s4, s5
-# CHECK-NEXT: - - - - - - - - - - - - 9.00 fsqrt s6, s7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt d8, s9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt h10, s11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn h12, h3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp h17, h31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp s14, s15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm h0, h21
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm s16, s17
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz h10, h29
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz s18, s19
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta h22, h10
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta s20, s21
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx h4, h5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx s22, s23
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti s24, s25
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti h31, h14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov d0, d1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs d2, d3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg d4, d5
-# CHECK-NEXT: - - - - - - - - - - - - 5.00 fsqrt h13, h24
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 fsqrt d6, d7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt s8, d9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt h10, d11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn d12, d13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp d14, d15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm d16, d17
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz d18, d19
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta d20, d21
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx d22, d23
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti d24, d25
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt s26, h27
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt d28, h29
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul s20, s19, s17
-# CHECK-NEXT: - - - - - - - - - - - - 5.00 fdiv h1, h26, h23
-# CHECK-NEXT: - - - - - - - - - - - - 10.00 fdiv s1, s2, s3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd h23, h27, h22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd s4, s5, s6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub h20, h11, h18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub s7, s8, s9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax s10, s11, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax h8, h7, h11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin s13, s14, s15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm h29, h13, h14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm s16, s17, s18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm s19, s20, s21
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmul h3, h15, h7
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmul s22, s23, s2
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul d20, d19, d17
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 fdiv d1, d2, d3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd d4, d5, d6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub d7, d8, d9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax d10, d11, d12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin d13, d14, d15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin h4, h13, h17
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm d16, d17, d18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm d19, d20, d21
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm h29, h23, h17
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmul d22, d23, d24
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmadd h27, h0, h6, h28
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmadd s3, s5, s6, s31
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmadd d3, d13, d0, d23
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmsub h25, h28, h12, h24
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmsub s3, s5, s6, s31
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmsub d3, d13, d0, d23
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmadd h3, h18, h31, h24
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmadd s3, s5, s6, s31
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmadd d3, d13, d0, d23
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmsub s3, s5, s6, s31
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmsub d3, d13, d0, d23
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmsub h3, h29, h24, h17
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w3, h5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs wzr, h20, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w19, h0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x3, h5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x12, h30, #45
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x19, h0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w3, s5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs wzr, s20, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w19, s0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x3, s5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x12, s30, #45
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x19, s0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w3, d5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs wzr, d20, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w19, d0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x3, d5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x12, d30, #45
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x19, d0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w3, h5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu wzr, h20, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w19, h0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x3, h5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x12, h30, #45
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x19, h0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w3, s5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu wzr, s20, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w19, s0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x3, s5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x12, s30, #45
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x19, s0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w3, d5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu wzr, d20, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w19, d0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x3, d5, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x12, d30, #45
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x19, d0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h23, w19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h31, wzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h14, w0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h23, x19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h31, xzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h14, x0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s23, w19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s31, wzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s14, w0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s23, x19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s31, xzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s14, x0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d23, w19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d31, wzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d14, w0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d23, x19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d31, xzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d14, x0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h23, w19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h31, wzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h14, w0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h23, x19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h31, xzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h14, x0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s23, w19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s31, wzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s14, w0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s23, x19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s31, xzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s14, x0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d23, w19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d31, wzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d14, w0, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d23, x19, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d31, xzr, #20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d14, x0, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns w3, h31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns xzr, h12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu wzr, h12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu x0, h0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps wzr, h9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps x12, h20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu w30, h23
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu x29, h3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms w2, h3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms x4, h5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu w6, h7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu x8, h9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w10, h11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x12, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w14, h15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x15, h16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h17, w18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h19, x20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h21, w22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h23, x24
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas w25, h26
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas x27, h28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau w29, h30
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau xzr, h0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns w3, s31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns xzr, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu wzr, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu x0, s0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps wzr, s9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps x12, s20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu w30, s23
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu x29, s3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms w2, s3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms x4, s5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu w6, s7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu x8, s9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w10, s11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w14, s15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x15, s16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s17, w18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s19, x20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s21, w22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s23, x24
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas w25, s26
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas x27, s28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau w29, s30
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau xzr, s0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns w3, d31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns xzr, d12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu wzr, d12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu x0, d0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps wzr, d9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps x12, d20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu w30, d23
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu x29, d3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms w2, d3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms x4, d5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu w6, d7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu x8, d9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs w10, d11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs x12, d13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu w14, d15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu x15, d16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d17, w18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d19, x20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d21, w22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d23, x24
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas w25, d26
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas x27, d28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau w29, d30
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau xzr, d0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov h6, w5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov h16, x27
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov w15, h31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov w3, s9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov s9, w3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov x21, h14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov x20, d31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov d1, x15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov x3, v12.d[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov v1.d[1], x19
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov h29, #0.50000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov s2, #0.12500000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov s3, #1.00000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov d30, #16.00000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov s4, #1.06250000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov d10, #1.93750000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov s12, #-1.00000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov d16, #8.50000000
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w3, #0
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x29, #4
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw xzr, #-4
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr s0, #8
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr d0, #1048572
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q0, #-1048576
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - prfm pldl1strm, #0
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - prfm #25, #0
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stxrb w18, w8, [sp]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stxrh w24, w15, [x16]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stxr w5, w6, [x17]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stxr w1, x10, [x21]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldxrb w30, [x0]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldxrh w17, [x4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldxr w22, [sp]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldxr x11, [x29]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stxp w12, w11, w10, [sp]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stxp wzr, x27, x9, [x12]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldxp w0, wzr, [sp]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldxp x17, x0, [x18]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stlxrb w12, w22, [x0]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stlxrh w10, w1, [x1]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stlxr w9, w2, [x2]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stlxr w9, x3, [sp]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldaxrb w8, [x4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldaxrh w7, [x5]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldaxr w6, [sp]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldaxr x5, [x6]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stlxp w4, w5, w6, [sp]
-# CHECK-NEXT: - - - - 0.50 1.50 - - - - - - - stlxp wzr, x6, x7, [x1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldaxp w5, w18, [sp]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldaxp x6, x19, [x22]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlrb w24, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlrh w25, [x30]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlr w26, [x29]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlr x27, [x28]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldarb w16, [x21]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldarb w23, [sp]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldarh w22, [x30]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldar wzr, [x29]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldar x21, [x28]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - sturb w9, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - sturh wzr, [x12, #255]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stur w16, [x0, #-256]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stur x28, [x14, #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldurb w1, [x20, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldurh w20, [x1, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldur w12, [sp, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldur xzr, [x12, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldursb x9, [x7, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldursh x17, [x19, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldursw x20, [x15, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - prfum pldl2keep, [sp, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldursb w19, [x1, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldursh w15, [x21, #-256]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stur b0, [sp, #1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stur h12, [x12, #-1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stur s15, [x0, #255]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stur d31, [x5, #25]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stur q9, [x5]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldur b3, [sp]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldur h5, [x4, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldur s7, [x12, #-1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldur d11, [x19, #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldur q13, [x1, #2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w9, [x2], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w10, [x3], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w10, [x3], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w9, [x2], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w9, [x2], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w10, [x3], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w19, [sp], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w20, [x30], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w21, [x12], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str xzr, [x9], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x2, [x3], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x19, [x12], #-256
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w9, [x2], #255
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w10, [x3], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w10, [x3], #-256
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w9, [x2], #255
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w9, [x2], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w10, [x3], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr w19, [sp], #255
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr w20, [x30], #1
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr w21, [x12], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr xzr, [x9], #255
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr x2, [x3], #1
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr x19, [x12], #-256
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb xzr, [x9], #255
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb x2, [x3], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb x19, [x12], #-256
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh xzr, [x9], #255
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh x2, [x3], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh x19, [x12], #-256
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw xzr, [x9], #255
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x2, [x3], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x19, [x12], #-256
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb wzr, [x9], #255
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb w2, [x3], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb w19, [x12], #-256
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh wzr, [x9], #255
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w2, [x3], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w19, [x12], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b0, [x0], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b3, [x3], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b5, [sp], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h10, [x10], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h13, [x23], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h15, [sp], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s20, [x20], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s23, [x23], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s25, [x0], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d20, [x20], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d23, [x23], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d25, [x0], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr b0, [x0], #255
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr b3, [x3], #1
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr b5, [sp], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr h10, [x10], #255
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr h13, [x23], #1
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr h15, [sp], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr s20, [x20], #255
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr s23, [x23], #1
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr s25, [x0], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr d20, [x20], #255
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr d23, [x23], #1
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr d25, [x0], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr q20, [x1], #255
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr q23, [x9], #1
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr q25, [x20], #-256
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q10, [x1], #255
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q22, [sp], #1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q21, [x20], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr x3, [x4, #0]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w9, [x2, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w10, [x3, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w10, [x3, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w9, [x2, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w9, [x2, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w10, [x3, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w19, [sp, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w20, [x30, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w21, [x12, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str xzr, [x9, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x2, [x3, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x19, [x12, #-256]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w9, [x2, #255]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w10, [x3, #1]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w10, [x3, #-256]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w9, [x2, #255]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w9, [x2, #1]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w10, [x3, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr w19, [sp, #255]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr w20, [x30, #1]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr w21, [x12, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr xzr, [x9, #255]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr x2, [x3, #1]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr x19, [x12, #-256]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb xzr, [x9, #255]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb x2, [x3, #1]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb x19, [x12, #-256]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh xzr, [x9, #255]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh x2, [x3, #1]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh x19, [x12, #-256]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw xzr, [x9, #255]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x2, [x3, #1]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x19, [x12, #-256]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb wzr, [x9, #255]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb w2, [x3, #1]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb w19, [x12, #-256]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh wzr, [x9, #255]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w2, [x3, #1]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w19, [x12, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b0, [x0, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b3, [x3, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b5, [sp, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h10, [x10, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h13, [x23, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h15, [sp, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s20, [x20, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s23, [x23, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s25, [x0, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d20, [x20, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d23, [x23, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d25, [x0, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr b0, [x0, #255]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr b3, [x3, #1]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr b5, [sp, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr h10, [x10, #255]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr h13, [x23, #1]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr h15, [sp, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr s20, [x20, #255]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr s23, [x23, #1]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr s25, [x0, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr d20, [x20, #255]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr d23, [x23, #1]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr d25, [x0, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr q20, [x1, #255]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr q23, [x9, #1]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr q25, [x20, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q10, [x1, #255]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q22, [sp, #1]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q21, [x20, #-256]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - sttrb w9, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - sttrh wzr, [x12, #255]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - sttr w16, [x0, #-256]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - sttr x28, [x14, #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtrb w1, [x20, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtrh w20, [x1, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtr w12, [sp, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtr xzr, [x12, #255]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtrsb x9, [x7, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtrsh x17, [x19, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtrsw x20, [x15, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtrsb w19, [x1, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldtrsh w15, [x21, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x4, [x29]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x30, [x12, #32760]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x20, [sp, #8]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr xzr, [sp]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w2, [sp]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w17, [sp, #16380]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w13, [x2, #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x2, [x5, #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x23, [sp, #16380]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x21, [x25, x7]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w2, [x4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w23, [x6, #8190]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh wzr, [sp, #2]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh x29, [x2, #2]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh x25, [x8, w13, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w26, [x3, #121]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w12, [x2]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb w27, [sp, #4095]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb xzr, [x15]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb x12, [x28, x27]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x30, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w20, [x4, #16380]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b5, [x11]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h23, [x15]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s25, [x19]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d15, [x2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w17, [sp, #8190]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w23, [x3, #4095]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb wzr, [x2]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr b31, [sp, #4095]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h20, [x2, #8190]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr s10, [x19, #16380]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr d3, [x10, #32760]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q12, [sp, #65520]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q14, [x6, #4624]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w3, [sp, x5]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w9, [x27, x6]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb w10, [x30, x7]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w11, [x29, x3, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w12, [x28, xzr, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strb w5, [x26, w7, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w14, [x26, w6, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb w15, [x25, w7, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrb w17, [x23, w9, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsb x18, [x22, w10, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w3, [sp, x5]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w9, [x27, x6]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w10, [x30, x7, lsl #1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w11, [x29, x3, sxtx]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w12, [x28, xzr, sxtx]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh x13, [x27, x5, sxtx #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w14, [x26, w6, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w15, [x25, w7, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsh w16, [x24, w8, uxtw #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w17, [x23, w9, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrh w18, [x22, w10, sxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - strh w19, [x21, wzr, sxtw #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr b25, [x21, w8, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr b8, [x30, x10]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b14, [x13, x25]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str b30, [x16, w26, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h3, [sp, x5]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h9, [x27, x6]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h10, [x30, x7, lsl #1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h11, [x29, x3, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h12, [x28, xzr, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h13, [x27, x5, sxtx #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h14, [x26, w6, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h15, [x25, w7, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h16, [x24, w8, uxtw #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h17, [x23, w9, sxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str h18, [x22, w10, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr h19, [x21, wzr, sxtw #1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr s12, [x30, w5, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr d24, [x26, w7, uxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s20, [x24, w10, uxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d5, [x26, x6]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w3, [sp, x5]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr s9, [x27, x6]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w10, [x30, x7, lsl #2]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w11, [x29, x3, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str s12, [x28, xzr, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w13, [x27, x5, sxtx #2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str w14, [x26, w6, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w15, [x25, w7, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w16, [x24, w8, uxtw #2]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x17, [x23, w9, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr w18, [x22, w10, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldrsw x19, [x21, wzr, sxtw #2]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x3, [sp, x5]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x9, [x27, x6]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr d10, [x30, x7, lsl #3]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x11, [x29, x3, sxtx]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x12, [x28, xzr, sxtx]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x13, [x27, x5, sxtx #3]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - prfm pldl1keep, [x26, w6, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x15, [x25, w7, uxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str x27, [x26, w24, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x16, [x24, w8, uxtw #3]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x17, [x23, w9, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr x18, [x22, w10, sxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str d19, [x21, wzr, sxtw #3]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q3, [sp, x5]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q9, [x27, x6]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q10, [x30, x7, lsl #4]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q11, [x29, x3, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q12, [x28, xzr, sxtx]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q13, [x27, x5, sxtx #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q14, [x26, w6, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q15, [x25, w7, uxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q16, [x24, w8, uxtw #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q17, [x23, w9, sxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str q18, [x22, w10, sxtw]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldr q19, [x21, wzr, sxtw #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldp w3, w5, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp wzr, w9, [sp, #252]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldp w2, wzr, [sp, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldp w9, w10, [sp, #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldpsw x9, x10, [sp, #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldpsw x9, x10, [x2, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldpsw x20, x30, [sp, #252]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldp x21, x29, [x2, #504]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldp x22, x23, [x3, #-512]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldp x24, x25, [x4, #8]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp s29, s28, [sp, #252]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp s27, s26, [sp, #-256]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp s1, s2, [x3, #44]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp d3, d5, [x9, #504]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp d7, d11, [x10, #-512]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnp x20, x16, [x8]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp x3, x6, [x16]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp d2, d3, [x30, #-8]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stp q3, q5, [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stp q17, q19, [sp, #1008]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp q23, q29, [x1, #-1024]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp w3, w5, [sp], #0
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp wzr, w9, [sp], #252
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp w2, wzr, [sp], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp w9, w10, [sp], #4
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldpsw x9, x10, [sp], #4
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldpsw x9, x10, [x2], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldpsw x20, x30, [sp], #252
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp x21, x29, [x2], #504
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp x22, x23, [x3], #-512
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp x24, x25, [x4], #8
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp s29, s28, [sp], #252
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp s27, s26, [sp], #-256
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp s1, s2, [x3], #44
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp d3, d5, [x9], #504
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp d7, d11, [x10], #-512
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp d2, d3, [x30], #-8
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stp q3, q5, [sp], #0
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stp q17, q19, [sp], #1008
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp q23, q29, [x1], #-1024
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp w3, w5, [sp, #0]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp wzr, w9, [sp, #252]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp w2, wzr, [sp, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp w9, w10, [sp, #4]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldpsw x9, x10, [sp, #4]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldpsw x9, x10, [x2, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldpsw x20, x30, [sp, #252]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp x21, x29, [x2, #504]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp x22, x23, [x3, #-512]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp x24, x25, [x4, #8]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp s29, s28, [sp, #252]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp s27, s26, [sp, #-256]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp s1, s2, [x3, #44]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp d3, d5, [x9, #504]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stp d7, d11, [x10, #-512]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp d2, d3, [x30, #-8]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stp q3, q5, [sp, #0]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stp q17, q19, [sp, #1008]!
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldp q23, q29, [x1, #-1024]!
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldnp w3, w5, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnp wzr, w9, [sp, #252]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldnp w2, wzr, [sp, #-256]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldnp w9, w10, [sp, #4]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldnp x21, x29, [x2, #504]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldnp x22, x23, [x3, #-512]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldnp x24, x25, [x4, #8]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnp s29, s28, [sp, #252]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnp s27, s26, [sp, #-256]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnp s1, s2, [x3, #44]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnp d3, d5, [x9, #504]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnp d7, d11, [x10, #-512]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnp d2, d3, [x30, #-8]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stnp q3, q5, [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stnp q17, q19, [sp, #1008]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnp q23, q29, [x1, #-1024]
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and wsp, w16, #0xe00
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and x2, x22, #0x1e00
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ands w14, w8, #0x70
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ands x4, x10, #0x60
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - eor wsp, w4, #0xe00
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - eor x27, x25, #0x1e00
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov w3, #983055
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov x10, #-6148914691236517206
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w12, w23, w21
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w16, w15, w1, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w9, w4, w10, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w3, w30, w11
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and x3, x5, x7, lsl #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and x5, x14, x19, asr #4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w3, w17, w19, ror #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w0, w2, wzr, lsr #17
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w3, w30, w11, asr #2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and xzr, x4, x26
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and w3, wzr, w20, ror #2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - and x7, x20, xzr, asr #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bic x13, x20, x14, lsl #47
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bic w2, w7, w9
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - eon w29, w4, w19
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - eon x19, x12, x2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - eor w8, w27, w2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - eor x22, x16, x6
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - orr w2, w7, w0, asr #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - orr x8, x9, x10, lsl #12
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - orn x3, x5, x7, asr #2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - orn w2, w5, w29
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ands w7, wzr, w9, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - ands x3, x5, x20, ror #63
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bics w3, w5, w7
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - bics x3, xzr, x3, lsl #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - tst w3, w7, lsl #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - tst x2, x20, asr #2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov x3, x6
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov x3, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov wzr, w2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov w3, w5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movz w2, #0, lsl #16
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov w2, #-1235
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov x2, #5299989643264
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - mov x2, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movk w3, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movz x4, #0, lsl #16
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movk w5, #0, lsl #16
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movz x6, #0, lsl #32
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movk x7, #0, lsl #32
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movz x8, #0, lsl #48
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - movk x9, #0, lsl #48
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - msr DAIFSet, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adr x2, #1600
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adrp x21, #6553600
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - adr x0, #262144
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - tbz x12, #62, #0
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - tbz x12, #62, #4
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - tbz x12, #62, #-32768
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - tbz w17, #16, test
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - tbnz x12, #60, #32764
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - tbnz w3, #28, test
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - b #4
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - b #-4
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - b #134217724
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - bl test
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - br x20
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - blr xzr
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - ret x10
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - ret
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - eret
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - drps
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w2, w3, #4095
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w30, w29, #1, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w13, w5, #4095, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x5, x7, #1638
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w20, wsp, #801
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add wsp, wsp, #1104
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add wsp, w30, #4084
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x0, x24, #291
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x3, x24, #4095, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x8, sp, #1074
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add sp, x29, #3816
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - sub w0, wsp, #4077
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - sub w4, w20, #546, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - sub sp, sp, #288
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - sub wsp, w19, #16
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w13, w23, #291, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmn w2, #4095
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w20, wsp, #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmn x3, #1, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmp wsp, #2342
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmp sp, #20, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmp x30, #4095
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subs x4, sp, #3822
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmn w3, #291, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmn wsp, #1365
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmn sp, #1092, lsl #12
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov x10, #-63432
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add wsp, wsp, w10
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x25, x9, w25, uxtb
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w3, w5, w7
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add wzr, w3, w5
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w20, wzr, w4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w4, w6, wzr
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w11, w13, w15
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w9, w3, wzr, lsl #1
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w17, w29, w20, lsl #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w21, w22, w23, lsr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w24, w25, w26, lsr #18
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w27, w28, w29, lsr #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w2, w3, w4, asr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w5, w6, w7, asr #21
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add w8, w9, w10, asr #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x3, x5, x7
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add xzr, x3, x5
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x20, xzr, x4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x4, x6, xzr
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x11, x13, x15
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x9, x3, xzr, lsl #10
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x17, x29, x20, lsl #3
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x21, x22, x23, lsr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x24, x25, x26, lsr #18
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x27, x28, x29, lsr #63
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x2, x3, x4, asr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x5, x6, x7, asr #21
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - add x8, x9, x10, asr #63
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w3, w5, w7
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w17, wsp, w25
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x13, x23, w8, uxtb
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmn w3, w5
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w20, wzr, w4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w4, w6, wzr
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w11, w13, w15
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w9, w3, wzr, lsl #1
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w17, w29, w20, lsl #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w21, w22, w23, lsr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w24, w25, w26, lsr #18
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w27, w28, w29, lsr #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w2, w3, w4, asr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w5, w6, w7, asr #21
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds w8, w9, w10, asr #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x3, x5, x7
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cmn x3, x5
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x20, xzr, x4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x4, x6, xzr
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x11, x13, x15
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x9, x3, xzr, lsl #10
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x17, x29, x20, lsl #3
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x21, x22, x23, lsr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x24, x25, x26, lsr #18
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x27, x28, x29, lsr #63
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x2, x3, x4, asr #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adds x5, x6, x7, asr #21
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+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movz w2, #0, lsl #16
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov w2, #-1235
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov x2, #5299989643264
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov x2, #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movk w3, #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movz x4, #0, lsl #16
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movk w5, #0, lsl #16
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movz x6, #0, lsl #32
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movk x7, #0, lsl #32
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movz x8, #0, lsl #48
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - movk x9, #0, lsl #48
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - msr DAIFSet, #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adr x2, #1600
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adrp x21, #6553600
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - adr x0, #262144
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - tbz x12, #62, #0
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - tbz x12, #62, #4
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - tbz x12, #62, #-32768
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - tbz w17, #16, test
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - tbnz x12, #60, #32764
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - tbnz w3, #28, test
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - b #4
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - b #-4
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - b #134217724
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bl test
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - br x20
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - blr xzr
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ret x10
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ret
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - eret
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - drps
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-bf16-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-bf16-instructions.s
index 97c5b902dc519..e7c84833802c1 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-bf16-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-bf16-instructions.s
@@ -26,31 +26,52 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 4.50 4.50 -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 4.00 4.00 4.50 4.50 -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bfcvt h0, s0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bfcvtn v0.4h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bfcvtn2 v0.8h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot v0.2s, v24.4h, v14.2h[2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot v0.2s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalb v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalb v0.4s, v0.8h, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalt v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalt v0.4s, v0.8h, v0.h[3]
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 1.00 1.00 - bfmmla v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bfcvt h0, s0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bfcvtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bfcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot v0.2s, v24.4h, v14.2h[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot v0.2s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - bfmlalb v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - bfmlalb v0.4s, v0.8h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - bfmlalt v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - bfmlalt v0.4s, v0.8h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 - bfmmla v0.4s, v0.8h, v0.8h
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-complxnum-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-complxnum-instructions.s
index d05ec5c240c74..8be1f732fd33a 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-complxnum-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-complxnum-instructions.s
@@ -19,24 +19,45 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 1.00 1.00 -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 1.00 1.00 -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd v0.2s, v0.2s, v0.2s, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd v0.4s, v0.4s, v0.4s, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla v0.2s, v0.2s, v0.2s, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla v0.4s, v0.4s, v0.s[1], #0
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fcadd v0.2s, v0.2s, v0.2s, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fcadd v0.4s, v0.4s, v0.4s, #270
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fcmla v0.2s, v0.2s, v0.2s, #90
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fcmla v0.4s, v0.4s, v0.s[1], #0
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-crypto-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-crypto-instructions.s
index 0749c4f016a58..f2d77608abb73 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-crypto-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-crypto-instructions.s
@@ -46,51 +46,72 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - - - - - 9.50 9.50 - - 91.00
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 9.50 9.50 - - 91.00
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesd z0.b, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aese z0.b, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesimc z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesmc z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sha1h s0, s1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha1su1 v0.4s, v1.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha256su0 v0.4s, v1.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha1c q0, s1, v2.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha1p q0, s1, v2.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha1m q0, s1, v2.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha1su0 v0.4s, v1.4s, v2.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha256h q0, q1, v2.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha256h2 q0, q1, v2.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sha256su1 v0.4s, v1.4s, v2.4s
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sha512h q0, q1, v2.2d
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sha512h2 q0, q1, v2.2d
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sha512su0 v11.2d, v12.2d
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sha512su1 v11.2d, v13.2d, v14.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor3 v25.16b, v12.16b, v7.16b, v2.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rax1 v30.2d, v29.2d, v26.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar v26.2d, v21.2d, v27.2d, #63
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bcax v31.16b, v26.16b, v2.16b, v1.16b
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm3ss1 v20.4s, v23.4s, v21.4s, v22.4s
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm3tt1a v20.4s, v23.4s, v21.s[3]
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm3tt1b v20.4s, v23.4s, v21.s[3]
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm3tt2a v20.4s, v23.4s, v21.s[3]
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm3tt2b v20.4s, v23.4s, v21.s[3]
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm3partw1 v30.4s, v29.4s, v26.4s
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm3partw2 v30.4s, v29.4s, v26.4s
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm4ekey v11.4s, v11.4s, v19.4s
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm4e v2.4s, v15.4s
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aesd z0.b, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aese z0.b, z0.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aesimc z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aesmc z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - sha1h s0, s1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha1su1 v0.4s, v1.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha256su0 v0.4s, v1.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha1c q0, s1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha1p q0, s1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha1m q0, s1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha1su0 v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha256h q0, q1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha256h2 q0, q1, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sha256su1 v0.4s, v1.4s, v2.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sha512h q0, q1, v2.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sha512h2 q0, q1, v2.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sha512su0 v11.2d, v12.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sha512su1 v11.2d, v13.2d, v14.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - eor3 v25.16b, v12.16b, v7.16b, v2.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - rax1 v30.2d, v29.2d, v26.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xar v26.2d, v21.2d, v27.2d, #63
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bcax v31.16b, v26.16b, v2.16b, v1.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm3ss1 v20.4s, v23.4s, v21.4s, v22.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm3tt1a v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm3tt1b v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm3tt2a v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm3tt2b v20.4s, v23.4s, v21.s[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm3partw1 v30.4s, v29.4s, v26.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm3partw2 v30.4s, v29.4s, v26.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm4ekey v11.4s, v11.4s, v19.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 sm4e v2.4s, v15.4s
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-flag-manipulation-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-flag-manipulation-instructions.s
index 050338a9277b9..d0405d7280811 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-flag-manipulation-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-flag-manipulation-instructions.s
@@ -28,26 +28,47 @@ xaflag
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: 11.00 11.00 - - - - - - - - - - -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: 11.00 11.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - setf8 w1
-# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - setf16 w1
-# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - rmif x0, #0, #0
-# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - cfinv
-# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - axflag
-# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - xaflag
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - setf8 w1
+# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - setf16 w1
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - rmif x0, #0, #0
+# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - cfinv
+# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - axflag
+# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - xaflag
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fp16fml-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fp16fml-instructions.s
index 6e7b51c5f0607..3e38dc037134e 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fp16fml-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fp16fml-instructions.s
@@ -32,36 +32,57 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - - - - - - - 8.00 8.00 -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 8.00 8.00 -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal v0.2s, v0.2h, v0.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal v0.4s, v0.4h, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal v0.2s, v0.2h, v0.2h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal2 v0.2s, v0.2h, v0.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal2 v0.4s, v0.4h, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal2 v0.2s, v0.2h, v0.2h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlal2 v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl v0.2s, v0.2h, v0.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl v0.4s, v0.4h, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl v0.2s, v0.2h, v0.2h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.2s, v0.2h, v0.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.4s, v0.4h, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.2s, v0.2h, v0.2h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal2 v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal2 v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal2 v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlal2 v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.2s, v0.2h, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.4s, v0.4h, v0.h[3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.2s, v0.2h, v0.2h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlsl2 v0.4s, v0.4h, v0.4h
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fptoint-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fptoint-instructions.s
index 79601ef0fca1d..1d1eb8d688cd9 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fptoint-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-fptoint-instructions.s
@@ -28,32 +28,53 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - - - - - 6.00 6.00 - - -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 6.00 6.00 - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint32x v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint32x v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint32x v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint32z v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint32z v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint32z v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint64x v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint64x v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint64x v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint64z v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint64z v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frint64z v0.4s, v0.4s
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint32x v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint32x v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint32x v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint32z v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint32z v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint32z v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint64x v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint64x v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint64x v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint64z v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint64z v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frint64z v0.4s, v0.4s
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-i8mm-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-i8mm-instructions.s
index b4102a2297e22..508e221df2dac 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-i8mm-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-i8mm-instructions.s
@@ -25,29 +25,50 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - - - - - 1.50 1.50 3.00 3.00 -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.50 1.50 3.00 3.00 -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smmla v0.4s, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sudot v0.2s, v0.8b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sudot v0.4s, v0.16b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ummla v0.4s, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - usdot v0.2s, v0.8b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - usdot v0.2s, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - usdot v0.4s, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - usdot v0.4s, v0.16b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usmmla v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smmla v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - sudot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - sudot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ummla v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - usdot v0.2s, v0.8b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - usdot v0.2s, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - usdot v0.4s, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - usdot v0.4s, v0.16b, v0.4b[2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usmmla v0.4s, v0.16b, v0.16b
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-js-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-js-instructions.s
index f6d1b255bd6c3..ff6763a975e7d 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-js-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-js-instructions.s
@@ -16,21 +16,42 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fjcvtzs w25, d26
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - fjcvtzs w25, d26
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mops-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mops-instructions.s
index f688ca4d57a29..beb957b719dd3 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mops-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mops-instructions.s
@@ -166,158 +166,179 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: 100.50 100.50 - - - 201.00 - - - - - - -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: 100.50 100.50 - - - - - - - - - - - - - - - - - - - - - - - - 201.00 - - - - - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfp [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfpwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfprn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfpn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfpwt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfpwtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfpwtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfpwtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfprt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfprtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfprtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfprtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfpt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfptwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfptrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfptn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfm [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmwt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmwtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmwtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmwtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmrt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmrtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmrtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmrtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfmtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfe [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfewn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfern [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfen [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfewt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfewtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfewtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfewtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfert [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfertwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfertrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfertn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfet [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfetwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfetrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfetn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyp [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpypwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyprn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpypn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpypwt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpypwtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpypwtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpypwtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyprt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyprtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyprtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyprtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpypt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyptwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyptrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyptn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpym [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymwt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymwtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymwtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymwtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymrt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymrtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymrtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymrtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpymtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpye [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyewn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyern [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyen [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyewt [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyewtwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyewtrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyewtn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyert [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyertwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyertrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyertn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyet [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyetwn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyetrn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyetn [x0]!, [x1]!, x2!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setp [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setpt [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setpn [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setptn [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setm [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setmt [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setmn [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setmtn [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - sete [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setet [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - seten [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setetn [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setgp [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setgpt [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setgpn [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setgptn [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgm [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgmt [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgmn [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgmtn [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setge [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setget [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgen [x0]!, x1!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgetn [x0]!, x1!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - cpyfp [x0]!, [x1]!, xzr!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfm [x0]!, [x1]!, xzr!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpyfe [x0]!, [x1]!, xzr!
-# CHECK-NEXT: 1.50 1.50 - - - 3.00 - - - - - - - cpyp [x0]!, [x1]!, xzr!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpym [x0]!, [x1]!, xzr!
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - cpye [x0]!, [x1]!, xzr!
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setp [x0]!, xzr!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setp [x0]!, x1!, xzr
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setm [x0]!, xzr!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setm [x0]!, x1!, xzr
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - sete [x0]!, xzr!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - sete [x0]!, x1!, xzr
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setgp [x0]!, xzr!, x2
-# CHECK-NEXT: 1.00 1.00 - - - 2.00 - - - - - - - setgp [x0]!, x1!, xzr
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgm [x0]!, xzr!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setgm [x0]!, x1!, xzr
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setge [x0]!, xzr!, x2
-# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - setge [x0]!, x1!, xzr
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfp [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfpwn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfprn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfpn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfpwt [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfpwtwn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfpwtrn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfpwtn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfprt [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfprtwn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfprtrn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfprtn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfpt [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfptwn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfptrn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - cpyfptn [x0]!, [x1]!, x2!
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - cpyfm [x0]!, [x1]!, x2!
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diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mte-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mte-instructions.s
index 31b3ca323215b..979577b0ef00e 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mte-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mte-instructions.s
@@ -120,125 +120,146 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: 25.00 25.00 - - 13.50 113.50 - - - - - - -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: 25.00 25.00 - - - - - - - - - - - - - - - - - - - - - - - 13.50 113.50 - - - - - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - irg x0, x1
-# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - irg sp, x1
-# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - irg x0, sp
-# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - irg x0, x1, x2
-# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - irg sp, x1, x2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addg x0, x1, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addg sp, x2, #32, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addg x0, sp, #64, #5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addg x3, x4, #1008, #6
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addg x5, x6, #112, #15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subg x0, x1, #0, #1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subg sp, x2, #32, #3
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subg x0, sp, #64, #5
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subg x3, x4, #1008, #6
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subg x5, x6, #112, #15
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - gmi x0, x1, x2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - gmi x3, sp, x4
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - gmi xzr, x0, x30
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - gmi x30, x0, xzr
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subp x0, x1, x2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subps x0, x1, x2
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subp x0, sp, sp
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subps x0, sp, sp
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subps xzr, x0, x1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - subps xzr, sp, sp
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x0, [x1, #-4096]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x1, [x2, #4080]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x2, [sp, #16]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x3, [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg sp, [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x0, [x1, #-4096]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x1, [x2, #4080]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x2, [sp, #16]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x3, [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg sp, [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x0, [x1, #-4096]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x1, [x2, #4080]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x2, [sp, #16]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg sp, [sp, #16]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x0, [x1, #-4096]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x1, [x2, #4080]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x2, [sp, #16]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg sp, [sp, #16]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x0, [x1], #-4096
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x1, [x2], #4080
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg x2, [sp], #16
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stg sp, [sp], #16
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x0, [x1], #-4096
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x1, [x2], #4080
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg x2, [sp], #16
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzg sp, [sp], #16
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x0, [x1, #-4096]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x1, [x2, #4080]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x2, [sp, #16]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x3, [x1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g sp, [x1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x0, [x1, #-4096]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x1, [x2, #4080]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x2, [sp, #16]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x3, [x1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g sp, [x1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x0, [x1, #-4096]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x1, [x2, #4080]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x2, [sp, #16]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g sp, [sp, #16]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x0, [x1, #-4096]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x1, [x2, #4080]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x2, [sp, #16]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g sp, [sp, #16]!
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x0, [x1], #-4096
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x1, [x2], #4080
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g x2, [sp], #16
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2g sp, [sp], #16
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x0, [x1], #-4096
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x1, [x2], #4080
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g x2, [sp], #16
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - stz2g sp, [sp], #16
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #-1024]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #1008]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [sp, #16]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp xzr, x1, [x2, #16]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2, #16]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #-1024]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #1008]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [sp, #16]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp xzr, x1, [x2, #16]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2, #16]!
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [x2], #-1024
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [x2], #1008
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, x1, [sp], #16
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp xzr, x1, [x2], #16
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2], #16
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldg x0, [x1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldg x2, [sp, #-4096]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldg x3, [x4, #4080]
-# CHECK-NEXT: - - - - 4.00 4.00 - - - - - - - ldgm x0, [x1]
-# CHECK-NEXT: - - - - 4.00 4.00 - - - - - - - ldgm x1, [sp]
-# CHECK-NEXT: - - - - 4.00 4.00 - - - - - - - ldgm xzr, [x2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgm x0, [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgm x1, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stgm xzr, [x2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzgm x0, [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzgm x1, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stzgm xzr, [x2]
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - irg x0, x1
+# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - irg sp, x1
+# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - irg x0, sp
+# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - irg x0, x1, x2
+# CHECK-NEXT: 3.00 3.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - irg sp, x1, x2
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addg x0, x1, #0, #1
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addg sp, x2, #32, #3
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addg x0, sp, #64, #5
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addg x3, x4, #1008, #6
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addg x5, x6, #112, #15
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subg x0, x1, #0, #1
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subg sp, x2, #32, #3
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subg x0, sp, #64, #5
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subg x3, x4, #1008, #6
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subg x5, x6, #112, #15
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - gmi x0, x1, x2
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - gmi x3, sp, x4
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - gmi xzr, x0, x30
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - gmi x30, x0, xzr
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subp x0, x1, x2
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subps x0, x1, x2
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subp x0, sp, sp
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subps x0, sp, sp
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subps xzr, x0, x1
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - subps xzr, sp, sp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x0, [x1, #-4096]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x1, [x2, #4080]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x2, [sp, #16]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x3, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg sp, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x0, [x1, #-4096]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x1, [x2, #4080]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x2, [sp, #16]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x3, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg sp, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x0, [x1, #-4096]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x1, [x2, #4080]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x2, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg sp, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x0, [x1, #-4096]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x1, [x2, #4080]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x2, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg sp, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x0, [x1], #-4096
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x1, [x2], #4080
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg x2, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stg sp, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x0, [x1], #-4096
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x1, [x2], #4080
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg x2, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzg sp, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x0, [x1, #-4096]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x1, [x2, #4080]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x2, [sp, #16]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x3, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g sp, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x0, [x1, #-4096]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x1, [x2, #4080]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x2, [sp, #16]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x3, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g sp, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x0, [x1, #-4096]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x1, [x2, #4080]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x2, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g sp, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x0, [x1, #-4096]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x1, [x2, #4080]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x2, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g sp, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x0, [x1], #-4096
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x1, [x2], #4080
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g x2, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2g sp, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x0, [x1], #-4096
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x1, [x2], #4080
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g x2, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - stz2g sp, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #-1024]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #1008]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [sp, #16]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp xzr, x1, [x2, #16]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2, #16]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #-1024]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [x2, #1008]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [sp, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp xzr, x1, [x2, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2, #16]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [x2], #-1024
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [x2], #1008
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, x1, [sp], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp xzr, x1, [x2], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgp x0, xzr, [x2], #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldg x0, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldg x2, [sp, #-4096]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldg x3, [x4, #4080]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 4.00 4.00 - - - - - - - ldgm x0, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 4.00 4.00 - - - - - - - ldgm x1, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 4.00 4.00 - - - - - - - ldgm xzr, [x2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgm x0, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgm x1, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stgm xzr, [x2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzgm x0, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzgm x1, [sp]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stzgm xzr, [x2]
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
index 454fbed5f0aae..ba4f42d6cb9d4 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
@@ -1574,1579 +1574,1600 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - 13.50 545.50 - - 744.00 744.00 117.00 117.00 163.00
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 13.50 545.50 - - 744.00 744.00 117.00 117.00 163.00
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs d29, d24
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add d17, d31, d29
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhn v0.2s, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhn v0.4h, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhn v0.8b, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhn2 v0.16b, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhn2 v0.4s, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhn2 v0.8h, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp v7.2s, v1.2s, v2.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp d1, v14.2d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - addv s0, v0.4s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - addv h0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - addv h0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - addv b0, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - addv b0, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesd v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aese v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesimc v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesmc v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic v0.4h, #15, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic v23.8h, #101
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic v25.16b, v10.16b, v9.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic v24.2s, #70
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bit v5.8b, v12.8b, v22.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bif v0.8b, v25.8b, v4.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bif v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bit v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bsl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bsl v27.16b, v13.16b, v21.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmeq v9.8h, v16.8h, v24.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmeq v14.4h, v18.4h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmeq d20, d21, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmeq d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmeq v0.16b, v0.16b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmeq v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmge v22.8h, v16.8h, v3.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmge v22.16b, v30.16b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmge d20, d21, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmge d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmge v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmge v0.8b, v0.8b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmgt v3.2d, v29.2d, v11.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmgt d20, d21, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmgt d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmgt v0.2s, v0.2s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmgt v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmhi v28.4h, v25.4h, v21.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmhi d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmhi v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmhs d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmhs v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmle v21.2s, v19.2s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmle d20, d21, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmle v0.2d, v0.2d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmlt v26.4h, v12.4h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmlt d20, d21, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmlt v0.8h, v0.8h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmtst d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmtst v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cmtst v13.2d, v13.2d, v13.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnt v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnt v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.16b, w28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.2d, x28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.2s, w28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.4h, w28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.4s, w28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.8b, w28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.8h, w28
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov b0, v0.b[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov d0, v0.d[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov h0, v0.h[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov s0, v0.s[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.16b, v0.b[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.2d, v0.d[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.2s, v0.s[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.4h, v0.h[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.4s, v0.s[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.8b, v0.b[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dup v0.8h, v0.h[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ext v0.16b, v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ext v0.8b, v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd d29, d24, d20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd s29, s24, s20
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd h27, h20, h17
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd v13.8h, v28.8h, v12.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs h25, h7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facge d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facge s10, s11, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facge h24, h26, h29
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facge v25.4h, v16.4h, v11.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facge v19.2s, v24.2s, v5.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facge v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facgt d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facgt s10, s11, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facgt h0, h4, h10
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facgt v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facgt v22.8h, v14.8h, v31.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - facgt v22.4s, v8.4s, v2.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp h10, v19.2h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp d11, v28.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp v16.2d, v11.2d, v5.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq h30, h6, h1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq h19, h23, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq d20, d21, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq s10, s11, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq s10, s11, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq v0.2s, v0.2s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq v12.4s, v11.4s, v26.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmeq v18.2d, v17.2d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge h10, h23, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge h1, h16, h12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge d20, d21, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge s10, s11, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge s10, s11, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge v0.2d, v0.2d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge v17.2d, v11.2d, v13.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge v18.4h, v27.4h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge v20.8h, v19.8h, v22.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmge v17.2s, v11.2s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt h4, h5, h0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt h0, h18, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt d20, d21, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt d20, d21, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt s10, s11, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt s10, s11, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt v0.4s, v0.4s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt v24.8h, v24.8h, v28.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt v0.8h, v11.8h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmgt v19.2d, v31.2d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmle v16.8h, v11.8h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmle v22.4s, v30.4s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmle d20, d21, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmle s10, s11, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmle v0.2d, v0.2d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmle h18, h28, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmlt h23, h7, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmlt d20, d21, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmlt s10, s11, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmlt v0.4s, v0.4s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmlt v8.4h, v2.4h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcmlt v7.2d, v16.2d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas h12, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtas v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau h12, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtau v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtl v0.2d, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtl v0.4s, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtl2 v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtl2 v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms s22, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms h22, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtms v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu h12, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtmu v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtn v0.2s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtn v0.4h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtn2 v0.4s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtn2 v0.8h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns s22, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns h22, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtns v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu h12, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnu v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps s22, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps h22, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtps v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu h12, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtpu v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtxn s22, d13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtxn v0.2s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtxn2 v0.4s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs d21, d12, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs s21, s12, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs h21, h14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs h21, h12, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v20.4h, v24.4h, #11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs v18.8h, v10.8h, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu d21, d12, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu s12, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu s21, s12, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu h12, h13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu h21, h12, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v19.4h, v26.4h, #9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu v27.8h, v6.8h, #11
-# CHECK-NEXT: - - - - - - - - - - - - 38.00 fdiv v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - - - - - 10.00 fdiv v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - - - 5.00 fdiv v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - - - 20.00 fdiv v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - - - 10.00 fdiv v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp h25, v19.2h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp d17, v29.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fmaxnmv h0, v13.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fmaxnmv h12, v11.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fmaxnmv s28, v31.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp h15, v25.2h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp s6, v2.2s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fmaxv h0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fmaxv h0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fmaxv s0, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp h20, v14.2h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp d15, v8.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fminnmv h19, v25.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fminnmv h23, v17.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fminnmv s29, v17.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp h7, v10.2h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp s17, v7.2s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fminv h3, v30.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fminv h29, v12.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fminv s16, v19.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla d0, d1, v0.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla h23, h24, v15.h[4]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla s0, s1, v0.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla v29.8h, v15.8h, v10.h[4]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla v2.2s, v16.2s, v28.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla v14.4s, v14.4s, v5.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla v1.4s, v24.4s, v12.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla v10.2d, v14.2d, v21.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls d0, d4, v0.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls h8, h14, v7.h[4]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls s3, s5, v0.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls v30.8h, v18.8h, v4.h[6]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls v10.2s, v27.2s, v0.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls v27.4s, v7.4s, v24.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls v10.2d, v22.2d, v29.d[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls v6.8h, v15.8h, v23.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov v0.2d, #-1.25000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov v0.2s, #13.00000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov v0.4s, #1.00000000
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul h18, h4, v7.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul v10.4h, v2.4h, v7.h[5]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul v5.2s, v12.2s, v9.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul v15.4s, v30.4s, v2.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul v11.2d, v31.2d, v24.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul h28, h14, h3
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul d0, d1, v0.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul s0, s1, v0.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx d0, d4, v0.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx d23, d11, d1
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx s20, s22, s15
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx h18, h17, v7.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx h20, h25, h0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx s3, s5, v0.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx v28.4h, v25.4h, v15.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx v3.2s, v22.2s, v23.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx v5.4s, v28.4s, v15.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx v22.2d, v18.2d, v25.d[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe h20, h8
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe d13, d13
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe s19, s14
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps h29, h19, h8
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpx h18, h11
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps v12.8h, v25.8h, v4.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps d22, d30, d21
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps s21, s16, s13
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps v7.2d, v29.2d, v18.2d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpx d16, d19
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpx s18, s10
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte h23, h26
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte d21, d12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte s22, s13
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts v20.4s, v26.4s, v27.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts v8.4h, v9.4h, v30.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts h28, h26, h1
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts d8, d22, d18
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts s21, s5, s12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - - - - - 38.00 fsqrt v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - - - - - 9.00 fsqrt v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - - - 5.00 fsqrt v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - - - 18.00 fsqrt v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - - - 10.00 fsqrt v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub v13.8h, v15.8h, v17.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.16b }, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v0.16b, v1.16b }, [x14]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v19.16b, v20.16b, v21.16b }, [x10]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v13.16b, v14.16b, v15.16b, v16.16b }, [x9]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v24.8h }, [x27]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v1.8h, v2.8h }, [x27]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v0.8h, v1.8h }, [sp], #32
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v21.8h, v22.8h, v23.8h }, [x22]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.8h, v1.8h, v2.8h, v3.8h }, [x21]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v3.4s }, [x4]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v11.4s, v12.4s }, [x30]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [x24]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v15.4s, v16.4s, v17.4s, v18.4s }, [x28]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [x0], #48
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v3.2d }, [x28]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v13.2d, v14.2d }, [x13]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v12.2d, v13.2d, v14.2d }, [x15]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.1d }, [x15], x2
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v27.1d, v28.1d }, [x7]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v14.1d, v15.1d, v16.1d }, [x3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v22.1d, v23.1d, v24.1d, v25.1d }, [x4]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v0.2s, v1.2s }, [x15]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v16.2s, v17.2s, v18.2s }, [x27]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v21.2s, v22.2s, v23.2s, v24.2s }, [x21]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v25.4h, v26.4h }, [x3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v20.4h, v21.4h, v22.4h, v23.4h }, [x15]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.4h, v1.4h, v2.4h }, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v24.8b, v25.8b }, [x6]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v7.8b, v8.8b, v9.8b }, [x12]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x13]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v0.4s, v1.4s }, [sp], #32
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.b }[7], [x0]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.h }[3], [x0], #2
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v18.h }[3], [x1]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.s }[1], [x15]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.d }[0], [x15], #8
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v11.d }[0], [x13]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.8h }, [x15], x2
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld1 { v0.8h, v1.8h }, [x15]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.b }[9], [x0]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1 { v0.b }[9], [x0], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v0.16b }, [x0]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v0.8h }, [x0], #2
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v0.4s }, [x15]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v3.1d }, [x15]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v0.2d }, [x15], x16
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v18.2d }, [x0]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v8.8b }, [x23]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v28.4h }, [x9]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v3.8h }, [x16]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v10.2s }, [x20]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v0.4h, v1.4h }, [x21]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v8.8h, v9.8h }, [x28]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v2.2s, v3.2s }, [x16]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v22.4s, v23.4s }, [x4]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v22.2d, v23.2d }, [x17]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld2 { v29.b, v30.b }[3], [x1]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld2 { v26.s, v27.s }[1], [x17]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld2 { v1.d, v2.d }[0], [x10]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v0.16b, v1.16b }, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v13.8b, v14.8b }, [x4]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v0.8b, v1.8b }, [x0], #16
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v0.16b }, [x0], #1
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v0.8h }, [x15]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ld1r { v0.8h }, [x15], #2
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v0.16b, v1.16b }, [x0], x1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2 { v0.8b, v1.8b }, [x0]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld2 { v0.h, v1.h }[7], [x15]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld2 { v0.h, v1.h }[7], [x15], x8
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld2 { v0.h, v1.h }[7], [x15], #4
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.8b, v1.8b }, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v10.16b, v11.16b }, [x23]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.4h, v1.4h }, [x0], #4
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v25.4h, v26.4h }, [x11]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v23.8h, v24.8h }, [x10]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.2s, v1.2s }, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v8.4s, v9.4s }, [x17]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.1d, v1.1d }, [sp], x8
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v9.1d, v10.1d }, [x25]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v26.2d, v27.2d }, [x8]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v8.8b, v9.8b, v10.8b }, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v15.16b, v16.16b, v17.16b }, [x5]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.2d, v1.2d }, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.2d, v1.2d }, [x0], #16
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.4s, v1.4s }, [sp]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2r { v0.4s, v1.4s }, [sp], #8
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v0.4h, v1.4h, v2.4h }, [x15]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v0.8h, v1.8h, v2.8h }, [x15], #48
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v7.8h, v8.8h, v9.8h }, [x21]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v16.2s, v17.2s, v18.2s }, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v12.4s, v13.4s, v14.4s }, [x25]
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld3 { v17.b, v18.b, v19.b }[2], [x27]
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld3 { v18.h, v19.h, v20.h }[5], [x16]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v10.2d, v11.2d, v12.2d }, [x18]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld3 { v0.s, v1.s, v2.s }[3], [sp]
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld3 { v0.s, v1.s, v2.s }[3], [sp], x3
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld3 { v5.d, v6.d, v7.d }[1], [x14]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v0.8b, v1.8b, v2.8b }, [x15]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v17.16b, v18.16b, v19.16b }, [x3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v0.4h, v1.4h, v2.4h }, [x15]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v3.4h, v4.4h, v5.4h }, [x1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v6.8h, v7.8h, v8.8h }, [x28]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v0.2s, v1.2s, v2.2s }, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v28.4s, v29.4s, v30.4s }, [x2]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v0.1d, v1.1d, v2.1d }, [x0], x0
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v1.1d, v2.1d, v3.1d }, [x28]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v8.2d, v9.2d, v10.2d }, [x3]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v6.8b, v7.8b, v8.8b, v9.8b }, [x27]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v11.16b, v12.16b, v13.16b, v14.16b }, [x5]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v21.4h, v22.4h, v23.4h, v24.4h }, [x14]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v9.8h, v10.8h, v11.8h, v12.8h }, [x1]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v17.4s, v18.4s, v19.4s, v20.4s }, [x4]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v0.8b, v1.8b, v2.8b }, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x24]
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld4 { v4.b, v5.b, v6.b, v7.b }[12], [x27]
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld4 { v5.h, v6.h, v7.h, v8.h }[0], [x4]
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0
-# CHECK-NEXT: - - - - - 5.00 - - - - - - - ld4 { v0.s, v1.s, v2.s, v3.s }[0], [x26]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v20.8b, v21.8b, v22.8b, v23.8b }, [x23]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v1.16b, v2.16b, v3.16b, v4.16b }, [x25]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v16.4h, v17.4h, v18.4h, v19.4h }, [x6]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.2d, v1.2d, v2.2d, v3.2d }, [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v4.8h, v5.8h, v6.8h, v7.8h }, [x23]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [x30]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], #16
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v7.4s, v8.4s, v9.4s, v10.4s }, [x23]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], x8
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla v15.8h, v22.8h, v4.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla v28.2s, v10.2s, v2.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls v25.8h, v29.8h, v0.h[4]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls v22.2s, v29.2s, v0.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls v26.4s, v5.4s, v28.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov b0, v0.b[15]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov d6, v0.d[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov h2, v0.h[5]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov s17, v0.s[2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov w8, v8.s[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov x30, v18.d[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v2.b[0], v0.b[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v2.h[1], v0.h[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v2.s[2], v0.s[2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v2.d[1], v0.d[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v0.b[0], w8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v0.h[1], w8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v0.s[2], w8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v0.d[1], x8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi d15, #0xff00ff00ff00ff
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v0.16b, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v14.8h, #174
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v13.4h, #74, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v0.2d, #0xff0000ff0000ffff
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v0.2s, #8, msl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v19.2s, #226
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v1.4s, #122, msl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v0.4s, #255, lsl #24
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movi v0.8b, #255
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul v26.4h, v20.4h, v14.h[5]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul v5.8h, v21.8h, v3.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul v29.2s, v10.2s, v3.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul v30.4s, v11.4s, v4.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul v30.4s, v11.4s, v4.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul v3.8h, v9.8h, v8.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mvni v9.4h, #237
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mvni v8.8h, #171, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mvni v22.4s, #15, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mvni v0.2s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mvni v0.4s, #16, msl #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg d29, d24
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mvn v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mvn v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orn v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orn v29.8b, v19.8b, v16.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr v9.4h, #18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr v0.8h, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr v4.4s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmul v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmul v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmull2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhn v0.2s, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhn v0.4h, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhn v0.8b, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhn2 v0.16b, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhn2 v0.4s, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhn2 v0.8h, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rbit v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rbit v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev16 v21.8b, v1.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev16 v30.16b, v31.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev32 v0.4h, v9.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev32 v21.8b, v1.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev32 v30.16b, v31.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev32 v4.8h, v7.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev64 v0.16b, v31.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev64 v1.8b, v9.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev64 v13.4h, v21.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev64 v2.8h, v4.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev64 v4.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev64 v6.4s, v8.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrn v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrn v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrn v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrn2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhn v0.2s, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhn v0.4h, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhn v0.8b, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhn2 v0.16b, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhn2 v0.4s, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhn2 v0.8h, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - saba v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabal2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabal2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabal2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabd v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabd v12.2s, v11.2s, v27.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sadalp v0.1d, v0.2s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sadalp v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sadalp v0.2s, v0.4h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sadalp v0.4h, v0.8b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sadalp v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sadalp v0.8h, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlp v0.1d, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlp v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlp v0.2s, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlp v0.4h, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlp v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlp v0.8h, v0.16b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - saddlv d0, v0.4s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - saddlv s0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - saddlv s0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - saddlv h0, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - saddlv h0, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddw2 v0.2d, v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddw2 v0.4s, v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddw2 v0.8h, v0.8h, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h4, h8, #9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf h5, h14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d21, d12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf d21, d12, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s22, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf s22, s13, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v25.4h, v13.4h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf v4.8h, v8.8h, #10
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot v0.2s, v0.8b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot v0.2s, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot v0.4s, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot v0.4s, v0.16b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shadd v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shadd v25.16b, v1.16b, v10.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shl d7, d10, #12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shl v23.8b, v18.8b, #6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shl v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shl v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shl v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shl v0.8h, v23.8h, #10
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shl v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shll v0.4s, v0.4h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shll v0.8h, v0.8b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shll v0.2d, v0.2s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shll2 v0.2d, v0.4s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shll2 v0.4s, v0.8h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shll2 v0.8h, v0.16b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrn v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrn v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrn v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrn2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsub v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsub v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsub v15.8h, v5.8h, v27.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli d10, d14, #12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax v30.16b, v3.16b, v30.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp v21.8h, v16.8h, v7.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - smaxv b0, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - smaxv b0, v0.16b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - smaxv h0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - smaxv h0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - smaxv s0, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sminp v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sminp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sminp v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sminv b0, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sminv b0, v0.16b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sminv h0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sminv h0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sminv s0, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal v0.2d, v25.2s, v1.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal v16.4s, v9.4h, v11.h[4]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal2 v30.2d, v22.4s, v7.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl v25.2d, v27.2s, v1.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl v14.4s, v23.4h, v12.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlal2 v1.4s, v9.8h, v0.h[6]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl2 v12.4s, v11.8h, v12.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl2 v11.2d, v28.4s, v7.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlsl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull v31.2d, v23.2s, v6.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull v3.4s, v26.4h, v1.h[5]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull2 v11.2d, v1.4s, v7.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull2 v13.4s, v18.8h, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smull2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs b19, b14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs d18, d12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs h21, h15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs s20, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd b20, b11, b15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd h12, h18, h10
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal d19, s24, s12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal d8, s9, v0.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal s0, h0, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal s17, h27, h12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal v11.2d, v24.2s, v0.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal v20.4s, v30.4h, v12.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal2 v23.2d, v30.4s, v6.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlal2 v2.4s, v17.8h, v5.h[6]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh v8.4h, v16.4h, v5.h[4]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh v16.2s, v24.2s, v7.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull v8.4s, v19.4h, v1.h[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull v20.2d, v10.2s, v6.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull2 v10.4s, v25.8h, v0.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull2 v4.2d, v29.4s, v2.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh v0.8h, v15.8h, v0.h[5]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh v6.2s, v29.2s, v4.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh v31.2s, v17.2s, v4.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl d12, s23, s13
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl d8, s9, v0.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl s0, h0, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl s14, h12, h25
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl v26.2d, v7.2s, v3.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl v4.4s, v22.4h, v13.h[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl2 v4.2d, v3.4s, v3.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlsl2 v2.4s, v28.8h, v4.h[6]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh h10, h11, h12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh h7, h15, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh s15, s14, v0.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh s20, s21, s2
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull d1, s1, v0.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull d15, s22, s12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull s1, h1, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull s12, h22, h12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmull2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg b19, b14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg d18, d12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg h21, h15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg s20, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah h0, h1, v2.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.4h, v1.4h, v2.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.8h, v1.8h, v2.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah s0, s1, v2.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.2s, v1.2s, v2.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.4s, v1.4s, v2.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah h0, h1, h2
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.4h, v1.4h, v2.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.8h, v1.8h, v2.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah s0, s1, s2
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.2s, v1.2s, v2.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah v0.4s, v1.4s, v2.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh h0, h1, v2.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.4h, v1.4h, v2.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.8h, v1.8h, v2.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh s0, s1, v2.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.2s, v1.2s, v2.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.4s, v1.4s, v2.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh h0, h1, h2
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.4h, v1.4h, v2.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.8h, v1.8h, v2.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh s0, s1, s2
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.2s, v1.2s, v2.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh v0.4s, v1.4s, v2.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh h10, h11, h12
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh h7, h15, v0.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh s15, s14, v0.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh s20, s21, s2
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl d31, d31, d31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl h3, h4, h15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl s17, s4, s23
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub b3, b13, b12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub v20.8h, v18.8h, v12.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn b10, h13, #2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn h15, s10, #6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn s15, d12, #9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrn2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun b17, h10, #6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun h10, s13, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun s22, d16, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrun2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl b11, b19, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl d15, d16, #51
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl d31, d31, d31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl h13, h18, #11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl h3, h4, h15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl s14, s17, #22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v23.16b, v23.16b, v23.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu b15, b18, #6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu d11, d13, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu h19, h17, #6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu s16, s14, #25
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn b10, h15, #5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn h17, s10, #4
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn s18, d10, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrn2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun b15, h10, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun h20, s14, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun s10, d15, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrun2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub s20, s10, s7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn b18, h18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn h20, s17
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn s19, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn v0.2s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn v0.4h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn v0.8b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn2 v0.16b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn2 v0.4s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtn2 v0.8h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun b19, h14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun h21, s15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun s20, d12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun v0.2s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun v0.4h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun v0.8b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun2 v0.16b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun2 v0.4s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtun2 v0.8h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srhadd v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srhadd v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srhadd v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri d10, d12, #14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl d16, d16, d16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr d19, d18, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra d15, d11, #19
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshl d31, d31, d31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshl v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshl v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshl v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshll v9.8h, v2.8b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshll v12.4s, v3.4h, #4
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshll v0.2d, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshll2 v28.8h, v12.16b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshll2 v0.4s, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshll2 v17.2d, v13.4s, #22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr d15, d16, #12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshr v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra d18, d12, #21
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubw2 v0.2d, v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubw2 v0.4s, v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubw2 v0.8h, v0.8h, v0.16b
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v18.8b }, [x15]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v8.8b, v9.8b }, [x18]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v15.8b, v16.8b, v17.8b }, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v21.8b, v22.8b, v23.8b, v24.8b }, [x14]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v0.16b }, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v1.16b, v2.16b }, [x4]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st1 { v27.16b, v28.16b, v29.16b }, [x18]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st1 { v18.16b, v19.16b, v20.16b, v21.16b }, [x29]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v19.4h }, [x7]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v22.4h, v23.4h }, [x22]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v13.4h, v14.4h, v15.4h }, [x7]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v23.4h, v24.4h, v25.4h, v26.4h }, [x24]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v27.8h }, [x17]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st1 { v8.8h, v9.8h, v10.8h }, [x16]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x19]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v25.2s }, [x6]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v13.2s, v14.2s }, [x9]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v12.2s, v13.2s, v14.2s }, [x3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v6.2s, v7.2s, v8.2s, v9.2s }, [x13]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v0.4s, v1.4s }, [sp], #32
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v22.4s }, [x19]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v15.4s, v16.4s }, [x12]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st1 { v26.4s, v27.4s, v28.4s, v29.4s }, [x12]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v20.1d }, [x10]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v21.1d, v22.1d }, [x29]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v5.1d, v6.1d, v7.1d }, [x3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v0.1d, v1.1d, v2.1d, v3.1d }, [x10]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v26.2d, v27.2d }, [x28]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st1 { v13.2d, v14.2d, v15.2d }, [x27]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v8.2d }, [x15]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v0.8h }, [x15], x2
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v0.8h, v1.8h }, [x15]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v0.4s, v1.4s }, [sp], #32
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st1 { v0.4s, v1.4s, v2.4s }, [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v1.b }[5], [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v0.h }[2], [x1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v31.s }[1], [x16]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v0.8h }, [x15], x2
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st1 { v0.8h, v1.8h }, [x15]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v0.d }[1], [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1 { v0.d }[1], [x0], #8
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v0.16b, v1.16b }, [x0], x1
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st2 { v0.8b, v1.8b }, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v6.16b, v7.16b }, [x23]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st2 { v10.4h, v11.4h }, [x18]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v10.8h, v11.8h }, [x18]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st2 { v25.2s, v26.2s }, [x29]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v26.4s, v27.4s }, [x14]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v10.2d, v11.2d }, [x1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v21.b, v22.b }[15], [x15]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v28.h, v29.h }[2], [x6]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v0.s, v1.s }[3], [sp]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v0.s, v1.s }[3], [sp], #8
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2 { v17.d, v18.d }[1], [x1]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v10.8b, v11.8b, v12.8b }, [x18]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3 { v26.16b, v27.16b, v28.16b }, [x4]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v0.4h, v1.4h, v2.4h }, [x15]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3 { v0.8h, v1.8h, v2.8h }, [x0]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v19.2s, v20.2s, v21.2s }, [x30]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3 { v24.4s, v25.4s, v26.4s }, [x8]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3 { v24.2d, v25.2d, v26.2d }, [x25]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v8.b, v9.b, v10.b }[4], [x18]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v0.h, v1.h, v2.h }[7], [x15]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v0.h, v1.h, v2.h }[7], [x15], #6
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v9.s, v10.s, v11.s }[2], [x20]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st3 { v16.d, v17.d, v18.d }[0], [x13]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4 { v17.8b, v18.8b, v19.8b, v20.8b }, [x8]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v7.16b, v8.16b, v9.16b, v10.16b }, [x15]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4 { v5.4h, v6.4h, v7.4h, v8.4h }, [x13]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v11.8h, v12.8h, v13.8h, v14.8h }, [x1]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v21.4s, v22.4s, v23.4s, v24.4s }, [x6]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v25.2d, v26.2d, v27.2d, v28.2d }, [x16]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v0.b, v1.b, v2.b, v3.b }[15], [x0]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v5.h, v6.h, v7.h, v8.h }[4], [x13]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v22.s, v23.s, v24.s, v25.s }[0], [x7]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v23.d, v24.d, v25.d, v26.d }[1], [x5]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], x5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub d15, d5, d16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub v15.2s, v14.2s, v11.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhn v7.4h, v10.4s, v13.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhn2 v24.4s, v24.2d, v8.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd b19, b14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd d18, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd h20, h15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd s21, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbl v0.16b, { v0.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - tbl v0.16b, { v0.16b, v1.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbl v0.8b, { v0.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - tbl v0.8b, { v0.16b, v1.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - tbx v0.16b, { v0.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - tbx v0.16b, { v0.16b, v1.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 5.00 5.00 - - - tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
-# CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - tbx v0.8b, { v0.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - tbx v0.8b, { v0.16b, v1.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 5.00 5.00 - - - tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uaba v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uaba v13.16b, v14.16b, v19.16b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabal2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabal2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabal2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabd v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabd v23.4s, v4.4s, v30.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uadalp v0.1d, v0.2s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uadalp v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uadalp v0.2s, v0.4h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uadalp v0.4h, v0.8b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uadalp v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uadalp v0.8h, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlp v0.1d, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlp v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlp v0.2s, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlp v0.4h, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlp v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlp v0.8h, v0.16b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uaddlv d0, v0.4s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uaddlv s0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uaddlv s0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uaddlv h0, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uaddlv h0, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddw2 v0.2d, v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddw2 v0.4s, v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddw2 v0.8h, v0.8h, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h17, x12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h22, h16, #11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf h7, h21
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d21, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf d21, d14, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s8, x0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s22, s13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf s22, s13, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v18.4h, v11.4h, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf v22.8h, v20.8h, #10
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot v0.2s, v0.8b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot v0.2s, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot v0.4s, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot v0.4s, v0.16b, v0.4b[2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhadd v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhadd v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsub v12.4h, v16.4h, v28.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsub v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umaxp v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umaxp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umaxp v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - umaxv b0, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - umaxv b0, v0.16b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - umaxv h0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - umaxv h0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - umaxv s0, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin v0.16b, v26.16b, v2.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp v28.4s, v16.4s, v15.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uminv b0, v0.8b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uminv b0, v0.16b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uminv h0, v0.4h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uminv h0, v0.8h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uminv s0, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal v28.2d, v31.2s, v0.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal v22.4s, v14.4h, v0.h[6]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal2 v10.2d, v4.4s, v3.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal2 v31.4s, v7.8h, v15.h[5]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlal2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl v20.2d, v20.2s, v2.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl v21.4s, v12.4h, v7.h[5]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl2 v30.2d, v23.4s, v1.s[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl2 v27.4s, v28.8h, v6.h[4]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlsl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umov w6, v22.b[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umov w0, v0.b[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umov w10, v25.h[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umov w0, v0.h[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov w0, v0.s[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov x0, v0.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull v22.2d, v28.2s, v6.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull v27.4s, v1.4h, v8.h[6]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull2 v28.2d, v21.4s, v1.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull2 v18.4s, v26.8h, v10.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umull2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd h0, h1, h5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd s0, s24, s30
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd v14.2d, v22.2d, v20.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl b11, b20, b30
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl s23, s20, s16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl v25.8b, v13.8b, v23.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn b10, h12, #5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn h12, s10, #14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn s10, d10, #25
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrn2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl b11, b20, b30
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl b18, b15, #6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl d15, d12, #19
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl h11, h18, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl s14, s19, #18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl s23, s20, s16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v8.4h, v17.4h, v13.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn b12, h10, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn h10, s14, #5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn s10, d12, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn v0.2s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn v0.4h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn v0.8b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrn2 v0.8h, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub s16, s21, s6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub d16, d16, d16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub v19.4s, v0.4s, v5.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn b18, h18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn h20, s17
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn s19, d14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn v0.2s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn v0.4h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn v0.8b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn2 v0.16b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn2 v0.4s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtn2 v0.8h, v0.4s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - urecpe v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - urecpe v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd v16.2s, v19.2s, v2.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl d8, d7, d4
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl v31.8b, v5.8b, v3.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr d20, d23, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ursqrte v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ursqrte v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra d18, d10, #13
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushl d0, d0, d0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushl v6.8b, v26.8b, v6.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushl v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushl v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushll v0.4s, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushll v18.8h, v24.8b, #4
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushll v16.2d, v16.2s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushll2 v31.2d, v12.4s, #11
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushll2 v18.4s, v22.8h, #13
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushll2 v0.8h, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr d10, d17, #18
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushr v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov w15, v22.b[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov w26, v27.h[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov x21, v0.b[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov x9, v27.h[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov x15, v3.s[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov w0, v0.b[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov w0, v0.h[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov x0, v0.b[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov x0, v0.h[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smov x0, v0.s[1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd b19, b14
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd d18, d22
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd h20, h15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd s21, s12
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra d20, d13, #61
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra v0.16b, v0.16b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra v0.2d, v0.2d, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra v0.2s, v0.2s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra v0.4h, v0.4h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra v0.4s, v0.4s, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra v0.8b, v0.8b, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra v0.8h, v0.8h, #3
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubl2 v0.2d, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubl2 v0.4s, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubl2 v0.8h, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubw2 v0.2d, v0.2d, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubw2 v0.4s, v0.4s, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubw2 v0.8h, v0.8h, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xtn v0.2s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xtn v0.4h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xtn v0.8b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xtn2 v0.16b, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xtn2 v0.4s, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xtn2 v0.8h, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 v0.8h, v0.8h, v0.8h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 v0.16b, v0.16b, v0.16b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 v0.2d, v0.2d, v0.2d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 v0.2s, v0.2s, v0.2s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 v0.4h, v0.4h, v0.4h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 v0.4s, v0.4s, v0.4s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 v0.8b, v0.8b, v0.8b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs d29, d24
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add d17, d31, d29
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp v7.2s, v1.2s, v2.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp d1, v14.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - addv s0, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - addv h0, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - addv h0, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - addv b0, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - addv b0, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aesd v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aese v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aesimc v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - aesmc v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - and v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bic v0.4h, #15, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bic v23.8h, #101
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bic v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bic v25.16b, v10.16b, v9.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bic v24.2s, #70
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bit v5.8b, v12.8b, v22.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bif v0.8b, v25.8b, v4.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bsl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - bsl v27.16b, v13.16b, v21.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - cls v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - cls v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - cls v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - cls v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - cls v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - cls v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - clz v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - clz v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - clz v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - clz v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - clz v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - clz v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - cmeq v9.8h, v16.8h, v24.8h
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov h2, v0.h[5]
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov w8, v8.s[0]
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov v2.b[0], v0.b[0]
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov v0.s[2], w8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov v0.d[1], x8
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - rev64 v6.4s, v8.4s
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 3.00 3.00 - - - saba v0.16b, v0.16b, v0.16b
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 3.00 3.00 - - - ursra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 3.00 3.00 - - - ursra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushl d0, d0, d0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushl v6.8b, v26.8b, v6.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushll v0.4s, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushll v18.8h, v24.8b, #4
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushll v16.2d, v16.2s, #31
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushll2 v31.2d, v12.4s, #11
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushll2 v18.4s, v22.8h, #13
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushll2 v0.8h, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr d10, d17, #18
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ushr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov w15, v22.b[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov w26, v27.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov x21, v0.b[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov x9, v27.h[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov x15, v3.s[0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov w0, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov w0, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov x0, v0.b[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov x0, v0.h[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - smov x0, v0.s[1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd b19, b14
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd d18, d22
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd h20, h15
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd s21, s12
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usqadd v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra d20, d13, #61
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - usubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xtn v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xtn2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 v0.8h, v0.8h, v0.8h
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-ptraut-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-ptraut-instructions.s
index 7ea528acd365c..49b712e102f0f 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-ptraut-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-ptraut-instructions.s
@@ -71,76 +71,97 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - 10.00 - - - - 56.00 - - - - -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - 10.00 - - - - - - - - - - - - - - - - - - - - - - - - - 56.00 - - - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacia1716
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacib1716
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autia1716
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autib1716
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - paciaz
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - paciasp
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacibz
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacibsp
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autiaz
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autiasp
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autibz
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autibsp
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacia x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autia x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacda x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autda x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacib x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autib x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacdb x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autdb x0, x1
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacga x0, x1, x2
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - paciza x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autiza x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacdza x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autdza x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacizb x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autizb x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - pacdzb x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - autdzb x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - xpaci x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - xpacd x0
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - xpaclri
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - braa x0, x1
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - brab x0, x1
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - blraa x0, x1
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - blrab x0, x1
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - braaz x0
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - brabz x0
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - blraaz x0
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - blrabz x0
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - retaa
-# CHECK-NEXT: - - 1.00 - - - - 1.00 - - - - - retab
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldraa x0, [x1, #4088]
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldraa x0, [x1, #-4096]
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldrab x0, [x1, #4088]
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldrab x0, [x1, #-4096]
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldraa x0, [x1, #4088]!
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldraa x0, [x1, #-4096]!
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldrab x0, [x1, #4088]!
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldrab x0, [x1, #-4096]!
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldraa x0, [x1]
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldrab x0, [x1]
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldraa x0, [x1, #0]!
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldrab x0, [x1, #0]!
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldraa xzr, [sp, #-4096]!
-# CHECK-NEXT: - - - - - - - 1.00 - - - - - ldrab xzr, [sp, #-4096]!
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacia1716
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacib1716
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autia1716
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autib1716
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - paciaz
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - paciasp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacibz
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacibsp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autiaz
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autiasp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autibz
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autibsp
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacia x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autia x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacda x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autda x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacib x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autib x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacdb x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autdb x0, x1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacga x0, x1, x2
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - paciza x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autiza x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacdza x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autdza x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacizb x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autizb x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - pacdzb x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - autdzb x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - xpaci x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - xpacd x0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - xpaclri
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - braa x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - brab x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - blraa x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - blrab x0, x1
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - braaz x0
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - brabz x0
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - blraaz x0
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - blrabz x0
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - retaa
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - retab
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldraa x0, [x1, #4088]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldraa x0, [x1, #-4096]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldrab x0, [x1, #4088]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldrab x0, [x1, #-4096]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldraa x0, [x1, #4088]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldraa x0, [x1, #-4096]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldrab x0, [x1, #4088]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldrab x0, [x1, #-4096]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldraa x0, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldrab x0, [x1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldraa x0, [x1, #0]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldrab x0, [x1, #0]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldraa xzr, [sp, #-4096]!
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - ldrab xzr, [sp, #-4096]!
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-rcpc-immo-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-rcpc-immo-instructions.s
index e9044762700b9..0cfdf26529890 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-rcpc-immo-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-rcpc-immo-instructions.s
@@ -29,33 +29,54 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: - - - - 4.50 8.50 - - - - - - -
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 4.50 8.50 - - - - - - -
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapur w7, [x24]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapur x20, [x13]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapurb w13, [x17]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapurh w3, [x22]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapursb w7, [x8]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapursb x29, [x7]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapursh w17, [x19]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapursh x3, [x3]
-# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - - ldapursw x3, [x18]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlur w3, [x27]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlur x23, [x25]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlurb w30, [x17]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stlurh w9, [x29]
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapur w7, [x24]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapur x20, [x13]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapurb w13, [x17]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapurh w3, [x22]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapursb w7, [x8]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapursb x29, [x7]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapursh w17, [x19]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapursh x3, [x3]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldapursw x3, [x18]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stlur w3, [x27]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stlur x23, [x25]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stlurb w30, [x17]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stlurh w9, [x29]
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-cme-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-cme-instructions.s
new file mode 100644
index 0000000000000..ebecb55cdd1b1
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-cme-instructions.s
@@ -0,0 +1,287 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=c1-nano -instruction-tables -mattr=+mca-streaming-sched < %p/../Inputs/streaming-cme-instructions.s 2>&1 | FileCheck %s --check-prefixes=STREAMING
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=c1-nano -instruction-tables < %p/../Inputs/streaming-cme-instructions.s 2>&1 | FileCheck %s --check-prefix=NONSTREAMING
+
+# STREAMING: warning: AArch64 streaming SVE scheduling is enabled via '-mattr=+mca-streaming-sched'; llvm-mca results are approximate.
+
+# NONSTREAMING: Instruction Info:
+# NONSTREAMING-NEXT: [1]: #uOps
+# NONSTREAMING-NEXT: [2]: Latency
+# NONSTREAMING-NEXT: [3]: RThroughput
+# NONSTREAMING-NEXT: [4]: MayLoad
+# NONSTREAMING-NEXT: [5]: MayStore
+# NONSTREAMING-NEXT: [6]: HasSideEffects (U)
+
+# STREAMING: Instruction Info:
+# STREAMING-NEXT: [1]: #uOps
+# STREAMING-NEXT: [2]: Latency
+# STREAMING-NEXT: [3]: RThroughput
+# STREAMING-NEXT: [4]: MayLoad
+# STREAMING-NEXT: [5]: MayStore
+# STREAMING-NEXT: [6]: HasSideEffects (U)
+
+# NONSTREAMING: [1] [2] [3] [4] [5] [6] Instructions:
+# NONSTREAMING-NEXT: 1 4 0.50 fadd s0, s1, s2
+# NONSTREAMING-NEXT: 1 4 0.50 fcvtzs w0, s1
+# NONSTREAMING-NEXT: 1 4 0.50 frintz s0, s1
+# NONSTREAMING-NEXT: 1 4 0.50 scvtf s0, w0
+# NONSTREAMING-NEXT: 1 3 0.50 fmov d0, x0
+# NONSTREAMING-NEXT: 1 4 0.50 fnmadd s0, s1, s2, s3
+# NONSTREAMING-NEXT: 1 3 0.50 * ldr s0, [x0]
+# NONSTREAMING-NEXT: 1 3 0.50 * ldr q0, [x0, x1, lsl #4]
+# NONSTREAMING-NEXT: 1 1 1.00 * str s0, [x0]
+# NONSTREAMING-NEXT: 1 4 0.50 fadd v0.4s, v1.4s, v2.4s
+# NONSTREAMING-NEXT: 2 10 0.50 bfdot v0.4s, v1.8h, v2.8h
+# NONSTREAMING-NEXT: 1 3 0.50 add z0.s, z1.s, z2.s
+# NONSTREAMING-NEXT: 1 4 1.00 andv b0, p7, z31.b
+# NONSTREAMING-NEXT: 1 4 4.00 clastb w0, p0, w0, z2.s
+# NONSTREAMING-NEXT: 1 3 0.50 mov z0.s, p0/m, w0
+# NONSTREAMING-NEXT: 1 3 0.50 mov z0.s, w0
+# NONSTREAMING-NEXT: 1 3 0.50 fmov z0.h, #1.00000000
+# NONSTREAMING-NEXT: 1 3 0.50 ext z0.b, z0.b, z1.b, #1
+# NONSTREAMING-NEXT: 1 8 5.00 tbl z0.b, { z0.b, z1.b }, z2.b
+# NONSTREAMING-NEXT: 1 4 0.50 fadd z0.s, p0/m, z0.s, z1.s
+# NONSTREAMING-NEXT: 1 4 0.50 fmul z0.s, p0/m, z0.s, z1.s
+# NONSTREAMING-NEXT: 1 4 0.50 fmin z0.s, p0/m, z0.s, z1.s
+# NONSTREAMING-NEXT: 1 3 0.50 fmov z0.s, p0/m, #1.00000000
+# NONSTREAMING-NEXT: 2 10 0.50 bfdot z0.s, z1.h, z2.h
+# NONSTREAMING-NEXT: 1 3 1.00 * ld1w { z0.s }, p0/z, [x0]
+# NONSTREAMING-NEXT: 1 3 1.00 * ld2w { z0.s, z1.s }, p0/z, [x0]
+# NONSTREAMING-NEXT: 1 7 6.00 * ld1d { z0.d }, p0/z, [x0, z0.d, uxtw]
+# NONSTREAMING-NEXT: 1 1 1.00 * st1w { z0.s }, p0, [x0]
+# NONSTREAMING-NEXT: 1 1 2.00 * st2w { z0.s, z1.s }, p0, [x0]
+# NONSTREAMING-NEXT: 1 1 9.00 * st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# NONSTREAMING-NEXT: 1 3 0.50 eor3 z0.d, z0.d, z1.d, z2.d
+# NONSTREAMING-NEXT: 1 5 3.00 sabalb z0.s, z1.h, z2.h
+# NONSTREAMING-NEXT: 1 6 4.00 sadalp z0.d, p0/m, z1.s
+# NONSTREAMING-NEXT: 1 3 0.50 ssra z0.d, z1.d, #1
+# NONSTREAMING-NEXT: 1 4 0.50 mla z0.d, p0/m, z1.d, z2.d
+# NONSTREAMING-NEXT: 1 4 1.00 index z0.s, w0, #1
+# NONSTREAMING-NEXT: 1 4 1.00 index z0.s, #0, w0
+# NONSTREAMING-NEXT: 1 4 1.00 index z0.s, w0, w1
+# NONSTREAMING-NEXT: 1 4 0.50 insr z0.s, w0
+# NONSTREAMING-NEXT: 1 4 0.50 lasta d0, p7, z31.d
+# NONSTREAMING-NEXT: 1 4 0.50 faddv d0, p0, z1.d
+# NONSTREAMING-NEXT: 1 4 1.00 fmaxnmv d0, p0, z1.d
+# NONSTREAMING-NEXT: 1 8 0.50 sqcvtn z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 uaddv d0, p7, z31.b
+
+# STREAMING: [1] [2] [3] [4] [5] [6] Instructions:
+# STREAMING-NEXT: 1 4 0.50 fadd s0, s1, s2
+# STREAMING-NEXT: 1 4 0.50 fcvtzs w0, s1
+# STREAMING-NEXT: 1 4 0.50 frintz s0, s1
+# STREAMING-NEXT: 1 4 0.50 scvtf s0, w0
+# STREAMING-NEXT: 1 4 0.50 fmov d0, x0
+# STREAMING-NEXT: 1 4 0.50 fnmadd s0, s1, s2, s3
+# STREAMING-NEXT: 1 2 3.00 * ldr s0, [x0]
+# STREAMING-NEXT: 1 2 3.00 * ldr q0, [x0, x1, lsl #4]
+# STREAMING-NEXT: 1 1 1.00 * str s0, [x0]
+# STREAMING-NEXT: 1 4 0.50 fadd v0.4s, v1.4s, v2.4s
+# STREAMING-NEXT: 1 4 0.50 bfdot v0.4s, v1.8h, v2.8h
+# STREAMING-NEXT: 1 4 0.50 add z0.s, z1.s, z2.s
+# STREAMING-NEXT: 1 12 1.50 andv b0, p7, z31.b
+# STREAMING-NEXT: 1 12 2.00 clastb w0, p0, w0, z2.s
+# STREAMING-NEXT: 1 8 0.60 mov z0.s, p0/m, w0
+# STREAMING-NEXT: 1 4 0.33 mov z0.s, w0
+# STREAMING-NEXT: 1 1 0.20 fmov z0.h, #1.00000000
+# STREAMING-NEXT: 1 3 0.50 ext z0.b, z0.b, z1.b, #1
+# STREAMING-NEXT: 1 4 0.33 tbl z0.b, { z0.b, z1.b }, z2.b
+# STREAMING-NEXT: 1 4 0.50 fadd z0.s, p0/m, z0.s, z1.s
+# STREAMING-NEXT: 1 4 0.50 fmul z0.s, p0/m, z0.s, z1.s
+# STREAMING-NEXT: 1 4 0.50 fmin z0.s, p0/m, z0.s, z1.s
+# STREAMING-NEXT: 1 1 0.20 fmov z0.s, p0/m, #1.00000000
+# STREAMING-NEXT: 1 4 0.50 bfdot z0.s, z1.h, z2.h
+# STREAMING-NEXT: 1 2 1.00 * ld1w { z0.s }, p0/z, [x0]
+# STREAMING-NEXT: 1 2 1.00 * ld2w { z0.s, z1.s }, p0/z, [x0]
+# STREAMING-NEXT: 1 7 6.00 * ld1d { z0.d }, p0/z, [x0, z0.d, uxtw]
+# STREAMING-NEXT: 1 2 1.00 * st1w { z0.s }, p0, [x0]
+# STREAMING-NEXT: 1 2 2.00 * st2w { z0.s, z1.s }, p0, [x0]
+# STREAMING-NEXT: 1 1 9.00 * st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# STREAMING-NEXT: 1 3 0.50 eor3 z0.d, z0.d, z1.d, z2.d
+# STREAMING-NEXT: 1 8 1.00 sabalb z0.s, z1.h, z2.h
+# STREAMING-NEXT: 1 8 1.00 sadalp z0.d, p0/m, z1.s
+# STREAMING-NEXT: 1 8 1.00 ssra z0.d, z1.d, #1
+# STREAMING-NEXT: 1 4 0.50 mla z0.d, p0/m, z1.d, z2.d
+# STREAMING-NEXT: 1 4 1.00 index z0.s, w0, #1
+# STREAMING-NEXT: 1 4 1.00 index z0.s, #0, w0
+# STREAMING-NEXT: 1 4 1.00 index z0.s, w0, w1
+# STREAMING-NEXT: 1 8 1.00 insr z0.s, w0
+# STREAMING-NEXT: 1 4 0.33 lasta d0, p7, z31.d
+# STREAMING-NEXT: 1 16 1.50 faddv d0, p0, z1.d
+# STREAMING-NEXT: 1 4 0.50 fmaxnmv d0, p0, z1.d
+# STREAMING-NEXT: 1 8 0.50 sqcvtn z0.h, { z0.s, z1.s }
+# STREAMING-NEXT: 1 12 1.50 uaddv d0, p7, z31.b
+
+# NONSTREAMING: Resources:
+# NONSTREAMING-NEXT: [0] - C1NanoUnitALU0
+# NONSTREAMING-NEXT: [1] - C1NanoUnitALU1
+# NONSTREAMING-NEXT: [2] - C1NanoUnitB
+# NONSTREAMING-NEXT: [3] - C1NanoUnitCMELD
+# NONSTREAMING-NEXT: [4] - C1NanoUnitCMEMC
+# NONSTREAMING-NEXT: [5.0] - C1NanoUnitCMEMML0
+# NONSTREAMING-NEXT: [5.1] - C1NanoUnitCMEMML0
+# NONSTREAMING-NEXT: [6] - C1NanoUnitCMEMML1
+# NONSTREAMING-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# NONSTREAMING-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# NONSTREAMING-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# NONSTREAMING-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# NONSTREAMING-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# NONSTREAMING-NEXT: [9] - C1NanoUnitCMEPF
+# NONSTREAMING-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# NONSTREAMING-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# NONSTREAMING-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# NONSTREAMING-NEXT: [11] - C1NanoUnitCMEST
+# NONSTREAMING-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# NONSTREAMING-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# NONSTREAMING-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# NONSTREAMING-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# NONSTREAMING-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# NONSTREAMING-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# NONSTREAMING-NEXT: [18] - C1NanoUnitDiv
+# NONSTREAMING-NEXT: [19] - C1NanoUnitLd1
+# NONSTREAMING-NEXT: [20] - C1NanoUnitLdSt
+# NONSTREAMING-NEXT: [21] - C1NanoUnitMAC
+# NONSTREAMING-NEXT: [22] - C1NanoUnitPAC
+# NONSTREAMING-NEXT: [23] - C1NanoUnitVALU0
+# NONSTREAMING-NEXT: [24] - C1NanoUnitVALU1
+# NONSTREAMING-NEXT: [25] - C1NanoUnitVMAC0
+# NONSTREAMING-NEXT: [26] - C1NanoUnitVMAC1
+# NONSTREAMING-NEXT: [27] - C1NanoUnitVMC
+
+# STREAMING: Resources:
+# STREAMING-NEXT: [0] - C1NanoUnitALU0
+# STREAMING-NEXT: [1] - C1NanoUnitALU1
+# STREAMING-NEXT: [2] - C1NanoUnitB
+# STREAMING-NEXT: [3] - C1NanoUnitCMELD
+# STREAMING-NEXT: [4] - C1NanoUnitCMEMC
+# STREAMING-NEXT: [5.0] - C1NanoUnitCMEMML0
+# STREAMING-NEXT: [5.1] - C1NanoUnitCMEMML0
+# STREAMING-NEXT: [6] - C1NanoUnitCMEMML1
+# STREAMING-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# STREAMING-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# STREAMING-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# STREAMING-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# STREAMING-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# STREAMING-NEXT: [9] - C1NanoUnitCMEPF
+# STREAMING-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# STREAMING-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# STREAMING-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# STREAMING-NEXT: [11] - C1NanoUnitCMEST
+# STREAMING-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# STREAMING-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# STREAMING-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# STREAMING-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# STREAMING-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# STREAMING-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# STREAMING-NEXT: [18] - C1NanoUnitDiv
+# STREAMING-NEXT: [19] - C1NanoUnitLd1
+# STREAMING-NEXT: [20] - C1NanoUnitLdSt
+# STREAMING-NEXT: [21] - C1NanoUnitMAC
+# STREAMING-NEXT: [22] - C1NanoUnitPAC
+# STREAMING-NEXT: [23] - C1NanoUnitVALU0
+# STREAMING-NEXT: [24] - C1NanoUnitVALU1
+# STREAMING-NEXT: [25] - C1NanoUnitVMAC0
+# STREAMING-NEXT: [26] - C1NanoUnitVMAC1
+# STREAMING-NEXT: [27] - C1NanoUnitVMC
+
+# NONSTREAMING: Resource pressure per iteration:
+# NONSTREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 0.50 - - 0.50 - - - 2.00 22.00 - - 30.00 26.00 5.50 5.50 -
+
+# STREAMING: Resource pressure per iteration:
+# STREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# STREAMING-NEXT: - - - 2.00 - - - - 9.80 9.80 9.80 1.80 1.80 - - - - 4.00 17.50 0.50 1.50 15.50 0.50 1.50 - 1.00 26.00 - - 3.00 3.00 - - -
+
+# NONSTREAMING: Resource pressure by instruction:
+# NONSTREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fadd s0, s1, s2
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fcvtzs w0, s1
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frintz s0, s1
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - scvtf s0, w0
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fmov d0, x0
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fnmadd s0, s1, s2, s3
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldr s0, [x0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldr q0, [x0, x1, lsl #4]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str s0, [x0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fadd v0.4s, v1.4s, v2.4s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot v0.4s, v1.8h, v2.8h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.s, z1.s, z2.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - andv b0, p7, z31.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 4.00 4.00 - - - clastb w0, p0, w0, z2.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.s, p0/m, w0
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.s, w0
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fmov z0.h, #1.00000000
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ext z0.b, z0.b, z1.b, #1
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 5.00 5.00 - - - tbl z0.b, { z0.b, z1.b }, z2.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fadd z0.s, p0/m, z0.s, z1.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmul z0.s, p0/m, z0.s, z1.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fmin z0.s, p0/m, z0.s, z1.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fmov z0.s, p0/m, #1.00000000
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot z0.s, z1.h, z2.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - - - - - ld1w { z0.s }, p0/z, [x0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - ld2w { z0.s, z1.s }, p0/z, [x0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 6.00 - - - - - - - ld1d { z0.d }, p0/z, [x0, z0.d, uxtw]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - st1w { z0.s }, p0, [x0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 2.00 - - - - - - - st2w { z0.s, z1.s }, p0, [x0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 9.00 - - - - - - - st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - eor3 z0.d, z0.d, z1.d, z2.d
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 3.00 3.00 - - - sabalb z0.s, z1.h, z2.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 4.00 4.00 - - - sadalp z0.d, p0/m, z1.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ssra z0.d, z1.d, #1
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - mla z0.d, p0/m, z1.d, z2.d
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - index z0.s, w0, #1
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - index z0.s, #0, w0
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - index z0.s, w0, w1
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - insr z0.s, w0
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - lasta d0, p7, z31.d
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - faddv d0, p0, z1.d
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - fmaxnmv d0, p0, z1.d
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 0.50 - - 0.50 - - - - - - - - - - - - sqcvtn z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - uaddv d0, p7, z31.b
+
+# STREAMING: Resource pressure by instruction:
+# STREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fadd s0, s1, s2
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - fcvtzs w0, s1
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - frintz s0, s1
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - scvtf s0, w0
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - fmov d0, x0
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - fnmadd s0, s1, s2, s3
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 3.00 - - - - - - - ldr s0, [x0]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 3.00 - - - - - - - ldr q0, [x0, x1, lsl #4]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str s0, [x0]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fadd v0.4s, v1.4s, v2.4s
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - bfdot v0.4s, v1.8h, v2.8h
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - add z0.s, z1.s, z2.s
+# STREAMING-NEXT: - - - - - - - - 1.33 1.33 1.33 - - - - - - - 1.50 - - 1.50 - - - - - - - - - - - - andv b0, p7, z31.b
+# STREAMING-NEXT: - - - - - - - - 2.00 2.00 2.00 - - - - - - - 2.00 - - - - - - - - - - - - - - - clastb w0, p0, w0, z2.s
+# STREAMING-NEXT: - - - - - - - - 0.73 0.73 0.73 0.40 0.40 - - - - - - - - - - - - - - - - - - - - - mov z0.s, p0/m, w0
+# STREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - - - - - - - - - - mov z0.s, w0
+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - fmov z0.h, #1.00000000
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - ext z0.b, z0.b, z1.b, #1
+# STREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - - - - - - - - - - tbl z0.b, { z0.b, z1.b }, z2.b
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - fadd z0.s, p0/m, z0.s, z1.s
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - fmul z0.s, p0/m, z0.s, z1.s
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - fmin z0.s, p0/m, z0.s, z1.s
+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - fmov z0.s, p0/m, #1.00000000
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - bfdot z0.s, z1.h, z2.h
+# STREAMING-NEXT: - - - 1.00 - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ld1w { z0.s }, p0/z, [x0]
+# STREAMING-NEXT: - - - 1.00 - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ld2w { z0.s, z1.s }, p0/z, [x0]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 6.00 - - - - - - - ld1d { z0.d }, p0/z, [x0, z0.d, uxtw]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 1.00 - - - - - - - st1w { z0.s }, p0, [x0]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 2.00 - - - - - - - st2w { z0.s, z1.s }, p0, [x0]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 9.00 - - - - - - - st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - eor3 z0.d, z0.d, z1.d, z2.d
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sabalb z0.s, z1.h, z2.h
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sadalp z0.d, p0/m, z1.s
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - ssra z0.d, z1.d, #1
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - mla z0.d, p0/m, z1.d, z2.d
+# STREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - index z0.s, w0, #1
+# STREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - index z0.s, #0, w0
+# STREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - index z0.s, w0, w1
+# STREAMING-NEXT: - - - - - - - - 1.00 1.00 1.00 - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - insr z0.s, w0
+# STREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - - - - - - - - - - lasta d0, p7, z31.d
+# STREAMING-NEXT: - - - - - - - - 0.60 0.60 0.60 0.60 0.60 - - - - - 1.50 - - 1.50 - - - - - - - - - - - - faddv d0, p0, z1.d
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - fmaxnmv d0, p0, z1.d
+# STREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 0.50 - - 0.50 - - - - - - - - - - - - sqcvtn z0.h, { z0.s, z1.s }
+# STREAMING-NEXT: - - - - - - - - 1.33 1.33 1.33 - - - - - - - 1.50 - - 1.50 - - - - - - - - - - - - uaddv d0, p7, z31.b
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-sme-only-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-sme-only-instructions.s
new file mode 100644
index 0000000000000..ba538b5ac8c2a
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-streaming-sme-only-instructions.s
@@ -0,0 +1,943 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=c1-nano -instruction-tables -mattr=+sme2p2,+mca-streaming-sched,+fp8,+sve-b16b16,+sme-b16b16,+sme-f64f64,+faminmax,+sme-f8f32,+sme-lutv2,+f64mm < %p/../Inputs/streaming-sme-only-instructions.s | FileCheck %s
+
+# NONSTREAMING: Instruction Info:
+# NONSTREAMING-NEXT: [1]: #uOps
+# NONSTREAMING-NEXT: [2]: Latency
+# NONSTREAMING-NEXT: [3]: RThroughput
+# NONSTREAMING-NEXT: [4]: MayLoad
+# NONSTREAMING-NEXT: [5]: MayStore
+# NONSTREAMING-NEXT: [6]: HasSideEffects (U)
+
+# NONSTREAMING: [1] [2] [3] [4] [5] [6] Instructions:
+# NONSTREAMING-NEXT: 1 4 0.40 revd z0.q, p0/m, z0.q
+# NONSTREAMING-NEXT: 1 2 2.00 U rprfm pldkeep, x0, [x0]
+# NONSTREAMING-NEXT: 1 8 1.00 U sqcvtun z0.b, { z0.s - z3.s }
+# NONSTREAMING-NEXT: 1 8 1.00 U sqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: 1 8 1.00 U sqrshrun z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: 1 8 1.00 U uqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: 1 2 1.00 U add za.s[w8, 0, vgx2], { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 2 1.00 U sub za.s[w8, 0, vgx2], { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 5 1.00 U add { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U addha za0.s, p0/m, p0/m, z0.s
+# NONSTREAMING-NEXT: 1 4 2.00 U addva za0.s, p0/m, p0/m, z0.s
+# NONSTREAMING-NEXT: 1 11 1.00 * bf1cvt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 11 1.00 * bf1cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 11 1.00 * bf2cvt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 11 1.00 * bf2cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 4 2.00 U bfadd za.h[w8, 0, vgx2], { z0.h, z1.h }
+# NONSTREAMING-NEXT: 1 11 1.00 U bfcvt z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 7 1.00 U bfcvtn z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 5 1.00 U bfclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U bfdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U bfmax { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U bfmaxnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U bfmin { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U bfminnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U bfmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U bfmops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U bfvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: 1 2 2.00 U bmopa za0.s, p0/m, p0/m, z0.s, z0.s
+# NONSTREAMING-NEXT: 1 2 2.00 U bmops za0.s, p0/m, p0/m, z0.s, z0.s
+# NONSTREAMING-NEXT: 1 4 1.00 * f1cvt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 4 1.00 * f1cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 4 1.00 * f2cvt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 4 1.00 * f2cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: 1 4 2.00 U fadd za.s[w8, 0, vgx2], { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 5 1.00 U famax { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 5 1.00 U famin { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 5 1.00 U fclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U fcvt z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U fcvtn z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U fcvtzs { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U fcvtzu { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 2.00 U fmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 4 2.00 U fmops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 5 1.00 U fmax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 1.00 U fmaxnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 5 1.00 U fmin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 1.00 U fminnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 2.00 U fmla za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 2.00 U fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 0.50 U fmlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: 1 4 2.00 U fmls za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 2.00 U fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U frinta { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U frintm { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U frintn { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U frintp { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U fvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: 1 4 1.00 U fvdotb za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# NONSTREAMING-NEXT: 1 4 1.00 U fvdott za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# NONSTREAMING-NEXT: 1 4 1.00 U fscale { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 5 2.00 U luti2 { z0.h, z1.h }, zt0, z0[0]
+# NONSTREAMING-NEXT: 1 5 2.00 U luti4 { z0.h, z1.h }, zt0, z0[0]
+# NONSTREAMING-NEXT: 1 9 1.00 * U mov { z0.s, z1.s }, za0h.s[w12, 0:1]
+# NONSTREAMING-NEXT: 1 4 1.00 U movt zt0[0], x0
+# NONSTREAMING-NEXT: 1 8 1.00 U movt x0, zt0[0]
+# NONSTREAMING-NEXT: 1 5 1.00 U sclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U smax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 1.00 U smin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 5 1.00 U uclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U umax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 1.00 U umin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: 1 4 1.00 U scvtf { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 1.00 U ucvtf { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: 1 4 0.40 U sel { z0.h, z1.h }, pn8, { z0.h, z1.h }, { z0.h, z1.h }
+# NONSTREAMING-NEXT: 1 5 0.20 U sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+# NONSTREAMING-NEXT: 1 2 0.50 U smlal za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: 1 2 0.50 U smlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 0.50 U smlsl za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: 1 2 0.50 U smlsll za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 0.50 U umlal za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: 1 2 0.50 U umlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 0.50 U umlsl za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: 1 2 0.50 U umlsll za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 2.00 U smopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 2 2.00 U smops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 2 2.00 U umopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 2 2.00 U umops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: 1 8 1.00 U sqcvtun z0.b, { z0.s - z3.s }
+# NONSTREAMING-NEXT: 1 5 1.00 U sqdmulh { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 4 1.00 U sqrshr z0.h, { z0.s, z1.s }, #16
+# NONSTREAMING-NEXT: 1 8 1.00 U sqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: 1 8 1.00 U sqrshru z0.h, { z0.s, z1.s }, #16
+# NONSTREAMING-NEXT: 1 8 1.00 U sqrshrun z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: 1 4 1.00 U uqrshr z0.h, { z0.s, z1.s }, #16
+# NONSTREAMING-NEXT: 1 8 1.00 U uqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: 1 5 1.00 U srshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 5 1.00 U urshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: 1 2 0.50 U sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# NONSTREAMING-NEXT: 1 2 0.50 U usdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# NONSTREAMING-NEXT: 1 2 0.50 U usmlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 2.00 U sumopa za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 2.00 U sumops za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 2.00 U usmopa za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: 1 2 2.00 U usmops za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: 1 4 0.20 U sunpk { z0.h, z1.h }, z0.b
+# NONSTREAMING-NEXT: 1 4 0.20 U uunpk { z0.h, z1.h }, z0.b
+# NONSTREAMING-NEXT: 1 4 1.50 U suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# NONSTREAMING-NEXT: 1 2 0.50 U uvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: 1 2 0.50 U svdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: 1 4 1.50 U usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# NONSTREAMING-NEXT: 1 3 0.50 uzp1 z31.s, z31.s, z31.s
+# NONSTREAMING-NEXT: 1 3 0.50 uzp2 z31.s, z31.s, z31.s
+# NONSTREAMING-NEXT: 1 1 2.00 U zero za.d[w8, 0, vgx2]
+# NONSTREAMING-NEXT: 1 1 0.33 U zero { zt0 }
+# NONSTREAMING-NEXT: 1 3 0.50 zip1 z0.s, z0.s, z0.s
+# NONSTREAMING-NEXT: 1 3 0.50 zip2 z0.s, z0.s, z0.s
+# NONSTREAMING-NEXT: 1 7 1.00 * U ldr za[w12, 0], [x0]
+# NONSTREAMING-NEXT: 1 11 1.00 * U str za[w12, 0], [x0]
+
+# NONSTREAMING: Resources:
+# NONSTREAMING-NEXT: [0] - C1NanoUnitALU0
+# NONSTREAMING-NEXT: [1] - C1NanoUnitALU1
+# NONSTREAMING-NEXT: [2] - C1NanoUnitB
+# NONSTREAMING-NEXT: [3] - C1NanoUnitCMELD
+# NONSTREAMING-NEXT: [4] - C1NanoUnitCMEMC
+# NONSTREAMING-NEXT: [5.0] - C1NanoUnitCMEMML0
+# NONSTREAMING-NEXT: [5.1] - C1NanoUnitCMEMML0
+# NONSTREAMING-NEXT: [6] - C1NanoUnitCMEMML1
+# NONSTREAMING-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# NONSTREAMING-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# NONSTREAMING-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# NONSTREAMING-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# NONSTREAMING-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# NONSTREAMING-NEXT: [9] - C1NanoUnitCMEPF
+# NONSTREAMING-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# NONSTREAMING-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# NONSTREAMING-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# NONSTREAMING-NEXT: [11] - C1NanoUnitCMEST
+# NONSTREAMING-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# NONSTREAMING-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# NONSTREAMING-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# NONSTREAMING-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# NONSTREAMING-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# NONSTREAMING-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# NONSTREAMING-NEXT: [18] - C1NanoUnitDiv
+# NONSTREAMING-NEXT: [19] - C1NanoUnitLd1
+# NONSTREAMING-NEXT: [20] - C1NanoUnitLdSt
+# NONSTREAMING-NEXT: [21] - C1NanoUnitMAC
+# NONSTREAMING-NEXT: [22] - C1NanoUnitPAC
+# NONSTREAMING-NEXT: [23] - C1NanoUnitVALU0
+# NONSTREAMING-NEXT: [24] - C1NanoUnitVALU1
+# NONSTREAMING-NEXT: [25] - C1NanoUnitVMAC0
+# NONSTREAMING-NEXT: [26] - C1NanoUnitVMAC1
+# NONSTREAMING-NEXT: [27] - C1NanoUnitVMC
+
+# NONSTREAMING: Resource pressure per iteration:
+# NONSTREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# NONSTREAMING-NEXT: - - - 1.00 - 68.00 68.00 1.00 13.67 13.67 13.67 5.00 5.00 2.00 0.33 0.33 0.33 1.00 59.00 - - 56.00 - - - 0.50 1.50 - - 2.00 2.00 - - -
+
+# NONSTREAMING: Resource pressure by instruction:
+# NONSTREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - - - - - - - - - - - - - - - - - revd z0.q, p0/m, z0.q
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - 2.00 - - - - - - - - - - - - - - - - - - - - rprfm pldkeep, x0, [x0]
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqcvtun z0.b, { z0.s - z3.s }
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqrshrun z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - uqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - add za.s[w8, 0, vgx2], { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - sub za.s[w8, 0, vgx2], { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - add { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 2.00 - - 2.00 - - - - - - - - - - - - addha za0.s, p0/m, p0/m, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 2.00 - - 2.00 - - - - - - - - - - - - addva za0.s, p0/m, p0/m, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bf1cvt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bf1cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bf2cvt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bf2cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfadd za.h[w8, 0, vgx2], { z0.h, z1.h }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bfcvt z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bfcvtn z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bfclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bfmax { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bfmaxnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bfmin { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - bfminnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfmops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bfvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bmopa za0.s, p0/m, p0/m, z0.s, z0.s
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - bmops za0.s, p0/m, p0/m, z0.s, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - f1cvt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - f1cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - f2cvt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - f2cvtlt z0.h, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fadd za.s[w8, 0, vgx2], { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - famax { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - famin { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fcvt z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - 0.33 0.33 0.33 - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fcvtn z0.h, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fcvtzs { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fcvtzu { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fmops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fmax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fmaxnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fmin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fminnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fmla za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - fmlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fmls za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - frinta { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - frintm { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - frintn { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - frintp { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fvdotb za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# NONSTREAMING-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - fvdott za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - fscale { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - 2.00 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - luti2 { z0.h, z1.h }, zt0, z0[0]
+# NONSTREAMING-NEXT: - - - - - - - - 2.00 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - luti4 { z0.h, z1.h }, zt0, z0[0]
+# NONSTREAMING-NEXT: - - - - - - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - mov { z0.s, z1.s }, za0h.s[w12, 0:1]
+# NONSTREAMING-NEXT: - - - - - - - - 1.00 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - movt zt0[0], x0
+# NONSTREAMING-NEXT: - - - - - - - - 1.00 1.00 1.00 - - - - - - - 1.00 - - - - - - - - - - - - - - - movt x0, zt0[0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - smax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - smin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - uclamp { z0.h, z1.h }, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - umax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - umin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - 1.00 1.00 1.00 - - - - - - - 1.00 - - - - - - - - - - - - - - - scvtf { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - 1.00 1.00 1.00 - - - - - - - 1.00 - - - - - - - - - - - - - - - ucvtf { z0.s, z1.s }, { z0.s, z1.s }
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - - - - - - - - - - - - - - - - - sel { z0.h, z1.h }, pn8, { z0.h, z1.h }, { z0.h, z1.h }
+# NONSTREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - smlal za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - smlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - smlsl za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - smlsll za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - umlal za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - umlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - umlsl za.s[w8, 0:1], z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - umlsll za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - smopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - smops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - umopa za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - umops za0.s, p0/m, p0/m, z0.h, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqcvtun z0.b, { z0.s - z3.s }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqdmulh { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqrshr z0.h, { z0.s, z1.s }, #16
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqrshru z0.h, { z0.s, z1.s }, #16
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqrshrun z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - uqrshr z0.h, { z0.s, z1.s }, #16
+# NONSTREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - uqrshrn z0.b, { z0.s - z3.s }, #32
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - srshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - urshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - usdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - usmlall za.s[w8, 0:3], z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - sumopa za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - sumops za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - usmopa za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - usmops za0.s, p0/m, p0/m, z0.b, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - sunpk { z0.h, z1.h }, z0.b
+# NONSTREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uunpk { z0.h, z1.h }, z0.b
+# NONSTREAMING-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - uvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - svdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# NONSTREAMING-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp1 z31.s, z31.s, z31.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - uzp2 z31.s, z31.s, z31.s
+# NONSTREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - zero za.d[w8, 0, vgx2]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - - - - zero { zt0 }
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z0.s, z0.s, z0.s
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z0.s, z0.s, z0.s
+# NONSTREAMING-NEXT: - - - 1.00 - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldr za[w12, 0], [x0]
+# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 1.00 - - - - - - - str za[w12, 0], [x0]
+
+# STREAMING: Instruction Info:
+# STREAMING-NEXT: [1]: #uOps
+# STREAMING-NEXT: [2]: Latency
+# STREAMING-NEXT: [3]: RThroughput
+# STREAMING-NEXT: [4]: MayLoad
+# STREAMING-NEXT: [5]: MayStore
+# STREAMING-NEXT: [6]: HasSideEffects (U)
+
+# STREAMING: [1] [2] [3] [4] [5] [6] Instructions:
+# STREAMING-NEXT: 1 4 0.40 revd z0.q, p0/m, z0.q
+# STREAMING-NEXT: 1 2 2.00 U rprfm pldkeep, x0, [x0]
+# STREAMING-NEXT: 1 8 1.00 U sqcvtun z0.b, { z0.s - z3.s }
+# STREAMING-NEXT: 1 8 1.00 U sqrshrn z0.b, { z0.s - z3.s }, #32
+# STREAMING-NEXT: 1 8 1.00 U sqrshrun z0.b, { z0.s - z3.s }, #32
+# STREAMING-NEXT: 1 8 1.00 U uqrshrn z0.b, { z0.s - z3.s }, #32
+# STREAMING-NEXT: 1 2 1.00 U add za.s[w8, 0, vgx2], { z0.s, z1.s }
+# STREAMING-NEXT: 1 2 1.00 U sub za.s[w8, 0, vgx2], { z0.s, z1.s }
+# STREAMING-NEXT: 1 5 1.00 U add { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 2.00 U addha za0.s, p0/m, p0/m, z0.s
+# STREAMING-NEXT: 1 4 2.00 U addva za0.s, p0/m, p0/m, z0.s
+# STREAMING-NEXT: 1 11 1.00 * bf1cvt z0.h, z0.b
+# STREAMING-NEXT: 1 11 1.00 * bf1cvtlt z0.h, z0.b
+# STREAMING-NEXT: 1 11 1.00 * bf2cvt z0.h, z0.b
+# STREAMING-NEXT: 1 11 1.00 * bf2cvtlt z0.h, z0.b
+# STREAMING-NEXT: 1 4 2.00 U bfadd za.h[w8, 0, vgx2], { z0.h, z1.h }
+# STREAMING-NEXT: 1 11 1.00 U bfcvt z0.h, { z0.s, z1.s }
+# STREAMING-NEXT: 1 7 1.00 U bfcvtn z0.h, { z0.s, z1.s }
+# STREAMING-NEXT: 1 5 1.00 U bfclamp { z0.h, z1.h }, z0.h, z0.h
+# STREAMING-NEXT: 1 4 2.00 U bfdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 1.00 U bfmax { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 1.00 U bfmaxnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 1.00 U bfmin { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 1.00 U bfminnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 2.00 U bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 2.00 U bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 2.00 U bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 2.00 U bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 2.00 U bfmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 4 2.00 U bfmops za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 4 1.00 U bfvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# STREAMING-NEXT: 1 2 2.00 U bmopa za0.s, p0/m, p0/m, z0.s, z0.s
+# STREAMING-NEXT: 1 2 2.00 U bmops za0.s, p0/m, p0/m, z0.s, z0.s
+# STREAMING-NEXT: 1 4 1.00 * f1cvt z0.h, z0.b
+# STREAMING-NEXT: 1 4 1.00 * f1cvtlt z0.h, z0.b
+# STREAMING-NEXT: 1 4 1.00 * f2cvt z0.h, z0.b
+# STREAMING-NEXT: 1 4 1.00 * f2cvtlt z0.h, z0.b
+# STREAMING-NEXT: 1 4 2.00 U fadd za.s[w8, 0, vgx2], { z0.s, z1.s }
+# STREAMING-NEXT: 1 5 1.00 U famax { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 5 1.00 U famin { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 5 1.00 U fclamp { z0.h, z1.h }, z0.h, z0.h
+# STREAMING-NEXT: 1 4 1.00 U fcvt z0.h, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U fcvtn z0.h, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U fcvtzs { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U fcvtzu { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 2.00 U fmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 4 2.00 U fmops za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 5 1.00 U fmax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 1.00 U fmaxnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 5 1.00 U fmin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 1.00 U fminnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 2.00 U fmla za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 2.00 U fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 0.50 U fmlall za.s[w8, 0:3], z0.b, z0.b
+# STREAMING-NEXT: 1 4 2.00 U fmls za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 2.00 U fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 1.00 U frinta { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U frintm { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U frintn { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U frintp { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U fvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# STREAMING-NEXT: 1 4 1.00 U fvdotb za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# STREAMING-NEXT: 1 4 1.00 U fvdott za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# STREAMING-NEXT: 1 4 1.00 U fscale { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 5 2.00 U luti2 { z0.h, z1.h }, zt0, z0[0]
+# STREAMING-NEXT: 1 5 2.00 U luti4 { z0.h, z1.h }, zt0, z0[0]
+# STREAMING-NEXT: 1 9 1.00 * U mov { z0.s, z1.s }, za0h.s[w12, 0:1]
+# STREAMING-NEXT: 1 4 1.00 U movt zt0[0], x0
+# STREAMING-NEXT: 1 8 1.00 U movt x0, zt0[0]
+# STREAMING-NEXT: 1 5 1.00 U sclamp { z0.h, z1.h }, z0.h, z0.h
+# STREAMING-NEXT: 1 4 1.00 U smax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 1.00 U smin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 5 1.00 U uclamp { z0.h, z1.h }, z0.h, z0.h
+# STREAMING-NEXT: 1 4 1.00 U umax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 1.00 U umin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# STREAMING-NEXT: 1 4 1.00 U scvtf { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 1.00 U ucvtf { z0.s, z1.s }, { z0.s, z1.s }
+# STREAMING-NEXT: 1 4 0.40 U sel { z0.h, z1.h }, pn8, { z0.h, z1.h }, { z0.h, z1.h }
+# STREAMING-NEXT: 1 5 0.20 U sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+# STREAMING-NEXT: 1 2 0.50 U smlal za.s[w8, 0:1], z0.h, z0.h
+# STREAMING-NEXT: 1 2 0.50 U smlall za.s[w8, 0:3], z0.b, z0.b
+# STREAMING-NEXT: 1 2 0.50 U smlsl za.s[w8, 0:1], z0.h, z0.h
+# STREAMING-NEXT: 1 2 0.50 U smlsll za.s[w8, 0:3], z0.b, z0.b
+# STREAMING-NEXT: 1 2 0.50 U umlal za.s[w8, 0:1], z0.h, z0.h
+# STREAMING-NEXT: 1 2 0.50 U umlall za.s[w8, 0:3], z0.b, z0.b
+# STREAMING-NEXT: 1 2 0.50 U umlsl za.s[w8, 0:1], z0.h, z0.h
+# STREAMING-NEXT: 1 2 0.50 U umlsll za.s[w8, 0:3], z0.b, z0.b
+# STREAMING-NEXT: 1 2 2.00 U smopa za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 2 2.00 U smops za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 2 2.00 U umopa za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 2 2.00 U umops za0.s, p0/m, p0/m, z0.h, z0.h
+# STREAMING-NEXT: 1 8 1.00 U sqcvtun z0.b, { z0.s - z3.s }
+# STREAMING-NEXT: 1 5 1.00 U sqdmulh { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 4 1.00 U sqrshr z0.h, { z0.s, z1.s }, #16
+# STREAMING-NEXT: 1 8 1.00 U sqrshrn z0.b, { z0.s - z3.s }, #32
+# STREAMING-NEXT: 1 8 1.00 U sqrshru z0.h, { z0.s, z1.s }, #16
+# STREAMING-NEXT: 1 8 1.00 U sqrshrun z0.b, { z0.s - z3.s }, #32
+# STREAMING-NEXT: 1 4 1.00 U uqrshr z0.h, { z0.s, z1.s }, #16
+# STREAMING-NEXT: 1 8 1.00 U uqrshrn z0.b, { z0.s - z3.s }, #32
+# STREAMING-NEXT: 1 5 1.00 U srshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 5 1.00 U urshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# STREAMING-NEXT: 1 2 0.50 U sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# STREAMING-NEXT: 1 2 0.50 U usdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# STREAMING-NEXT: 1 2 0.50 U usmlall za.s[w8, 0:3], z0.b, z0.b
+# STREAMING-NEXT: 1 2 2.00 U sumopa za0.s, p0/m, p0/m, z0.b, z0.b
+# STREAMING-NEXT: 1 2 2.00 U sumops za0.s, p0/m, p0/m, z0.b, z0.b
+# STREAMING-NEXT: 1 2 2.00 U usmopa za0.s, p0/m, p0/m, z0.b, z0.b
+# STREAMING-NEXT: 1 2 2.00 U usmops za0.s, p0/m, p0/m, z0.b, z0.b
+# STREAMING-NEXT: 1 4 0.20 U sunpk { z0.h, z1.h }, z0.b
+# STREAMING-NEXT: 1 4 0.20 U uunpk { z0.h, z1.h }, z0.b
+# STREAMING-NEXT: 1 4 1.50 U suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# STREAMING-NEXT: 1 2 0.50 U uvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# STREAMING-NEXT: 1 2 0.50 U svdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# STREAMING-NEXT: 1 4 1.50 U usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# STREAMING-NEXT: 1 4 0.20 uzp1 z31.s, z31.s, z31.s
+# STREAMING-NEXT: 1 4 0.20 uzp2 z31.s, z31.s, z31.s
+# STREAMING-NEXT: 1 1 2.00 U zero za.d[w8, 0, vgx2]
+# STREAMING-NEXT: 1 1 0.33 U zero { zt0 }
+# STREAMING-NEXT: 1 4 0.20 zip1 z0.s, z0.s, z0.s
+# STREAMING-NEXT: 1 4 0.20 zip2 z0.s, z0.s, z0.s
+# STREAMING-NEXT: 1 7 1.00 * U ldr za[w12, 0], [x0]
+# STREAMING-NEXT: 1 11 1.00 * U str za[w12, 0], [x0]
+
+# STREAMING: Resources:
+# STREAMING-NEXT: [0] - C1NanoUnitALU0
+# STREAMING-NEXT: [1] - C1NanoUnitALU1
+# STREAMING-NEXT: [2] - C1NanoUnitB
+# STREAMING-NEXT: [3] - C1NanoUnitCMELD
+# STREAMING-NEXT: [4] - C1NanoUnitCMEMC
+# STREAMING-NEXT: [5.0] - C1NanoUnitCMEMML0
+# STREAMING-NEXT: [5.1] - C1NanoUnitCMEMML0
+# STREAMING-NEXT: [6] - C1NanoUnitCMEMML1
+# STREAMING-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# STREAMING-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# STREAMING-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# STREAMING-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# STREAMING-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# STREAMING-NEXT: [9] - C1NanoUnitCMEPF
+# STREAMING-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# STREAMING-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# STREAMING-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# STREAMING-NEXT: [11] - C1NanoUnitCMEST
+# STREAMING-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# STREAMING-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# STREAMING-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# STREAMING-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# STREAMING-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# STREAMING-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# STREAMING-NEXT: [18] - C1NanoUnitDiv
+# STREAMING-NEXT: [19] - C1NanoUnitLd1
+# STREAMING-NEXT: [20] - C1NanoUnitLdSt
+# STREAMING-NEXT: [21] - C1NanoUnitMAC
+# STREAMING-NEXT: [22] - C1NanoUnitPAC
+# STREAMING-NEXT: [23] - C1NanoUnitVALU0
+# STREAMING-NEXT: [24] - C1NanoUnitVALU1
+# STREAMING-NEXT: [25] - C1NanoUnitVMAC0
+# STREAMING-NEXT: [26] - C1NanoUnitVMAC1
+# STREAMING-NEXT: [27] - C1NanoUnitVMC
+
+# STREAMING: Resource pressure per iteration:
+# STREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# STREAMING-NEXT: - - - 1.00 - 68.00 68.00 1.00 14.47 14.47 14.47 5.80 5.80 2.00 0.33 0.33 0.33 1.00 59.00 - - 56.00 - - - 0.50 1.50 - - - - - - -
+
+# STREAMING: Resource pressure by instruction:
+# STREAMING-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# STREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - - - - - - - - - - - - - - - - - revd z0.q, p0/m, z0.q
+# STREAMING-NEXT: - - - - - - - - - - - - - 2.00 - - - - - - - - - - - - - - - - - - - - rprfm pldkeep, x0, [x0]
+# STREAMING-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - sqcvtun z0.b, { z0.s - z3.s }
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+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - sunpk { z0.h, z1.h }, z0.b
+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uunpk { z0.h, z1.h }, z0.b
+# STREAMING-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# STREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - uvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# STREAMING-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - svdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# STREAMING-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uzp1 z31.s, z31.s, z31.s
+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uzp2 z31.s, z31.s, z31.s
+# STREAMING-NEXT: - - - - - 2.00 2.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - zero za.d[w8, 0, vgx2]
+# STREAMING-NEXT: - - - - - - - - - - - - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - - - - zero { zt0 }
+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - zip1 z0.s, z0.s, z0.s
+# STREAMING-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - zip2 z0.s, z0.s, z0.s
+# STREAMING-NEXT: - - - 1.00 - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldr za[w12, 0], [x0]
+# STREAMING-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 1.00 - - - - - - - str za[w12, 0], [x0]
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 2 0.50 U add za.s[w8, 0, vgx2], { z0.s, z1.s }
+# CHECK-NEXT: 1 2 0.50 U sub za.s[w8, 0, vgx2], { z0.s, z1.s }
+# CHECK-NEXT: 1 5 1.00 U add { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 2.00 U addha za0.s, p0/m, p0/m, z0.s
+# CHECK-NEXT: 1 4 2.00 U addva za0.s, p0/m, p0/m, z0.s
+# CHECK-NEXT: 1 11 1.00 U bf1cvt { z0.h, z1.h }, z0.b
+# CHECK-NEXT: 1 11 1.00 * bf1cvtlt z0.h, z0.b
+# CHECK-NEXT: 1 11 1.00 U bf2cvt { z0.h, z1.h }, z0.b
+# CHECK-NEXT: 1 11 1.00 * bf2cvtlt z0.h, z0.b
+# CHECK-NEXT: 1 4 0.50 U bfadd za.h[w8, 0, vgx2], { z0.h, z1.h }
+# CHECK-NEXT: 1 11 1.00 U bfcvt z0.h, { z0.s, z1.s }
+# CHECK-NEXT: 1 7 0.67 U bfcvtn z0.h, { z0.s, z1.s }
+# CHECK-NEXT: 1 5 1.00 U bfclamp { z0.h, z1.h }, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 0.50 U fdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 1.00 U bfmax { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 1.00 U bfmaxnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 1.00 U bfmin { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 1.00 U bfminnm { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfmlal za.s[w8, 0:1], z1.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfmlal za.s[w8, 0:1], z1.h, z0.h[0]
+# CHECK-NEXT: 1 4 0.50 U fmlal za.s[w8, 0:1], z1.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U fmlal za.s[w8, 0:1], z1.h, z0.h[0]
+# CHECK-NEXT: 1 4 0.50 U bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfmlsl za.s[w8, 0:1], z1.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfmlsl za.s[w8, 0:1], z1.h, z0.h[0]
+# CHECK-NEXT: 1 4 0.50 U fmlsl za.s[w8, 0:1], z1.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U fmlsl za.s[w8, 0:1], z1.h, z0.h[0]
+# CHECK-NEXT: 1 4 1.00 U bfmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 U bfmops za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U bfvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# CHECK-NEXT: 1 2 1.00 U bmopa za0.s, p0/m, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 2 1.00 U bmops za0.s, p0/m, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 * f1cvt z0.h, z0.b
+# CHECK-NEXT: 1 4 1.00 * f1cvtlt z0.h, z0.b
+# CHECK-NEXT: 1 4 1.00 * f2cvt z0.h, z0.b
+# CHECK-NEXT: 1 4 1.00 * f2cvtlt z0.h, z0.b
+# CHECK-NEXT: 1 4 0.50 U fadd za.s[w8, 0, vgx2], { z0.s, z1.s }
+# CHECK-NEXT: 1 5 1.00 U famax { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 5 1.00 U famin { z0.s, z1.s }, { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 5 1.00 U fclamp { z0.h, z1.h }, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 U fcvt z0.h, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 1.00 U fcvtn z0.h, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 1.00 U fcvtzs { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 1.00 U fcvtzu { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 1.00 U fmopa za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 U fmops za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 5 1.00 U fmax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 4 1.00 U fmaxnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 5 1.00 U fmin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 4 1.00 U fminnm { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 4 0.50 U fmla za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 4 0.50 U fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 0.50 U fmlall za.s[w8, 0:3], z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 U fmls za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 4 0.50 U fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 1.00 U frinta { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 1.00 U frintm { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 1.00 U frintn { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 1.00 U frintp { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 0.50 U fvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# CHECK-NEXT: 1 4 1.00 U fvdotb za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# CHECK-NEXT: 1 4 1.00 U fvdott za.s[w8, 0, vgx4], { z0.b, z1.b }, z0.b[0]
+# CHECK-NEXT: 1 4 0.50 U fscale { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 5 0.67 U luti2 { z0.h, z1.h }, zt0, z0[0]
+# CHECK-NEXT: 1 5 0.67 U luti4 { z0.h, z1.h }, zt0, z0[0]
+# CHECK-NEXT: 1 2 1.00 * ld1b { z0.b, z1.b }, pn8/z, [x0]
+# CHECK-NEXT: 1 2 1.00 * ld1b { z0.b - z3.b }, pn8/z, [x0]
+# CHECK-NEXT: 1 2 1.00 * ldnt1b { z0.b, z1.b }, pn8/z, [x0]
+# CHECK-NEXT: 1 2 1.00 * ldnt1b { z0.b - z3.b }, pn8/z, [x0]
+# CHECK-NEXT: 1 9 1.00 * U mov { z0.s, z1.s }, za0h.s[w12, 0:1]
+# CHECK-NEXT: 1 9 1.00 * mov z0.s, p0/m, za0h.s[w12, 0]
+# CHECK-NEXT: 1 5 0.50 U mov za0h.b[w12, 0], p0/m, z0.b
+# CHECK-NEXT: 1 4 0.33 U movt zt0[0], x0
+# CHECK-NEXT: 1 8 1.00 U movt x0, zt0[0]
+# CHECK-NEXT: 1 5 1.00 U sclamp { z0.h, z1.h }, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 U smax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 4 1.00 U smin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 5 1.00 U uclamp { z0.h, z1.h }, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 U umax { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 4 1.00 U umin { z0.s, z1.s }, { z0.s, z1.s }, z0.s
+# CHECK-NEXT: 1 5 2.00 U smax { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+# CHECK-NEXT: 1 5 2.00 U umin { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+# CHECK-NEXT: 1 4 0.50 U scvtf { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 0.50 U ucvtf { z0.s, z1.s }, { z0.s, z1.s }
+# CHECK-NEXT: 1 4 0.20 U sel { z0.h, z1.h }, pn8, { z0.h, z1.h }, { z0.h, z1.h }
+# CHECK-NEXT: 1 5 0.40 U sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+# CHECK-NEXT: 1 2 0.50 U smlal za.s[w8, 0:1], z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 U smlall za.s[w8, 0:3], z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 U sumlall za.s[w11, 4:7, vgx2], { z0.b, z1.b }, z8.b[3]
+# CHECK-NEXT: 1 2 0.50 U sumlall za.s[w11, 4:7], z0.b, z8.b[3]
+# CHECK-NEXT: 1 2 0.50 U smlsl za.s[w8, 0:1], z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 U smlsll za.s[w8, 0:3], z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 U umlal za.s[w8, 0:1], z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 U umlall za.s[w8, 0:3], z0.b, z0.b
+# CHECK-NEXT: 1 2 0.50 U umlsl za.s[w8, 0:1], z0.h, z0.h
+# CHECK-NEXT: 1 2 0.50 U umlsll za.s[w8, 0:3], z0.b, z0.b
+# CHECK-NEXT: 1 2 1.00 U smopa za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 1.00 U smops za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 1.00 U umopa za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 2 1.00 U umops za0.s, p0/m, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 8 0.50 U sqcvt z0.h, { z0.s, z1.s }
+# CHECK-NEXT: 1 8 0.50 U sqcvtun z0.b, { z0.s - z3.s }
+# CHECK-NEXT: 1 5 1.00 U sqdmulh { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 4 1.00 U sqrshr z0.h, { z0.s, z1.s }, #16
+# CHECK-NEXT: 1 8 0.50 U sqrshrn z0.b, { z0.s - z3.s }, #32
+# CHECK-NEXT: 1 8 0.50 U sqrshru z0.h, { z0.s, z1.s }, #16
+# CHECK-NEXT: 1 8 0.50 U sqrshrun z0.b, { z0.s - z3.s }, #32
+# CHECK-NEXT: 1 4 1.00 U uqrshr z0.h, { z0.s, z1.s }, #16
+# CHECK-NEXT: 1 8 0.50 U uqrshrn z0.b, { z0.s - z3.s }, #32
+# CHECK-NEXT: 1 5 1.00 U srshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 5 1.00 U urshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: 1 2 0.50 U sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: 1 2 0.50 U usdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: 1 2 0.50 U udot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: 1 2 0.50 U sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: 1 2 0.50 U usmlall za.s[w8, 0:3], z0.b, z0.b
+# CHECK-NEXT: 1 2 1.00 U sumopa za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 1.00 U sumops za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 1.00 U usmopa za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 2 1.00 U usmops za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.20 U sunpk { z0.h, z1.h }, z0.b
+# CHECK-NEXT: 1 4 0.20 U uunpk { z0.h, z1.h }, z0.b
+# CHECK-NEXT: 1 2 1.00 * st1b { z0.b, z1.b }, pn8, [x0]
+# CHECK-NEXT: 1 2 1.00 * st1b { z0.b - z3.b }, pn8, [x0]
+# CHECK-NEXT: 1 2 1.00 * stnt1b { z0.b, z1.b }, pn8, [x0]
+# CHECK-NEXT: 1 2 1.00 * stnt1b { z0.b - z3.b }, pn8, [x0]
+# CHECK-NEXT: 1 4 1.50 U suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# CHECK-NEXT: 1 2 0.50 U uvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# CHECK-NEXT: 1 2 0.50 U svdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# CHECK-NEXT: 1 4 1.50 U usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# CHECK-NEXT: 1 4 0.20 U uzp { z0.q, z1.q }, z0.q, z0.q
+# CHECK-NEXT: 1 4 0.20 uzp1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 4 0.20 uzp2 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 1 1.00 U zero za.d[w8, 0, vgx2]
+# CHECK-NEXT: 1 1 0.33 U zero { zt0 }
+# CHECK-NEXT: 1 4 0.20 zip1 z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.20 zip2 z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 7 1.00 * U ld1w {za0v.s[w12, 0]}, p0/z, [x0]
+# CHECK-NEXT: 1 2 1.00 * U ldr zt0, [x0]
+# CHECK-NEXT: 1 7 1.00 * U ldr za[w12, 0], [x0]
+# CHECK-NEXT: 1 11 1.00 * * U st1w {za0h.s[w12, 0]}, p0, [x0]
+# CHECK-NEXT: 1 2 1.00 * U str zt0, [x0]
+# CHECK-NEXT: 1 11 1.00 * U str za[w12, 0], [x0]
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - C1NanoUnitALU0
+# CHECK-NEXT: [1] - C1NanoUnitALU1
+# CHECK-NEXT: [2] - C1NanoUnitB
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: - - - 7.00 - 41.50 41.50 2.00 8.07 8.07 8.07 4.40 4.40 - 0.33 0.33 0.33 7.00 54.50 - 0.50 53.50 - 0.50 - 1.00 3.00 - - - - - - -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - add za.s[w8, 0, vgx2], { z0.s, z1.s }
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - sub za.s[w8, 0, vgx2], { z0.s, z1.s }
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - add { z0.h, z1.h }, { z0.h, z1.h }, z0.h
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+# CHECK-NEXT: - - - - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - 0.50 - - 0.50 - - - - - - - - - - - - uqrshrn z0.b, { z0.s - z3.s }, #32
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - srshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - urshl { z0.h, z1.h }, { z0.h, z1.h }, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - sudot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - usdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - udot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - sdot za.s[w8, 0, vgx2], { z0.b, z1.b }, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - usmlall za.s[w8, 0:3], z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - sumopa za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - sumops za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - usmopa za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - usmops za0.s, p0/m, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - sunpk { z0.h, z1.h }, z0.b
+# CHECK-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uunpk { z0.h, z1.h }, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - - - - - - - - - st1b { z0.b, z1.b }, pn8, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - - - - - - - - - st1b { z0.b - z3.b }, pn8, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - - - - - - - - - stnt1b { z0.b, z1.b }, pn8, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - - - - - - - - - stnt1b { z0.b - z3.b }, pn8, [x0]
+# CHECK-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - uvdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - svdot za.s[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
+# CHECK-NEXT: - - - - - 1.50 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+# CHECK-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uzp { z0.q, z1.q }, z0.q, z0.q
+# CHECK-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uzp1 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - uzp2 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - zero za.d[w8, 0, vgx2]
+# CHECK-NEXT: - - - - - - - - - - - - - - 0.33 0.33 0.33 - - - - - - - - - - - - - - - - - zero { zt0 }
+# CHECK-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - zip1 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - 0.20 0.20 0.20 0.20 0.20 - - - - - - - - - - - - - - - - - - - - - zip2 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - 1.00 - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ld1w {za0v.s[w12, 0]}, p0/z, [x0]
+# CHECK-NEXT: - - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ldr zt0, [x0]
+# CHECK-NEXT: - - - 1.00 - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - - - - - ldr za[w12, 0], [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 1.00 - - - - - - - st1w {za0h.s[w12, 0]}, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - - - - - - - - - str zt0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - - - - - - - - 1.00 - - - - - - - str za[w12, 0], [x0]
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
index f3bb840fca403..dafcb1fefd6e8 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
@@ -546,10 +546,10 @@
# CHECK-NEXT: 1 4 1.00 eorv d0, p7, z31.d
# CHECK-NEXT: 1 4 1.00 eorv h0, p7, z31.h
# CHECK-NEXT: 1 4 1.00 eorv s0, p7, z31.s
-# CHECK-NEXT: 1 3 0.50 ext z0.b, { z1.b, z2.b }, #0
+# CHECK-NEXT: 1 4 0.20 ext z0.b, { z1.b, z2.b }, #0
# CHECK-NEXT: 1 3 0.50 ext z31.b, z31.b, z0.b, #0
# CHECK-NEXT: 1 3 0.50 ext z31.b, z31.b, z0.b, #255
-# CHECK-NEXT: 1 3 0.50 ext z31.b, { z30.b, z31.b }, #255
+# CHECK-NEXT: 1 4 0.20 ext z31.b, { z30.b, z31.b }, #255
# CHECK-NEXT: 1 4 0.50 fabd z0.d, p7/m, z0.d, z31.d
# CHECK-NEXT: 1 4 0.50 fabd z0.h, p7/m, z0.h, z31.h
# CHECK-NEXT: 1 4 0.50 fabd z0.s, p7/m, z0.s, z31.s
@@ -3429,3434 +3429,3455 @@
# CHECK-NEXT: [0] - C1NanoUnitALU0
# CHECK-NEXT: [1] - C1NanoUnitALU1
# CHECK-NEXT: [2] - C1NanoUnitB
-# CHECK-NEXT: [3] - C1NanoUnitDiv
-# CHECK-NEXT: [4] - C1NanoUnitLd1
-# CHECK-NEXT: [5] - C1NanoUnitLdSt
-# CHECK-NEXT: [6] - C1NanoUnitMAC
-# CHECK-NEXT: [7] - C1NanoUnitPAC
-# CHECK-NEXT: [8] - C1NanoUnitVALU0
-# CHECK-NEXT: [9] - C1NanoUnitVALU1
-# CHECK-NEXT: [10] - C1NanoUnitVMAC0
-# CHECK-NEXT: [11] - C1NanoUnitVMAC1
-# CHECK-NEXT: [12] - C1NanoUnitVMC
+# CHECK-NEXT: [3] - C1NanoUnitCMELD
+# CHECK-NEXT: [4] - C1NanoUnitCMEMC
+# CHECK-NEXT: [5.0] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [5.1] - C1NanoUnitCMEMML0
+# CHECK-NEXT: [6] - C1NanoUnitCMEMML1
+# CHECK-NEXT: [7.0] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.1] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [7.2] - C1NanoUnitCMEPERMF
+# CHECK-NEXT: [8.0] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [8.1] - C1NanoUnitCMEPERMS
+# CHECK-NEXT: [9] - C1NanoUnitCMEPF
+# CHECK-NEXT: [10.0] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.1] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [10.2] - C1NanoUnitCMERNMRET
+# CHECK-NEXT: [11] - C1NanoUnitCMEST
+# CHECK-NEXT: [12] - C1NanoUnitCMEVX0ALU
+# CHECK-NEXT: [13] - C1NanoUnitCMEVX0FPDOT
+# CHECK-NEXT: [14] - C1NanoUnitCMEVX0MUL
+# CHECK-NEXT: [15] - C1NanoUnitCMEVX1ALU
+# CHECK-NEXT: [16] - C1NanoUnitCMEVX1FPDOT
+# CHECK-NEXT: [17] - C1NanoUnitCMEVX1MUL
+# CHECK-NEXT: [18] - C1NanoUnitDiv
+# CHECK-NEXT: [19] - C1NanoUnitLd1
+# CHECK-NEXT: [20] - C1NanoUnitLdSt
+# CHECK-NEXT: [21] - C1NanoUnitMAC
+# CHECK-NEXT: [22] - C1NanoUnitPAC
+# CHECK-NEXT: [23] - C1NanoUnitVALU0
+# CHECK-NEXT: [24] - C1NanoUnitVALU1
+# CHECK-NEXT: [25] - C1NanoUnitVMAC0
+# CHECK-NEXT: [26] - C1NanoUnitVMAC1
+# CHECK-NEXT: [27] - C1NanoUnitVMC
# CHECK: Resource pressure per iteration:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: 393.00 54.00 9.00 - 221.00 2425.00 - - 1378.50 1308.50 212.00 212.00 676.00
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
+# CHECK-NEXT: 393.00 54.00 9.00 - - - - - 0.40 0.40 0.40 0.40 0.40 - - - - - - - - - - - - 221.00 2425.00 - - 1377.50 1307.50 212.00 212.00 676.00
# CHECK: Resource pressure by instruction:
-# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z0.b, p0/m, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - abs z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adclb z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adclb z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adclt z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adclt z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.d, z0.d, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.h, z0.h, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.s, z0.s, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z0.s, z1.s, z2.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.b, p5/m, z21.b, z10.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.b, z10.b, z21.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.d, p5/m, z21.d, z10.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.d, z10.d, z21.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.h, p5/m, z21.h, z10.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.h, z10.h, z21.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.s, p5/m, z21.s, z10.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z21.s, z10.s, z21.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.b, p3/m, z23.b, z13.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.b, z13.b, z8.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.d, p3/m, z23.d, z13.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.d, z13.d, z8.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.h, p3/m, z23.h, z13.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.h, z13.h, z8.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.s, p3/m, z23.s, z13.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z23.s, z13.s, z8.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.d, z31.d, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.h, z31.h, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.s, z31.s, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - add z31.s, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhnb z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhnb z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhnb z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhnt z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhnt z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addhnt z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - addp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addpl sp, sp, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addpl x0, x0, #-32
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addpl x21, x21, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addpl x23, x8, #-1
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addvl sp, sp, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addvl x0, x0, #-32
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addvl x21, x21, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - addvl x23, x8, #-1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, lsl #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, lsl #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, lsl #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, sxtw #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, sxtw #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, sxtw #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, sxtw]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, uxtw #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, uxtw #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, uxtw #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, uxtw]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.s, [z0.s, z0.s, lsl #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.s, [z0.s, z0.s, lsl #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.s, [z0.s, z0.s, lsl #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - adr z0.s, [z0.s, z0.s]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesd z0.b, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aese z0.b, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesimc z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesimc z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesmc z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesmc z31.b, z31.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - and p0.b, p0/z, p0.b, p1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z0.d, z0.d, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z0.d, z0.d, #0xfffffffffffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z0.s, z0.s, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z0.s, z0.s, #0xfffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z23.d, z13.d, z8.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z23.h, z23.h, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z23.h, z23.h, #0xfff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z5.b, z5.b, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - and z5.b, z5.b, #0xf9
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ands p0.b, p0/z, p0.b, p1.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - andv b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - andv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - andv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - andv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.b, p0/m, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.b, p0/m, z0.b, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.b, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.b, z1.b, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.d, p0/m, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.d, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.h, p0/m, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.h, p0/m, z0.h, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.h, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.h, z1.h, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.s, p0/m, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.s, p0/m, z0.s, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.s, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z0.s, z1.s, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.b, p0/m, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.b, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.d, p0/m, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.d, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.h, p0/m, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.h, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.s, p0/m, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asr z31.s, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z0.b, p0/m, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z0.d, p0/m, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z0.h, p0/m, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z0.s, p0/m, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z31.b, p0/m, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z31.d, p0/m, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z31.h, p0/m, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrd z31.s, p0/m, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrr z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrr z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrr z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - asrr z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bcax z29.d, z29.d, z30.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 11.00 bdep z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - - - 66.00 bdep z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 bdep z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - - - 35.00 bdep z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - - - 11.00 bext z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - - - 66.00 bext z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 bext z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - - - 35.00 bext z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bfcvt z0.h, p0/m, z1.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bfcvtnt z0.h, p0/m, z1.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot z0.s, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot z0.s, z1.h, z2.h[0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - bfdot z0.s, z1.h, z2.h[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalb z0.s, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalb z0.s, z1.h, z2.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalb z0.s, z1.h, z2.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalb z10.s, z21.h, z14.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalb z21.s, z14.h, z3.h[2]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalt z0.s, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalt z0.s, z1.h, z2.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalt z0.s, z1.h, z2.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - bfmlalt z14.s, z10.h, z21.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 1.00 1.00 - bfmmla z0.s, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - - - 11.00 bgrp z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - - - 66.00 bgrp z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 bgrp z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - - - 35.00 bgrp z0.s, z1.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - bic p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - bic p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic z23.d, z13.d, z8.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bic z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - bics p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - bics p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brka p0.b, p15/m, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brka p0.b, p15/z, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkas p0.b, p15/z, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkb p0.b, p15/m, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkb p0.b, p15/z, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkbs p0.b, p15/z, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkn p0.b, p15/z, p1.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkn p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkns p0.b, p15/z, p1.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkns p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpa p0.b, p15/z, p1.b, p2.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpa p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpas p0.b, p15/z, p1.b, p2.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpas p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpb p0.b, p15/z, p1.b, p2.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpb p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpbs p0.b, p15/z, p1.b, p2.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - brkpbs p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bsl z0.d, z0.d, z1.d, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bsl1n z0.d, z0.d, z1.d, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - bsl2n z0.d, z0.d, z1.d, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z0.b, z0.b, z0.b, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z0.d, z0.d, z0.d, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z0.h, z0.h, z0.h, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z0.s, z0.s, z0.s, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z31.b, z31.b, z31.b, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z31.d, z31.d, z31.d, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z31.h, z31.h, z31.h, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cadd z31.s, z31.s, z31.s, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z0.d, z1.h, z15.h[1], #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z0.d, z1.h, z31.h, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z0.d, z1.h, z31.h, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z0.d, z1.h, z31.h, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z0.d, z1.h, z31.h, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z0.s, z1.b, z31.b, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z0.s, z1.b, z7.b[3], #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z29.d, z30.h, z0.h[0], #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z31.d, z30.h, z7.h[1], #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cdot z5.d, z6.h, z3.h[0], #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta b0, p7, b0, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta d0, p7, d0, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta h0, p7, h0, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta s0, p7, s0, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clasta w0, p7, w0, z31.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clasta w0, p7, w0, z31.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clasta w0, p7, w0, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clasta x0, p7, x0, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta z0.b, p7, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta z0.d, p7, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta z0.h, p7, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clasta z0.s, p7, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb b0, p7, b0, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb d0, p7, d0, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb h0, p7, h0, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb s0, p7, s0, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clastb w0, p7, w0, z31.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clastb w0, p7, w0, z31.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clastb w0, p7, w0, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - clastb x0, p7, x0, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb z0.b, p7, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb z0.d, p7, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb z0.h, p7, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clastb z0.s, p7, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cls z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - clz z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z0.b, z1.b, z2.b, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z0.d, z1.d, z2.d, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z0.h, z1.h, z2.h, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z0.h, z1.h, z2.h[0], #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z0.s, z1.s, z2.s, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z0.s, z1.s, z2.s[0], #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z15.b, z16.b, z17.b, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z15.d, z16.d, z17.d, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z15.h, z16.h, z17.h, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z15.s, z16.s, z17.s, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z29.b, z30.b, z31.b, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z29.d, z30.d, z31.d, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z29.h, z30.h, z31.h, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z29.s, z30.s, z31.s, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z31.b, z31.b, z31.b, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z31.d, z31.d, z31.d, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z31.h, z30.h, z7.h[0], #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z31.h, z31.h, z31.h, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z31.s, z30.s, z7.s[0], #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - cmla z31.s, z31.s, z31.s, #180
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.b, p0/z, z0.b, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.b, p0/z, z0.b, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.d, p0/z, z0.d, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.d, p0/z, z0.d, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.d, p0/z, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.h, p0/z, z0.h, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.h, p0/z, z0.h, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.s, p0/z, z0.s, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.s, p0/z, z0.s, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpeq p0.s, p0/z, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.b, p0/z, z0.b, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.b, p0/z, z0.b, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.b, p0/z, z1.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.d, p0/z, z0.d, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.d, p0/z, z0.d, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.d, p0/z, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.h, p0/z, z0.h, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.h, p0/z, z0.h, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.s, p0/z, z0.s, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.s, p0/z, z0.s, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.s, p0/z, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpge p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.b, p0/z, z0.b, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.b, p0/z, z0.b, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.b, p0/z, z1.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.d, p0/z, z0.d, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.d, p0/z, z0.d, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.d, p0/z, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.h, p0/z, z0.h, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.h, p0/z, z0.h, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.s, p0/z, z0.s, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.s, p0/z, z0.s, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.s, p0/z, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpgt p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.b, p0/z, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.b, p0/z, z0.b, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.b, p0/z, z1.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.d, p0/z, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.d, p0/z, z0.d, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.d, p0/z, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.h, p0/z, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.h, p0/z, z0.h, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.s, p0/z, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.s, p0/z, z0.s, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.s, p0/z, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphi p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.b, p0/z, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.b, p0/z, z0.b, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.b, p0/z, z1.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.d, p0/z, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.d, p0/z, z0.d, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.d, p0/z, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.h, p0/z, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.h, p0/z, z0.h, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.s, p0/z, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.s, p0/z, z0.s, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.s, p0/z, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmphs p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.b, p0/z, z0.b, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.b, p0/z, z0.b, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.d, p0/z, z0.d, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.d, p0/z, z0.d, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.h, p0/z, z0.h, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.h, p0/z, z0.h, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.s, p0/z, z0.s, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.s, p0/z, z0.s, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmple p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.b, p0/z, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.b, p0/z, z0.b, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.d, p0/z, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.d, p0/z, z0.d, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.h, p0/z, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.h, p0/z, z0.h, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.s, p0/z, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.s, p0/z, z0.s, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplo p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.b, p0/z, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.b, p0/z, z0.b, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.d, p0/z, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.d, p0/z, z0.d, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.h, p0/z, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.h, p0/z, z0.h, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.s, p0/z, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.s, p0/z, z0.s, #127
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpls p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.b, p0/z, z0.b, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.b, p0/z, z0.b, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.d, p0/z, z0.d, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.d, p0/z, z0.d, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.h, p0/z, z0.h, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.h, p0/z, z0.h, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.s, p0/z, z0.s, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.s, p0/z, z0.s, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmplt p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.b, p0/z, z0.b, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.b, p0/z, z0.b, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.b, p0/z, z0.b, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.d, p0/z, z0.d, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.d, p0/z, z0.d, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.d, p0/z, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.h, p0/z, z0.h, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.h, p0/z, z0.h, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.h, p0/z, z0.h, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.s, p0/z, z0.s, #-16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.s, p0/z, z0.s, #15
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.s, p0/z, z0.s, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - cmpne p0.s, p0/z, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnot z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnot z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnot z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnot z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnt z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 7.00 7.00 - - - cnt z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - cnt z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - cnt z31.s, p7/m, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntb x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntb x0, #28
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntb x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntb x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntd x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntd x0, #28
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntd x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntd x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cnth x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cnth x0, #28
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cnth x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cnth x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntp x0, p15, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntp x0, p15, p0.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntp x0, p15, p0.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntp x0, p15, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntw x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntw x0, #28
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntw x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - cntw x0, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - compact z31.d, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - compact z31.s, p7, z31.s
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermeq w30, wzr
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermeq wzr, w30
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermeq x30, xzr
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermeq xzr, x30
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermne w30, wzr
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermne wzr, w30
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermne x30, xzr
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - ctermne xzr, x30
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decb x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decb x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decb x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decb x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decb x0, vl1
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decd x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decd x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decd x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decd x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decd x0, vl1
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - dech x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - dech x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - dech x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - dech x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - dech x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp x0, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp x0, p0.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp x0, p0.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp x0, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp xzr, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp xzr, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp xzr, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp xzr, p15.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp z31.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp z31.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - decp z31.s, p15.s
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decw x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decw x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decw x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decw x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - decw x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dupm z0.d, #0xfffffffffffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dupm z0.s, #0xfffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dupm z23.h, #0xfff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - dupm z5.b, #0xf9
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - eor p0.b, p0/z, p0.b, p1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z0.d, z0.d, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z0.d, z0.d, #0xfffffffffffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z0.s, z0.s, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z0.s, z0.s, #0xfffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z23.d, z13.d, z8.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z23.h, z23.h, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z23.h, z23.h, #0xfff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z5.b, z5.b, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor z5.b, z5.b, #0xf9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eor3 z29.d, z29.d, z30.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eorbt z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eorbt z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eorbt z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eorbt z0.s, z1.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - eors p0.b, p0/z, p0.b, p1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eortb z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eortb z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eortb z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - eortb z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - eorv b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - eorv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - eorv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - eorv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ext z0.b, { z1.b, z2.b }, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ext z31.b, z31.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ext z31.b, z31.b, z0.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ext z31.b, { z30.b, z31.b }, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabd z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fabs z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facge p0.d, p0/z, z0.d, z1.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facge p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facge p0.h, p0/z, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facge p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facge p0.s, p0/z, z0.s, z1.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facge p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facgt p0.d, p0/z, z0.d, z1.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facgt p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facgt p0.h, p0/z, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facgt p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facgt p0.s, p0/z, z0.s, z1.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - facgt p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.d, p0/m, z0.d, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.h, p0/m, z0.h, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.s, p0/m, z0.s, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z31.d, p7/m, z31.d, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z31.h, p7/m, z31.h, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fadd z31.s, p7/m, z31.s, #1.0
-# CHECK-NEXT: - - - - - - - - 2.50 2.50 - - - fadda d0, p7, d0, z31.d
-# CHECK-NEXT: - - - - - - - - 25.00 25.00 - - - fadda h0, p7, h0, z31.h
-# CHECK-NEXT: - - - - - - - - 9.00 9.00 - - - fadda s0, p7, s0, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp z29.s, p3/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - faddp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - faddv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 5.00 - - - - faddv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 5.00 - - - - faddv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd z0.d, p0/m, z0.d, z0.d, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd z0.h, p0/m, z0.h, z0.h, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd z0.s, p0/m, z0.s, z0.s, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd z31.d, p7/m, z31.d, z31.d, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd z31.h, p7/m, z31.h, z31.h, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcadd z31.s, p7/m, z31.s, z31.s, #270
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmeq p0.d, p0/z, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmeq p0.d, p0/z, z0.d, z1.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmeq p0.h, p0/z, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmeq p0.h, p0/z, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmeq p0.s, p0/z, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmeq p0.s, p0/z, z0.s, z1.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.d, p0/z, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.d, p0/z, z0.d, z1.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.h, p0/z, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.h, p0/z, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.s, p0/z, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.s, p0/z, z0.s, z1.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmge p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.d, p0/z, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.d, p0/z, z0.d, z1.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.d, p0/z, z1.d, z0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.h, p0/z, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.h, p0/z, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.h, p0/z, z1.h, z0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.s, p0/z, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.s, p0/z, z0.s, z1.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmgt p0.s, p0/z, z1.s, z0.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z0.d, p0/m, z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z0.d, p0/m, z1.d, z2.d, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z0.h, p0/m, z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z0.h, p0/m, z1.h, z2.h, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z0.h, z0.h, z0.h[0], #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z0.s, p0/m, z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z0.s, p0/m, z1.s, z2.s, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z21.s, z10.s, z5.s[1], #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z23.s, z13.s, z8.s[0], #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z29.d, p7/m, z30.d, z31.d, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z29.h, p7/m, z30.h, z31.h, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z29.s, p7/m, z30.s, z31.s, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z31.d, p7/m, z31.d, z31.d, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z31.h, p7/m, z31.h, z31.h, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z31.h, z31.h, z7.h[3], #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fcmla z31.s, p7/m, z31.s, z31.s, #270
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmle p0.d, p0/z, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmle p0.h, p0/z, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmle p0.s, p0/z, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmlt p0.d, p0/z, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmlt p0.h, p0/z, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmlt p0.s, p0/z, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmne p0.d, p0/z, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmne p0.d, p0/z, z0.d, z1.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmne p0.h, p0/z, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmne p0.h, p0/z, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmne p0.s, p0/z, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmne p0.s, p0/z, z0.s, z1.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmuo p0.d, p0/z, z0.d, z1.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmuo p0.h, p0/z, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - fcmuo p0.s, p0/z, z0.s, z1.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt z0.d, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt z0.d, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt z0.h, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt z0.h, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt z0.s, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvt z0.s, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtlt z0.s, p0/m, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtlt z30.d, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnt z0.h, p0/m, z1.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtnt z30.s, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtx z0.s, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtx z30.s, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtxnt z0.s, p0/m, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtxnt z30.s, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs z0.d, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs z0.d, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs z0.s, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs z0.s, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzs z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu z0.d, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu z0.d, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu z0.s, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu z0.s, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fcvtzu z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 fdiv z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 5.00 fdiv z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - - - 10.00 fdiv z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 fdivr z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 5.00 fdivr z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - - - 10.00 fdivr z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fexpa z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fexpa z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fexpa z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - flogb z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - flogb z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - flogb z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmad z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmad z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmad z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z0.d, p0/m, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z0.h, p0/m, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z0.s, p0/m, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z31.d, p7/m, z31.d, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z31.h, p7/m, z31.h, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmax z31.s, p7/m, z31.s, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z0.d, p0/m, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z0.h, p0/m, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z0.s, p0/m, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z31.d, p7/m, z31.d, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z31.h, p7/m, z31.h, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnm z31.s, p7/m, z31.s, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp z29.s, p3/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxnmp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fmaxnmv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fmaxnmv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fmaxnmv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp z29.s, p3/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmaxp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fmaxv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fmaxv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fmaxv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z0.d, p0/m, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z0.h, p0/m, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z0.s, p0/m, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z31.d, p7/m, z31.d, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z31.h, p7/m, z31.h, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmin z31.s, p7/m, z31.s, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z0.d, p0/m, z0.d, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z0.h, p0/m, z0.h, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z0.s, p0/m, z0.s, #0.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z31.d, p7/m, z31.d, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z31.h, p7/m, z31.h, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnm z31.s, p7/m, z31.s, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp z29.s, p3/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminnmp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fminnmv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fminnmv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fminnmv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp z29.s, p3/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fminp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fminv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fminv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - fminv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla z0.d, z1.d, z7.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmla z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlalb z0.s, z1.h, z7.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlalb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlalb z30.s, z31.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlalt z0.s, z1.h, z7.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlalt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlalt z30.s, z31.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls z0.d, z1.d, z7.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmls z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlslb z0.s, z1.h, z7.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlslb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlslb z30.s, z31.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlslt z0.s, z1.h, z7.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlslt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmlslt z30.s, z31.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.d, #-10.00000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.d, #0.12500000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.d, p0/m, #-10.00000000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.d, p0/m, #0.12500000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.h, #-0.12500000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.h, p0/m, #-0.12500000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.s, #-0.12500000
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmov z0.s, p0/m, #-0.12500000
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmsb z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmsb z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmsb z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.d, p0/m, z0.d, #0.5
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.d, z0.d, z0.d[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.h, p0/m, z0.h, #0.5
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.h, z0.h, z0.h[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.s, p0/m, z0.s, #0.5
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.s, z0.s, z0.s[0]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z31.d, p7/m, z31.d, #2.0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z31.d, z31.d, z15.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z31.h, p7/m, z31.h, #2.0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z31.h, z31.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z31.s, p7/m, z31.s, #2.0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmul z31.s, z31.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fmulx z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fneg z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmad z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmad z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmad z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmla z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmla z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmla z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmls z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmls z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmls z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmsb z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmsb z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fnmsb z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpe z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecps z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpx z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpx z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frecpx z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinta z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frinti z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintm z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintn z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintp z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintx z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - frintz z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrte z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - frsqrts z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fscale z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fscale z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fscale z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - - - 19.00 fsqrt z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 5.00 fsqrt z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - - - - - 9.00 fsqrt z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.d, p0/m, z0.d, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.h, p0/m, z0.h, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.s, p0/m, z0.s, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z31.d, p7/m, z31.d, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z31.h, p7/m, z31.h, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsub z31.s, p7/m, z31.s, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z0.d, p0/m, z0.d, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z0.h, p0/m, z0.h, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z0.s, p0/m, z0.s, #0.5
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z31.d, p7/m, z31.d, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z31.h, p7/m, z31.h, #1.0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fsubr z31.s, p7/m, z31.s, #1.0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ftmad z0.d, z0.d, z31.d, #7
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ftmad z0.h, z0.h, z31.h, #7
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ftmad z0.s, z0.s, z31.s, #7
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ftsmul z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ftsmul z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ftsmul z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ftssel z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ftssel z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ftssel z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 - - - - histcnt z0.s, p0/z, z1.s, z2.s
-# CHECK-NEXT: - - - - - - - - 4.00 - - - - histcnt z29.d, p7/z, z30.d, z31.d
-# CHECK-NEXT: - - - - - - - - 4.00 - - - - histseg z0.b, z1.b, z31.b
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incb x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incb x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incb x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incb x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incb x0, vl1
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incd x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incd x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incd x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incd x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incd x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - incd z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - incd z0.d, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - inch x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - inch x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - inch x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - inch x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - inch x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - inch z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - inch z0.h, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp x0, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp x0, p0.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp x0, p0.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp x0, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp xzr, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp xzr, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp xzr, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp xzr, p15.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp z31.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp z31.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - incp z31.s, p15.s
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incw x0
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incw x0, #14
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incw x0, all, mul #16
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incw x0, pow2
-# CHECK-NEXT: - 1.00 - - - - - - - - - - - incw x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - incw z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - incw z0.s, all, mul #16
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z0.b, #0, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z0.d, #0, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z0.h, #0, #0
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z0.h, w0, w0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z0.s, #0, #0
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z21.b, w10, w21
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z21.d, x10, x21
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z21.s, w10, w21
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.b, #13, w8
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.b, w13, #8
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.d, #13, x8
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.d, x13, #8
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.h, #13, w8
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.h, w13, #8
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.s, #13, w8
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z23.s, w13, #8
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z31.b, #-1, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.b, #-1, wzr
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.b, wzr, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.b, wzr, wzr
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z31.d, #-1, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.d, #-1, xzr
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.d, xzr, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.d, xzr, xzr
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z31.h, #-1, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.h, #-1, wzr
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.h, wzr, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.h, wzr, wzr
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - index z31.s, #-1, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.s, #-1, wzr
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.s, wzr, #-1
-# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - index z31.s, wzr, wzr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z0.b, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z0.d, x0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z0.h, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z0.s, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.b, b31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.b, wzr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.d, d31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.d, xzr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.h, h31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.h, wzr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.s, s31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - insr z31.s, wzr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lasta b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lasta d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lasta h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lasta s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lasta w0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lasta w0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lasta w0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lasta x0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lastb b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lastb d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lastb h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lastb s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lastb w0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lastb w0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lastb w0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - lastb x0, p7, z31.d
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z0.b }, p0/z, [sp, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z0.b }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z0.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1b { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1b { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z21.b }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z21.h }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z21.s }, p5/z, [x10, x21]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z23.d }, p3/z, [x13, x8]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1b { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1b { z31.d }, p7/z, [z31.d, #31]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1b { z31.s }, p7/z, [z31.s, #31]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1b { z5.h }, p3/z, [x17, x16]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1d { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1d { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1d { z23.d }, p3/z, [sp, x8, lsl #3]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1d { z23.d }, p3/z, [x13, x8, lsl #3]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1d { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1d { z31.d }, p7/z, [z31.d, #248]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1h { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z21.h }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1h { z31.d }, p7/z, [z31.d, #62]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1h { z31.s }, p7/z, [z31.s, #62]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z0.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z31.b }, p7/z, [sp, #63]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z31.d }, p7/z, [sp, #63]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z31.h }, p7/z, [sp, #63]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rb { z31.s }, p7/z, [sp, #63]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rd { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rd { z31.d }, p7/z, [sp, #504]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rh { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rh { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rh { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rh { z31.d }, p7/z, [sp, #126]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rh { z31.h }, p7/z, [sp, #126]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rh { z31.s }, p7/z, [sp, #126]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqb { z0.b }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqb { z0.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqb { z21.b }, p5/z, [x10, #112]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqb { z23.b }, p3/z, [x13, #-128]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqb { z31.b }, p7/z, [sp, #-16]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqd { z0.d }, p0/z, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqd { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqd { z23.d }, p3/z, [x13, #-128]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqd { z23.d }, p3/z, [x13, #112]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqd { z31.d }, p7/z, [sp, #-16]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqh { z0.h }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqh { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqh { z23.h }, p3/z, [x13, #-128]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqh { z23.h }, p3/z, [x13, #112]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqh { z31.h }, p7/z, [sp, #-16]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqw { z0.s }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqw { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqw { z23.s }, p3/z, [x13, #-128]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqw { z23.s }, p3/z, [x13, #112]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rqw { z31.s }, p7/z, [sp, #-16]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsb { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsb { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsb { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsb { z31.d }, p7/z, [sp, #63]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsb { z31.h }, p7/z, [sp, #63]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsb { z31.s }, p7/z, [sp, #63]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsh { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsh { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsh { z31.d }, p7/z, [sp, #126]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsh { z31.s }, p7/z, [sp, #126]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsw { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rsw { z31.d }, p7/z, [sp, #252]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rw { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rw { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rw { z31.d }, p7/z, [sp, #252]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1rw { z31.s }, p7/z, [sp, #252]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sb { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z0.h }, p0/z, [sp, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z0.h }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1sb { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z21.h }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z21.s }, p5/z, [x10, x21]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z23.d }, p3/z, [x13, x8]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sb { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sb { z31.d }, p7/z, [z31.d, #31]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z31.h }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sb { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1sb { z31.s }, p7/z, [z31.s, #31]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1sh { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z21.s }, p5/z, [sp, x21, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z21.s }, p5/z, [x10, x21, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z23.d }, p3/z, [x13, x8, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sh { z31.d }, p7/z, [z31.d, #62]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sh { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1sh { z31.s }, p7/z, [z31.s, #62]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sw { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1sw { z31.d }, p7/z, [z31.d, #124]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1w { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z21.s }, p5/z, [sp, x21, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z21.s }, p5/z, [x10, x21, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z23.d }, p3/z, [x13, x8, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ld1w { z31.d }, p7/z, [z31.d, #124]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ld1w { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ld1w { z31.s }, p7/z, [z31.s, #124]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2b { z0.b, z1.b }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2b { z0.b, z1.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2b { z23.b, z24.b }, p3/z, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2b { z5.b, z6.b }, p3/z, [x17, x16]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2d { z0.d, z1.d }, p0/z, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2d { z0.d, z1.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2d { z23.d, z24.d }, p3/z, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2d { z5.d, z6.d }, p3/z, [x17, x16, lsl #3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2h { z0.h, z1.h }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2h { z0.h, z1.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2h { z23.h, z24.h }, p3/z, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2h { z5.h, z6.h }, p3/z, [x17, x16, lsl #1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2w { z0.s, z1.s }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2w { z0.s, z1.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ld2w { z23.s, z24.s }, p3/z, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - ld2w { z5.s, z6.s }, p3/z, [x17, x16, lsl #2]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3b { z0.b - z2.b }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3b { z0.b - z2.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3b { z21.b - z23.b }, p5/z, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3b { z23.b - z25.b }, p3/z, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3b { z5.b - z7.b }, p3/z, [x17, x16]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3d { z0.d - z2.d }, p0/z, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3d { z0.d - z2.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3d { z21.d - z23.d }, p5/z, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3d { z23.d - z25.d }, p3/z, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3d { z5.d - z7.d }, p3/z, [x17, x16, lsl #3]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3h { z0.h - z2.h }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3h { z0.h - z2.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3h { z21.h - z23.h }, p5/z, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3h { z23.h - z25.h }, p3/z, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3h { z5.h - z7.h }, p3/z, [x17, x16, lsl #1]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3w { z0.s - z2.s }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3w { z0.s - z2.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3w { z21.s - z23.s }, p5/z, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld3w { z23.s - z25.s }, p3/z, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld3w { z5.s - z7.s }, p3/z, [x17, x16, lsl #2]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4b { z0.b - z3.b }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4b { z0.b - z3.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4b { z21.b - z24.b }, p5/z, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4b { z23.b - z26.b }, p3/z, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4b { z5.b - z8.b }, p3/z, [x17, x16]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4d { z0.d - z3.d }, p0/z, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4d { z0.d - z3.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4d { z21.d - z24.d }, p5/z, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4d { z23.d - z26.d }, p3/z, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4d { z5.d - z8.d }, p3/z, [x17, x16, lsl #3]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4h { z0.h - z3.h }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4h { z0.h - z3.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4h { z21.h - z24.h }, p5/z, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4h { z23.h - z26.h }, p3/z, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4h { z5.h - z8.h }, p3/z, [x17, x16, lsl #1]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4w { z0.s - z3.s }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4w { z0.s - z3.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4w { z21.s - z24.s }, p5/z, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - ld4w { z23.s - z26.s }, p3/z, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - ld4w { z5.s - z8.s }, p3/z, [x17, x16, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1b { z0.d }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1b { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1b { z0.h }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1b { z0.s }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1b { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1b { z31.b }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1b { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1b { z31.d }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1b { z31.d }, p7/z, [z31.d, #31]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1b { z31.h }, p7/z, [sp]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1b { z31.s }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1b { z31.s }, p7/z, [z31.s, #31]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1d { z0.d }, p0/z, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1d { z31.d }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1d { z31.d }, p7/z, [z31.d, #248]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1h { z0.d }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1h { z0.h }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1h { z0.s }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1h { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1h { z31.d }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1h { z31.d }, p7/z, [z31.d, #62]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1h { z31.h }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1h { z31.s }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1h { z31.s }, p7/z, [z31.s, #62]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sb { z0.d }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sb { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sb { z0.h }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sb { z0.s }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sb { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1sb { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sb { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sb { z31.d }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sb { z31.d }, p7/z, [z31.d, #31]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sb { z31.h }, p7/z, [sp]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sb { z31.s }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1sb { z31.s }, p7/z, [z31.s, #31]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1sh { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sh { z31.d }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sh { z31.d }, p7/z, [z31.d, #62]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sh { z31.s }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1sh { z31.s }, p7/z, [z31.s, #62]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1sw { z31.d }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1sw { z31.d }, p7/z, [z31.d, #124]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1w { z0.d }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z0.d }, p0/z, [z0.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1w { z0.s }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z0.s }, p0/z, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1w { z0.s }, p0/z, [z0.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z21.d }, p5/z, [x10, z21.d, uxtw]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z31.d }, p7/z, [sp, z31.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1w { z31.d }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldff1w { z31.d }, p7/z, [z31.d, #124]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldff1w { z31.s }, p7/z, [sp]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldff1w { z31.s }, p7/z, [z31.s, #124]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z0.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z21.b }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z21.h }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z31.b }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z31.h }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1b { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1d { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1d { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z21.h }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z31.h }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1h { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sh { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sh { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sh { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sh { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sh { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sw { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1w { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1w { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1b { z0.b }, p0/z, [x0, x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1b { z0.b }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1b { z0.d }, p0/z, [z1.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1b { z0.s }, p0/z, [z1.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1b { z21.b }, p5/z, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1b { z23.b }, p3/z, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1b { z31.d }, p7/z, [z31.d, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1b { z31.d }, p7/z, [z31.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1b { z31.s }, p7/z, [z31.s, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1b { z31.s }, p7/z, [z31.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1d { z0.d }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1d { z0.d }, p0/z, [z1.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1d { z21.d }, p5/z, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1d { z23.d }, p3/z, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1d { z31.d }, p7/z, [z31.d, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1d { z31.d }, p7/z, [z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1h { z0.d }, p0/z, [z1.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1h { z0.h }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1h { z0.s }, p0/z, [z1.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1h { z21.h }, p5/z, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1h { z23.h }, p3/z, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1h { z31.d }, p7/z, [z31.d, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1h { z31.d }, p7/z, [z31.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1h { z31.s }, p7/z, [z31.s, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1h { z31.s }, p7/z, [z31.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sb { z0.d }, p0/z, [z1.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1sb { z0.s }, p0/z, [z1.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sb { z31.d }, p7/z, [z31.d, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sb { z31.d }, p7/z, [z31.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1sb { z31.s }, p7/z, [z31.s, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1sb { z31.s }, p7/z, [z31.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sh { z0.d }, p0/z, [z1.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1sh { z0.s }, p0/z, [z1.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sh { z31.d }, p7/z, [z31.d, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sh { z31.d }, p7/z, [z31.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1sh { z31.s }, p7/z, [z31.s, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1sh { z31.s }, p7/z, [z31.s]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sw { z0.d }, p0/z, [z1.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sw { z31.d }, p7/z, [z31.d, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1sw { z31.d }, p7/z, [z31.d]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1w { z0.d }, p0/z, [z1.d]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1w { z0.s }, p0/z, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1w { z0.s }, p0/z, [z1.s]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1w { z21.s }, p5/z, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldnt1w { z23.s }, p3/z, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1w { z31.d }, p7/z, [z31.d, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - ldnt1w { z31.d }, p7/z, [z31.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1w { z31.s }, p7/z, [z31.s, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - ldnt1w { z31.s }, p7/z, [z31.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ldr p0, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ldr p5, [x10, #255, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - ldr p7, [x13, #-256, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr z0, [x0]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr z23, [x13, #255, mul vl]
-# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - - ldr z31, [sp, #-256, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.b, p0/m, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.b, p0/m, z0.b, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.b, z1.b, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.d, p0/m, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.h, p0/m, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.h, p0/m, z0.h, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.h, z1.h, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.s, p0/m, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.s, p0/m, z0.s, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z0.s, z1.s, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.b, p0/m, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.b, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.d, p0/m, z31.d, #63
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.d, z31.d, #63
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.h, p0/m, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.h, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.s, p0/m, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsl z31.s, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lslr z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lslr z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lslr z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lslr z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.b, p0/m, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.b, p0/m, z0.b, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.b, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.b, z1.b, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.d, p0/m, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.d, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.h, p0/m, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.h, p0/m, z0.h, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.h, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.h, z1.h, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.s, p0/m, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.s, p0/m, z0.s, z1.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.s, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z0.s, z1.s, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.b, p0/m, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.b, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.d, p0/m, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.d, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.h, p0/m, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.h, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.s, p0/m, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsr z31.s, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsrr z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsrr z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsrr z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - lsrr z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mad z0.b, p7/m, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mad z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mad z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mad z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - match p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - match p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - match p15.b, p7/z, z30.b, z31.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - match p15.h, p7/z, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla z0.b, p7/m, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla z0.d, z1.d, z7.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mla z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls z0.b, p7/m, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls z0.d, z1.d, z7.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mls z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - mov p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - mov p0.b, p0/m, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - mov p0.b, p0/z, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - mov p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - mov p15.b, p15/m, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - mov p15.b, p15/z, p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.b, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.b, b0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.b, p0/m, b0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.b, p0/m, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.b, p0/z, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.b, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, #0xe0000000000003ff
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, #0xffffffffffff7fff
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, #32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, d0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, p0/m, d0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, p0/m, x0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, x0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, #-256
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, #32767
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, h0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, p0/m, h0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, p0/m, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, p0/z, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.h, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.q, q0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.s, #0xffff7fff
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.s, #32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.s, p0/m, s0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.s, p0/m, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.s, s0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z0.s, w0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, p0/z, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, p0/z, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, p0/z, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, p0/z, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, p15/m, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.d, p15/m, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, p0/z, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, p0/z, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, p0/z, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, p0/z, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, p15/m, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.h, p15/m, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, p0/z, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, p0/z, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, p0/z, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, p0/z, #32512
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, p15/m, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z21.s, p15/m, #-32768
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.b, p15/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.b, p7/m, b31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movprfx z31, z6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.b, p7/m, wsp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.b, wsp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.b, z31.b[63]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.d, p15/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.d, p7/m, d31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - movprfx z31.d, p7/z, z6.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.d, p7/m, sp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.d, sp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.d, z31.d[7]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.h, p15/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.h, p7/m, h31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.h, p7/m, wsp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.h, wsp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.h, z31.h[31]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.s, p15/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.s, p7/m, s31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.s, p7/m, wsp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.s, wsp
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z31.s, z31.s[15]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.b, #-1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.b, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.b, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.b, p0/z, #-1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.b, p0/z, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.b, p0/z, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.b, p15/m, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.d, #-6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.h, #-6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.q, z17.q[3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mov z5.s, #-6
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - movs p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - movs p0.b, p0/z, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - movs p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - movs p15.b, p15/z, p15.b
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - mrs x3, ID_AA64ZFR0_EL1
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - mrs x3, ZCR_EL1
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - mrs x3, ZCR_EL12
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - mrs x3, ZCR_EL2
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - mrs x3, ZCR_EL3
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - msb z0.b, p7/m, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - msb z0.d, p7/m, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - msb z0.h, p7/m, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - msb z0.s, p7/m, z1.s, z31.s
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - msr ZCR_EL1, x3
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - msr ZCR_EL12, x3
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - msr ZCR_EL2, x3
-# CHECK-NEXT: - - 1.00 - - - - - - - - - - msr ZCR_EL3, x3
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.b, p7/m, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.b, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.d, z1.d, z15.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.h, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z29.s, z30.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.b, z31.b, #-128
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.b, z31.b, #127
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.d, z31.d, #-128
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.d, z31.d, #127
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.h, z31.h, #-128
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.h, z31.h, #127
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.s, z31.s, #-128
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - mul z31.s, z31.s, #127
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nand p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nand p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nands p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nands p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - nbsl z0.d, z0.d, z1.d, z2.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z0.b, p0/m, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - neg z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - nmatch p0.b, p0/z, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - nmatch p0.h, p0/z, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - nmatch p15.b, p7/z, z30.b, z31.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - nmatch p15.h, p7/z, z30.h, z31.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nor p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nor p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nors p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nors p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - not p0.b, p0/z, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - not p15.b, p15/z, p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - not z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - not z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - not z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - not z31.s, p7/m, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nots p0.b, p0/z, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - nots p15.b, p15/z, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - orn p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - orn p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - orns p0.b, p0/z, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - orns p15.b, p15/z, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - orr p0.b, p0/z, p0.b, p1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z0.d, z0.d, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z0.d, z0.d, #0xfffffffffffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z0.s, z0.s, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z0.s, z0.s, #0xfffffff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z23.d, z13.d, z8.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z23.h, z23.h, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z23.h, z23.h, #0xfff9
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z5.b, z5.b, #0x6
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - orr z5.b, z5.b, #0xf9
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - orrs p0.b, p0/z, p0.b, p1.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - orv b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - orv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - orv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - orv s0, p7, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pfalse p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pfirst p0.b, p15, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pfirst p15.b, p15, p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmul z0.b, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmul z29.b, z30.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmullb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 pmullb z29.q, z30.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 pmullb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - pmullt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 pmullt z29.q, z30.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 pmullt z31.d, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pnext p0.b, p15, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pnext p0.d, p15, p0.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pnext p0.h, p15, p0.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pnext p0.s, p15, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - pnext p15.b, p15, p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb #14, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb #15, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb #6, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb #7, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb #7, p3, [z13.s, #31]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb #7, p3, [z13.s]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl1keep, p0, [x0, z0.d, uxtw]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl1keep, p0, [x0, z0.d]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl1keep, p0, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl1strm, p0, [x0, #-32, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl1strm, p0, [x0, #31, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl3strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl3strm, p5, [x10, z21.d, sxtw]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl3strm, p5, [x10, z21.s, uxtw]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl3strm, p5, [z10.d, #31]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pldl3strm, p5, [z10.d]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pstl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pstl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pstl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pstl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pstl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfb pstl3strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #14, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #15, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #15, p7, [z31.d, #248]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #15, p7, [z31.d]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #15, p7, [z31.s, #248]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #15, p7, [z31.s]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #6, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd #7, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1keep, p0, [x0, z0.d, lsl #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1keep, p0, [x0, z0.d, uxtw #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1keep, p0, [x0, z0.s, sxtw #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1keep, p0, [x0, z0.s, uxtw #3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1strm, p0, [x0, #-32, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1strm, p0, [x0, #31, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pldl3strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pstl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pstl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pstl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pstl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pstl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfd pstl3strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #14, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #15, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #15, p7, [z31.d, #62]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #15, p7, [z31.d]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #15, p7, [z31.s, #62]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #15, p7, [z31.s]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #6, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh #7, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl1keep, p0, [x0, z0.d, lsl #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl1strm, p0, [x0, #-32, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl1strm, p0, [x0, #31, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl3strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl3strm, p5, [x10, z21.d, sxtw #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl3strm, p5, [x10, z21.d, uxtw #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl3strm, p5, [x10, z21.s, sxtw #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pldl3strm, p5, [x10, z21.s, uxtw #1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pstl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pstl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pstl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pstl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pstl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfh pstl3strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #14, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #15, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #15, p7, [z31.d, #124]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #15, p7, [z31.d]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #15, p7, [z31.s, #124]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #15, p7, [z31.s]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #6, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #7, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw #7, p3, [x13, z8.d, uxtw #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl1keep, p0, [x0, z0.d, sxtw #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl1keep, p0, [x0, z0.s, uxtw #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl1strm, p0, [x0, #-32, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl1strm, p0, [x0, #31, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl3strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl3strm, p5, [x10, z21.d, lsl #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pldl3strm, p5, [x10, z21.s, sxtw #2]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pstl1keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pstl1strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pstl2keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pstl2strm, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pstl3keep, p0, [x0]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - prfw pstl3strm, p0, [x0]
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptest p15, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptest p15, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p0.b, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p0.d, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p0.h, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p0.s, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p15.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #15
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #17
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #18
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #19
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #20
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #21
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #22
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #23
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #24
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #25
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #26
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #27
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, #28
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, mul3
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, mul4
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl128
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl256
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl3
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl32
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl4
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl5
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl6
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl64
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl7
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrue p7.s, vl8
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p0.b, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p0.d, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p0.h, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p0.s, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p15.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #15
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #17
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #18
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #19
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #20
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #21
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #22
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #23
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #24
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #25
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #26
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #27
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, #28
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, mul3
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, mul4
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl128
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl256
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl3
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl32
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl4
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl5
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl6
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl64
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl7
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - ptrues p7.s, vl8
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - punpkhi p0.h, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - punpkhi p15.h, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - punpklo p0.h, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - punpklo p15.h, p15.b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhnb z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhnb z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhnb z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhnt z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhnt z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - raddhnt z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rax1 z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rbit z0.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rbit z0.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rbit z0.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rbit z0.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - rdffr p0.b
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - rdffr p0.b, p0/z
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - rdffr p15.b
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - rdffr p15.b, p15/z
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - rdffrs p0.b, p0/z
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - rdffrs p15.b, p15/z
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rdvl x0, #0
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rdvl x21, #-32
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rdvl x23, #31
-# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - rdvl xzr, #-1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - rev p0.b, p1.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - rev p0.d, p1.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - rev p0.h, p1.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - rev p0.s, p1.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rev z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - revb z0.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - revb z0.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - revb z0.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - revh z0.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - revh z0.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - revw z0.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rshrnt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhnb z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhnb z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhnb z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhnt z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhnt z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - rsubhnt z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - saba z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - saba z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - saba z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - saba z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabalb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabalb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabalb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabalt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabalt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - sabalt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabd z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabd z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabd z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabd z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdlb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdlb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdlb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdlt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdlt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sabdlt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - sadalp z0.h, p0/m, z1.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - sadalp z29.s, p0/m, z30.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - sadalp z30.d, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlbt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlbt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlbt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddlt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - saddv d0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - saddv d0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - saddv d0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddwb z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddwb z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddwb z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddwt z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddwt z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - saddwt z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sbclb z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sbclb z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sbclt z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sbclt z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf z0.d, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf z0.h, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf z0.h, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf z0.s, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - scvtf z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - - - - - 23.00 sdiv z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 12.00 sdiv z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - - - 23.00 sdivr z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 12.00 sdivr z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot z0.d, z1.h, z15.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot z0.d, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot z0.s, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sdot z0.s, z1.b, z7.b[3]
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sel p0.b, p1, p2.b, p3.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sel z23.b, p11, z13.b, z8.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sel z23.d, p11, z13.d, z8.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sel z23.h, p11, z13.h, z8.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sel z23.s, p11, z13.s, z8.s
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - setffr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shrnt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsub z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsub z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsub z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsub z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsubr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsubr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsubr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - shsubr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z31.b, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z31.d, z31.d, #63
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z31.h, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sli z31.s, z31.s, #31
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm4e z0.s, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - - - 7.00 sm4ekey z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z0.b, z0.b, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z0.d, z0.d, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z0.h, z0.h, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z0.s, z0.s, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.b, z31.b, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.d, z31.d, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.h, z31.h, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smax z31.s, z31.s, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smaxp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - smaxv b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - smaxv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - smaxv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - smaxv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z0.b, z0.b, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z0.d, z0.d, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z0.h, z0.h, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z0.s, z0.s, #-128
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.b, z31.b, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.d, z31.d, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.h, z31.h, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - smin z31.s, z31.s, #127
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sminp z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sminp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sminp z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sminp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - sminv b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - sminv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - sminv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - sminv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalb z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalt z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlalt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslb z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslt z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smlslt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smmla z0.s, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z0.b, p7/m, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z0.b, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z0.h, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z29.s, z30.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smulh z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullb z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullt z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - smullt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z29.b, p7, { z30.b, z31.b }
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z29.d, p7, { z30.d, z31.d }
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z29.h, p7, { z30.h, z31.h }
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z29.s, p7, { z30.s, z31.s }
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z31.b, p7, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z31.d, p7, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z31.h, p7, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - splice z31.s, p7, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqabs z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.d, z0.d, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.h, z0.h, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.s, z0.s, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z31.d, z31.d, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z31.h, z31.h, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqadd z31.s, z31.s, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z0.b, z0.b, z0.b, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z0.d, z0.d, z0.d, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z0.h, z0.h, z0.h, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z0.s, z0.s, z0.s, #90
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z31.b, z31.b, z31.b, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z31.d, z31.d, z31.d, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z31.h, z31.h, z31.h, #270
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqcadd z31.s, z31.s, z31.s, #270
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecb x0, w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecd x0, w0, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecd z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecd z0.d, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecd z0.d, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecd z0.d, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdech x0, w0, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdech z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdech z0.h, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdech z0.h, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdech z0.h, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp x0, p0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp x0, p0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp x0, p0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp x0, p0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp xzr, p15.b, wzr
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp xzr, p15.d, wzr
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp xzr, p15.h, wzr
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqdecp xzr, p15.s, wzr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecp z0.d, p0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecp z0.h, p0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecp z0.s, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqdecw x0, w0, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecw z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecw z0.s, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecw z0.s, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqdecw z0.s, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalb z0.d, z1.s, z15.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalbt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalbt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalbt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalt z0.d, z1.s, z15.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlalt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslb z0.d, z1.s, z15.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslbt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslbt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslbt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslt z0.d, z1.s, z15.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmlslt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh z0.b, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh z0.d, z1.d, z15.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh z0.h, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh z29.s, z30.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmulh z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullb z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullt z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqdmullt z31.d, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincb x0, w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincd x0, w0, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincd z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincd z0.d, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincd z0.d, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincd z0.d, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqinch x0, w0, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqinch z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqinch z0.h, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqinch z0.h, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqinch z0.h, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp x0, p0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp x0, p0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp x0, p0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp x0, p0.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp xzr, p15.b, wzr
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp xzr, p15.d, wzr
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp xzr, p15.h, wzr
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - sqincp xzr, p15.s, wzr
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincp z0.d, p0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincp z0.h, p0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincp z0.s, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - sqincw x0, w0, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincw z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincw z0.s, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincw z0.s, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqincw z0.s, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg z31.b, p7/m, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqneg z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z0.b, z1.b, z2.b, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z0.d, z1.d, z2.d, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z0.h, z1.h, z2.h, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z0.h, z1.h, z2.h[0], #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z0.s, z1.s, z2.s, #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z0.s, z1.s, z2.s[0], #0
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z15.b, z16.b, z17.b, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z15.d, z16.d, z17.d, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z15.h, z16.h, z17.h, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z15.s, z16.s, z17.s, #270
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z29.b, z30.b, z31.b, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z29.d, z30.d, z31.d, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z29.h, z30.h, z31.h, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z29.s, z30.s, z31.s, #90
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z31.b, z31.b, z31.b, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z31.d, z31.d, z31.d, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z31.h, z30.h, z7.h[0], #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z31.h, z31.h, z31.h, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z31.s, z30.s, z7.s[0], #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdcmlah z31.s, z31.s, z31.s, #180
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah z0.d, z1.d, z15.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlah z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh z0.d, z1.d, z15.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmlsh z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh z0.b, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh z0.d, z1.d, z15.d[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh z0.h, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh z0.h, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh z0.s, z1.s, z7.s[3]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh z29.s, z30.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - sqrdmulh z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshl z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshlr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshlr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshlr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshlr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrnt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqrshrunt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z0.b, p0/m, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z0.d, p0/m, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z0.h, p0/m, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z0.s, p0/m, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z31.b, p0/m, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z31.d, p0/m, z31.d, #63
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z31.h, p0/m, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshl z31.s, p0/m, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z0.b, p0/m, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z0.d, p0/m, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z0.h, p0/m, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z0.s, p0/m, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z31.b, p0/m, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z31.d, p0/m, z31.d, #63
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z31.h, p0/m, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshlu z31.s, p0/m, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrnt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqshrunt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.d, z0.d, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.h, z0.h, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.s, z0.s, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z31.d, z31.d, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z31.h, z31.h, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsub z31.s, z31.s, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsubr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsubr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsubr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqsubr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtnb z0.b, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtnb z0.h, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtnb z0.s, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtnt z0.b, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtnt z0.h, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtnt z0.s, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtunb z0.b, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtunb z0.h, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtunb z0.s, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtunt z0.b, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtunt z0.h, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sqxtunt z0.s, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srhadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srhadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srhadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srhadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z0.b, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z0.d, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z0.h, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z0.s, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z31.b, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z31.d, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z31.h, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sri z31.s, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshl z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshlr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshlr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshlr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshlr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z0.b, p0/m, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z0.d, p0/m, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z0.h, p0/m, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z0.s, p0/m, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z31.b, p0/m, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z31.d, p0/m, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z31.h, p0/m, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - srshr z31.s, p0/m, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z0.b, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z0.d, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z0.h, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z0.s, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z31.b, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z31.d, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z31.h, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - srsra z31.s, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllb z0.d, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllb z0.h, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllb z0.s, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllb z31.d, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllb z31.h, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllb z31.s, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllt z0.d, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllt z0.h, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllt z0.s, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllt z31.d, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllt z31.h, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sshllt z31.s, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z0.b, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z0.d, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z0.h, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z0.s, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z31.b, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z31.d, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z31.h, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssra z31.s, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublbt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublbt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublbt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssublt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubltb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubltb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubltb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubwb z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubwb z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubwb z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubwt z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubwt z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ssubwt z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.b }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.b }, p0, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.d }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1b { z0.d }, p0, [x0, z0.d, sxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1b { z0.d }, p0, [x0, z0.d, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1b { z0.d }, p0, [x0, z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1b { z0.d }, p7, [z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.h }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.h }, p0, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.s }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1b { z0.s }, p0, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1b { z0.s }, p0, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z0.s }, p0, [x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1b { z0.s }, p7, [z0.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z21.b }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z21.d }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z21.h }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z21.s }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z31.b }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z31.d }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1b { z31.d }, p7, [z31.d, #31]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z31.h }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1b { z31.s }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1b { z31.s }, p7, [z31.s, #31]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1d { z0.d }, p0, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z0.d }, p0, [x0, z0.d, lsl #3]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z0.d }, p0, [x0, z0.d, sxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z0.d }, p0, [x0, z0.d, uxtw #3]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z0.d }, p0, [x0, z0.d, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z0.d }, p0, [x0, z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1d { z0.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z0.d }, p7, [z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1d { z21.d }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1d { z31.d }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1d { z31.d }, p7, [z31.d, #248]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z0.d }, p0, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z0.d }, p0, [x0, z0.d, lsl #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z0.d }, p0, [x0, z0.d, sxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z0.d }, p0, [x0, z0.d, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z0.d }, p0, [x0, z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z0.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z0.d }, p7, [z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z0.h }, p0, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z0.h }, p0, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z0.s }, p0, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1h { z0.s }, p0, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1h { z0.s }, p0, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z0.s }, p0, [x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1h { z0.s }, p7, [z0.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z21.d }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z21.h }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z21.s }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z31.d }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1h { z31.d }, p7, [z31.d, #62]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z31.h }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1h { z31.s }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1h { z31.s }, p7, [z31.s, #62]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z0.d }, p0, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z0.d }, p0, [x0, z0.d, lsl #2]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z0.d }, p0, [x0, z0.d, sxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z0.d }, p0, [x0, z0.d, uxtw #2]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z0.d }, p0, [x0, z0.d, uxtw]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z0.d }, p0, [x0, z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z0.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z0.d }, p7, [z0.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z0.s }, p0, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1w { z0.s }, p0, [x0, z0.s, sxtw]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1w { z0.s }, p0, [x0, z0.s, uxtw #2]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1w { z0.s }, p0, [x0, z0.s, uxtw]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z0.s }, p0, [x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1w { z0.s }, p7, [z0.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z21.d }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z21.s }, p5, [x10, #5, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z31.d }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - st1w { z31.d }, p7, [z31.d, #124]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - st1w { z31.s }, p7, [sp, #-1, mul vl]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - st1w { z31.s }, p7, [z31.s, #124]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2b { z0.b, z1.b }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2b { z0.b, z1.b }, p0, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2b { z23.b, z24.b }, p3, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2b { z5.b, z6.b }, p3, [x17, x16]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2d { z0.d, z1.d }, p0, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2d { z0.d, z1.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2d { z23.d, z24.d }, p3, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2d { z5.d, z6.d }, p3, [x17, x16, lsl #3]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2h { z0.h, z1.h }, p0, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2h { z0.h, z1.h }, p0, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2h { z23.h, z24.h }, p3, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2h { z5.h, z6.h }, p3, [x17, x16, lsl #1]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2w { z0.s, z1.s }, p0, [x0]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]
-# CHECK-NEXT: - - - - - 2.00 - - - - - - - st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3b { z0.b - z2.b }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3b { z0.b - z2.b }, p0, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3b { z21.b - z23.b }, p5, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3b { z23.b - z25.b }, p3, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3b { z5.b - z7.b }, p3, [x17, x16]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st3d { z0.d - z2.d }, p0, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st3d { z0.d - z2.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st3d { z21.d - z23.d }, p5, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st3d { z23.d - z25.d }, p3, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 3.00 - - - - - - - st3d { z5.d - z7.d }, p3, [x17, x16, lsl #3]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3h { z0.h - z2.h }, p0, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3h { z0.h - z2.h }, p0, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3h { z21.h - z23.h }, p5, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3h { z23.h - z25.h }, p3, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3h { z5.h - z7.h }, p3, [x17, x16, lsl #1]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3w { z0.s - z2.s }, p0, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3w { z0.s - z2.s }, p0, [x0]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3w { z21.s - z23.s }, p5, [x10, #15, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3w { z23.s - z25.s }, p3, [x13, #-24, mul vl]
-# CHECK-NEXT: - - - - - 6.00 - - - - - - - st3w { z5.s - z7.s }, p3, [x17, x16, lsl #2]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4b { z0.b - z3.b }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4b { z0.b - z3.b }, p0, [x0]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4b { z21.b - z24.b }, p5, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4b { z23.b - z26.b }, p3, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4b { z5.b - z8.b }, p3, [x17, x16]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4d { z0.d - z3.d }, p0, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4d { z0.d - z3.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4d { z21.d - z24.d }, p5, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4d { z23.d - z26.d }, p3, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 4.00 - - - - - - - st4d { z5.d - z8.d }, p3, [x17, x16, lsl #3]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4h { z0.h - z3.h }, p0, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4h { z0.h - z3.h }, p0, [x0]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4h { z21.h - z24.h }, p5, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4h { z23.h - z26.h }, p3, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4h { z5.h - z8.h }, p3, [x17, x16, lsl #1]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4w { z0.s - z3.s }, p0, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4w { z0.s - z3.s }, p0, [x0]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4w { z21.s - z24.s }, p5, [x10, #20, mul vl]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4w { z23.s - z26.s }, p3, [x13, #-32, mul vl]
-# CHECK-NEXT: - - - - - 8.00 - - - - - - - st4w { z5.s - z8.s }, p3, [x17, x16, lsl #2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1b { z0.b }, p0, [x0, x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1b { z0.b }, p0, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1b { z0.d }, p0, [z1.d]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1b { z0.s }, p0, [z1.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1b { z21.b }, p5, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1b { z23.b }, p3, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1b { z31.d }, p7, [z31.d, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1b { z31.d }, p7, [z31.d]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1b { z31.s }, p7, [z31.s, x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1b { z31.s }, p7, [z31.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1d { z0.d }, p0, [x0, x0, lsl #3]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1d { z0.d }, p0, [x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1d { z0.d }, p0, [z1.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1d { z21.d }, p5, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1d { z23.d }, p3, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1d { z31.d }, p7, [z31.d, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1d { z31.d }, p7, [z31.d]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1h { z0.d }, p0, [z1.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1h { z0.h }, p0, [x0, x0, lsl #1]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1h { z0.h }, p0, [x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1h { z0.s }, p0, [z1.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1h { z21.h }, p5, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1h { z23.h }, p3, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1h { z31.d }, p7, [z31.d, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1h { z31.d }, p7, [z31.d]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1h { z31.s }, p7, [z31.s, x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1h { z31.s }, p7, [z31.s]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1w { z0.d }, p0, [z1.d]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1w { z0.s }, p0, [x0, x0, lsl #2]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1w { z0.s }, p0, [x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1w { z0.s }, p0, [z1.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1w { z21.s }, p5, [x10, #7, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - stnt1w { z23.s }, p3, [x13, #-8, mul vl]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1w { z31.d }, p7, [z31.d, x0]
-# CHECK-NEXT: - - - - - 7.00 - - - - - - - stnt1w { z31.d }, p7, [z31.d]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1w { z31.s }, p7, [z31.s, x0]
-# CHECK-NEXT: - - - - - 9.00 - - - - - - - stnt1w { z31.s }, p7, [z31.s]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str p0, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str p15, [sp, #-256, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str p5, [x10, #255, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str z0, [x0]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str z21, [x10, #-256, mul vl]
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - str z31, [sp, #255, mul vl]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.d, z0.d, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.h, z0.h, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.s, z0.s, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.b, p5/m, z21.b, z10.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.b, z10.b, z21.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.d, p5/m, z21.d, z10.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.d, z10.d, z21.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.h, p5/m, z21.h, z10.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.h, z10.h, z21.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.s, p5/m, z21.s, z10.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z21.s, z10.s, z21.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.b, p3/m, z23.b, z13.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.b, z13.b, z8.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.d, p3/m, z23.d, z13.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.d, z13.d, z8.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.h, p3/m, z23.h, z13.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.h, z13.h, z8.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.s, p3/m, z23.s, z13.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z23.s, z13.s, z8.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.d, z31.d, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.h, z31.h, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.s, z31.s, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sub z31.s, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhnb z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhnb z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhnb z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhnt z0.b, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhnt z0.h, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subhnt z0.s, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.b, p0/m, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.d, p0/m, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.d, z0.d, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.h, p0/m, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.h, z0.h, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.s, p0/m, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z0.s, z0.s, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z31.d, z31.d, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z31.h, z31.h, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - subr z31.s, z31.s, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sunpkhi z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sunpkhi z31.h, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sunpkhi z31.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sunpklo z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sunpklo z31.h, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sunpklo z31.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - suqadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtb z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtb z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtb z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtb z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtb z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtb z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxth z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxth z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxth z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxth z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtw z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - sxtw z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 5.00 5.00 - - - tbl z28.b, { z29.b, z30.b }, z31.b
-# CHECK-NEXT: - - - - - - - - 5.00 5.00 - - - tbl z28.d, { z29.d, z30.d }, z31.d
-# CHECK-NEXT: - - - - - - - - 5.00 5.00 - - - tbl z28.h, { z29.h, z30.h }, z31.h
-# CHECK-NEXT: - - - - - - - - 5.00 5.00 - - - tbl z28.s, { z29.s, z30.s }, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbl z31.b, { z31.b }, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbl z31.d, { z31.d }, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbl z31.h, { z31.h }, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbl z31.s, { z31.s }, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbx z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbx z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbx z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - tbx z31.s, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn1 p15.b, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn1 p15.d, p15.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn1 p15.h, p15.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn1 p15.s, p15.s, p15.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn1 z31.s, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn2 p15.b, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn2 p15.d, p15.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn2 p15.h, p15.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - trn2 p15.s, p15.s, p15.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - trn2 z31.s, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uaba z0.b, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uaba z0.d, z1.d, z31.d
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uaba z0.h, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uaba z0.s, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabalb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabalb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabalb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabalt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabalt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - uabalt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabd z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabd z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabd z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabd z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdlb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdlb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdlb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdlt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdlt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uabdlt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - uadalp z0.h, p0/m, z1.b
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - uadalp z29.s, p0/m, z30.h
-# CHECK-NEXT: - - - - - - - - 4.00 4.00 - - - uadalp z30.d, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddlt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uaddv d0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uaddv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uaddv d0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uaddv d0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddwb z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddwb z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddwb z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddwt z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddwt z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uaddwt z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf z0.d, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf z0.h, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf z0.h, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf z0.s, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ucvtf z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - - - - - 23.00 udiv z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 12.00 udiv z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - - - 23.00 udivr z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - - - 12.00 udivr z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot z0.d, z1.h, z15.h[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot z0.d, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot z0.s, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - udot z0.s, z1.b, z7.b[3]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsub z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsub z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsub z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsub z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsubr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsubr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsubr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uhsubr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umax z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umaxp z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umaxp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umaxp z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umaxp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - umaxv b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - umaxv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - umaxv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - umaxv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin z31.b, p7/m, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin z31.d, p7/m, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin z31.h, p7/m, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - umin z31.s, p7/m, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uminp z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uminv b0, p7, z31.b
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uminv d0, p7, z31.d
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uminv h0, p7, z31.h
-# CHECK-NEXT: - - - - - - - - 1.00 - - - - uminv s0, p7, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalb z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalt z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlalt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslb z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslb z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslb z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslb z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslt z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslt z0.d, z1.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslt z0.h, z1.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslt z0.s, z1.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umlslt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ummla z0.s, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z0.b, p7/m, z0.b, z31.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z0.b, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z0.d, p7/m, z0.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z0.h, p7/m, z0.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z0.h, z1.h, z2.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z0.s, p7/m, z0.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z29.s, z30.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umulh z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullb z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullb z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullt z0.d, z1.s, z15.s[1]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullt z0.s, z1.h, z7.h[7]
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - umullt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.d, z0.d, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.h, z0.h, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.s, z0.s, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z31.d, z31.d, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z31.h, z31.h, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqadd z31.s, z31.s, #65280
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecb x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecd x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecd z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecd z0.d, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecd z0.d, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecd z0.d, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdech x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdech z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdech z0.h, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdech z0.h, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdech z0.h, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp wzr, p15.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp wzr, p15.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp wzr, p15.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp wzr, p15.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp x0, p0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp x0, p0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp x0, p0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqdecp x0, p0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecp z0.d, p0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecp z0.h, p0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecp z0.s, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqdecw x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecw z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecw z0.s, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecw z0.s, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqdecw z0.s, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincb x0, vl1
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincd x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincd z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincd z0.d, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincd z0.d, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincd z0.d, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqinch x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqinch z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqinch z0.h, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqinch z0.h, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqinch z0.h, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp wzr, p15.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp wzr, p15.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp wzr, p15.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp wzr, p15.s
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp x0, p0.b
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp x0, p0.d
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp x0, p0.h
-# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - uqincp x0, p0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincp z0.d, p0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincp z0.h, p0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincp z0.s, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw w0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw w0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw w0, pow2, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw x0, #14
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw x0, all, mul #16
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw x0, pow2
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uqincw x0, vl1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincw z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincw z0.s, all, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincw z0.s, pow2
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqincw z0.s, pow2, mul #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshl z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshlr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshlr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshlr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshlr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqrshrnt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z0.b, p0/m, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z0.d, p0/m, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z0.h, p0/m, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z0.s, p0/m, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z31.b, p0/m, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z31.d, p0/m, z31.d, #63
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z31.h, p0/m, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshl z31.s, p0/m, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshlr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshlr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshlr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshlr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnb z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnb z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnb z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnb z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnb z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnb z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnt z0.b, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnt z0.h, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnt z0.s, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnt z31.b, z31.h, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnt z31.h, z31.s, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqshrnt z31.s, z31.d, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.b, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.d, z0.d, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.d, z0.d, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.h, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.h, z0.h, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.s, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.s, z0.s, #0, lsl #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z31.b, z31.b, #255
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z31.d, z31.d, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z31.h, z31.h, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsub z31.s, z31.s, #65280
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsubr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsubr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsubr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqsubr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtnb z0.b, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtnb z0.h, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtnb z0.s, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtnt z0.b, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtnt z0.h, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uqxtnt z0.s, z31.d
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - urecpe z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urhadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshl z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshlr z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshlr z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshlr z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshlr z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z0.b, p0/m, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z0.d, p0/m, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z0.h, p0/m, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z0.s, p0/m, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z31.b, p0/m, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z31.d, p0/m, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z31.h, p0/m, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - urshr z31.s, p0/m, z31.s, #32
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - ursqrte z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z0.b, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z0.d, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z0.h, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z0.s, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z31.b, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z31.d, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z31.h, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 3.00 3.00 - - - ursra z31.s, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllb z0.d, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllb z0.h, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllb z0.s, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllb z31.d, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllb z31.h, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllb z31.s, z31.h, #15
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllt z0.d, z0.s, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllt z0.h, z0.b, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllt z0.s, z0.h, #0
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllt z31.d, z31.s, #31
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllt z31.h, z31.b, #7
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - ushllt z31.s, z31.h, #15
-# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - usmmla z0.s, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd z0.b, p0/m, z0.b, z1.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd z0.h, p0/m, z0.h, z1.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd z29.s, p7/m, z29.s, z30.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usqadd z31.d, p7/m, z31.d, z30.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z0.b, z0.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z0.d, z0.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z0.h, z0.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z0.s, z0.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z31.b, z31.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z31.d, z31.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z31.h, z31.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usra z31.s, z31.s, #32
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usublb z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usublb z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usublb z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usublt z0.h, z1.b, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usublt z29.s, z30.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usublt z31.d, z31.s, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubwb z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubwb z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubwb z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubwt z0.h, z1.h, z2.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubwt z29.s, z30.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - usubwt z31.d, z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uunpkhi z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uunpkhi z31.h, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uunpkhi z31.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uunpklo z31.d, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uunpklo z31.h, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uunpklo z31.s, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtb z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtb z0.h, p0/m, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtb z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtb z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtb z31.h, p7/m, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtb z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxth z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxth z0.s, p0/m, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxth z31.d, p7/m, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxth z31.s, p7/m, z31.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtw z0.d, p0/m, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uxtw z31.d, p7/m, z31.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp1 p15.b, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp1 p15.d, p15.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp1 p15.h, p15.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp1 p15.s, p15.s, p15.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp1 z31.s, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp2 p15.b, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp2 p15.d, p15.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp2 p15.h, p15.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - uzp2 p15.s, p15.s, p15.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - uzp2 z31.s, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.b, w0, wzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.b, wzr, w0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.b, x0, xzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.b, xzr, x0
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.d, w0, wzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.d, x0, xzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.h, w0, wzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.h, x0, xzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.s, w0, wzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilege p15.s, x0, xzr
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilerw p15.b, x30, x30
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilerw p15.d, x30, x30
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilerw p15.h, x30, x30
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilerw p15.s, x30, x30
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilewr p15.b, x30, x30
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilewr p15.d, x30, x30
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilewr p15.h, x30, x30
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - whilewr p15.s, x30, x30
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - wrffr p0.b
-# CHECK-NEXT: - - - - - 1.00 - - - - - - - wrffr p15.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z0.b, z0.b, z1.b, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z0.d, z0.d, z1.d, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z0.h, z0.h, z1.h, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z0.s, z0.s, z1.s, #1
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z31.b, z31.b, z30.b, #8
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z31.d, z31.d, z30.d, #64
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z31.h, z31.h, z30.h, #16
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - xar z31.s, z31.s, z30.s, #32
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p0.b, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p0.d, p0.d, p0.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p0.h, p0.h, p0.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p0.s, p0.s, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p15.b, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p15.d, p15.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p15.h, p15.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip1 p15.s, p15.s, p15.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip1 z31.s, z31.s, z31.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p0.b, p0.b, p0.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p0.d, p0.d, p0.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p0.h, p0.h, p0.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p0.s, p0.s, p0.s
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p15.b, p15.b, p15.b
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p15.d, p15.d, p15.d
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p15.h, p15.h, p15.h
-# CHECK-NEXT: 1.00 - - - - - - - - - - - - zip2 p15.s, p15.s, p15.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z0.b, z0.b, z0.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z0.d, z0.d, z0.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z0.h, z0.h, z0.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z0.s, z0.s, z0.s
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z31.b, z31.b, z31.b
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z31.d, z31.d, z31.d
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z31.h, z31.h, z31.h
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - zip2 z31.s, z31.s, z31.s
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5.0] [5.1] [6] [7.0] [7.1] [7.2] [8.0] [8.1] [9] [10.0] [10.1] [10.2] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z0.b, p0/m, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - abs z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - adclb z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - adclb z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - adclt z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - adclt z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z0.s, z1.s, z2.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.b, z10.b, z21.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.d, z10.d, z21.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.h, z10.h, z21.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z21.s, z10.s, z21.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.b, z13.b, z8.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.h, z13.h, z8.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z23.s, z13.s, z8.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - add z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp z0.b, p0/m, z0.b, z1.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp z0.h, p0/m, z0.h, z1.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp z29.s, p7/m, z29.s, z30.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - addp z31.d, p7/m, z31.d, z30.d
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addpl sp, sp, #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addpl x0, x0, #-32
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addpl x21, x21, #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addpl x23, x8, #-1
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addvl sp, sp, #31
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addvl x0, x0, #-32
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addvl x21, x21, #0
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - addvl x23, x8, #-1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, lsl #1]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - adr z0.d, [z0.d, z0.d, lsl #3]
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmls z0.h, p7/m, z1.h, z31.h
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - fmlslb z0.s, z1.h, z7.h[0]
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - fmov z0.d, p0/m, #-10.00000000
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - lsl z0.h, z0.h, #0
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - lsl z31.s, p0/m, z31.s, #31
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - lsr z31.s, p0/m, z31.s, #32
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+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov p0.b, p0/m, p0.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov p0.b, p0/z, p0.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov p15.b, p15.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov p15.b, p15/m, p15.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mov p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.b, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.b, b0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.b, p0/m, b0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.b, p0/m, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.b, p0/z, #127
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.b, w0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.d, #0xe0000000000003ff
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.d, #0xffffffffffff7fff
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.d, #32768
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - mov z0.d, d0
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+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mrs x3, ZCR_EL12
+# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mrs x3, ZCR_EL2
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stnt1h { z0.h }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 9.00 - - - - - - - stnt1h { z0.s }, p0, [z1.s]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stnt1h { z21.h }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stnt1h { z23.h }, p3, [x13, #-8, mul vl]
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 9.00 - - - - - - - stnt1h { z31.s }, p7, [z31.s]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 - - - - - - - stnt1w { z0.d }, p0, [z1.d]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stnt1w { z0.s }, p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 9.00 - - - - - - - stnt1w { z0.s }, p0, [z1.s]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stnt1w { z21.s }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - stnt1w { z23.s }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 - - - - - - - stnt1w { z31.d }, p7, [z31.d, x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 7.00 - - - - - - - stnt1w { z31.d }, p7, [z31.d]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 9.00 - - - - - - - stnt1w { z31.s }, p7, [z31.s, x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 9.00 - - - - - - - stnt1w { z31.s }, p7, [z31.s]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str p0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str p15, [sp, #-256, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str p5, [x10, #255, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str z0, [x0]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str z21, [x10, #-256, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - str z31, [sp, #255, mul vl]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.d, p0/m, z0.d, z0.d
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.b, z10.b, z21.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.d, z10.d, z21.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.h, z10.h, z21.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z21.s, z10.s, z21.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.b, z13.b, z8.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.h, z13.h, z8.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z23.s, z13.s, z8.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - sub z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subhnb z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subhnb z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subhnb z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subhnt z0.b, z1.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subhnt z0.h, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subhnt z0.s, z1.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - subr z0.s, z0.s, #0, lsl #8
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+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xar z0.s, z0.s, z1.s, #1
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xar z31.b, z31.b, z30.b, #8
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xar z31.d, z31.d, z30.d, #64
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xar z31.h, z31.h, z30.h, #16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - xar z31.s, z31.s, z30.s, #32
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p0.b, p0.b, p0.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p0.d, p0.d, p0.d
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p0.h, p0.h, p0.h
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p0.s, p0.s, p0.s
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip1 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p0.b, p0.b, p0.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p0.d, p0.d, p0.d
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p0.h, p0.h, p0.h
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p0.s, p0.s, p0.s
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - zip2 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.50 0.50 - - - zip2 z31.s, z31.s, z31.s
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-streaming-cme-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-streaming-cme-instructions.s
index 140c9422d0a3f..889e49d0aea77 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-streaming-cme-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-streaming-cme-instructions.s
@@ -56,8 +56,6 @@
# NONSTREAMING-NEXT: 1 4 0.17 sadalp z0.d, p0/m, z1.s
# NONSTREAMING-NEXT: 1 4 0.17 ssra z0.d, z1.d, #1
# NONSTREAMING-NEXT: 1 4 0.25 mla z0.d, p0/m, z1.d, z2.d
-# NONSTREAMING-NEXT: 1 4 0.17 bfmlslb z0.s, z1.h, z2.h
-# NONSTREAMING-NEXT: 1 4 0.17 fdot z0.s, z1.h, z2.h
# NONSTREAMING-NEXT: 1 7 1.00 index z0.s, w0, #1
# NONSTREAMING-NEXT: 1 7 1.00 index z0.s, #0, w0
# NONSTREAMING-NEXT: 1 7 1.00 index z0.s, w0, w1
@@ -65,7 +63,6 @@
# NONSTREAMING-NEXT: 1 3 1.00 lasta d0, p7, z31.d
# NONSTREAMING-NEXT: 1 4 0.33 faddv d0, p0, z1.d
# NONSTREAMING-NEXT: 1 4 0.33 fmaxnmv d0, p0, z1.d
-# NONSTREAMING-NEXT: 1 2 1.00 psel p0, p0, p0.b[w12, 0]
# NONSTREAMING-NEXT: 1 8 1.00 sqcvtn z0.h, { z0.s, z1.s }
# NONSTREAMING-NEXT: 1 8 0.75 uaddv d0, p7, z31.b
@@ -105,8 +102,6 @@
# STREAMING-NEXT: 1 8 1.00 sadalp z0.d, p0/m, z1.s
# STREAMING-NEXT: 1 8 1.00 ssra z0.d, z1.d, #1
# STREAMING-NEXT: 1 4 0.50 mla z0.d, p0/m, z1.d, z2.d
-# STREAMING-NEXT: 1 4 1.00 bfmlslb z0.s, z1.h, z2.h
-# STREAMING-NEXT: 1 4 1.00 fdot z0.s, z1.h, z2.h
# STREAMING-NEXT: 1 4 1.00 index z0.s, w0, #1
# STREAMING-NEXT: 1 4 1.00 index z0.s, #0, w0
# STREAMING-NEXT: 1 12 2.50 index z0.s, w0, w1
@@ -114,7 +109,6 @@
# STREAMING-NEXT: 1 4 1.00 lasta d0, p7, z31.d
# STREAMING-NEXT: 1 16 1.50 faddv d0, p0, z1.d
# STREAMING-NEXT: 1 16 1.50 fmaxnmv d0, p0, z1.d
-# STREAMING-NEXT: 1 4 2.00 psel p0, p0, p0.b[w12, 0]
# STREAMING-NEXT: 1 8 1.00 sqcvtn z0.h, { z0.s, z1.s }
# STREAMING-NEXT: 1 12 1.50 uaddv d0, p7, z31.b
@@ -212,11 +206,11 @@
# NONSTREAMING: Resource pressure per iteration:
# NONSTREAMING-NEXT: [0.0] [0.1] [0.2] [1] [2] [3] [4] [5] [6] [7] [8.0] [8.1] [8.2] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17.0] [17.1] [17.2] [17.3] [18.0] [18.1] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34]
-# NONSTREAMING-NEXT: - - - - - - - 1.00 1.00 - - - - - 1.00 - - 1.00 - - - - - - - - 1.50 1.50 4.00 4.00 10.13 1.13 0.13 0.13 0.13 0.13 0.13 0.13 11.08 13.08 4.83 7.08 7.08 4.83
+# NONSTREAMING-NEXT: - - - - - - - 1.00 1.00 - - - - - 1.00 - - 1.00 - - - - - - - - 1.50 1.50 4.00 4.00 9.13 0.13 0.13 0.13 0.13 0.13 0.13 0.13 10.75 12.75 4.50 6.75 6.75 4.50
# STREAMING: Resource pressure per iteration:
# STREAMING-NEXT: [0.0] [0.1] [0.2] [1] [2] [3] [4] [5] [6] [7] [8.0] [8.1] [8.2] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17.0] [17.1] [17.2] [17.3] [18.0] [18.1] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34]
-# STREAMING-NEXT: - - - 4.00 - 2.00 - 20.50 9.50 - - - - 3.00 21.50 1.00 1.50 17.50 1.00 1.50 - - - - - - 1.25 1.25 3.75 3.75 5.63 2.63 0.13 0.13 0.13 0.13 0.13 0.13 3.67 3.67 0.17 0.17 0.17 0.17
+# STREAMING-NEXT: - - - 4.00 - - - 19.50 8.50 - - - - 3.00 21.50 1.00 1.50 17.50 1.00 1.50 - - - - - - 1.25 1.25 3.75 3.75 3.63 0.63 0.13 0.13 0.13 0.13 0.13 0.13 3.67 3.67 0.17 0.17 0.17 0.17
# NONSTREAMING: Resource pressure by instruction:
# NONSTREAMING-NEXT: [0.0] [0.1] [0.2] [1] [2] [3] [4] [5] [6] [7] [8.0] [8.1] [8.2] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17.0] [17.1] [17.2] [17.3] [18.0] [18.1] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] Instructions:
@@ -255,8 +249,6 @@
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 sadalp z0.d, p0/m, z1.s
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 ssra z0.d, z1.d, #1
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.25 0.25 - 0.25 0.25 - mla z0.d, p0/m, z1.d, z2.d
-# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 bfmlslb z0.s, z1.h, z2.h
-# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 fdot z0.s, z1.h, z2.h
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - 0.25 0.25 - 0.25 0.25 - index z0.s, w0, #1
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - 0.25 0.25 - 0.25 0.25 - index z0.s, #0, w0
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - - - - 0.25 0.25 - 0.25 0.25 - index z0.s, w0, w1
@@ -264,7 +256,6 @@
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 - - - - lasta d0, p7, z31.d
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 faddv d0, p0, z1.d
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 fmaxnmv d0, p0, z1.d
-# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - - - - - - - - - - psel p0, p0, p0.b[w12, 0]
# NONSTREAMING-NEXT: - - - - - - - 1.00 1.00 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - sqcvtn z0.h, { z0.s, z1.s }
# NONSTREAMING-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.92 0.92 0.17 0.92 0.92 0.17 uaddv d0, p7, z31.b
@@ -305,8 +296,6 @@
# STREAMING-NEXT: - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - sadalp z0.d, p0/m, z1.s
# STREAMING-NEXT: - - - - - - - - - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - ssra z0.d, z1.d, #1
# STREAMING-NEXT: - - - - - - - - - - - - - - - - 0.50 - - 0.50 - - - - - - - - - - - - - - - - - - - - - - - - mla z0.d, p0/m, z1.d, z2.d
-# STREAMING-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bfmlslb z0.s, z1.h, z2.h
-# STREAMING-NEXT: - - - - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - fdot z0.s, z1.h, z2.h
# STREAMING-NEXT: - - - - - - - 1.00 - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - index z0.s, w0, #1
# STREAMING-NEXT: - - - - - - - 1.00 - - - - - - 1.00 - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - index z0.s, #0, w0
# STREAMING-NEXT: - - - - - - - 2.50 2.50 - - - - - 3.00 - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - index z0.s, w0, w1
@@ -314,6 +303,5 @@
# STREAMING-NEXT: - - - - - - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - lasta d0, p7, z31.d
# STREAMING-NEXT: - - - - - - - 1.50 1.50 - - - - - 1.50 - - 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - faddv d0, p0, z1.d
# STREAMING-NEXT: - - - - - - - 1.00 - - - - - - 1.50 - - 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - fmaxnmv d0, p0, z1.d
-# STREAMING-NEXT: - - - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - - - - - - 2.00 2.00 - - - - - - - - - - - - psel p0, p0, p0.b[w12, 0]
# STREAMING-NEXT: - - - - - - - 1.00 1.00 - - - - - 1.00 - - 1.00 - - - - - - - - - - - - - - - - - - - - - - - - - - sqcvtn z0.h, { z0.s, z1.s }
# STREAMING-NEXT: - - - - - - - 1.00 - - - - - - 1.50 - - 1.50 - - - - - - - - - - - - - - - - - - - - - - - - - - uaddv d0, p7, z31.b
diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-sme-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-sme-instructions.s
new file mode 100644
index 0000000000000..1045dc3daac38
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-sme-instructions.s
@@ -0,0 +1,71 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=c1-ultra -instruction-tables -mattr=+sme2p2,+fp8,+sve-b16b16,+sme-b16b16,+sme-f64f64,+faminmax,+sme-f8f32,+sme-lutv2,+f64mm < %p/../Inputs/sve-sme-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 4 0.17 bfmlslb z0.s, z1.h, z2.h
+# CHECK-NEXT: 1 4 0.17 fdot z0.s, z1.h, z2.h
+# CHECK-NEXT: 1 2 1.00 psel p0, p0, p0.b[w12, 0]
+
+# CHECK: Resources:
+# CHECK-NEXT: [0.0] - C1UUnitB
+# CHECK-NEXT: [0.1] - C1UUnitB
+# CHECK-NEXT: [0.2] - C1UUnitB
+# CHECK-NEXT: [1] - C1UUnitCMELD
+# CHECK-NEXT: [2] - C1UUnitCMEMC
+# CHECK-NEXT: [3] - C1UUnitCMEMML0
+# CHECK-NEXT: [4] - C1UUnitCMEMML1
+# CHECK-NEXT: [5] - C1UUnitCMEPERMF
+# CHECK-NEXT: [6] - C1UUnitCMEPERMS
+# CHECK-NEXT: [7] - C1UUnitCMEPF
+# CHECK-NEXT: [8.0] - C1UUnitCMERNMRET
+# CHECK-NEXT: [8.1] - C1UUnitCMERNMRET
+# CHECK-NEXT: [8.2] - C1UUnitCMERNMRET
+# CHECK-NEXT: [9] - C1UUnitCMEST
+# CHECK-NEXT: [10] - C1UUnitCMEVX0ALU
+# CHECK-NEXT: [11] - C1UUnitCMEVX0FPDOT
+# CHECK-NEXT: [12] - C1UUnitCMEVX0MUL
+# CHECK-NEXT: [13] - C1UUnitCMEVX1ALU
+# CHECK-NEXT: [14] - C1UUnitCMEVX1FPDOT
+# CHECK-NEXT: [15] - C1UUnitCMEVX1MUL
+# CHECK-NEXT: [16.0] - C1UUnitD
+# CHECK-NEXT: [16.1] - C1UUnitD
+# CHECK-NEXT: [17.0] - C1UUnitFlg
+# CHECK-NEXT: [17.1] - C1UUnitFlg
+# CHECK-NEXT: [17.2] - C1UUnitFlg
+# CHECK-NEXT: [17.3] - C1UUnitFlg
+# CHECK-NEXT: [18.0] - C1UUnitL23
+# CHECK-NEXT: [18.1] - C1UUnitL23
+# CHECK-NEXT: [19] - C1UUnitLS0
+# CHECK-NEXT: [20] - C1UUnitLS1
+# CHECK-NEXT: [21] - C1UUnitM0
+# CHECK-NEXT: [22] - C1UUnitM1
+# CHECK-NEXT: [23] - C1UUnitS0
+# CHECK-NEXT: [24] - C1UUnitS1
+# CHECK-NEXT: [25] - C1UUnitS2
+# CHECK-NEXT: [26] - C1UUnitS3
+# CHECK-NEXT: [27] - C1UUnitS4
+# CHECK-NEXT: [28] - C1UUnitS5
+# CHECK-NEXT: [29] - C1UUnitV0
+# CHECK-NEXT: [30] - C1UUnitV1
+# CHECK-NEXT: [31] - C1UUnitV2
+# CHECK-NEXT: [32] - C1UUnitV3
+# CHECK-NEXT: [33] - C1UUnitV4
+# CHECK-NEXT: [34] - C1UUnitV5
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0.0] [0.1] [0.2] [1] [2] [3] [4] [5] [6] [7] [8.0] [8.1] [8.2] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17.0] [17.1] [17.2] [17.3] [18.0] [18.1] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34]
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0.0] [0.1] [0.2] [1] [2] [3] [4] [5] [6] [7] [8.0] [8.1] [8.2] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17.0] [17.1] [17.2] [17.3] [18.0] [18.1] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] Instructions:
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 bfmlslb z0.s, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.17 0.17 0.17 0.17 0.17 0.17 fdot z0.s, z1.h, z2.h
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 1.00 1.00 - - - - - - - - - - - - psel p0, p0, p0.b[w12, 0]
diff --git a/llvm/test/tools/llvm-mca/AArch64/Inputs/streaming-cme-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Inputs/streaming-cme-instructions.s
index 94364f6a76c49..892360151d8fb 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Inputs/streaming-cme-instructions.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Inputs/streaming-cme-instructions.s
@@ -36,8 +36,6 @@ sabalb z0.s, z1.h, z2.h
sadalp z0.d, p0/m, z1.s
ssra z0.d, z1.d, #1
mla z0.d, p0/m, z1.d, z2.d
-bfmlslb z0.s, z1.h, z2.h
-fdot z0.s, z1.h, z2.h
index z0.s, w0, #1
index z0.s, #0, w0
index z0.s, w0, w1
@@ -45,6 +43,5 @@ insr z0.s, w0
lasta d0, p7, z31.d
faddv d0, p0, z1.d
fmaxnmv d0, p0, z1.d
-psel p0, p0, p0.b[w12, 0]
sqcvtn z0.h, { z0.s, z1.s }
uaddv d0, p7, z31.b
diff --git a/llvm/test/tools/llvm-mca/AArch64/Inputs/sve-sme-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Inputs/sve-sme-instructions.s
new file mode 100644
index 0000000000000..7d45a201876ed
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/AArch64/Inputs/sve-sme-instructions.s
@@ -0,0 +1,5 @@
+// SVE instructions added by SME and available when not in Streaming SVE mode
+
+bfmlslb z0.s, z1.h, z2.h
+fdot z0.s, z1.h, z2.h
+psel p0, p0, p0.b[w12, 0]