[llvm] [IR] Add storermw instruction (PR #207048)

[via llvm-commits]

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@@ -118,9 +118,9 @@ ordering; see {ref}`Atomic orderings`.
 non-atomic loads and stores, but provide additional guarantees in situations
 where threads and signals are involved.
 
-`cmpxchg` and `atomicrmw` are essentially like an atomic load followed by an
-atomic store (where the store is conditional for `cmpxchg`), but no other
-memory operation can happen on any thread between the load and store.
+`cmpxchg`, `atomicrmw`, and `storermw` are essentially like an atomic load
+followed by an atomic store (where the store is conditional for `cmpxchg`),
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gonzalobg wrote:

That may be a different way to loosely translate that sentence, but `storermw` is a read-modify-write, so it is very much a read, and read-modify-writes do provide memory ordering.

https://github.com/llvm/llvm-project/pull/207048