[llvm] [X86] Fix inline asm modifier printing across dialects (PR #204558)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 1 23:19:23 PDT 2026


https://github.com/ayrai-gb updated https://github.com/llvm/llvm-project/pull/204558

>From aae668e2f1ca4dfeeabe02d1af797bf6173544fb Mon Sep 17 00:00:00 2001
From: Ayush Rai <your-email at amd.com>
Date: Thu, 18 Jun 2026 16:28:32 +0530
Subject: [PATCH 1/2] [X86] Fix Intel %a/%A inline asm modifiers

---
 llvm/lib/Target/X86/X86AsmPrinter.cpp |  8 +++--
 llvm/test/CodeGen/X86/asm-modifier.ll | 46 +++++++++++++++++++++++++++
 2 files changed, 51 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp
index 6d213b8c213aa..8a9180d42b054 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp
@@ -756,6 +756,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
     if (ExtraCode[1] != 0) return true; // Unknown modifier.
 
     const MachineOperand &MO = MI->getOperand(OpNo);
+    const bool IsIntel = MI->getInlineAsmDialect() == InlineAsm::AD_Intel;
 
     switch (ExtraCode[0]) {
     default:
@@ -778,9 +779,9 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
           O << "(%rip)";
         return false;
       case MachineOperand::MO_Register:
-        O << '(';
+        O << (IsIntel ? '[' : '(');
         PrintOperand(MI, OpNo, O);
-        O << ')';
+        O << (IsIntel ? ']' : ')');
         return false;
       }
 
@@ -804,7 +805,8 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
 
     case 'A': // Print '*' before a register (it must be a register)
       if (MO.isReg()) {
-        O << '*';
+        if (!IsIntel)
+          O << '*';
         PrintOperand(MI, OpNo, O);
         return false;
       }
diff --git a/llvm/test/CodeGen/X86/asm-modifier.ll b/llvm/test/CodeGen/X86/asm-modifier.ll
index e1aac95a1ff6a..b2649d8e530ea 100644
--- a/llvm/test/CodeGen/X86/asm-modifier.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier.ll
@@ -53,6 +53,52 @@ define dso_local void @test_a_p(ptr %p) nounwind {
   ret void
 }
 
+define dso_local void @test_a_reg_intel(ptr %p) nounwind {
+; X86-LABEL: test_a_reg_intel:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    #APP
+; X86-EMPTY:
+; X86-NEXT:    #TEST [eax]
+; X86-EMPTY:
+; X86-NEXT:    #NO_APP
+; X86-NEXT:    retl
+;
+; X64-LABEL: test_a_reg_intel:
+; X64:       # %bb.0:
+; X64-NEXT:    #APP
+; X64-EMPTY:
+; X64-NEXT:    #TEST [rdi]
+; X64-EMPTY:
+; X64-NEXT:    #NO_APP
+; X64-NEXT:    retq
+  tail call void asm sideeffect inteldialect "#TEST ${0:a}", "r,~{dirflag},~{fpsr},~{flags}"(ptr %p)
+  ret void
+}
+
+define dso_local void @test_A_reg_intel(ptr %p) nounwind {
+; X86-LABEL: test_A_reg_intel:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    #APP
+; X86-EMPTY:
+; X86-NEXT:    #TEST eax
+; X86-EMPTY:
+; X86-NEXT:    #NO_APP
+; X86-NEXT:    retl
+;
+; X64-LABEL: test_A_reg_intel:
+; X64:       # %bb.0:
+; X64-NEXT:    #APP
+; X64-EMPTY:
+; X64-NEXT:    #TEST rdi
+; X64-EMPTY:
+; X64-NEXT:    #NO_APP
+; X64-NEXT:    retq
+  tail call void asm sideeffect inteldialect "#TEST ${0:A}", "r,~{dirflag},~{fpsr},~{flags}"(ptr %p)
+  ret void
+}
+
 define dso_local void @test_c() nounwind {
 ; CHECK-LABEL: test_c:
 ; CHECK:       # %bb.0:

>From 425537eaf870d660b107e4541c7d1cc08d7c0431 Mon Sep 17 00:00:00 2001
From: Ayush Rai <your-email at amd.com>
Date: Thu, 18 Jun 2026 16:32:36 +0530
Subject: [PATCH 2/2] [X86] Fix %P inline asm displacement printing

---
 llvm/lib/Target/X86/X86AsmPrinter.cpp |  4 ++++
 llvm/test/CodeGen/X86/asm-modifier.ll | 18 ++++++++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp
index 8a9180d42b054..5298293637e43 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp
@@ -433,6 +433,10 @@ void X86AsmPrinter::PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
   if (HasBaseReg && Modifier == "no-rip" && BaseReg.getReg() == X86::RIP)
     HasBaseReg = false;
 
+  // If we really just want to print out displacement.
+  if ((DispSpec.isGlobal() || DispSpec.isSymbol()) && Modifier == "disp-only")
+    HasBaseReg = false;
+
   // HasParenPart - True if we will print out the () part of the mem ref.
   bool HasParenPart = IndexReg.getReg() || HasBaseReg;
 
diff --git a/llvm/test/CodeGen/X86/asm-modifier.ll b/llvm/test/CodeGen/X86/asm-modifier.ll
index b2649d8e530ea..26155f0d28ee3 100644
--- a/llvm/test/CodeGen/X86/asm-modifier.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier.ll
@@ -99,6 +99,24 @@ define dso_local void @test_A_reg_intel(ptr %p) nounwind {
   ret void
 }
 
+define dso_local void @test_P_disp_only_global_base(i64 %idx) nounwind {
+; X64-LABEL: test_P_disp_only_global_base:
+; X64:       # %bb.0:
+; X64-NEXT:    #APP
+; X64-NEXT:    #TEST var
+; X64-NEXT:    #NO_APP
+; X64-NEXT:    #APP
+; X64-EMPTY:
+; X64-NEXT:    #TEST [var]
+; X64-EMPTY:
+; X64-NEXT:    #NO_APP
+; X64-NEXT:    retq
+  %addr = getelementptr i8, ptr @var, i64 %idx
+  tail call void asm sideeffect "#TEST ${0:P}", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i8) %addr)
+  tail call void asm sideeffect inteldialect "#TEST ${0:P}", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i8) %addr)
+  ret void
+}
+
 define dso_local void @test_c() nounwind {
 ; CHECK-LABEL: test_c:
 ; CHECK:       # %bb.0:



More information about the llvm-commits mailing list