[llvm] [NVPTX] Cleanup support for atomic loads/stores (PR #201468)

[Akshay Deodhar via llvm-commits]

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@@ -7600,11 +7600,37 @@ NVPTXTargetLowering::shouldExpandAtomicRMWInIR(const AtomicRMWInst *AI) const {
   return AtomicExpansionKind::CmpXChg;
 }
 
+// clang-format off
+// Atomic load lowering grid (rows: native memory-ordering support; columns:
+// LLVM ordering):
+//
+//                 seq_cst                              acquire
+//   supported     fence.sc; ld.acquire                 ld.acquire
+//   unsupported   fence.sc; ld.relaxed; fence.acquire  ld.relaxed; fence.acquire
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akshayrdeodhar wrote:

Cleaned this up.

https://github.com/llvm/llvm-project/pull/201468