[llvm] [DAGCombiner] Fold smax(X, -1)/smin(X, 0) to bitwise shift forms (PR #206242)

Aayush Shrivastava via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 1 05:11:09 PDT 2026


iamaayushrivastava wrote:

> > > The diffs on aarch64 look good but looks like there's some x86 regressions, we're no longer select cmovnsq in some places:
> > > ```diff
> > > --- build.x86_64-O3-base/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s	2026-06-30 13:39:08.090270952 +0000
> > > +++ build.x86_64-O3-head/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s	2026-06-30 13:26:56.642574618 +0000
> > > @@ -27840,11 +27840,14 @@
> > >  	.cfi_offset %rbp, -16
> > >  	movq	%rdi, %r14
> > >  	movq	8(%rdi), %r12
> > > -	leal	1(%r12), %eax
> > > -	cltq
> > > -	testq	%rax, %rax
> > > -	movq	$-1, %rdi
> > > -	cmovnsq	%rax, %rdi
> > > +	movq	%r12, %rax
> > > +	shlq	$32, %rax
> > > +	movabsq	$4294967296, %rdi               # imm = 0x100000000
> > > +	addq	%rax, %rdi
> > > +	movq	%rdi, %rax
> > > +	sarq	$32, %rax
> > > +	sarq	$63, %rdi
> > > +	orq	%rax, %rdi
> > >  	callq	_Znam at PLT
> > >  	movq	%rax, %rbx
> > >  	movq	(%r14), %rsi
> > > ```
> > 
> > 
> > The regression was caused by our fold that doubled the use count of the `sext node`, leading to less efficient sign-extension codegen. Fixed by skipping the fold when N0 is a `SIGN_EXTEND`, letting the target handle it via conditional move instead. Thank you for pointing that out.
> 
> It would be best to add a test for this to prevent regression in future.

Good idea. Added a test for `smax(sext(i32), -1)` to `combine-smax.ll` that locks in the `cmovnsq` behaviour and will catch any future regression.

https://github.com/llvm/llvm-project/pull/206242


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