[llvm] [DAGCombiner] Fold smax(X, -1)/smin(X, 0) to bitwise shift forms (PR #206242)
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Wed Jul 1 03:36:42 PDT 2026
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git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp --diff_from_common_commit
``````````
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``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 7cb25f26a..66551b597 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6325,8 +6325,8 @@ SDValue DAGCombiner::visitIMINMAX(SDNode *N) {
!TLI.shouldAvoidTransformToShift(VT, VT.getScalarSizeInBits() - 1) &&
sd_match(N1, m_ConstInt(C))) {
if (Opcode == ISD::SMAX && TLI.isOperationExpand(ISD::SMAX, VT) &&
- N0.getOpcode() != ISD::SMIN &&
- N0.getOpcode() != ISD::SIGN_EXTEND && C.isAllOnes()) {
+ N0.getOpcode() != ISD::SMIN && N0.getOpcode() != ISD::SIGN_EXTEND &&
+ C.isAllOnes()) {
SDValue ShiftAmt =
DAG.getShiftAmountConstant(VT.getScalarSizeInBits() - 1, VT, DL);
SDValue Shift = DAG.getNode(ISD::SRA, DL, VT, N0, ShiftAmt);
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https://github.com/llvm/llvm-project/pull/206242
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