[llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)

[Matt Arsenault via llvm-commits]

================
@@ -539,15 +539,35 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
     setOperationAction({ISD::SADDSAT, ISD::SSUBSAT}, {MVT::i16, MVT::i32},
                        Legal);
 
-  setOperationAction(
-      {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
-      {MVT::f32, MVT::f64}, Custom);
-
-  // These are really only legal for ieee_mode functions. We should be avoiding
-  // them for functions that don't have ieee_mode enabled, so just say they are
-  // legal.
-  setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE},
-                     {MVT::f32, MVT::f64}, Legal);
+  // Do not have s_{min|max}_*f64 instruction f64 will only be lowered to
+  // v_{min|max}_*f64
+  if (Subtarget->hasIEEEMinimumMaximumInsts()) {
+    setOperationAction(
+        {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+        MVT::f64, Legal);
+  } else {
+    setOperationAction(
+        {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+        MVT::f64, Custom);
+    // These are really only legal for ieee_mode functions. We should be
+    // avoiding them for functions that don't have ieee_mode enabled, so just
+    // say they are legal.
+    setOperationAction({ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE}, MVT::f64, Legal);
+  }
+
+  // If has v_{min|max}_num_f32 but no s_{min|max}_num_f32, leave it for custom
+  // function
+  if (Subtarget->hasIEEEMinimumMaximumInsts() &&
+      Subtarget->hasSALUMinimumMaximumInsts()) {
----------------
arsenm wrote:

With the confusing SALU situation on gfx 11.7, I think it would be best if this PR ignored the existence of the SALU instructions there. They should't change the legality rules. Relying on uniformity for the legalization rule is dodgy to start, and it requires additional special tests best added separately 

https://github.com/llvm/llvm-project/pull/203150