[llvm] [X86] Lower vector unsigned integer division through f64 division (PR #205263)
Adam Scott via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 30 02:14:30 PDT 2026
https://github.com/as4230 updated https://github.com/llvm/llvm-project/pull/205263
>From 86009eb197717067245e75f47b8f208edd5ad950 Mon Sep 17 00:00:00 2001
From: Adam Scott <adamscott200322 at gmail.com>
Date: Mon, 22 Jun 2026 13:45:47 +0000
Subject: [PATCH 1/3] [X86] Tests for vector unsigned integer division
---
llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll | 620 ++++++++++++++++++
llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll | 106 +++
llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 174 ++++-
3 files changed, 898 insertions(+), 2 deletions(-)
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
index 4a6cbaaa89e76..e4391666547ec 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
@@ -423,6 +423,626 @@ define <16 x i8> @test_divconstant_16i8(<16 x i8> %a) nounwind {
ret <16 x i8> %res
}
+;
+; udiv by variable
+;
+
+define <4 x i32> @test_divv_4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
+; SSE2-LABEL: test_divv_4i32:
+; SSE2: # %bb.0:
+; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
+; SSE2-NEXT: movd %xmm2, %eax
+; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
+; SSE2-NEXT: movd %xmm2, %ecx
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divl %ecx
+; SSE2-NEXT: movd %eax, %xmm2
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
+; SSE2-NEXT: movd %xmm3, %eax
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; SSE2-NEXT: movd %xmm3, %ecx
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divl %ecx
+; SSE2-NEXT: movd %eax, %xmm3
+; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: movd %xmm1, %ecx
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divl %ecx
+; SSE2-NEXT: movd %eax, %xmm2
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; SSE2-NEXT: movd %xmm0, %ecx
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divl %ecx
+; SSE2-NEXT: movd %eax, %xmm0
+; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
+; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; SSE2-NEXT: movdqa %xmm2, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE41-LABEL: test_divv_4i32:
+; SSE41: # %bb.0:
+; SSE41-NEXT: pextrd $1, %xmm0, %eax
+; SSE41-NEXT: pextrd $1, %xmm1, %ecx
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divl %ecx
+; SSE41-NEXT: movl %eax, %ecx
+; SSE41-NEXT: movd %xmm0, %eax
+; SSE41-NEXT: movd %xmm1, %esi
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divl %esi
+; SSE41-NEXT: movd %eax, %xmm2
+; SSE41-NEXT: pinsrd $1, %ecx, %xmm2
+; SSE41-NEXT: pextrd $2, %xmm0, %eax
+; SSE41-NEXT: pextrd $2, %xmm1, %ecx
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divl %ecx
+; SSE41-NEXT: pinsrd $2, %eax, %xmm2
+; SSE41-NEXT: pextrd $3, %xmm0, %eax
+; SSE41-NEXT: pextrd $3, %xmm1, %ecx
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divl %ecx
+; SSE41-NEXT: pinsrd $3, %eax, %xmm2
+; SSE41-NEXT: movdqa %xmm2, %xmm0
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: test_divv_4i32:
+; AVX: # %bb.0:
+; AVX-NEXT: vpextrd $1, %xmm0, %eax
+; AVX-NEXT: vpextrd $1, %xmm1, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: movl %eax, %ecx
+; AVX-NEXT: vmovd %xmm0, %eax
+; AVX-NEXT: vmovd %xmm1, %esi
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %esi
+; AVX-NEXT: vmovd %eax, %xmm2
+; AVX-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrd $2, %xmm0, %eax
+; AVX-NEXT: vpextrd $2, %xmm1, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
+; AVX-NEXT: vpextrd $3, %xmm0, %eax
+; AVX-NEXT: vpextrd $3, %xmm1, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
+; AVX-NEXT: retq
+ %res = udiv <4 x i32> %a, %b
+ ret <4 x i32> %res
+}
+
+define <8 x i16> @test_divv_8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
+; SSE2-LABEL: test_divv_8i16:
+; SSE2: # %bb.0:
+; SSE2-NEXT: pextrw $7, %xmm0, %eax
+; SSE2-NEXT: pextrw $7, %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm2
+; SSE2-NEXT: pextrw $6, %xmm0, %eax
+; SSE2-NEXT: pextrw $6, %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm3
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
+; SSE2-NEXT: pextrw $5, %xmm0, %eax
+; SSE2-NEXT: pextrw $5, %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm4
+; SSE2-NEXT: pextrw $4, %xmm0, %eax
+; SSE2-NEXT: pextrw $4, %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm2
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
+; SSE2-NEXT: pextrw $3, %xmm0, %eax
+; SSE2-NEXT: pextrw $3, %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm3
+; SSE2-NEXT: pextrw $2, %xmm0, %eax
+; SSE2-NEXT: pextrw $2, %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm4
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
+; SSE2-NEXT: pextrw $1, %xmm0, %eax
+; SSE2-NEXT: pextrw $1, %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm3
+; SSE2-NEXT: movd %xmm0, %eax
+; SSE2-NEXT: movd %xmm1, %ecx
+; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE2-NEXT: xorl %edx, %edx
+; SSE2-NEXT: divw %cx
+; SSE2-NEXT: # kill: def $ax killed $ax def $eax
+; SSE2-NEXT: movd %eax, %xmm0
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1]
+; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
+; SSE2-NEXT: retq
+;
+; SSE41-LABEL: test_divv_8i16:
+; SSE41: # %bb.0:
+; SSE41-NEXT: pextrw $1, %xmm0, %eax
+; SSE41-NEXT: pextrw $1, %xmm1, %ecx
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %cx
+; SSE41-NEXT: movl %eax, %ecx
+; SSE41-NEXT: movd %xmm0, %eax
+; SSE41-NEXT: movd %xmm1, %esi
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %si
+; SSE41-NEXT: # kill: def $ax killed $ax def $eax
+; SSE41-NEXT: movd %eax, %xmm2
+; SSE41-NEXT: pinsrw $1, %ecx, %xmm2
+; SSE41-NEXT: pextrw $2, %xmm0, %eax
+; SSE41-NEXT: pextrw $2, %xmm1, %ecx
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %cx
+; SSE41-NEXT: # kill: def $ax killed $ax def $eax
+; SSE41-NEXT: pinsrw $2, %eax, %xmm2
+; SSE41-NEXT: pextrw $3, %xmm0, %eax
+; SSE41-NEXT: pextrw $3, %xmm1, %ecx
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %cx
+; SSE41-NEXT: # kill: def $ax killed $ax def $eax
+; SSE41-NEXT: pinsrw $3, %eax, %xmm2
+; SSE41-NEXT: pextrw $4, %xmm0, %eax
+; SSE41-NEXT: pextrw $4, %xmm1, %ecx
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %cx
+; SSE41-NEXT: # kill: def $ax killed $ax def $eax
+; SSE41-NEXT: pinsrw $4, %eax, %xmm2
+; SSE41-NEXT: pextrw $5, %xmm0, %eax
+; SSE41-NEXT: pextrw $5, %xmm1, %ecx
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %cx
+; SSE41-NEXT: # kill: def $ax killed $ax def $eax
+; SSE41-NEXT: pinsrw $5, %eax, %xmm2
+; SSE41-NEXT: pextrw $6, %xmm0, %eax
+; SSE41-NEXT: pextrw $6, %xmm1, %ecx
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %cx
+; SSE41-NEXT: # kill: def $ax killed $ax def $eax
+; SSE41-NEXT: pinsrw $6, %eax, %xmm2
+; SSE41-NEXT: pextrw $7, %xmm0, %eax
+; SSE41-NEXT: pextrw $7, %xmm1, %ecx
+; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
+; SSE41-NEXT: xorl %edx, %edx
+; SSE41-NEXT: divw %cx
+; SSE41-NEXT: # kill: def $ax killed $ax def $eax
+; SSE41-NEXT: pinsrw $7, %eax, %xmm2
+; SSE41-NEXT: movdqa %xmm2, %xmm0
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: test_divv_8i16:
+; AVX: # %bb.0:
+; AVX-NEXT: vpextrw $1, %xmm0, %eax
+; AVX-NEXT: vpextrw $1, %xmm1, %ecx
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %cx
+; AVX-NEXT: movl %eax, %ecx
+; AVX-NEXT: vmovd %xmm0, %eax
+; AVX-NEXT: vmovd %xmm1, %esi
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %si
+; AVX-NEXT: # kill: def $ax killed $ax def $eax
+; AVX-NEXT: vmovd %eax, %xmm2
+; AVX-NEXT: vpinsrw $1, %ecx, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $2, %xmm0, %eax
+; AVX-NEXT: vpextrw $2, %xmm1, %ecx
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %cx
+; AVX-NEXT: # kill: def $ax killed $ax def $eax
+; AVX-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $3, %xmm0, %eax
+; AVX-NEXT: vpextrw $3, %xmm1, %ecx
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %cx
+; AVX-NEXT: # kill: def $ax killed $ax def $eax
+; AVX-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $4, %xmm0, %eax
+; AVX-NEXT: vpextrw $4, %xmm1, %ecx
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %cx
+; AVX-NEXT: # kill: def $ax killed $ax def $eax
+; AVX-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $5, %xmm0, %eax
+; AVX-NEXT: vpextrw $5, %xmm1, %ecx
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %cx
+; AVX-NEXT: # kill: def $ax killed $ax def $eax
+; AVX-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $6, %xmm0, %eax
+; AVX-NEXT: vpextrw $6, %xmm1, %ecx
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %cx
+; AVX-NEXT: # kill: def $ax killed $ax def $eax
+; AVX-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
+; AVX-NEXT: vpextrw $7, %xmm0, %eax
+; AVX-NEXT: vpextrw $7, %xmm1, %ecx
+; AVX-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divw %cx
+; AVX-NEXT: # kill: def $ax killed $ax def $eax
+; AVX-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0
+; AVX-NEXT: retq
+ %res = udiv <8 x i16> %a, %b
+ ret <8 x i16> %res
+}
+
+define <16 x i8> @test_divv_16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
+; SSE2-LABEL: test_divv_16i8:
+; SSE2: # %bb.0:
+; SSE2-NEXT: pushq %rbp
+; SSE2-NEXT: pushq %r15
+; SSE2-NEXT: pushq %r14
+; SSE2-NEXT: pushq %r13
+; SSE2-NEXT: pushq %r12
+; SSE2-NEXT: pushq %rbx
+; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %eax
+; SSE2-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %esi
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %edi
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r8d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r9d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r10d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r11d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %ebx
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %ebp
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r14d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r15d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r12d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %r13d
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movzbl %al, %edx
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movl %eax, %ecx
+; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
+; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero
+; SSE2-NEXT: movd %esi, %xmm1
+; SSE2-NEXT: movd %edi, %xmm2
+; SSE2-NEXT: movd %r8d, %xmm3
+; SSE2-NEXT: movd %r9d, %xmm4
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
+; SSE2-NEXT: movd %r10d, %xmm0
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
+; SSE2-NEXT: movd %r11d, %xmm2
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
+; SSE2-NEXT: movd %ebx, %xmm1
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
+; SSE2-NEXT: movd %ebp, %xmm4
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; SSE2-NEXT: movd %r14d, %xmm2
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
+; SSE2-NEXT: movd %r15d, %xmm0
+; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
+; SSE2-NEXT: movd %r12d, %xmm3
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
+; SSE2-NEXT: movd %r13d, %xmm4
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
+; SSE2-NEXT: movd %edx, %xmm5
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
+; SSE2-NEXT: movzbl %cl, %ecx
+; SSE2-NEXT: movd %ecx, %xmm2
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; SSE2-NEXT: movzbl %al, %eax
+; SSE2-NEXT: movd %eax, %xmm0
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
+; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE2-NEXT: popq %rbx
+; SSE2-NEXT: popq %r12
+; SSE2-NEXT: popq %r13
+; SSE2-NEXT: popq %r14
+; SSE2-NEXT: popq %r15
+; SSE2-NEXT: popq %rbp
+; SSE2-NEXT: retq
+;
+; SSE41-LABEL: test_divv_16i8:
+; SSE41: # %bb.0:
+; SSE41-NEXT: pushq %rbp
+; SSE41-NEXT: pushq %r15
+; SSE41-NEXT: pushq %r14
+; SSE41-NEXT: pushq %r13
+; SSE41-NEXT: pushq %r12
+; SSE41-NEXT: pushq %rbx
+; SSE41-NEXT: pextrb $1, %xmm1, %ecx
+; SSE41-NEXT: pextrb $1, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; SSE41-NEXT: movd %xmm1, %ecx
+; SSE41-NEXT: movd %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; SSE41-NEXT: pextrb $2, %xmm1, %ecx
+; SSE41-NEXT: pextrb $2, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r9d
+; SSE41-NEXT: pextrb $3, %xmm1, %ecx
+; SSE41-NEXT: pextrb $3, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r10d
+; SSE41-NEXT: pextrb $4, %xmm1, %ecx
+; SSE41-NEXT: pextrb $4, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r11d
+; SSE41-NEXT: pextrb $5, %xmm1, %ecx
+; SSE41-NEXT: pextrb $5, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %ebx
+; SSE41-NEXT: pextrb $6, %xmm1, %ecx
+; SSE41-NEXT: pextrb $6, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %ebp
+; SSE41-NEXT: pextrb $7, %xmm1, %ecx
+; SSE41-NEXT: pextrb $7, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r14d
+; SSE41-NEXT: pextrb $8, %xmm1, %ecx
+; SSE41-NEXT: pextrb $8, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r15d
+; SSE41-NEXT: pextrb $9, %xmm1, %ecx
+; SSE41-NEXT: pextrb $9, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r12d
+; SSE41-NEXT: pextrb $10, %xmm1, %ecx
+; SSE41-NEXT: pextrb $10, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r13d
+; SSE41-NEXT: pextrb $11, %xmm1, %ecx
+; SSE41-NEXT: pextrb $11, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movzbl %al, %r8d
+; SSE41-NEXT: pextrb $12, %xmm1, %ecx
+; SSE41-NEXT: pextrb $12, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movl %eax, %edx
+; SSE41-NEXT: pextrb $13, %xmm1, %ecx
+; SSE41-NEXT: pextrb $13, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movl %eax, %esi
+; SSE41-NEXT: pextrb $14, %xmm1, %ecx
+; SSE41-NEXT: pextrb $14, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movl %eax, %edi
+; SSE41-NEXT: movzbl %dl, %edx
+; SSE41-NEXT: pextrb $15, %xmm0, %eax
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: movzbl %sil, %esi
+; SSE41-NEXT: pextrb $15, %xmm1, %ecx
+; SSE41-NEXT: divb %cl
+; SSE41-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
+; SSE41-NEXT: # xmm0 = mem[0],zero,zero,zero
+; SSE41-NEXT: pinsrb $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
+; SSE41-NEXT: pinsrb $2, %r9d, %xmm0
+; SSE41-NEXT: pinsrb $3, %r10d, %xmm0
+; SSE41-NEXT: pinsrb $4, %r11d, %xmm0
+; SSE41-NEXT: pinsrb $5, %ebx, %xmm0
+; SSE41-NEXT: pinsrb $6, %ebp, %xmm0
+; SSE41-NEXT: pinsrb $7, %r14d, %xmm0
+; SSE41-NEXT: pinsrb $8, %r15d, %xmm0
+; SSE41-NEXT: pinsrb $9, %r12d, %xmm0
+; SSE41-NEXT: pinsrb $10, %r13d, %xmm0
+; SSE41-NEXT: pinsrb $11, %r8d, %xmm0
+; SSE41-NEXT: pinsrb $12, %edx, %xmm0
+; SSE41-NEXT: pinsrb $13, %esi, %xmm0
+; SSE41-NEXT: movzbl %dil, %ecx
+; SSE41-NEXT: pinsrb $14, %ecx, %xmm0
+; SSE41-NEXT: movzbl %al, %eax
+; SSE41-NEXT: pinsrb $15, %eax, %xmm0
+; SSE41-NEXT: popq %rbx
+; SSE41-NEXT: popq %r12
+; SSE41-NEXT: popq %r13
+; SSE41-NEXT: popq %r14
+; SSE41-NEXT: popq %r15
+; SSE41-NEXT: popq %rbp
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: test_divv_16i8:
+; AVX: # %bb.0:
+; AVX-NEXT: pushq %rbp
+; AVX-NEXT: pushq %r15
+; AVX-NEXT: pushq %r14
+; AVX-NEXT: pushq %r13
+; AVX-NEXT: pushq %r12
+; AVX-NEXT: pushq %rbx
+; AVX-NEXT: vpextrb $1, %xmm1, %ecx
+; AVX-NEXT: vpextrb $1, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: # kill: def $al killed $al def $eax
+; AVX-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; AVX-NEXT: vmovd %xmm1, %ecx
+; AVX-NEXT: vmovd %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %esi
+; AVX-NEXT: vpextrb $2, %xmm1, %ecx
+; AVX-NEXT: vpextrb $2, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %edx
+; AVX-NEXT: vpextrb $3, %xmm1, %ecx
+; AVX-NEXT: vpextrb $3, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %edi
+; AVX-NEXT: vpextrb $4, %xmm1, %ecx
+; AVX-NEXT: vpextrb $4, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r8d
+; AVX-NEXT: vpextrb $5, %xmm1, %ecx
+; AVX-NEXT: vpextrb $5, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r9d
+; AVX-NEXT: vpextrb $6, %xmm1, %ecx
+; AVX-NEXT: vpextrb $6, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r10d
+; AVX-NEXT: vpextrb $7, %xmm1, %ecx
+; AVX-NEXT: vpextrb $7, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r11d
+; AVX-NEXT: vpextrb $8, %xmm1, %ecx
+; AVX-NEXT: vpextrb $8, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %ebx
+; AVX-NEXT: vpextrb $9, %xmm1, %ecx
+; AVX-NEXT: vpextrb $9, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %ebp
+; AVX-NEXT: vpextrb $10, %xmm1, %ecx
+; AVX-NEXT: vpextrb $10, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r14d
+; AVX-NEXT: vpextrb $11, %xmm1, %ecx
+; AVX-NEXT: vpextrb $11, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r15d
+; AVX-NEXT: vpextrb $12, %xmm1, %ecx
+; AVX-NEXT: vpextrb $12, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r12d
+; AVX-NEXT: vpextrb $13, %xmm1, %ecx
+; AVX-NEXT: vpextrb $13, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %r13d
+; AVX-NEXT: vpextrb $14, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: vpextrb $14, %xmm1, %ecx
+; AVX-NEXT: divb %cl
+; AVX-NEXT: movl %eax, %ecx
+; AVX-NEXT: vmovd %esi, %xmm2
+; AVX-NEXT: vpextrb $15, %xmm0, %eax
+; AVX-NEXT: movzbl %al, %eax
+; AVX-NEXT: vpextrb $15, %xmm1, %esi
+; AVX-NEXT: divb %sil
+; AVX-NEXT: # kill: def $al killed $al def $eax
+; AVX-NEXT: vpinsrb $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2, %xmm0 # 4-byte Folded Reload
+; AVX-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $3, %edi, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $4, %r8d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $5, %r9d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $6, %r10d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $8, %ebx, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $9, %ebp, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $10, %r14d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $11, %r15d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $12, %r12d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $13, %r13d, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
+; AVX-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+; AVX-NEXT: popq %rbx
+; AVX-NEXT: popq %r12
+; AVX-NEXT: popq %r13
+; AVX-NEXT: popq %r14
+; AVX-NEXT: popq %r15
+; AVX-NEXT: popq %rbp
+; AVX-NEXT: retq
+ %res = udiv <16 x i8> %a, %b
+ ret <16 x i8> %res
+}
+
;
; urem by 7
;
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
index ca57359183312..4e49042bae105 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
@@ -359,6 +359,112 @@ define <32 x i8> @test_divconstant_32i8(<32 x i8> %a) nounwind {
ret <32 x i8> %res
}
+;
+; udiv by variable
+;
+
+define <8 x i32> @test_divv_8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
+; AVX1-LABEL: test_divv_8i32:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT: vpextrd $1, %xmm2, %eax
+; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT: vpextrd $1, %xmm3, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: movl %eax, %ecx
+; AVX1-NEXT: vmovd %xmm2, %eax
+; AVX1-NEXT: vmovd %xmm3, %esi
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %esi
+; AVX1-NEXT: vmovd %eax, %xmm4
+; AVX1-NEXT: vpinsrd $1, %ecx, %xmm4, %xmm4
+; AVX1-NEXT: vpextrd $2, %xmm2, %eax
+; AVX1-NEXT: vpextrd $2, %xmm3, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: vpinsrd $2, %eax, %xmm4, %xmm4
+; AVX1-NEXT: vpextrd $3, %xmm2, %eax
+; AVX1-NEXT: vpextrd $3, %xmm3, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: vpinsrd $3, %eax, %xmm4, %xmm2
+; AVX1-NEXT: vpextrd $1, %xmm0, %eax
+; AVX1-NEXT: vpextrd $1, %xmm1, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: movl %eax, %ecx
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: vmovd %xmm1, %esi
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %esi
+; AVX1-NEXT: vmovd %eax, %xmm3
+; AVX1-NEXT: vpinsrd $1, %ecx, %xmm3, %xmm3
+; AVX1-NEXT: vpextrd $2, %xmm0, %eax
+; AVX1-NEXT: vpextrd $2, %xmm1, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
+; AVX1-NEXT: vpextrd $3, %xmm0, %eax
+; AVX1-NEXT: vpextrd $3, %xmm1, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: vpinsrd $3, %eax, %xmm3, %xmm0
+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: test_divv_8i32:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
+; AVX2-NEXT: vpextrd $1, %xmm2, %eax
+; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
+; AVX2-NEXT: vpextrd $1, %xmm3, %ecx
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %ecx
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: vmovd %xmm2, %eax
+; AVX2-NEXT: vmovd %xmm3, %esi
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %esi
+; AVX2-NEXT: vmovd %eax, %xmm4
+; AVX2-NEXT: vpinsrd $1, %ecx, %xmm4, %xmm4
+; AVX2-NEXT: vpextrd $2, %xmm2, %eax
+; AVX2-NEXT: vpextrd $2, %xmm3, %ecx
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %ecx
+; AVX2-NEXT: vpinsrd $2, %eax, %xmm4, %xmm4
+; AVX2-NEXT: vpextrd $3, %xmm2, %eax
+; AVX2-NEXT: vpextrd $3, %xmm3, %ecx
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %ecx
+; AVX2-NEXT: vpinsrd $3, %eax, %xmm4, %xmm2
+; AVX2-NEXT: vpextrd $1, %xmm0, %eax
+; AVX2-NEXT: vpextrd $1, %xmm1, %ecx
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %ecx
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: vmovd %xmm0, %eax
+; AVX2-NEXT: vmovd %xmm1, %esi
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %esi
+; AVX2-NEXT: vmovd %eax, %xmm3
+; AVX2-NEXT: vpinsrd $1, %ecx, %xmm3, %xmm3
+; AVX2-NEXT: vpextrd $2, %xmm0, %eax
+; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %ecx
+; AVX2-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
+; AVX2-NEXT: vpextrd $3, %xmm0, %eax
+; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
+; AVX2-NEXT: xorl %edx, %edx
+; AVX2-NEXT: divl %ecx
+; AVX2-NEXT: vpinsrd $3, %eax, %xmm3, %xmm0
+; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX2-NEXT: retq
+ %res = udiv <8 x i32> %a, %b
+ ret <8 x i32> %res
+}
+
;
; urem by 7
;
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
index b8a131e628007..b21b827745a9c 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,NODQ,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,NODQ,AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512BW,AVX512DQ
;
; udiv by 7
@@ -288,6 +289,172 @@ define <64 x i8> @test_divconstant_64i8(<64 x i8> %a) nounwind {
ret <64 x i8> %res
}
+;
+; udiv by variable
+;
+
+define <8 x i64> @test_divv_8i64(<8 x i64> %a, <8 x i64> %b) nounwind {
+; AVX-LABEL: test_divv_8i64:
+; AVX: # %bb.0:
+; AVX-NEXT: vextracti32x4 $3, %zmm0, %xmm2
+; AVX-NEXT: vpextrq $1, %xmm2, %rax
+; AVX-NEXT: vextracti32x4 $3, %zmm1, %xmm3
+; AVX-NEXT: vpextrq $1, %xmm3, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm4
+; AVX-NEXT: vmovq %xmm2, %rax
+; AVX-NEXT: vmovq %xmm3, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm2
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm4[0]
+; AVX-NEXT: vextracti32x4 $2, %zmm0, %xmm3
+; AVX-NEXT: vpextrq $1, %xmm3, %rax
+; AVX-NEXT: vextracti32x4 $2, %zmm1, %xmm4
+; AVX-NEXT: vpextrq $1, %xmm4, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm5
+; AVX-NEXT: vmovq %xmm3, %rax
+; AVX-NEXT: vmovq %xmm4, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm3
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]
+; AVX-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2
+; AVX-NEXT: vextracti128 $1, %ymm0, %xmm3
+; AVX-NEXT: vpextrq $1, %xmm3, %rax
+; AVX-NEXT: vextracti128 $1, %ymm1, %xmm4
+; AVX-NEXT: vpextrq $1, %xmm4, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm5
+; AVX-NEXT: vmovq %xmm3, %rax
+; AVX-NEXT: vmovq %xmm4, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm3
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]
+; AVX-NEXT: vpextrq $1, %xmm0, %rax
+; AVX-NEXT: vpextrq $1, %xmm1, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm4
+; AVX-NEXT: vmovq %xmm0, %rax
+; AVX-NEXT: vmovq %xmm1, %rcx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divq %rcx
+; AVX-NEXT: vmovq %rax, %xmm0
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm4[0]
+; AVX-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
+; AVX-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX-NEXT: retq
+ %res = udiv <8 x i64> %a, %b
+ ret <8 x i64> %res
+}
+
+define <16 x i32> @test_divv_16i32(<16 x i32> %a, <16 x i32> %b) nounwind {
+; AVX-LABEL: test_divv_16i32:
+; AVX: # %bb.0:
+; AVX-NEXT: vextracti32x4 $3, %zmm0, %xmm2
+; AVX-NEXT: vpextrd $1, %xmm2, %eax
+; AVX-NEXT: vextracti32x4 $3, %zmm1, %xmm3
+; AVX-NEXT: vpextrd $1, %xmm3, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: movl %eax, %ecx
+; AVX-NEXT: vmovd %xmm2, %eax
+; AVX-NEXT: vmovd %xmm3, %esi
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %esi
+; AVX-NEXT: vmovd %eax, %xmm4
+; AVX-NEXT: vpinsrd $1, %ecx, %xmm4, %xmm4
+; AVX-NEXT: vpextrd $2, %xmm2, %eax
+; AVX-NEXT: vpextrd $2, %xmm3, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $2, %eax, %xmm4, %xmm4
+; AVX-NEXT: vpextrd $3, %xmm2, %eax
+; AVX-NEXT: vpextrd $3, %xmm3, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $3, %eax, %xmm4, %xmm2
+; AVX-NEXT: vextracti32x4 $2, %zmm0, %xmm3
+; AVX-NEXT: vpextrd $1, %xmm3, %eax
+; AVX-NEXT: vextracti32x4 $2, %zmm1, %xmm4
+; AVX-NEXT: vpextrd $1, %xmm4, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: movl %eax, %ecx
+; AVX-NEXT: vmovd %xmm3, %eax
+; AVX-NEXT: vmovd %xmm4, %esi
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %esi
+; AVX-NEXT: vmovd %eax, %xmm5
+; AVX-NEXT: vpinsrd $1, %ecx, %xmm5, %xmm5
+; AVX-NEXT: vpextrd $2, %xmm3, %eax
+; AVX-NEXT: vpextrd $2, %xmm4, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $2, %eax, %xmm5, %xmm5
+; AVX-NEXT: vpextrd $3, %xmm3, %eax
+; AVX-NEXT: vpextrd $3, %xmm4, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $3, %eax, %xmm5, %xmm3
+; AVX-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2
+; AVX-NEXT: vextracti128 $1, %ymm0, %xmm3
+; AVX-NEXT: vpextrd $1, %xmm3, %eax
+; AVX-NEXT: vextracti128 $1, %ymm1, %xmm4
+; AVX-NEXT: vpextrd $1, %xmm4, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: movl %eax, %ecx
+; AVX-NEXT: vmovd %xmm3, %eax
+; AVX-NEXT: vmovd %xmm4, %esi
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %esi
+; AVX-NEXT: vmovd %eax, %xmm5
+; AVX-NEXT: vpinsrd $1, %ecx, %xmm5, %xmm5
+; AVX-NEXT: vpextrd $2, %xmm3, %eax
+; AVX-NEXT: vpextrd $2, %xmm4, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $2, %eax, %xmm5, %xmm5
+; AVX-NEXT: vpextrd $3, %xmm3, %eax
+; AVX-NEXT: vpextrd $3, %xmm4, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $3, %eax, %xmm5, %xmm3
+; AVX-NEXT: vpextrd $1, %xmm0, %eax
+; AVX-NEXT: vpextrd $1, %xmm1, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: movl %eax, %ecx
+; AVX-NEXT: vmovd %xmm0, %eax
+; AVX-NEXT: vmovd %xmm1, %esi
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %esi
+; AVX-NEXT: vmovd %eax, %xmm4
+; AVX-NEXT: vpinsrd $1, %ecx, %xmm4, %xmm4
+; AVX-NEXT: vpextrd $2, %xmm0, %eax
+; AVX-NEXT: vpextrd $2, %xmm1, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $2, %eax, %xmm4, %xmm4
+; AVX-NEXT: vpextrd $3, %xmm0, %eax
+; AVX-NEXT: vpextrd $3, %xmm1, %ecx
+; AVX-NEXT: xorl %edx, %edx
+; AVX-NEXT: divl %ecx
+; AVX-NEXT: vpinsrd $3, %eax, %xmm4, %xmm0
+; AVX-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
+; AVX-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX-NEXT: retq
+ %res = udiv <16 x i32> %a, %b
+ ret <16 x i32> %res
+}
+
;
; urem by 7
;
@@ -657,3 +824,6 @@ define <64 x i8> @test_remconstant_64i8(<64 x i8> %a) nounwind {
%res = urem <64 x i8> %a, <i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34, i8 35, i8 36, i8 37, i8 38, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7>
ret <64 x i8> %res
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; AVX512DQ: {{.*}}
+; NODQ: {{.*}}
>From 6355f41c66977b91c4ea6b425eaeafe354600bdd Mon Sep 17 00:00:00 2001
From: Adam Scott <adamscott200322 at gmail.com>
Date: Mon, 22 Jun 2026 13:53:38 +0000
Subject: [PATCH 2/3] [X86] Lower vector unsigned integer division through f64
division
x86 has no vector integer divide so a variable-divisor vector udiv
scalarizes into several slow scalar divides. This lowers it with f64
division. Element types up to 32 bits divide exactly with a single f64
divide on AVX2+ and u64 uses the Sneller reciprocal approach on
AVX512DQ.
Part of #201319.
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 94 ++++
.../CodeGen/X86/expand-vp-int-intrinsics.ll | 67 +--
llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll | 507 +++++++++++-------
llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll | 88 ++-
llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 406 +++++++-------
5 files changed, 652 insertions(+), 510 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 7e9e82ae49f9e..c88e7e70fadde 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2817,6 +2817,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
ISD::FP_TO_UINT_SAT,
ISD::SETCC,
ISD::MUL,
+ ISD::UDIV,
ISD::XOR,
ISD::MSCATTER,
ISD::MGATHER,
@@ -50771,6 +50772,98 @@ static SDValue combineMulToPMADD52(SDNode *N, const SDLoc &DL,
return SDValue();
}
+// x86 has no vector integer divide instructions. Lower vector UDIV through f64
+// division instead of scalarizing into N scalar hardware divides.
+static SDValue combineUDIV(SDNode *N, SelectionDAG &DAG,
+ TargetLowering::DAGCombinerInfo &DCI,
+ const X86Subtarget &Subtarget) {
+ EVT VT = N->getValueType(0);
+ SDLoc DL(N);
+
+ // Run before the legalizer expands the UDIV.
+ if (!VT.isVector() || !DCI.isBeforeLegalizeOps())
+ return SDValue();
+
+ SDValue Dividend = N->getOperand(0);
+ SDValue Divisor = N->getOperand(1);
+
+ // If the result is only read back as scalar extracts, scalarization computes
+ // just the demanded lanes.
+ if (all_of(N->users(), [](const SDNode *U) {
+ return U->getOpcode() == ISD::EXTRACT_VECTOR_ELT;
+ }))
+ return SDValue();
+
+ // i8/i16/i32: a single f64 divide is exact because they fit the 53-bit
+ // mantissa, so on AVX2+ we divide as f64. Constant divisors are better
+ // handled by the vectorized magic-multiply.
+ if (VT.getScalarSizeInBits() <= 32 && Subtarget.hasAVX2()) {
+ if (DAG.isConstantIntBuildVectorOrConstantInt(Divisor))
+ return SDValue();
+ EVT FPVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64,
+ VT.getVectorElementCount());
+ SDValue X = DAG.getNode(ISD::UINT_TO_FP, DL, FPVT, Dividend);
+ SDValue Y = DAG.getNode(ISD::UINT_TO_FP, DL, FPVT, Divisor);
+ SDValue Quot = DAG.getNode(ISD::FDIV, DL, FPVT, X, Y);
+ return DAG.getNode(ISD::FP_TO_UINT, DL, VT, Quot);
+ }
+
+ // i64: f64 cannot hold the quotient exactly, so compute a round-down
+ // reciprocal of the divisor and refine it with two round-down multiply
+ // iterations plus a final +1 correction. The embedded rounding control is
+ // 512-bit only so this is limited to AVX512DQ on v8i64.
+ if (VT == MVT::v8i64 && Subtarget.hasDQI()) {
+ MVT FPVT = MVT::v8f64;
+ SDValue RD = DAG.getTargetConstant( // {rd-sae}
+ X86::STATIC_ROUNDING::TO_NEG_INF | X86::STATIC_ROUNDING::NO_EXC, DL,
+ MVT::i32);
+ SDValue RU = DAG.getTargetConstant( // {ru-sae}
+ X86::STATIC_ROUNDING::TO_POS_INF | X86::STATIC_ROUNDING::NO_EXC, DL,
+ MVT::i32);
+
+ // Build an AVX512 intrinsic node (the intrinsic id is operand 0).
+ auto Emit = [&](Intrinsic::ID ID, EVT ResVT, ArrayRef<SDValue> Args) {
+ SmallVector<SDValue, 5> Ops = {DAG.getTargetConstant(ID, DL, MVT::i32)};
+ Ops.append(Args.begin(), Args.end());
+ return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, ResVT, Ops);
+ };
+ auto UToF = [&](SDValue V, SDValue Rnd) { // vcvtuqq2pd
+ return Emit(Intrinsic::x86_avx512_uitofp_round, FPVT, {V, Rnd});
+ };
+ auto FToU = [&](SDValue V) { // vcvtpd2uqq {rd-sae}
+ return Emit(
+ Intrinsic::x86_avx512_mask_cvtpd2uqq_512, VT,
+ {V, DAG.getUNDEF(VT), DAG.getTargetConstant(0xff, DL, MVT::i8), RD});
+ };
+ auto FMul = [&](SDValue A, SDValue B) { // vmulpd {rd-sae}
+ return Emit(Intrinsic::x86_avx512_mul_pd_512, FPVT, {A, B, RD});
+ };
+
+ // b_rcp = round_down(1.0 / round_up(double(b)))
+ SDValue Recip =
+ Emit(Intrinsic::x86_avx512_div_pd_512, FPVT,
+ {DAG.getConstantFP(1.0, DL, FPVT), UToF(Divisor, RU), RD});
+ // first = round_down(uint64(round_down(double(a)) * b_rcp))
+ SDValue First = FToU(FMul(UToF(Dividend, RD), Recip));
+ // rem = a - first * b
+ SDValue Rem = DAG.getNode(ISD::SUB, DL, VT, Dividend,
+ DAG.getNode(ISD::MUL, DL, VT, First, Divisor));
+ // refine with a second iteration on the remainder
+ SDValue Second = FToU(FMul(UToF(Rem, RD), Recip));
+ SDValue Result = DAG.getNode(ISD::ADD, DL, VT, First, Second);
+ // result += (a - (first + second) * b) >= b
+ Rem = DAG.getNode(ISD::SUB, DL, VT, Rem,
+ DAG.getNode(ISD::MUL, DL, VT, Second, Divisor));
+ EVT CCVT = DAG.getTargetLoweringInfo().getSetCCResultType(
+ DAG.getDataLayout(), *DAG.getContext(), VT);
+ SDValue Ge = DAG.getSetCC(DL, CCVT, Rem, Divisor, ISD::SETUGE);
+ return DAG.getNode(ISD::ADD, DL, VT, Result,
+ DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Ge));
+ }
+
+ return SDValue();
+}
+
static SDValue combineMul(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI,
const X86Subtarget &Subtarget) {
@@ -63201,6 +63294,7 @@ SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
case X86ISD::SBB: return combineSBB(N, DAG);
case X86ISD::ADC: return combineADC(N, DAG, DCI);
case ISD::MUL: return combineMul(N, DAG, DCI, Subtarget);
+ case ISD::UDIV: return combineUDIV(N, DAG, DCI, Subtarget);
case ISD::SHL: return combineShiftLeft(N, DAG, Subtarget);
case ISD::SRA: return combineShiftRightArithmetic(N, DAG, Subtarget);
case ISD::SRL: return combineShiftRightLogical(N, DAG, DCI, Subtarget);
diff --git a/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll b/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
index f9f4cf99f24a3..d3f0abe78e0f1 100644
--- a/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
@@ -385,28 +385,23 @@ define void @vp_udiv_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; AVX2-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1]
; AVX2-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1
-; AVX2-NEXT: vextractps $1, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $1, %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: vmovd %xmm1, %esi
-; AVX2-NEXT: vmovd %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %esi
-; AVX2-NEXT: vmovd %eax, %xmm2
-; AVX2-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $2, %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $3, %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
-; AVX2-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15]
+; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vsubpd %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX2-NEXT: vpor %ymm2, %ymm1, %ymm1
+; AVX2-NEXT: vsubpd %ymm2, %ymm1, %ymm1
+; AVX2-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vcvttpd2dq %ymm0, %xmm1
+; AVX2-NEXT: vpsrad $31, %xmm1, %xmm2
+; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm3 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]
+; AVX2-NEXT: vsubpd %ymm3, %ymm0, %ymm0
+; AVX2-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX2-NEXT: vandpd %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vorpd %xmm0, %xmm1, %xmm0
+; AVX2-NEXT: vmovapd %xmm0, (%rdi)
+; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: vp_udiv_v4i32:
@@ -415,28 +410,12 @@ define void @vp_udiv_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX512-NEXT: vpcmpnleud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %k1
; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
; AVX512-NEXT: vmovdqa32 %xmm1, %xmm2 {%k1}
-; AVX512-NEXT: vpextrd $1, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $1, %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %ecx
-; AVX512-NEXT: movl %eax, %ecx
-; AVX512-NEXT: vmovd %xmm2, %esi
-; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %esi
-; AVX512-NEXT: vmovd %eax, %xmm1
-; AVX512-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $2, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $2, %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %ecx
-; AVX512-NEXT: vpinsrd $2, %eax, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $3, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $3, %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %ecx
-; AVX512-NEXT: vpinsrd $3, %eax, %xmm1, %xmm0
-; AVX512-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX512-NEXT: vcvtudq2pd %xmm2, %ymm1
+; AVX512-NEXT: vcvtudq2pd %xmm0, %ymm0
+; AVX512-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vcvttpd2udq %ymm0, %xmm0
+; AVX512-NEXT: vmovaps %xmm0, (%rdi)
+; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%res = call <4 x i32> @llvm.vp.udiv.v4i32(<4 x i32> %a0, <4 x i32> %a1, <4 x i1> <i1 -1, i1 -1, i1 -1, i1 -1>, i32 %vp)
store <4 x i32> %res, ptr %out
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
index e4391666547ec..ccea182ad60b7 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
@@ -488,30 +488,62 @@ define <4 x i32> @test_divv_4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
; SSE41-NEXT: movdqa %xmm2, %xmm0
; SSE41-NEXT: retq
;
-; AVX-LABEL: test_divv_4i32:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrd $1, %xmm0, %eax
-; AVX-NEXT: vpextrd $1, %xmm1, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: movl %eax, %ecx
-; AVX-NEXT: vmovd %xmm0, %eax
-; AVX-NEXT: vmovd %xmm1, %esi
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %esi
-; AVX-NEXT: vmovd %eax, %xmm2
-; AVX-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrd $2, %xmm0, %eax
-; AVX-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrd $3, %xmm0, %eax
-; AVX-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: test_divv_4i32:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vpextrd $1, %xmm0, %eax
+; AVX1-NEXT: vpextrd $1, %xmm1, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: movl %eax, %ecx
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: vmovd %xmm1, %esi
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %esi
+; AVX1-NEXT: vmovd %eax, %xmm2
+; AVX1-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
+; AVX1-NEXT: vpextrd $2, %xmm0, %eax
+; AVX1-NEXT: vpextrd $2, %xmm1, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
+; AVX1-NEXT: vpextrd $3, %xmm0, %eax
+; AVX1-NEXT: vpextrd $3, %xmm1, %ecx
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divl %ecx
+; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX2NOBW-LABEL: test_divv_4i32:
+; AVX2NOBW: # %bb.0:
+; AVX2NOBW-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX2NOBW-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15]
+; AVX2NOBW-NEXT: vpor %ymm2, %ymm1, %ymm1
+; AVX2NOBW-NEXT: vsubpd %ymm2, %ymm1, %ymm1
+; AVX2NOBW-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2NOBW-NEXT: vpor %ymm2, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vsubpd %ymm2, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm0, %xmm1
+; AVX2NOBW-NEXT: vpsrad $31, %xmm1, %xmm2
+; AVX2NOBW-NEXT: vbroadcastsd {{.*#+}} ymm3 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]
+; AVX2NOBW-NEXT: vsubpd %ymm3, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX2NOBW-NEXT: vandpd %xmm2, %xmm0, %xmm0
+; AVX2NOBW-NEXT: vorpd %xmm0, %xmm1, %xmm0
+; AVX2NOBW-NEXT: vzeroupper
+; AVX2NOBW-NEXT: retq
+;
+; AVX512BW-LABEL: test_divv_4i32:
+; AVX512BW: # %bb.0:
+; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
+; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
+; AVX512BW-NEXT: vcvtudq2pd %ymm1, %zmm1
+; AVX512BW-NEXT: vcvtudq2pd %ymm0, %zmm0
+; AVX512BW-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX512BW-NEXT: vcvttpd2udq %zmm0, %ymm0
+; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
+; AVX512BW-NEXT: vzeroupper
+; AVX512BW-NEXT: retq
%res = udiv <4 x i32> %a, %b
ret <4 x i32> %res
}
@@ -645,65 +677,96 @@ define <8 x i16> @test_divv_8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
; SSE41-NEXT: movdqa %xmm2, %xmm0
; SSE41-NEXT: retq
;
-; AVX-LABEL: test_divv_8i16:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $1, %xmm0, %eax
-; AVX-NEXT: vpextrw $1, %xmm1, %ecx
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %cx
-; AVX-NEXT: movl %eax, %ecx
-; AVX-NEXT: vmovd %xmm0, %eax
-; AVX-NEXT: vmovd %xmm1, %esi
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %si
-; AVX-NEXT: # kill: def $ax killed $ax def $eax
-; AVX-NEXT: vmovd %eax, %xmm2
-; AVX-NEXT: vpinsrw $1, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $2, %xmm0, %eax
-; AVX-NEXT: vpextrw $2, %xmm1, %ecx
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %cx
-; AVX-NEXT: # kill: def $ax killed $ax def $eax
-; AVX-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $3, %xmm0, %eax
-; AVX-NEXT: vpextrw $3, %xmm1, %ecx
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %cx
-; AVX-NEXT: # kill: def $ax killed $ax def $eax
-; AVX-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $4, %xmm0, %eax
-; AVX-NEXT: vpextrw $4, %xmm1, %ecx
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %cx
-; AVX-NEXT: # kill: def $ax killed $ax def $eax
-; AVX-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $5, %xmm0, %eax
-; AVX-NEXT: vpextrw $5, %xmm1, %ecx
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %cx
-; AVX-NEXT: # kill: def $ax killed $ax def $eax
-; AVX-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $6, %xmm0, %eax
-; AVX-NEXT: vpextrw $6, %xmm1, %ecx
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %cx
-; AVX-NEXT: # kill: def $ax killed $ax def $eax
-; AVX-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrw $7, %xmm0, %eax
-; AVX-NEXT: vpextrw $7, %xmm1, %ecx
-; AVX-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divw %cx
-; AVX-NEXT: # kill: def $ax killed $ax def $eax
-; AVX-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: test_divv_8i16:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vpextrw $1, %xmm0, %eax
+; AVX1-NEXT: vpextrw $1, %xmm1, %ecx
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %cx
+; AVX1-NEXT: movl %eax, %ecx
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: vmovd %xmm1, %esi
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %si
+; AVX1-NEXT: # kill: def $ax killed $ax def $eax
+; AVX1-NEXT: vmovd %eax, %xmm2
+; AVX1-NEXT: vpinsrw $1, %ecx, %xmm2, %xmm2
+; AVX1-NEXT: vpextrw $2, %xmm0, %eax
+; AVX1-NEXT: vpextrw $2, %xmm1, %ecx
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %cx
+; AVX1-NEXT: # kill: def $ax killed $ax def $eax
+; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
+; AVX1-NEXT: vpextrw $3, %xmm0, %eax
+; AVX1-NEXT: vpextrw $3, %xmm1, %ecx
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %cx
+; AVX1-NEXT: # kill: def $ax killed $ax def $eax
+; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
+; AVX1-NEXT: vpextrw $4, %xmm0, %eax
+; AVX1-NEXT: vpextrw $4, %xmm1, %ecx
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %cx
+; AVX1-NEXT: # kill: def $ax killed $ax def $eax
+; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
+; AVX1-NEXT: vpextrw $5, %xmm0, %eax
+; AVX1-NEXT: vpextrw $5, %xmm1, %ecx
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %cx
+; AVX1-NEXT: # kill: def $ax killed $ax def $eax
+; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
+; AVX1-NEXT: vpextrw $6, %xmm0, %eax
+; AVX1-NEXT: vpextrw $6, %xmm1, %ecx
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %cx
+; AVX1-NEXT: # kill: def $ax killed $ax def $eax
+; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
+; AVX1-NEXT: vpextrw $7, %xmm0, %eax
+; AVX1-NEXT: vpextrw $7, %xmm1, %ecx
+; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
+; AVX1-NEXT: xorl %edx, %edx
+; AVX1-NEXT: divw %cx
+; AVX1-NEXT: # kill: def $ax killed $ax def $eax
+; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX2NOBW-LABEL: test_divv_8i16:
+; AVX2NOBW: # %bb.0:
+; AVX2NOBW-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm2, %ymm2
+; AVX2NOBW-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm3
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm3, %ymm3
+; AVX2NOBW-NEXT: vdivpd %ymm2, %ymm3, %ymm2
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm2, %xmm2
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm1, %ymm1
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm0, %ymm0
+; AVX2NOBW-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX2NOBW-NEXT: vpackusdw %xmm2, %xmm0, %xmm0
+; AVX2NOBW-NEXT: vzeroupper
+; AVX2NOBW-NEXT: retq
+;
+; AVX512BW-LABEL: test_divv_8i16:
+; AVX512BW: # %bb.0:
+; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
+; AVX512BW-NEXT: vcvtdq2pd %ymm1, %zmm1
+; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX512BW-NEXT: vcvtdq2pd %ymm0, %zmm0
+; AVX512BW-NEXT: vdivpd %zmm1, %zmm0, %zmm0
+; AVX512BW-NEXT: vcvttpd2dq %zmm0, %ymm0
+; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
+; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
+; AVX512BW-NEXT: vzeroupper
+; AVX512BW-NEXT: retq
%res = udiv <8 x i16> %a, %b
ret <8 x i16> %res
}
@@ -927,118 +990,172 @@ define <16 x i8> @test_divv_16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; SSE41-NEXT: popq %rbp
; SSE41-NEXT: retq
;
-; AVX-LABEL: test_divv_16i8:
-; AVX: # %bb.0:
-; AVX-NEXT: pushq %rbp
-; AVX-NEXT: pushq %r15
-; AVX-NEXT: pushq %r14
-; AVX-NEXT: pushq %r13
-; AVX-NEXT: pushq %r12
-; AVX-NEXT: pushq %rbx
-; AVX-NEXT: vpextrb $1, %xmm1, %ecx
-; AVX-NEXT: vpextrb $1, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: # kill: def $al killed $al def $eax
-; AVX-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; AVX-NEXT: vmovd %xmm1, %ecx
-; AVX-NEXT: vmovd %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %esi
-; AVX-NEXT: vpextrb $2, %xmm1, %ecx
-; AVX-NEXT: vpextrb $2, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %edx
-; AVX-NEXT: vpextrb $3, %xmm1, %ecx
-; AVX-NEXT: vpextrb $3, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %edi
-; AVX-NEXT: vpextrb $4, %xmm1, %ecx
-; AVX-NEXT: vpextrb $4, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r8d
-; AVX-NEXT: vpextrb $5, %xmm1, %ecx
-; AVX-NEXT: vpextrb $5, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r9d
-; AVX-NEXT: vpextrb $6, %xmm1, %ecx
-; AVX-NEXT: vpextrb $6, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r10d
-; AVX-NEXT: vpextrb $7, %xmm1, %ecx
-; AVX-NEXT: vpextrb $7, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r11d
-; AVX-NEXT: vpextrb $8, %xmm1, %ecx
-; AVX-NEXT: vpextrb $8, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %ebx
-; AVX-NEXT: vpextrb $9, %xmm1, %ecx
-; AVX-NEXT: vpextrb $9, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %ebp
-; AVX-NEXT: vpextrb $10, %xmm1, %ecx
-; AVX-NEXT: vpextrb $10, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r14d
-; AVX-NEXT: vpextrb $11, %xmm1, %ecx
-; AVX-NEXT: vpextrb $11, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r15d
-; AVX-NEXT: vpextrb $12, %xmm1, %ecx
-; AVX-NEXT: vpextrb $12, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r12d
-; AVX-NEXT: vpextrb $13, %xmm1, %ecx
-; AVX-NEXT: vpextrb $13, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %r13d
-; AVX-NEXT: vpextrb $14, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: vpextrb $14, %xmm1, %ecx
-; AVX-NEXT: divb %cl
-; AVX-NEXT: movl %eax, %ecx
-; AVX-NEXT: vmovd %esi, %xmm2
-; AVX-NEXT: vpextrb $15, %xmm0, %eax
-; AVX-NEXT: movzbl %al, %eax
-; AVX-NEXT: vpextrb $15, %xmm1, %esi
-; AVX-NEXT: divb %sil
-; AVX-NEXT: # kill: def $al killed $al def $eax
-; AVX-NEXT: vpinsrb $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2, %xmm0 # 4-byte Folded Reload
-; AVX-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $3, %edi, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $4, %r8d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $5, %r9d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $6, %r10d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $8, %ebx, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $9, %ebp, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $10, %r14d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $11, %r15d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $12, %r12d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $13, %r13d, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
-; AVX-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
-; AVX-NEXT: popq %rbx
-; AVX-NEXT: popq %r12
-; AVX-NEXT: popq %r13
-; AVX-NEXT: popq %r14
-; AVX-NEXT: popq %r15
-; AVX-NEXT: popq %rbp
-; AVX-NEXT: retq
+; AVX1-LABEL: test_divv_16i8:
+; AVX1: # %bb.0:
+; AVX1-NEXT: pushq %rbp
+; AVX1-NEXT: pushq %r15
+; AVX1-NEXT: pushq %r14
+; AVX1-NEXT: pushq %r13
+; AVX1-NEXT: pushq %r12
+; AVX1-NEXT: pushq %rbx
+; AVX1-NEXT: vpextrb $1, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $1, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: # kill: def $al killed $al def $eax
+; AVX1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
+; AVX1-NEXT: vmovd %xmm1, %ecx
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %esi
+; AVX1-NEXT: vpextrb $2, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $2, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %edx
+; AVX1-NEXT: vpextrb $3, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $3, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %edi
+; AVX1-NEXT: vpextrb $4, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $4, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r8d
+; AVX1-NEXT: vpextrb $5, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $5, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r9d
+; AVX1-NEXT: vpextrb $6, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $6, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r10d
+; AVX1-NEXT: vpextrb $7, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $7, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r11d
+; AVX1-NEXT: vpextrb $8, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $8, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %ebx
+; AVX1-NEXT: vpextrb $9, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $9, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %ebp
+; AVX1-NEXT: vpextrb $10, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $10, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r14d
+; AVX1-NEXT: vpextrb $11, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $11, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r15d
+; AVX1-NEXT: vpextrb $12, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $12, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r12d
+; AVX1-NEXT: vpextrb $13, %xmm1, %ecx
+; AVX1-NEXT: vpextrb $13, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %r13d
+; AVX1-NEXT: vpextrb $14, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: vpextrb $14, %xmm1, %ecx
+; AVX1-NEXT: divb %cl
+; AVX1-NEXT: movl %eax, %ecx
+; AVX1-NEXT: vmovd %esi, %xmm2
+; AVX1-NEXT: vpextrb $15, %xmm0, %eax
+; AVX1-NEXT: movzbl %al, %eax
+; AVX1-NEXT: vpextrb $15, %xmm1, %esi
+; AVX1-NEXT: divb %sil
+; AVX1-NEXT: # kill: def $al killed $al def $eax
+; AVX1-NEXT: vpinsrb $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2, %xmm0 # 4-byte Folded Reload
+; AVX1-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $3, %edi, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $4, %r8d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $5, %r9d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $6, %r10d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $8, %ebx, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $9, %ebp, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $10, %r14d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $11, %r15d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $12, %r12d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $13, %r13d, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
+; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+; AVX1-NEXT: popq %rbx
+; AVX1-NEXT: popq %r12
+; AVX1-NEXT: popq %r13
+; AVX1-NEXT: popq %r14
+; AVX1-NEXT: popq %r15
+; AVX1-NEXT: popq %rbp
+; AVX1-NEXT: retq
+;
+; AVX2NOBW-LABEL: test_divv_16i8:
+; AVX2NOBW: # %bb.0:
+; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm2, %xmm3
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm3, %ymm3
+; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm4 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm4, %xmm5
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm5, %ymm5
+; AVX2NOBW-NEXT: vdivpd %ymm3, %ymm5, %ymm3
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm3, %xmm3
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm2, %ymm2
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm4, %ymm4
+; AVX2NOBW-NEXT: vdivpd %ymm2, %ymm4, %ymm2
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm2, %xmm2
+; AVX2NOBW-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
+; AVX2NOBW-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
+; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm3
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm3, %ymm3
+; AVX2NOBW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm4
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm4, %ymm4
+; AVX2NOBW-NEXT: vdivpd %ymm3, %ymm4, %ymm3
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm3, %xmm3
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm1, %ymm1
+; AVX2NOBW-NEXT: vcvtdq2pd %xmm0, %ymm0
+; AVX2NOBW-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX2NOBW-NEXT: vpackssdw %xmm3, %xmm0, %xmm0
+; AVX2NOBW-NEXT: vpackuswb %xmm0, %xmm2, %xmm0
+; AVX2NOBW-NEXT: vzeroupper
+; AVX2NOBW-NEXT: retq
+;
+; AVX512BW-LABEL: test_divv_16i8:
+; AVX512BW: # %bb.0:
+; AVX512BW-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
+; AVX512BW-NEXT: vextracti64x4 $1, %zmm1, %ymm2
+; AVX512BW-NEXT: vcvtdq2pd %ymm2, %zmm2
+; AVX512BW-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
+; AVX512BW-NEXT: vextracti64x4 $1, %zmm0, %ymm3
+; AVX512BW-NEXT: vcvtdq2pd %ymm3, %zmm3
+; AVX512BW-NEXT: vdivpd %zmm2, %zmm3, %zmm2
+; AVX512BW-NEXT: vcvttpd2dq %zmm2, %ymm2
+; AVX512BW-NEXT: vpmovdb %zmm2, %xmm2
+; AVX512BW-NEXT: vcvtdq2pd %ymm1, %zmm1
+; AVX512BW-NEXT: vcvtdq2pd %ymm0, %zmm0
+; AVX512BW-NEXT: vdivpd %zmm1, %zmm0, %zmm0
+; AVX512BW-NEXT: vcvttpd2dq %zmm0, %ymm0
+; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
+; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
+; AVX512BW-NEXT: vzeroupper
+; AVX512BW-NEXT: retq
%res = udiv <16 x i8> %a, %b
ret <16 x i8> %res
}
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
index 4e49042bae105..7b061d358a7bb 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
@@ -413,54 +413,46 @@ define <8 x i32> @test_divv_8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: retq
;
-; AVX2-LABEL: test_divv_8i32:
-; AVX2: # %bb.0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpextrd $1, %xmm2, %eax
-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
-; AVX2-NEXT: vpextrd $1, %xmm3, %ecx
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: vmovd %xmm2, %eax
-; AVX2-NEXT: vmovd %xmm3, %esi
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %esi
-; AVX2-NEXT: vmovd %eax, %xmm4
-; AVX2-NEXT: vpinsrd $1, %ecx, %xmm4, %xmm4
-; AVX2-NEXT: vpextrd $2, %xmm2, %eax
-; AVX2-NEXT: vpextrd $2, %xmm3, %ecx
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $2, %eax, %xmm4, %xmm4
-; AVX2-NEXT: vpextrd $3, %xmm2, %eax
-; AVX2-NEXT: vpextrd $3, %xmm3, %ecx
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $3, %eax, %xmm4, %xmm2
-; AVX2-NEXT: vpextrd $1, %xmm0, %eax
-; AVX2-NEXT: vpextrd $1, %xmm1, %ecx
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: vmovd %xmm0, %eax
-; AVX2-NEXT: vmovd %xmm1, %esi
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %esi
-; AVX2-NEXT: vmovd %eax, %xmm3
-; AVX2-NEXT: vpinsrd $1, %ecx, %xmm3, %xmm3
-; AVX2-NEXT: vpextrd $2, %xmm0, %eax
-; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
-; AVX2-NEXT: vpextrd $3, %xmm0, %eax
-; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $3, %eax, %xmm3, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
-; AVX2-NEXT: retq
+; AVX2NOBW-LABEL: test_divv_8i32:
+; AVX2NOBW: # %bb.0:
+; AVX2NOBW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX2NOBW-NEXT: vpbroadcastq {{.*#+}} ymm3 = [4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15]
+; AVX2NOBW-NEXT: vpor %ymm3, %ymm2, %ymm2
+; AVX2NOBW-NEXT: vsubpd %ymm3, %ymm2, %ymm2
+; AVX2NOBW-NEXT: vpmovzxdq {{.*#+}} ymm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2NOBW-NEXT: vpor %ymm3, %ymm4, %ymm4
+; AVX2NOBW-NEXT: vsubpd %ymm3, %ymm4, %ymm4
+; AVX2NOBW-NEXT: vdivpd %ymm2, %ymm4, %ymm2
+; AVX2NOBW-NEXT: vbroadcastsd {{.*#+}} ymm4 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]
+; AVX2NOBW-NEXT: vsubpd %ymm4, %ymm2, %ymm5
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm5, %xmm5
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm1
+; AVX2NOBW-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX2NOBW-NEXT: vpor %ymm3, %ymm1, %ymm1
+; AVX2NOBW-NEXT: vsubpd %ymm3, %ymm1, %ymm1
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm0
+; AVX2NOBW-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2NOBW-NEXT: vpor %ymm3, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vsubpd %ymm3, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vsubpd %ymm4, %ymm0, %ymm1
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm1, %xmm1
+; AVX2NOBW-NEXT: vinsertf128 $1, %xmm1, %ymm5, %ymm1
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm2, %xmm2
+; AVX2NOBW-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX2NOBW-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
+; AVX2NOBW-NEXT: vpsrad $31, %ymm0, %ymm2
+; AVX2NOBW-NEXT: vandpd %ymm2, %ymm1, %ymm1
+; AVX2NOBW-NEXT: vorpd %ymm1, %ymm0, %ymm0
+; AVX2NOBW-NEXT: retq
+;
+; AVX512BW-LABEL: test_divv_8i32:
+; AVX512BW: # %bb.0:
+; AVX512BW-NEXT: vcvtudq2pd %ymm1, %zmm1
+; AVX512BW-NEXT: vcvtudq2pd %ymm0, %zmm0
+; AVX512BW-NEXT: vdivpd %zmm1, %zmm0, %zmm0
+; AVX512BW-NEXT: vcvttpd2udq %zmm0, %ymm0
+; AVX512BW-NEXT: retq
%res = udiv <8 x i32> %a, %b
ret <8 x i32> %res
}
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
index b21b827745a9c..8bde992e6a05c 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
@@ -8,77 +8,101 @@
;
define <8 x i64> @test_div7_8i64(<8 x i64> %a) nounwind {
-; AVX-LABEL: test_div7_8i64:
-; AVX: # %bb.0:
-; AVX-NEXT: vextracti32x4 $3, %zmm0, %xmm1
-; AVX-NEXT: vpextrq $1, %xmm1, %rcx
-; AVX-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm2
-; AVX-NEXT: vmovq %xmm1, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm1
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
-; AVX-NEXT: vextracti32x4 $2, %zmm0, %xmm2
-; AVX-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm3
-; AVX-NEXT: vmovq %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm2
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; AVX-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
-; AVX-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm3
-; AVX-NEXT: vmovq %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm2
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; AVX-NEXT: vpextrq $1, %xmm0, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm3
-; AVX-NEXT: vmovq %xmm0, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: subq %rdx, %rcx
-; AVX-NEXT: shrq %rcx
-; AVX-NEXT: addq %rdx, %rcx
-; AVX-NEXT: vmovq %rcx, %xmm0
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
-; AVX-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
-; AVX-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
-; AVX-NEXT: vpsrlq $2, %zmm0, %zmm0
-; AVX-NEXT: retq
+; NODQ-LABEL: test_div7_8i64:
+; NODQ: # %bb.0:
+; NODQ-NEXT: vextracti32x4 $3, %zmm0, %xmm1
+; NODQ-NEXT: vpextrq $1, %xmm1, %rcx
+; NODQ-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm2
+; NODQ-NEXT: vmovq %xmm1, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm1
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; NODQ-NEXT: vextracti32x4 $2, %zmm0, %xmm2
+; NODQ-NEXT: vpextrq $1, %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm3
+; NODQ-NEXT: vmovq %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm2
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; NODQ-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
+; NODQ-NEXT: vextracti128 $1, %ymm0, %xmm2
+; NODQ-NEXT: vpextrq $1, %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm3
+; NODQ-NEXT: vmovq %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm2
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; NODQ-NEXT: vpextrq $1, %xmm0, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm3
+; NODQ-NEXT: vmovq %xmm0, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: subq %rdx, %rcx
+; NODQ-NEXT: shrq %rcx
+; NODQ-NEXT: addq %rdx, %rcx
+; NODQ-NEXT: vmovq %rcx, %xmm0
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
+; NODQ-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; NODQ-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
+; NODQ-NEXT: vpsrlq $2, %zmm0, %zmm0
+; NODQ-NEXT: retq
+;
+; AVX512DQ-LABEL: test_div7_8i64:
+; AVX512DQ: # %bb.0:
+; AVX512DQ-NEXT: vpbroadcastq {{.*#+}} zmm1 = [7,7,7,7,7,7,7,7]
+; AVX512DQ-NEXT: vcvtuqq2pd {ru-sae}, %zmm1, %zmm2
+; AVX512DQ-NEXT: vbroadcastsd {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
+; AVX512DQ-NEXT: vdivpd {rd-sae}, %zmm2, %zmm3, %zmm2
+; AVX512DQ-NEXT: vcvtuqq2pd {rd-sae}, %zmm0, %zmm3
+; AVX512DQ-NEXT: vmulpd {rd-sae}, %zmm2, %zmm3, %zmm3
+; AVX512DQ-NEXT: vcvtpd2uqq {rd-sae}, %zmm3, %zmm3
+; AVX512DQ-NEXT: vpsllq $3, %zmm3, %zmm4
+; AVX512DQ-NEXT: vpsubq %zmm4, %zmm3, %zmm4
+; AVX512DQ-NEXT: vpaddq %zmm4, %zmm0, %zmm0
+; AVX512DQ-NEXT: vcvtuqq2pd {rd-sae}, %zmm0, %zmm4
+; AVX512DQ-NEXT: vmulpd {rd-sae}, %zmm2, %zmm4, %zmm2
+; AVX512DQ-NEXT: vcvtpd2uqq {rd-sae}, %zmm2, %zmm2
+; AVX512DQ-NEXT: vpsllq $3, %zmm2, %zmm4
+; AVX512DQ-NEXT: vpsubq %zmm4, %zmm2, %zmm4
+; AVX512DQ-NEXT: vpaddq %zmm4, %zmm0, %zmm0
+; AVX512DQ-NEXT: vpcmpnltuq %zmm1, %zmm0, %k0
+; AVX512DQ-NEXT: vpmovm2q %k0, %zmm0
+; AVX512DQ-NEXT: vpaddq %zmm2, %zmm3, %zmm1
+; AVX512DQ-NEXT: vpsubq %zmm0, %zmm1, %zmm0
+; AVX512DQ-NEXT: retq
%res = udiv <8 x i64> %a, <i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7>
ret <8 x i64> %res
}
@@ -294,62 +318,83 @@ define <64 x i8> @test_divconstant_64i8(<64 x i8> %a) nounwind {
;
define <8 x i64> @test_divv_8i64(<8 x i64> %a, <8 x i64> %b) nounwind {
-; AVX-LABEL: test_divv_8i64:
-; AVX: # %bb.0:
-; AVX-NEXT: vextracti32x4 $3, %zmm0, %xmm2
-; AVX-NEXT: vpextrq $1, %xmm2, %rax
-; AVX-NEXT: vextracti32x4 $3, %zmm1, %xmm3
-; AVX-NEXT: vpextrq $1, %xmm3, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm4
-; AVX-NEXT: vmovq %xmm2, %rax
-; AVX-NEXT: vmovq %xmm3, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm2
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm4[0]
-; AVX-NEXT: vextracti32x4 $2, %zmm0, %xmm3
-; AVX-NEXT: vpextrq $1, %xmm3, %rax
-; AVX-NEXT: vextracti32x4 $2, %zmm1, %xmm4
-; AVX-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm5
-; AVX-NEXT: vmovq %xmm3, %rax
-; AVX-NEXT: vmovq %xmm4, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm3
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]
-; AVX-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2
-; AVX-NEXT: vextracti128 $1, %ymm0, %xmm3
-; AVX-NEXT: vpextrq $1, %xmm3, %rax
-; AVX-NEXT: vextracti128 $1, %ymm1, %xmm4
-; AVX-NEXT: vpextrq $1, %xmm4, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm5
-; AVX-NEXT: vmovq %xmm3, %rax
-; AVX-NEXT: vmovq %xmm4, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm3
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]
-; AVX-NEXT: vpextrq $1, %xmm0, %rax
-; AVX-NEXT: vpextrq $1, %xmm1, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm4
-; AVX-NEXT: vmovq %xmm0, %rax
-; AVX-NEXT: vmovq %xmm1, %rcx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divq %rcx
-; AVX-NEXT: vmovq %rax, %xmm0
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm4[0]
-; AVX-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
-; AVX-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
-; AVX-NEXT: retq
+; NODQ-LABEL: test_divv_8i64:
+; NODQ: # %bb.0:
+; NODQ-NEXT: vextracti32x4 $3, %zmm0, %xmm2
+; NODQ-NEXT: vpextrq $1, %xmm2, %rax
+; NODQ-NEXT: vextracti32x4 $3, %zmm1, %xmm3
+; NODQ-NEXT: vpextrq $1, %xmm3, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm4
+; NODQ-NEXT: vmovq %xmm2, %rax
+; NODQ-NEXT: vmovq %xmm3, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm2
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm4[0]
+; NODQ-NEXT: vextracti32x4 $2, %zmm0, %xmm3
+; NODQ-NEXT: vpextrq $1, %xmm3, %rax
+; NODQ-NEXT: vextracti32x4 $2, %zmm1, %xmm4
+; NODQ-NEXT: vpextrq $1, %xmm4, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm5
+; NODQ-NEXT: vmovq %xmm3, %rax
+; NODQ-NEXT: vmovq %xmm4, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm3
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]
+; NODQ-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2
+; NODQ-NEXT: vextracti128 $1, %ymm0, %xmm3
+; NODQ-NEXT: vpextrq $1, %xmm3, %rax
+; NODQ-NEXT: vextracti128 $1, %ymm1, %xmm4
+; NODQ-NEXT: vpextrq $1, %xmm4, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm5
+; NODQ-NEXT: vmovq %xmm3, %rax
+; NODQ-NEXT: vmovq %xmm4, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm3
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm5[0]
+; NODQ-NEXT: vpextrq $1, %xmm0, %rax
+; NODQ-NEXT: vpextrq $1, %xmm1, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm4
+; NODQ-NEXT: vmovq %xmm0, %rax
+; NODQ-NEXT: vmovq %xmm1, %rcx
+; NODQ-NEXT: xorl %edx, %edx
+; NODQ-NEXT: divq %rcx
+; NODQ-NEXT: vmovq %rax, %xmm0
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm4[0]
+; NODQ-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
+; NODQ-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; NODQ-NEXT: retq
+;
+; AVX512DQ-LABEL: test_divv_8i64:
+; AVX512DQ: # %bb.0:
+; AVX512DQ-NEXT: vcvtuqq2pd {ru-sae}, %zmm1, %zmm2
+; AVX512DQ-NEXT: vbroadcastsd {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
+; AVX512DQ-NEXT: vdivpd {rd-sae}, %zmm2, %zmm3, %zmm2
+; AVX512DQ-NEXT: vcvtuqq2pd {rd-sae}, %zmm0, %zmm3
+; AVX512DQ-NEXT: vmulpd {rd-sae}, %zmm2, %zmm3, %zmm3
+; AVX512DQ-NEXT: vcvtpd2uqq {rd-sae}, %zmm3, %zmm3
+; AVX512DQ-NEXT: vpmullq %zmm1, %zmm3, %zmm4
+; AVX512DQ-NEXT: vpsubq %zmm4, %zmm0, %zmm0
+; AVX512DQ-NEXT: vcvtuqq2pd {rd-sae}, %zmm0, %zmm4
+; AVX512DQ-NEXT: vmulpd {rd-sae}, %zmm2, %zmm4, %zmm2
+; AVX512DQ-NEXT: vcvtpd2uqq {rd-sae}, %zmm2, %zmm2
+; AVX512DQ-NEXT: vpaddq %zmm2, %zmm3, %zmm3
+; AVX512DQ-NEXT: vpmullq %zmm1, %zmm2, %zmm2
+; AVX512DQ-NEXT: vpsubq %zmm2, %zmm0, %zmm0
+; AVX512DQ-NEXT: vpcmpnltuq %zmm1, %zmm0, %k0
+; AVX512DQ-NEXT: vpmovm2q %k0, %zmm0
+; AVX512DQ-NEXT: vpsubq %zmm0, %zmm3, %zmm0
+; AVX512DQ-NEXT: retq
%res = udiv <8 x i64> %a, %b
ret <8 x i64> %res
}
@@ -357,99 +402,17 @@ define <8 x i64> @test_divv_8i64(<8 x i64> %a, <8 x i64> %b) nounwind {
define <16 x i32> @test_divv_16i32(<16 x i32> %a, <16 x i32> %b) nounwind {
; AVX-LABEL: test_divv_16i32:
; AVX: # %bb.0:
-; AVX-NEXT: vextracti32x4 $3, %zmm0, %xmm2
-; AVX-NEXT: vpextrd $1, %xmm2, %eax
-; AVX-NEXT: vextracti32x4 $3, %zmm1, %xmm3
-; AVX-NEXT: vpextrd $1, %xmm3, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: movl %eax, %ecx
-; AVX-NEXT: vmovd %xmm2, %eax
-; AVX-NEXT: vmovd %xmm3, %esi
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %esi
-; AVX-NEXT: vmovd %eax, %xmm4
-; AVX-NEXT: vpinsrd $1, %ecx, %xmm4, %xmm4
-; AVX-NEXT: vpextrd $2, %xmm2, %eax
-; AVX-NEXT: vpextrd $2, %xmm3, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $2, %eax, %xmm4, %xmm4
-; AVX-NEXT: vpextrd $3, %xmm2, %eax
-; AVX-NEXT: vpextrd $3, %xmm3, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $3, %eax, %xmm4, %xmm2
-; AVX-NEXT: vextracti32x4 $2, %zmm0, %xmm3
-; AVX-NEXT: vpextrd $1, %xmm3, %eax
-; AVX-NEXT: vextracti32x4 $2, %zmm1, %xmm4
-; AVX-NEXT: vpextrd $1, %xmm4, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: movl %eax, %ecx
-; AVX-NEXT: vmovd %xmm3, %eax
-; AVX-NEXT: vmovd %xmm4, %esi
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %esi
-; AVX-NEXT: vmovd %eax, %xmm5
-; AVX-NEXT: vpinsrd $1, %ecx, %xmm5, %xmm5
-; AVX-NEXT: vpextrd $2, %xmm3, %eax
-; AVX-NEXT: vpextrd $2, %xmm4, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $2, %eax, %xmm5, %xmm5
-; AVX-NEXT: vpextrd $3, %xmm3, %eax
-; AVX-NEXT: vpextrd $3, %xmm4, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $3, %eax, %xmm5, %xmm3
-; AVX-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2
-; AVX-NEXT: vextracti128 $1, %ymm0, %xmm3
-; AVX-NEXT: vpextrd $1, %xmm3, %eax
-; AVX-NEXT: vextracti128 $1, %ymm1, %xmm4
-; AVX-NEXT: vpextrd $1, %xmm4, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: movl %eax, %ecx
-; AVX-NEXT: vmovd %xmm3, %eax
-; AVX-NEXT: vmovd %xmm4, %esi
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %esi
-; AVX-NEXT: vmovd %eax, %xmm5
-; AVX-NEXT: vpinsrd $1, %ecx, %xmm5, %xmm5
-; AVX-NEXT: vpextrd $2, %xmm3, %eax
-; AVX-NEXT: vpextrd $2, %xmm4, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $2, %eax, %xmm5, %xmm5
-; AVX-NEXT: vpextrd $3, %xmm3, %eax
-; AVX-NEXT: vpextrd $3, %xmm4, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $3, %eax, %xmm5, %xmm3
-; AVX-NEXT: vpextrd $1, %xmm0, %eax
-; AVX-NEXT: vpextrd $1, %xmm1, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: movl %eax, %ecx
-; AVX-NEXT: vmovd %xmm0, %eax
-; AVX-NEXT: vmovd %xmm1, %esi
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %esi
-; AVX-NEXT: vmovd %eax, %xmm4
-; AVX-NEXT: vpinsrd $1, %ecx, %xmm4, %xmm4
-; AVX-NEXT: vpextrd $2, %xmm0, %eax
-; AVX-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $2, %eax, %xmm4, %xmm4
-; AVX-NEXT: vpextrd $3, %xmm0, %eax
-; AVX-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX-NEXT: xorl %edx, %edx
-; AVX-NEXT: divl %ecx
-; AVX-NEXT: vpinsrd $3, %eax, %xmm4, %xmm0
-; AVX-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
-; AVX-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
+; AVX-NEXT: vcvtudq2pd %ymm1, %zmm2
+; AVX-NEXT: vcvtudq2pd %ymm0, %zmm3
+; AVX-NEXT: vdivpd %zmm2, %zmm3, %zmm2
+; AVX-NEXT: vcvttpd2udq %zmm2, %ymm2
+; AVX-NEXT: vextractf64x4 $1, %zmm1, %ymm1
+; AVX-NEXT: vcvtudq2pd %ymm1, %zmm1
+; AVX-NEXT: vextractf64x4 $1, %zmm0, %ymm0
+; AVX-NEXT: vcvtudq2pd %ymm0, %zmm0
+; AVX-NEXT: vdivpd %zmm1, %zmm0, %zmm0
+; AVX-NEXT: vcvttpd2udq %zmm0, %ymm0
+; AVX-NEXT: vinsertf64x4 $1, %ymm0, %zmm2, %zmm0
; AVX-NEXT: retq
%res = udiv <16 x i32> %a, %b
ret <16 x i32> %res
@@ -824,6 +787,3 @@ define <64 x i8> @test_remconstant_64i8(<64 x i8> %a) nounwind {
%res = urem <64 x i8> %a, <i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34, i8 35, i8 36, i8 37, i8 38, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7>
ret <64 x i8> %res
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; AVX512DQ: {{.*}}
-; NODQ: {{.*}}
>From 7b0f493a7eb7022a04949f6954f26f76a90a4072 Mon Sep 17 00:00:00 2001
From: Adam Scott <adamscott200322 at gmail.com>
Date: Tue, 30 Jun 2026 09:14:04 +0000
Subject: [PATCH 3/3] [X86] Extend vector integer division fold to signed,
remainder, and SSE2
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 102 ++-
.../CodeGen/X86/2011-10-19-LegelizeLoad.ll | 25 +-
.../X86/div-rem-pair-recomposition-signed.ll | 574 ++++----------
.../div-rem-pair-recomposition-unsigned.ll | 478 ++++--------
.../CodeGen/X86/expand-vp-int-intrinsics.ll | 395 +++-------
llvm/test/CodeGen/X86/known-bits.ll | 56 +-
llvm/test/CodeGen/X86/known-never-zero.ll | 75 +-
llvm/test/CodeGen/X86/scalar_widen_div.ll | 167 ++--
llvm/test/CodeGen/X86/shrink_vmul.ll | 182 ++---
llvm/test/CodeGen/X86/split-vector-rem.ll | 94 +--
llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll | 457 +++++------
llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll | 716 +++++-------------
llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 242 +++---
llvm/test/CodeGen/X86/vector-idiv-v2i32.ll | 100 +--
llvm/test/CodeGen/X86/vector-rem.ll | 47 +-
15 files changed, 1239 insertions(+), 2471 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c88e7e70fadde..2b30022bfdcdb 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2818,6 +2818,9 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
ISD::SETCC,
ISD::MUL,
ISD::UDIV,
+ ISD::SDIV,
+ ISD::UREM,
+ ISD::SREM,
ISD::XOR,
ISD::MSCATTER,
ISD::MGATHER,
@@ -50772,20 +50775,29 @@ static SDValue combineMulToPMADD52(SDNode *N, const SDLoc &DL,
return SDValue();
}
-// x86 has no vector integer divide instructions. Lower vector UDIV through f64
-// division instead of scalarizing into N scalar hardware divides.
-static SDValue combineUDIV(SDNode *N, SelectionDAG &DAG,
- TargetLowering::DAGCombinerInfo &DCI,
- const X86Subtarget &Subtarget) {
+// x86 has no vector integer divide instructions. Lower vector
+// UDIV/SDIV/UREM/SREM through float division instead of scalarizing into N
+// scalar hardware divides.
+static SDValue combineIntDivRem(SDNode *N, SelectionDAG &DAG,
+ TargetLowering::DAGCombinerInfo &DCI,
+ const X86Subtarget &Subtarget) {
EVT VT = N->getValueType(0);
SDLoc DL(N);
- // Run before the legalizer expands the UDIV.
+ // Run before the legalizer expands the division.
if (!VT.isVector() || !DCI.isBeforeLegalizeOps())
return SDValue();
+ // Don't introduce a trapping FP divide under strict FP.
+ if (DAG.getMachineFunction().getFunction().hasFnAttribute(
+ Attribute::StrictFP))
+ return SDValue();
+
SDValue Dividend = N->getOperand(0);
SDValue Divisor = N->getOperand(1);
+ unsigned Opc = N->getOpcode();
+ bool IsRem = Opc == ISD::UREM || Opc == ISD::SREM;
+ bool IsSigned = Opc == ISD::SDIV || Opc == ISD::SREM;
// If the result is only read back as scalar extracts, scalarization computes
// just the demanded lanes.
@@ -50794,18 +50806,31 @@ static SDValue combineUDIV(SDNode *N, SelectionDAG &DAG,
}))
return SDValue();
- // i8/i16/i32: a single f64 divide is exact because they fit the 53-bit
- // mantissa, so on AVX2+ we divide as f64. Constant divisors are better
- // handled by the vectorized magic-multiply.
- if (VT.getScalarSizeInBits() <= 32 && Subtarget.hasAVX2()) {
+ // i8/i16/i32: operands fit the float mantissa exactly (f32 for <=16-bit, f64
+ // for 32-bit) so one float divide is exact.
+ if (VT.getScalarSizeInBits() <= 32 && Subtarget.hasSSE2()) {
+ // <=32-bit constant divisors are better as magic multiply (unlike i64,
+ // whose magic multiply is huge, so the i64 path below keeps constants).
if (DAG.isConstantIntBuildVectorOrConstantInt(Divisor))
return SDValue();
- EVT FPVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64,
+ // Unsigned i32 needs FP_TO_UINT(f64->u32) which is emulated and a loss
+ // before AVX2
+ if (!IsSigned && VT.getScalarSizeInBits() == 32 && !Subtarget.hasAVX2())
+ return SDValue();
+ MVT FPSclVT = VT.getScalarSizeInBits() <= 16 ? MVT::f32 : MVT::f64;
+ EVT FPVT = EVT::getVectorVT(*DAG.getContext(), FPSclVT,
VT.getVectorElementCount());
- SDValue X = DAG.getNode(ISD::UINT_TO_FP, DL, FPVT, Dividend);
- SDValue Y = DAG.getNode(ISD::UINT_TO_FP, DL, FPVT, Divisor);
+ unsigned ToFP = IsSigned ? ISD::SINT_TO_FP : ISD::UINT_TO_FP;
+ unsigned FromFP = IsSigned ? ISD::FP_TO_SINT : ISD::FP_TO_UINT;
+ SDValue X = DAG.getNode(ToFP, DL, FPVT, Dividend);
+ SDValue Y = DAG.getNode(ToFP, DL, FPVT, Divisor);
SDValue Quot = DAG.getNode(ISD::FDIV, DL, FPVT, X, Y);
- return DAG.getNode(ISD::FP_TO_UINT, DL, VT, Quot);
+ SDValue Q = DAG.getNode(FromFP, DL, VT, Quot);
+ if (!IsRem)
+ return Q;
+ // rem = dividend - quotient * divisor
+ return DAG.getNode(ISD::SUB, DL, VT, Dividend,
+ DAG.getNode(ISD::MUL, DL, VT, Q, Divisor));
}
// i64: f64 cannot hold the quotient exactly, so compute a round-down
@@ -50839,26 +50864,46 @@ static SDValue combineUDIV(SDNode *N, SelectionDAG &DAG,
return Emit(Intrinsic::x86_avx512_mul_pd_512, FPVT, {A, B, RD});
};
+ // For a signed divide, work on absolute values and reapply the sign below.
+ SDValue A = IsSigned ? DAG.getNode(ISD::ABS, DL, VT, Dividend) : Dividend;
+ SDValue B = IsSigned ? DAG.getNode(ISD::ABS, DL, VT, Divisor) : Divisor;
+
// b_rcp = round_down(1.0 / round_up(double(b)))
- SDValue Recip =
- Emit(Intrinsic::x86_avx512_div_pd_512, FPVT,
- {DAG.getConstantFP(1.0, DL, FPVT), UToF(Divisor, RU), RD});
+ SDValue Recip = Emit(Intrinsic::x86_avx512_div_pd_512, FPVT,
+ {DAG.getConstantFP(1.0, DL, FPVT), UToF(B, RU), RD});
// first = round_down(uint64(round_down(double(a)) * b_rcp))
- SDValue First = FToU(FMul(UToF(Dividend, RD), Recip));
+ SDValue First = FToU(FMul(UToF(A, RD), Recip));
// rem = a - first * b
- SDValue Rem = DAG.getNode(ISD::SUB, DL, VT, Dividend,
- DAG.getNode(ISD::MUL, DL, VT, First, Divisor));
+ SDValue Rem = DAG.getNode(ISD::SUB, DL, VT, A,
+ DAG.getNode(ISD::MUL, DL, VT, First, B));
// refine with a second iteration on the remainder
SDValue Second = FToU(FMul(UToF(Rem, RD), Recip));
- SDValue Result = DAG.getNode(ISD::ADD, DL, VT, First, Second);
- // result += (a - (first + second) * b) >= b
+ SDValue Quot = DAG.getNode(ISD::ADD, DL, VT, First, Second);
+ // rem = a - (first + second) * b, which may still be >= b (off by one)
Rem = DAG.getNode(ISD::SUB, DL, VT, Rem,
- DAG.getNode(ISD::MUL, DL, VT, Second, Divisor));
+ DAG.getNode(ISD::MUL, DL, VT, Second, B));
EVT CCVT = DAG.getTargetLoweringInfo().getSetCCResultType(
DAG.getDataLayout(), *DAG.getContext(), VT);
- SDValue Ge = DAG.getSetCC(DL, CCVT, Rem, Divisor, ISD::SETUGE);
- return DAG.getNode(ISD::ADD, DL, VT, Result,
- DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Ge));
+ SDValue Ge = DAG.getSetCC(DL, CCVT, Rem, B, ISD::SETUGE);
+ // Apply the +1 correction to the quotient or remainder (magnitude if
+ // signed).
+ SDValue Mag;
+ if (IsRem)
+ Mag =
+ DAG.getSelect(DL, VT, Ge, DAG.getNode(ISD::SUB, DL, VT, Rem, B), Rem);
+ else
+ Mag = DAG.getNode(ISD::ADD, DL, VT, Quot,
+ DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Ge));
+ if (!IsSigned)
+ return Mag;
+ // A quotient is negative when the operand signs differ. A remainder takes
+ // the dividend's sign.
+ SDValue SignSrc =
+ IsRem ? Dividend : DAG.getNode(ISD::XOR, DL, VT, Dividend, Divisor);
+ SDValue Zero = DAG.getConstant(0, DL, VT);
+ SDValue IsNeg = DAG.getSetCC(DL, CCVT, SignSrc, Zero, ISD::SETLT);
+ return DAG.getSelect(DL, VT, IsNeg,
+ DAG.getNode(ISD::SUB, DL, VT, Zero, Mag), Mag);
}
return SDValue();
@@ -63294,7 +63339,10 @@ SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
case X86ISD::SBB: return combineSBB(N, DAG);
case X86ISD::ADC: return combineADC(N, DAG, DCI);
case ISD::MUL: return combineMul(N, DAG, DCI, Subtarget);
- case ISD::UDIV: return combineUDIV(N, DAG, DCI, Subtarget);
+ case ISD::UDIV:
+ case ISD::SDIV:
+ case ISD::UREM:
+ case ISD::SREM: return combineIntDivRem(N, DAG, DCI, Subtarget);
case ISD::SHL: return combineShiftLeft(N, DAG, Subtarget);
case ISD::SRA: return combineShiftRightArithmetic(N, DAG, Subtarget);
case ISD::SRL: return combineShiftRightLogical(N, DAG, DCI, Subtarget);
diff --git a/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll b/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
index 65ff22f960f23..10d6877da7ed7 100644
--- a/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
+++ b/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
@@ -17,21 +17,16 @@ target triple = "x86_64-unknown-linux-gnu"
define dso_local i32 @main() nounwind uwtable {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movl i(%rip), %esi
-; CHECK-NEXT: movl j(%rip), %eax
-; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: shrl $8, %edx
-; CHECK-NEXT: movsbl %al, %ecx
-; CHECK-NEXT: shrl $8, %eax
-; CHECK-NEXT: cbtw
-; CHECK-NEXT: idivb %dl
-; CHECK-NEXT: movl %eax, %edx
-; CHECK-NEXT: movl %ecx, %eax
-; CHECK-NEXT: idivb %sil
-; CHECK-NEXT: movzbl %dl, %ecx
-; CHECK-NEXT: movzbl %al, %eax
-; CHECK-NEXT: movd %eax, %xmm0
-; CHECK-NEXT: pinsrb $1, %ecx, %xmm0
+; CHECK-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
+; CHECK-NEXT: pmovsxbd %xmm0, %xmm0
+; CHECK-NEXT: cvtdq2ps %xmm0, %xmm0
+; CHECK-NEXT: pmovsxbd %xmm1, %xmm1
+; CHECK-NEXT: cvtdq2ps %xmm1, %xmm1
+; CHECK-NEXT: divps %xmm0, %xmm1
+; CHECK-NEXT: cvttps2dq %xmm1, %xmm0
+; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
+; CHECK-NEXT: packsswb %xmm0, %xmm0
; CHECK-NEXT: pextrw $0, %xmm0, res(%rip)
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
index 00f2e012c8b12..5cfdbb7af38ad 100644
--- a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
+++ b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
@@ -595,229 +595,111 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwind {
; X86-LABEL: vector_i128_i8:
; X86: # %bb.0:
-; X86-NEXT: pushl %ebp
-; X86-NEXT: movl %esp, %ebp
-; X86-NEXT: pushl %ebx
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: andl $-16, %esp
-; X86-NEXT: subl $48, %esp
-; X86-NEXT: movdqa %xmm0, (%esp)
-; X86-NEXT: movdqa %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm5
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm5
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm6
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %edx
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %esi
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %edi
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %ebx
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: movsbl (%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
-; X86-NEXT: movd %edx, %xmm7
-; X86-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; X86-NEXT: movd %esi, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; X86-NEXT: movd %edi, %xmm2
-; X86-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm7[0],xmm4[1],xmm7[1],xmm4[2],xmm7[2],xmm4[3],xmm7[3],xmm4[4],xmm7[4],xmm4[5],xmm7[5],xmm4[6],xmm7[6],xmm4[7],xmm7[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
-; X86-NEXT: movd %ebx, %xmm5
-; X86-NEXT: movzbl %cl, %ecx
-; X86-NEXT: movd %ecx, %xmm6
-; X86-NEXT: movl 8(%ebp), %ecx
-; X86-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3],xmm2[4],xmm6[4],xmm2[5],xmm6[5],xmm2[6],xmm6[6],xmm2[7],xmm6[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
-; X86-NEXT: movdqa %xmm2, %xmm4
-; X86-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm3[0]
-; X86-NEXT: movdqa %xmm4, (%ecx)
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
-; X86-NEXT: movdqa %xmm1, %xmm4
-; X86-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
-; X86-NEXT: pmullw %xmm3, %xmm4
-; X86-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
-; X86-NEXT: pand %xmm3, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
+; X86-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
+; X86-NEXT: psrad $24, %xmm3
+; X86-NEXT: cvtdq2ps %xmm3, %xmm3
+; X86-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm0[8],xmm4[9],xmm0[9],xmm4[10],xmm0[10],xmm4[11],xmm0[11],xmm4[12],xmm0[12],xmm4[13],xmm0[13],xmm4[14],xmm0[14],xmm4[15],xmm0[15]
+; X86-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; X86-NEXT: psrad $24, %xmm5
+; X86-NEXT: cvtdq2ps %xmm5, %xmm5
+; X86-NEXT: divps %xmm3, %xmm5
+; X86-NEXT: cvttps2dq %xmm5, %xmm3
+; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3]
+; X86-NEXT: psrad $24, %xmm2
+; X86-NEXT: cvtdq2ps %xmm2, %xmm2
+; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3]
+; X86-NEXT: psrad $24, %xmm4
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: divps %xmm2, %xmm4
+; X86-NEXT: cvttps2dq %xmm4, %xmm2
+; X86-NEXT: packssdw %xmm3, %xmm2
+; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
+; X86-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; X86-NEXT: psrad $24, %xmm4
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1],xmm5[2],xmm0[2],xmm5[3],xmm0[3],xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7]
+; X86-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
+; X86-NEXT: psrad $24, %xmm6
+; X86-NEXT: cvtdq2ps %xmm6, %xmm6
+; X86-NEXT: divps %xmm4, %xmm6
+; X86-NEXT: cvttps2dq %xmm6, %xmm6
+; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3]
+; X86-NEXT: psrad $24, %xmm3
+; X86-NEXT: cvtdq2ps %xmm3, %xmm3
+; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
+; X86-NEXT: psrad $24, %xmm4
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: divps %xmm3, %xmm4
+; X86-NEXT: cvttps2dq %xmm4, %xmm4
+; X86-NEXT: packssdw %xmm6, %xmm4
+; X86-NEXT: movdqa %xmm1, %xmm3
; X86-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
-; X86-NEXT: pmullw %xmm2, %xmm1
-; X86-NEXT: pand %xmm3, %xmm1
-; X86-NEXT: packuswb %xmm4, %xmm1
+; X86-NEXT: pmullw %xmm4, %xmm1
+; X86-NEXT: packsswb %xmm2, %xmm4
+; X86-NEXT: movdqa %xmm4, (%eax)
+; X86-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; X86-NEXT: pmullw %xmm2, %xmm3
+; X86-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
+; X86-NEXT: pand %xmm2, %xmm3
+; X86-NEXT: pand %xmm2, %xmm1
+; X86-NEXT: packuswb %xmm3, %xmm1
; X86-NEXT: psubb %xmm1, %xmm0
-; X86-NEXT: leal -12(%ebp), %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: popl %ebx
-; X86-NEXT: popl %ebp
; X86-NEXT: retl
;
; X64-LABEL: vector_i128_i8:
; X64: # %bb.0:
-; X64-NEXT: pushq %rbp
-; X64-NEXT: pushq %r15
-; X64-NEXT: pushq %r14
-; X64-NEXT: pushq %r13
-; X64-NEXT: pushq %r12
-; X64-NEXT: pushq %rbx
-; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; X64-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
-; X64-NEXT: movdqa %xmm1, -{{[0-9]+}}(%rsp)
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %eax
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %edi
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %esi
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r8d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r9d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r10d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r11d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %ebx
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %ebp
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r14d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r15d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r12d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r13d
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %edx
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movd %edi, %xmm3
-; X64-NEXT: movd %esi, %xmm4
-; X64-NEXT: movd %r8d, %xmm5
-; X64-NEXT: movd %r9d, %xmm6
-; X64-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; X64-NEXT: movd %r10d, %xmm7
-; X64-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
-; X64-NEXT: movd %r11d, %xmm4
-; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
-; X64-NEXT: movd %ebx, %xmm2
-; X64-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3],xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
-; X64-NEXT: movd %ebp, %xmm3
-; X64-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
-; X64-NEXT: movd %r14d, %xmm4
-; X64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm7[0],xmm2[1],xmm7[1],xmm2[2],xmm7[2],xmm2[3],xmm7[3]
-; X64-NEXT: movd %r15d, %xmm6
-; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1]
-; X64-NEXT: movd %r12d, %xmm5
-; X64-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; X64-NEXT: movd %r13d, %xmm3
-; X64-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3],xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
-; X64-NEXT: movd %edx, %xmm6
-; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
-; X64-NEXT: movzbl %cl, %ecx
-; X64-NEXT: movd %ecx, %xmm4
-; X64-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3],xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7]
-; X64-NEXT: movzbl %al, %eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
-; X64-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1],xmm3[2],xmm6[2],xmm3[3],xmm6[3]
-; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1]
-; X64-NEXT: movdqa %xmm3, %xmm4
-; X64-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm2[0]
-; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
-; X64-NEXT: movdqa %xmm4, (%rax)
-; X64-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X64-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
+; X64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
+; X64-NEXT: psrad $24, %xmm3
+; X64-NEXT: cvtdq2ps %xmm3, %xmm3
+; X64-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm0[8],xmm4[9],xmm0[9],xmm4[10],xmm0[10],xmm4[11],xmm0[11],xmm4[12],xmm0[12],xmm4[13],xmm0[13],xmm4[14],xmm0[14],xmm4[15],xmm0[15]
+; X64-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; X64-NEXT: psrad $24, %xmm5
+; X64-NEXT: cvtdq2ps %xmm5, %xmm5
+; X64-NEXT: divps %xmm3, %xmm5
+; X64-NEXT: cvttps2dq %xmm5, %xmm3
+; X64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3]
+; X64-NEXT: psrad $24, %xmm2
+; X64-NEXT: cvtdq2ps %xmm2, %xmm2
+; X64-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3]
+; X64-NEXT: psrad $24, %xmm4
+; X64-NEXT: cvtdq2ps %xmm4, %xmm4
+; X64-NEXT: divps %xmm2, %xmm4
+; X64-NEXT: cvttps2dq %xmm4, %xmm2
+; X64-NEXT: packssdw %xmm3, %xmm2
+; X64-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
+; X64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; X64-NEXT: psrad $24, %xmm4
+; X64-NEXT: cvtdq2ps %xmm4, %xmm4
+; X64-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1],xmm5[2],xmm0[2],xmm5[3],xmm0[3],xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7]
+; X64-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
+; X64-NEXT: psrad $24, %xmm6
+; X64-NEXT: cvtdq2ps %xmm6, %xmm6
+; X64-NEXT: divps %xmm4, %xmm6
+; X64-NEXT: cvttps2dq %xmm6, %xmm4
+; X64-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3]
+; X64-NEXT: psrad $24, %xmm3
+; X64-NEXT: cvtdq2ps %xmm3, %xmm3
+; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3]
+; X64-NEXT: psrad $24, %xmm5
+; X64-NEXT: cvtdq2ps %xmm5, %xmm5
+; X64-NEXT: divps %xmm3, %xmm5
+; X64-NEXT: cvttps2dq %xmm5, %xmm3
+; X64-NEXT: packssdw %xmm4, %xmm3
; X64-NEXT: movdqa %xmm1, %xmm4
+; X64-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X64-NEXT: pmullw %xmm3, %xmm1
+; X64-NEXT: packsswb %xmm2, %xmm3
+; X64-NEXT: movdqa %xmm3, (%rdi)
; X64-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; X64-NEXT: pmullw %xmm2, %xmm4
; X64-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; X64-NEXT: pand %xmm2, %xmm4
-; X64-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
-; X64-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
-; X64-NEXT: pmullw %xmm3, %xmm1
; X64-NEXT: pand %xmm2, %xmm1
; X64-NEXT: packuswb %xmm4, %xmm1
; X64-NEXT: psubb %xmm1, %xmm0
-; X64-NEXT: popq %rbx
-; X64-NEXT: popq %r12
-; X64-NEXT: popq %r13
-; X64-NEXT: popq %r14
-; X64-NEXT: popq %r15
-; X64-NEXT: popq %rbp
; X64-NEXT: retq
%div = sdiv <16 x i8> %x, %y
store <16 x i8> %div, ptr %divdst, align 16
@@ -829,145 +711,51 @@ define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwi
define <8 x i16> @vector_i128_i16(<8 x i16> %x, <8 x i16> %y, ptr %divdst) nounwind {
; X86-LABEL: vector_i128_i16:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: pextrw $7, %xmm0, %eax
-; X86-NEXT: pextrw $7, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: pextrw $6, %xmm0, %eax
-; X86-NEXT: pextrw $6, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; X86-NEXT: pextrw $5, %xmm0, %eax
-; X86-NEXT: pextrw $5, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: pextrw $4, %xmm0, %eax
-; X86-NEXT: pextrw $4, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; X86-NEXT: pextrw $3, %xmm0, %eax
-; X86-NEXT: pextrw $3, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: pextrw $2, %xmm0, %eax
-; X86-NEXT: pextrw $2, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
-; X86-NEXT: pextrw $1, %xmm0, %eax
-; X86-NEXT: pextrw $1, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: movd %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: cwtd
-; X86-NEXT: idivw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm5
-; X86-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
-; X86-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; X86-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm2[0]
-; X86-NEXT: movdqa %xmm5, (%ecx)
-; X86-NEXT: pmullw %xmm1, %xmm5
-; X86-NEXT: psubw %xmm5, %xmm0
-; X86-NEXT: popl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
+; X86-NEXT: psrad $16, %xmm2
+; X86-NEXT: cvtdq2ps %xmm2, %xmm2
+; X86-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
+; X86-NEXT: psrad $16, %xmm3
+; X86-NEXT: cvtdq2ps %xmm3, %xmm3
+; X86-NEXT: divps %xmm2, %xmm3
+; X86-NEXT: cvttps2dq %xmm3, %xmm2
+; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
+; X86-NEXT: psrad $16, %xmm3
+; X86-NEXT: cvtdq2ps %xmm3, %xmm3
+; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3]
+; X86-NEXT: psrad $16, %xmm4
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: divps %xmm3, %xmm4
+; X86-NEXT: cvttps2dq %xmm4, %xmm3
+; X86-NEXT: packssdw %xmm2, %xmm3
+; X86-NEXT: movdqa %xmm3, (%eax)
+; X86-NEXT: pmullw %xmm1, %xmm3
+; X86-NEXT: psubw %xmm3, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: vector_i128_i16:
; X64: # %bb.0:
-; X64-NEXT: pextrw $7, %xmm0, %eax
-; X64-NEXT: pextrw $7, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: pextrw $6, %xmm0, %eax
-; X64-NEXT: pextrw $6, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; X64-NEXT: pextrw $5, %xmm0, %eax
-; X64-NEXT: pextrw $5, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm4
-; X64-NEXT: pextrw $4, %xmm0, %eax
-; X64-NEXT: pextrw $4, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
-; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; X64-NEXT: pextrw $3, %xmm0, %eax
-; X64-NEXT: pextrw $3, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: pextrw $2, %xmm0, %eax
-; X64-NEXT: pextrw $2, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm4
-; X64-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
-; X64-NEXT: pextrw $1, %xmm0, %eax
-; X64-NEXT: pextrw $1, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: movd %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: cwtd
-; X64-NEXT: idivw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm5
-; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
-; X64-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
-; X64-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm2[0]
-; X64-NEXT: movdqa %xmm5, (%rdi)
-; X64-NEXT: pmullw %xmm1, %xmm5
-; X64-NEXT: psubw %xmm5, %xmm0
+; X64-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
+; X64-NEXT: psrad $16, %xmm2
+; X64-NEXT: cvtdq2ps %xmm2, %xmm2
+; X64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
+; X64-NEXT: psrad $16, %xmm3
+; X64-NEXT: cvtdq2ps %xmm3, %xmm3
+; X64-NEXT: divps %xmm2, %xmm3
+; X64-NEXT: cvttps2dq %xmm3, %xmm2
+; X64-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
+; X64-NEXT: psrad $16, %xmm3
+; X64-NEXT: cvtdq2ps %xmm3, %xmm3
+; X64-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3]
+; X64-NEXT: psrad $16, %xmm4
+; X64-NEXT: cvtdq2ps %xmm4, %xmm4
+; X64-NEXT: divps %xmm3, %xmm4
+; X64-NEXT: cvttps2dq %xmm4, %xmm3
+; X64-NEXT: packssdw %xmm2, %xmm3
+; X64-NEXT: movdqa %xmm3, (%rdi)
+; X64-NEXT: pmullw %xmm1, %xmm3
+; X64-NEXT: psubw %xmm3, %xmm0
; X64-NEXT: retq
%div = sdiv <8 x i16> %x, %y
store <8 x i16> %div, ptr %divdst, align 16
@@ -979,81 +767,43 @@ define <8 x i16> @vector_i128_i16(<8 x i16> %x, <8 x i16> %y, ptr %divdst) nounw
define <4 x i32> @vector_i128_i32(<4 x i32> %x, <4 x i32> %y, ptr %divdst) nounwind {
; X86-LABEL: vector_i128_i32:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
-; X86-NEXT: movd %xmm2, %eax
-; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
-; X86-NEXT: movd %xmm2, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,2,3]
-; X86-NEXT: movd %xmm2, %eax
-; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
-; X86-NEXT: movd %xmm2, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: movd %xmm1, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
-; X86-NEXT: movd %xmm4, %eax
-; X86-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,1,1]
-; X86-NEXT: movd %xmm4, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
-; X86-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm2[0]
-; X86-NEXT: movdqa %xmm3, (%ecx)
-; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3]
-; X86-NEXT: pmuludq %xmm1, %xmm3
-; X86-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cvtdq2pd %xmm1, %xmm2
+; X86-NEXT: cvtdq2pd %xmm0, %xmm3
+; X86-NEXT: divpd %xmm2, %xmm3
+; X86-NEXT: cvttpd2dq %xmm3, %xmm2
+; X86-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; X86-NEXT: cvtdq2pd %xmm3, %xmm3
+; X86-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; X86-NEXT: cvtdq2pd %xmm4, %xmm4
+; X86-NEXT: divpd %xmm3, %xmm4
+; X86-NEXT: cvttpd2dq %xmm4, %xmm3
+; X86-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; X86-NEXT: movapd %xmm2, (%eax)
+; X86-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
+; X86-NEXT: pmuludq %xmm1, %xmm2
+; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
-; X86-NEXT: pmuludq %xmm2, %xmm1
+; X86-NEXT: pmuludq %xmm3, %xmm1
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; X86-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
-; X86-NEXT: psubd %xmm3, %xmm0
-; X86-NEXT: popl %esi
+; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; X86-NEXT: psubd %xmm2, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: vector_i128_i32:
; X64: # %bb.0:
-; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
-; X64-NEXT: movd %xmm2, %eax
-; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
-; X64-NEXT: movd %xmm2, %ecx
-; X64-NEXT: cltd
-; X64-NEXT: idivl %ecx
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
-; X64-NEXT: movd %xmm3, %eax
+; X64-NEXT: cvtdq2pd %xmm1, %xmm2
+; X64-NEXT: cvtdq2pd %xmm0, %xmm3
+; X64-NEXT: divpd %xmm2, %xmm3
+; X64-NEXT: cvttpd2dq %xmm3, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
-; X64-NEXT: movd %xmm3, %ecx
-; X64-NEXT: cltd
-; X64-NEXT: idivl %ecx
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: movd %xmm1, %ecx
-; X64-NEXT: cltd
-; X64-NEXT: idivl %ecx
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
-; X64-NEXT: movd %xmm4, %eax
-; X64-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,1,1]
-; X64-NEXT: movd %xmm4, %ecx
-; X64-NEXT: cltd
-; X64-NEXT: idivl %ecx
-; X64-NEXT: movd %eax, %xmm4
-; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
-; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; X64-NEXT: movdqa %xmm2, (%rdi)
+; X64-NEXT: cvtdq2pd %xmm3, %xmm3
+; X64-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; X64-NEXT: cvtdq2pd %xmm4, %xmm4
+; X64-NEXT: divpd %xmm3, %xmm4
+; X64-NEXT: cvttpd2dq %xmm4, %xmm3
+; X64-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; X64-NEXT: movapd %xmm2, (%rdi)
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
; X64-NEXT: pmuludq %xmm1, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
diff --git a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
index 3d756f3cf2141..488a6d5860c40 100644
--- a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
+++ b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
@@ -550,229 +550,113 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwind {
; X86-LABEL: vector_i128_i8:
; X86: # %bb.0:
-; X86-NEXT: pushl %ebp
-; X86-NEXT: movl %esp, %ebp
-; X86-NEXT: pushl %ebx
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: andl $-16, %esp
-; X86-NEXT: subl $48, %esp
-; X86-NEXT: movdqa %xmm0, (%esp)
-; X86-NEXT: movdqa %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm5
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm5
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm6
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %edx
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %esi
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %edi
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %ebx
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: movzbl (%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
-; X86-NEXT: movd %edx, %xmm7
-; X86-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; X86-NEXT: movd %esi, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; X86-NEXT: movd %edi, %xmm2
-; X86-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm7[0],xmm4[1],xmm7[1],xmm4[2],xmm7[2],xmm4[3],xmm7[3],xmm4[4],xmm7[4],xmm4[5],xmm7[5],xmm4[6],xmm7[6],xmm4[7],xmm7[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
-; X86-NEXT: movd %ebx, %xmm5
-; X86-NEXT: movzbl %cl, %ecx
-; X86-NEXT: movd %ecx, %xmm6
-; X86-NEXT: movl 8(%ebp), %ecx
-; X86-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3],xmm2[4],xmm6[4],xmm2[5],xmm6[5],xmm2[6],xmm6[6],xmm2[7],xmm6[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1]
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pxor %xmm3, %xmm3
+; X86-NEXT: movdqa %xmm1, %xmm2
+; X86-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm3[8],xmm2[9],xmm3[9],xmm2[10],xmm3[10],xmm2[11],xmm3[11],xmm2[12],xmm3[12],xmm2[13],xmm3[13],xmm2[14],xmm3[14],xmm2[15],xmm3[15]
; X86-NEXT: movdqa %xmm2, %xmm4
-; X86-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm3[0]
-; X86-NEXT: movdqa %xmm4, (%ecx)
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X86-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: movdqa %xmm0, %xmm5
+; X86-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm3[8],xmm5[9],xmm3[9],xmm5[10],xmm3[10],xmm5[11],xmm3[11],xmm5[12],xmm3[12],xmm5[13],xmm3[13],xmm5[14],xmm3[14],xmm5[15],xmm3[15]
+; X86-NEXT: movdqa %xmm5, %xmm6
+; X86-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7]
+; X86-NEXT: cvtdq2ps %xmm6, %xmm6
+; X86-NEXT: divps %xmm4, %xmm6
+; X86-NEXT: cvttps2dq %xmm6, %xmm4
+; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
+; X86-NEXT: cvtdq2ps %xmm2, %xmm2
+; X86-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
+; X86-NEXT: cvtdq2ps %xmm5, %xmm5
+; X86-NEXT: divps %xmm2, %xmm5
+; X86-NEXT: cvttps2dq %xmm5, %xmm2
+; X86-NEXT: packssdw %xmm4, %xmm2
; X86-NEXT: movdqa %xmm1, %xmm4
-; X86-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
-; X86-NEXT: pmullw %xmm3, %xmm4
-; X86-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
-; X86-NEXT: pand %xmm3, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X86-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; X86-NEXT: movdqa %xmm4, %xmm5
+; X86-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]
+; X86-NEXT: cvtdq2ps %xmm5, %xmm5
+; X86-NEXT: movdqa %xmm0, %xmm6
+; X86-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3],xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7]
+; X86-NEXT: movdqa %xmm6, %xmm7
+; X86-NEXT: punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
+; X86-NEXT: cvtdq2ps %xmm7, %xmm7
+; X86-NEXT: divps %xmm5, %xmm7
+; X86-NEXT: cvttps2dq %xmm7, %xmm5
+; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3]
+; X86-NEXT: cvtdq2ps %xmm6, %xmm3
+; X86-NEXT: divps %xmm4, %xmm3
+; X86-NEXT: cvttps2dq %xmm3, %xmm4
+; X86-NEXT: packssdw %xmm5, %xmm4
+; X86-NEXT: movdqa %xmm1, %xmm3
; X86-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
-; X86-NEXT: pmullw %xmm2, %xmm1
-; X86-NEXT: pand %xmm3, %xmm1
-; X86-NEXT: packuswb %xmm4, %xmm1
+; X86-NEXT: pmullw %xmm4, %xmm1
+; X86-NEXT: packuswb %xmm2, %xmm4
+; X86-NEXT: movdqa %xmm4, (%eax)
+; X86-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; X86-NEXT: pmullw %xmm2, %xmm3
+; X86-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
+; X86-NEXT: pand %xmm2, %xmm3
+; X86-NEXT: pand %xmm2, %xmm1
+; X86-NEXT: packuswb %xmm3, %xmm1
; X86-NEXT: psubb %xmm1, %xmm0
-; X86-NEXT: leal -12(%ebp), %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: popl %ebx
-; X86-NEXT: popl %ebp
; X86-NEXT: retl
;
; X64-LABEL: vector_i128_i8:
; X64: # %bb.0:
-; X64-NEXT: pushq %rbp
-; X64-NEXT: pushq %r15
-; X64-NEXT: pushq %r14
-; X64-NEXT: pushq %r13
-; X64-NEXT: pushq %r12
-; X64-NEXT: pushq %rbx
-; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; X64-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
-; X64-NEXT: movdqa %xmm1, -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %eax
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %edi
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %esi
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r8d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r9d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r10d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r11d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %ebx
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %ebp
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r14d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r15d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r12d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %r13d
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movzbl %al, %edx
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT: divb -{{[0-9]+}}(%rsp)
-; X64-NEXT: movd %edi, %xmm3
-; X64-NEXT: movd %esi, %xmm4
-; X64-NEXT: movd %r8d, %xmm5
-; X64-NEXT: movd %r9d, %xmm6
-; X64-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; X64-NEXT: movd %r10d, %xmm7
-; X64-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
-; X64-NEXT: movd %r11d, %xmm4
+; X64-NEXT: pxor %xmm3, %xmm3
+; X64-NEXT: movdqa %xmm1, %xmm2
+; X64-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm3[8],xmm2[9],xmm3[9],xmm2[10],xmm3[10],xmm2[11],xmm3[11],xmm2[12],xmm3[12],xmm2[13],xmm3[13],xmm2[14],xmm3[14],xmm2[15],xmm3[15]
+; X64-NEXT: movdqa %xmm2, %xmm4
+; X64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; X64-NEXT: cvtdq2ps %xmm4, %xmm4
+; X64-NEXT: movdqa %xmm0, %xmm5
+; X64-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm3[8],xmm5[9],xmm3[9],xmm5[10],xmm3[10],xmm5[11],xmm3[11],xmm5[12],xmm3[12],xmm5[13],xmm3[13],xmm5[14],xmm3[14],xmm5[15],xmm3[15]
+; X64-NEXT: movdqa %xmm5, %xmm6
+; X64-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7]
+; X64-NEXT: cvtdq2ps %xmm6, %xmm6
+; X64-NEXT: divps %xmm4, %xmm6
+; X64-NEXT: cvttps2dq %xmm6, %xmm4
+; X64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
+; X64-NEXT: cvtdq2ps %xmm2, %xmm2
; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
-; X64-NEXT: movd %ebx, %xmm2
-; X64-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3],xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
-; X64-NEXT: movd %ebp, %xmm3
-; X64-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
-; X64-NEXT: movd %r14d, %xmm4
-; X64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm7[0],xmm2[1],xmm7[1],xmm2[2],xmm7[2],xmm2[3],xmm7[3]
-; X64-NEXT: movd %r15d, %xmm6
-; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1]
-; X64-NEXT: movd %r12d, %xmm5
+; X64-NEXT: cvtdq2ps %xmm5, %xmm5
+; X64-NEXT: divps %xmm2, %xmm5
+; X64-NEXT: cvttps2dq %xmm5, %xmm2
+; X64-NEXT: packssdw %xmm4, %xmm2
+; X64-NEXT: movdqa %xmm1, %xmm4
; X64-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; X64-NEXT: movd %r13d, %xmm3
-; X64-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3],xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
-; X64-NEXT: movd %edx, %xmm6
-; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
-; X64-NEXT: movzbl %cl, %ecx
-; X64-NEXT: movd %ecx, %xmm4
+; X64-NEXT: movdqa %xmm4, %xmm5
+; X64-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]
+; X64-NEXT: cvtdq2ps %xmm5, %xmm5
+; X64-NEXT: movdqa %xmm0, %xmm6
; X64-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3],xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7]
-; X64-NEXT: movzbl %al, %eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
-; X64-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1],xmm3[2],xmm6[2],xmm3[3],xmm6[3]
-; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1]
-; X64-NEXT: movdqa %xmm3, %xmm4
-; X64-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm2[0]
-; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
-; X64-NEXT: movdqa %xmm4, (%rax)
-; X64-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X64-NEXT: movdqa %xmm6, %xmm7
+; X64-NEXT: punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
+; X64-NEXT: cvtdq2ps %xmm7, %xmm7
+; X64-NEXT: divps %xmm5, %xmm7
+; X64-NEXT: cvttps2dq %xmm7, %xmm5
+; X64-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
+; X64-NEXT: cvtdq2ps %xmm4, %xmm4
+; X64-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3]
+; X64-NEXT: cvtdq2ps %xmm6, %xmm3
+; X64-NEXT: divps %xmm4, %xmm3
+; X64-NEXT: cvttps2dq %xmm3, %xmm3
+; X64-NEXT: packssdw %xmm5, %xmm3
; X64-NEXT: movdqa %xmm1, %xmm4
+; X64-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; X64-NEXT: pmullw %xmm3, %xmm1
+; X64-NEXT: packuswb %xmm2, %xmm3
+; X64-NEXT: movdqa %xmm3, (%rdi)
; X64-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; X64-NEXT: pmullw %xmm2, %xmm4
; X64-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; X64-NEXT: pand %xmm2, %xmm4
-; X64-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
-; X64-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
-; X64-NEXT: pmullw %xmm3, %xmm1
; X64-NEXT: pand %xmm2, %xmm1
; X64-NEXT: packuswb %xmm4, %xmm1
; X64-NEXT: psubb %xmm1, %xmm0
-; X64-NEXT: popq %rbx
-; X64-NEXT: popq %r12
-; X64-NEXT: popq %r13
-; X64-NEXT: popq %r14
-; X64-NEXT: popq %r15
-; X64-NEXT: popq %rbp
; X64-NEXT: retq
%div = udiv <16 x i8> %x, %y
store <16 x i8> %div, ptr %divdst, align 16
@@ -784,145 +668,61 @@ define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwi
define <8 x i16> @vector_i128_i16(<8 x i16> %x, <8 x i16> %y, ptr %divdst) nounwind {
; X86-LABEL: vector_i128_i16:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: pextrw $7, %xmm0, %eax
-; X86-NEXT: pextrw $7, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: pextrw $6, %xmm0, %eax
-; X86-NEXT: pextrw $6, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; X86-NEXT: pextrw $5, %xmm0, %eax
-; X86-NEXT: pextrw $5, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: pextrw $4, %xmm0, %eax
-; X86-NEXT: pextrw $4, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; X86-NEXT: pextrw $3, %xmm0, %eax
-; X86-NEXT: pextrw $3, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: pextrw $2, %xmm0, %eax
-; X86-NEXT: pextrw $2, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
-; X86-NEXT: pextrw $1, %xmm0, %eax
-; X86-NEXT: pextrw $1, %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm4
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: movd %xmm1, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: xorl %edx, %edx
-; X86-NEXT: divw %si
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: movd %eax, %xmm5
-; X86-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
-; X86-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
-; X86-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm2[0]
-; X86-NEXT: movdqa %xmm5, (%ecx)
-; X86-NEXT: pmullw %xmm1, %xmm5
-; X86-NEXT: psubw %xmm5, %xmm0
-; X86-NEXT: popl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pxor %xmm3, %xmm3
+; X86-NEXT: movdqa %xmm1, %xmm2
+; X86-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
+; X86-NEXT: cvtdq2ps %xmm2, %xmm2
+; X86-NEXT: movdqa %xmm0, %xmm4
+; X86-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: divps %xmm2, %xmm4
+; X86-NEXT: cvttps2dq %xmm4, %xmm2
+; X86-NEXT: pslld $16, %xmm2
+; X86-NEXT: psrad $16, %xmm2
+; X86-NEXT: movdqa %xmm1, %xmm4
+; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
+; X86-NEXT: cvtdq2ps %xmm4, %xmm4
+; X86-NEXT: movdqa %xmm0, %xmm5
+; X86-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
+; X86-NEXT: cvtdq2ps %xmm5, %xmm3
+; X86-NEXT: divps %xmm4, %xmm3
+; X86-NEXT: cvttps2dq %xmm3, %xmm3
+; X86-NEXT: pslld $16, %xmm3
+; X86-NEXT: psrad $16, %xmm3
+; X86-NEXT: packssdw %xmm2, %xmm3
+; X86-NEXT: movdqa %xmm3, (%eax)
+; X86-NEXT: pmullw %xmm1, %xmm3
+; X86-NEXT: psubw %xmm3, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: vector_i128_i16:
; X64: # %bb.0:
-; X64-NEXT: pextrw $7, %xmm0, %eax
-; X64-NEXT: pextrw $7, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: pextrw $6, %xmm0, %eax
-; X64-NEXT: pextrw $6, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; X64-NEXT: pextrw $5, %xmm0, %eax
-; X64-NEXT: pextrw $5, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm4
-; X64-NEXT: pextrw $4, %xmm0, %eax
-; X64-NEXT: pextrw $4, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
-; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; X64-NEXT: pextrw $3, %xmm0, %eax
-; X64-NEXT: pextrw $3, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: pextrw $2, %xmm0, %eax
-; X64-NEXT: pextrw $2, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm4
-; X64-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
-; X64-NEXT: pextrw $1, %xmm0, %eax
-; X64-NEXT: pextrw $1, %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm3
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: movd %xmm1, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: divw %cx
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: movd %eax, %xmm5
-; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
-; X64-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
-; X64-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm2[0]
-; X64-NEXT: movdqa %xmm5, (%rdi)
-; X64-NEXT: pmullw %xmm1, %xmm5
-; X64-NEXT: psubw %xmm5, %xmm0
+; X64-NEXT: pxor %xmm2, %xmm2
+; X64-NEXT: movdqa %xmm1, %xmm3
+; X64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
+; X64-NEXT: cvtdq2ps %xmm3, %xmm3
+; X64-NEXT: movdqa %xmm0, %xmm4
+; X64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
+; X64-NEXT: cvtdq2ps %xmm4, %xmm4
+; X64-NEXT: divps %xmm3, %xmm4
+; X64-NEXT: cvttps2dq %xmm4, %xmm3
+; X64-NEXT: pslld $16, %xmm3
+; X64-NEXT: psrad $16, %xmm3
+; X64-NEXT: movdqa %xmm1, %xmm4
+; X64-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
+; X64-NEXT: cvtdq2ps %xmm4, %xmm4
+; X64-NEXT: movdqa %xmm0, %xmm5
+; X64-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3]
+; X64-NEXT: cvtdq2ps %xmm5, %xmm2
+; X64-NEXT: divps %xmm4, %xmm2
+; X64-NEXT: cvttps2dq %xmm2, %xmm2
+; X64-NEXT: pslld $16, %xmm2
+; X64-NEXT: psrad $16, %xmm2
+; X64-NEXT: packssdw %xmm3, %xmm2
+; X64-NEXT: movdqa %xmm2, (%rdi)
+; X64-NEXT: pmullw %xmm1, %xmm2
+; X64-NEXT: psubw %xmm2, %xmm0
; X64-NEXT: retq
%div = udiv <8 x i16> %x, %y
store <8 x i16> %div, ptr %divdst, align 16
diff --git a/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll b/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
index d3f0abe78e0f1..b63e0cadad8ef 100644
--- a/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
@@ -89,38 +89,18 @@ declare <4 x i32> @llvm.vp.mul.v4i32(<4 x i32>, <4 x i32>, <4 x i1>, i32)
define void @vp_sdiv_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) nounwind {
; X86-LABEL: vp_sdiv_v4i32:
; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm2
; X86-NEXT: vpmovsxbd {{.*#+}} xmm3 = [0,1,2,3]
; X86-NEXT: vpmaxud %xmm3, %xmm2, %xmm2
; X86-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; X86-NEXT: vblendvps %xmm2, {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm1
-; X86-NEXT: vextractps $1, %xmm1, %ecx
-; X86-NEXT: vpextrd $1, %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: vmovd %xmm1, %edi
-; X86-NEXT: vmovd %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %edi
-; X86-NEXT: vmovd %eax, %xmm2
-; X86-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; X86-NEXT: vpextrd $2, %xmm1, %ecx
-; X86-NEXT: vpextrd $2, %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
-; X86-NEXT: vpextrd $3, %xmm1, %ecx
-; X86-NEXT: vpextrd $3, %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
-; X86-NEXT: vmovdqa %xmm0, (%esi)
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: vcvtdq2pd %xmm1, %ymm1
+; X86-NEXT: vcvtdq2pd %xmm0, %ymm0
+; X86-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; X86-NEXT: vcvttpd2dq %ymm0, %xmm0
+; X86-NEXT: vmovapd %xmm0, (%eax)
+; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; SSE-LABEL: vp_sdiv_v4i32:
@@ -133,36 +113,18 @@ define void @vp_sdiv_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; SSE-NEXT: paddd %xmm2, %xmm1
; SSE-NEXT: pcmpeqd %xmm2, %xmm2
; SSE-NEXT: psubd %xmm2, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
-; SSE-NEXT: movd %xmm2, %ecx
-; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
-; SSE-NEXT: movd %xmm2, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %eax, %xmm2
-; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
-; SSE-NEXT: movd %xmm3, %ecx
-; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
-; SSE-NEXT: movd %xmm3, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %eax, %xmm3
-; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; SSE-NEXT: movd %xmm1, %ecx
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %eax, %xmm2
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
-; SSE-NEXT: movd %xmm1, %ecx
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %eax, %xmm0
-; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; SSE-NEXT: movdqa %xmm2, (%rdi)
+; SSE-NEXT: cvtdq2pd %xmm1, %xmm2
+; SSE-NEXT: cvtdq2pd %xmm0, %xmm3
+; SSE-NEXT: divpd %xmm2, %xmm3
+; SSE-NEXT: cvttpd2dq %xmm3, %xmm2
+; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
+; SSE-NEXT: cvtdq2pd %xmm1, %xmm1
+; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; SSE-NEXT: cvtdq2pd %xmm0, %xmm0
+; SSE-NEXT: divpd %xmm1, %xmm0
+; SSE-NEXT: cvttpd2dq %xmm0, %xmm0
+; SSE-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE-NEXT: movapd %xmm2, (%rdi)
; SSE-NEXT: retq
;
; AVX1-LABEL: vp_sdiv_v4i32:
@@ -173,28 +135,12 @@ define void @vp_sdiv_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX1-NEXT: vpmaxud %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vblendvps %xmm2, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vextractps $1, %xmm1, %ecx
-; AVX1-NEXT: vpextrd $1, %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %ecx
-; AVX1-NEXT: movl %eax, %ecx
-; AVX1-NEXT: vmovd %xmm1, %esi
-; AVX1-NEXT: vmovd %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %esi
-; AVX1-NEXT: vmovd %eax, %xmm2
-; AVX1-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; AVX1-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX1-NEXT: vpextrd $2, %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %ecx
-; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
-; AVX1-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX1-NEXT: vpextrd $3, %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %ecx
-; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
-; AVX1-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX1-NEXT: vcvtdq2pd %xmm1, %ymm1
+; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
+; AVX1-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX1-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX1-NEXT: vmovapd %xmm0, (%rdi)
+; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: vp_sdiv_v4i32:
@@ -206,28 +152,12 @@ define void @vp_sdiv_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; AVX2-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1]
; AVX2-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1
-; AVX2-NEXT: vextractps $1, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $1, %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %ecx
-; AVX2-NEXT: movl %eax, %ecx
-; AVX2-NEXT: vmovd %xmm1, %esi
-; AVX2-NEXT: vmovd %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %esi
-; AVX2-NEXT: vmovd %eax, %xmm2
-; AVX2-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $2, %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %ecx
-; AVX2-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $3, %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %ecx
-; AVX2-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
-; AVX2-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm1
+; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0
+; AVX2-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX2-NEXT: vmovapd %xmm0, (%rdi)
+; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: vp_sdiv_v4i32:
@@ -236,28 +166,12 @@ define void @vp_sdiv_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX512-NEXT: vpcmpnleud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %k1
; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
; AVX512-NEXT: vmovdqa32 %xmm1, %xmm2 {%k1}
-; AVX512-NEXT: vpextrd $1, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $1, %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %ecx
-; AVX512-NEXT: movl %eax, %ecx
-; AVX512-NEXT: vmovd %xmm2, %esi
-; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %esi
-; AVX512-NEXT: vmovd %eax, %xmm1
-; AVX512-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $2, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $2, %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %ecx
-; AVX512-NEXT: vpinsrd $2, %eax, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $3, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $3, %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %ecx
-; AVX512-NEXT: vpinsrd $3, %eax, %xmm1, %xmm0
-; AVX512-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX512-NEXT: vcvtdq2pd %xmm2, %ymm1
+; AVX512-NEXT: vcvtdq2pd %xmm0, %ymm0
+; AVX512-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vcvttpd2dq %ymm0, %xmm0
+; AVX512-NEXT: vmovaps %xmm0, (%rdi)
+; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%res = call <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32> %a0, <4 x i32> %a1, <4 x i1> <i1 -1, i1 -1, i1 -1, i1 -1>, i32 %vp)
store <4 x i32> %res, ptr %out
@@ -426,38 +340,20 @@ declare <4 x i32> @llvm.vp.udiv.v4i32(<4 x i32>, <4 x i32>, <4 x i1>, i32)
define void @vp_srem_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) nounwind {
; X86-LABEL: vp_srem_v4i32:
; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm2
; X86-NEXT: vpmovsxbd {{.*#+}} xmm3 = [0,1,2,3]
; X86-NEXT: vpmaxud %xmm3, %xmm2, %xmm2
; X86-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; X86-NEXT: vblendvps %xmm2, {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm1
-; X86-NEXT: vextractps $1, %xmm1, %ecx
-; X86-NEXT: vpextrd $1, %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: movl %edx, %ecx
-; X86-NEXT: vmovd %xmm1, %edi
-; X86-NEXT: vmovd %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %edi
-; X86-NEXT: vmovd %edx, %xmm2
-; X86-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; X86-NEXT: vpextrd $2, %xmm1, %ecx
-; X86-NEXT: vpextrd $2, %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: vpinsrd $2, %edx, %xmm2, %xmm2
-; X86-NEXT: vpextrd $3, %xmm1, %ecx
-; X86-NEXT: vpextrd $3, %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: vpinsrd $3, %edx, %xmm2, %xmm0
-; X86-NEXT: vmovdqa %xmm0, (%esi)
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: vcvtdq2pd %xmm1, %ymm2
+; X86-NEXT: vcvtdq2pd %xmm0, %ymm3
+; X86-NEXT: vdivpd %ymm2, %ymm3, %ymm2
+; X86-NEXT: vcvttpd2dq %ymm2, %xmm2
+; X86-NEXT: vpmulld %xmm1, %xmm2, %xmm1
+; X86-NEXT: vpsubd %xmm1, %xmm0, %xmm0
+; X86-NEXT: vmovdqa %xmm0, (%eax)
+; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; SSE-LABEL: vp_srem_v4i32:
@@ -470,36 +366,26 @@ define void @vp_srem_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; SSE-NEXT: paddd %xmm2, %xmm1
; SSE-NEXT: pcmpeqd %xmm2, %xmm2
; SSE-NEXT: psubd %xmm2, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
-; SSE-NEXT: movd %xmm2, %ecx
-; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
-; SSE-NEXT: movd %xmm2, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %edx, %xmm2
+; SSE-NEXT: cvtdq2pd %xmm1, %xmm2
+; SSE-NEXT: cvtdq2pd %xmm0, %xmm3
+; SSE-NEXT: divpd %xmm2, %xmm3
+; SSE-NEXT: cvttpd2dq %xmm3, %xmm2
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
-; SSE-NEXT: movd %xmm3, %ecx
-; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
-; SSE-NEXT: movd %xmm3, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %edx, %xmm3
-; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; SSE-NEXT: movd %xmm1, %ecx
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %edx, %xmm2
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
-; SSE-NEXT: movd %xmm1, %ecx
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: cltd
-; SSE-NEXT: idivl %ecx
-; SSE-NEXT: movd %edx, %xmm0
-; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; SSE-NEXT: movdqa %xmm2, (%rdi)
+; SSE-NEXT: cvtdq2pd %xmm3, %xmm3
+; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; SSE-NEXT: cvtdq2pd %xmm4, %xmm4
+; SSE-NEXT: divpd %xmm3, %xmm4
+; SSE-NEXT: cvttpd2dq %xmm4, %xmm3
+; SSE-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
+; SSE-NEXT: pmuludq %xmm1, %xmm2
+; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
+; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE-NEXT: pmuludq %xmm3, %xmm1
+; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; SSE-NEXT: psubd %xmm2, %xmm0
+; SSE-NEXT: movdqa %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX1-LABEL: vp_srem_v4i32:
@@ -510,28 +396,14 @@ define void @vp_srem_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX1-NEXT: vpmaxud %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vblendvps %xmm2, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vextractps $1, %xmm1, %ecx
-; AVX1-NEXT: vpextrd $1, %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %ecx
-; AVX1-NEXT: movl %edx, %ecx
-; AVX1-NEXT: vmovd %xmm1, %esi
-; AVX1-NEXT: vmovd %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %esi
-; AVX1-NEXT: vmovd %edx, %xmm2
-; AVX1-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; AVX1-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX1-NEXT: vpextrd $2, %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %ecx
-; AVX1-NEXT: vpinsrd $2, %edx, %xmm2, %xmm2
-; AVX1-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX1-NEXT: vpextrd $3, %xmm0, %eax
-; AVX1-NEXT: cltd
-; AVX1-NEXT: idivl %ecx
-; AVX1-NEXT: vpinsrd $3, %edx, %xmm2, %xmm0
+; AVX1-NEXT: vcvtdq2pd %xmm1, %ymm2
+; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm3
+; AVX1-NEXT: vdivpd %ymm2, %ymm3, %ymm2
+; AVX1-NEXT: vcvttpd2dq %ymm2, %xmm2
+; AVX1-NEXT: vpmulld %xmm1, %xmm2, %xmm1
+; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: vp_srem_v4i32:
@@ -543,28 +415,14 @@ define void @vp_srem_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; AVX2-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1]
; AVX2-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1
-; AVX2-NEXT: vextractps $1, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $1, %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %ecx
-; AVX2-NEXT: movl %edx, %ecx
-; AVX2-NEXT: vmovd %xmm1, %esi
-; AVX2-NEXT: vmovd %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %esi
-; AVX2-NEXT: vmovd %edx, %xmm2
-; AVX2-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $2, %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %ecx
-; AVX2-NEXT: vpinsrd $2, %edx, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $3, %xmm0, %eax
-; AVX2-NEXT: cltd
-; AVX2-NEXT: idivl %ecx
-; AVX2-NEXT: vpinsrd $3, %edx, %xmm2, %xmm0
+; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm2
+; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm3
+; AVX2-NEXT: vdivpd %ymm2, %ymm3, %ymm2
+; AVX2-NEXT: vcvttpd2dq %ymm2, %xmm2
+; AVX2-NEXT: vpmulld %xmm1, %xmm2, %xmm1
+; AVX2-NEXT: vpsubd %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: vp_srem_v4i32:
@@ -573,28 +431,14 @@ define void @vp_srem_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX512-NEXT: vpcmpnleud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %k1
; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
; AVX512-NEXT: vmovdqa32 %xmm1, %xmm2 {%k1}
-; AVX512-NEXT: vpextrd $1, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $1, %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %ecx
-; AVX512-NEXT: movl %edx, %ecx
-; AVX512-NEXT: vmovd %xmm2, %esi
-; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %esi
-; AVX512-NEXT: vmovd %edx, %xmm1
-; AVX512-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $2, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $2, %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %ecx
-; AVX512-NEXT: vpinsrd $2, %edx, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $3, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $3, %xmm0, %eax
-; AVX512-NEXT: cltd
-; AVX512-NEXT: idivl %ecx
-; AVX512-NEXT: vpinsrd $3, %edx, %xmm1, %xmm0
+; AVX512-NEXT: vcvtdq2pd %xmm2, %ymm1
+; AVX512-NEXT: vcvtdq2pd %xmm0, %ymm3
+; AVX512-NEXT: vdivpd %ymm1, %ymm3, %ymm1
+; AVX512-NEXT: vcvttpd2dq %ymm1, %xmm1
+; AVX512-NEXT: vpmulld %xmm2, %xmm1, %xmm1
+; AVX512-NEXT: vpsubd %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%res = call <4 x i32> @llvm.vp.srem.v4i32(<4 x i32> %a0, <4 x i32> %a1, <4 x i1> <i1 -1, i1 -1, i1 -1, i1 -1>, i32 %vp)
store <4 x i32> %res, ptr %out
@@ -722,28 +566,25 @@ define void @vp_urem_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; AVX2-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1]
; AVX2-NEXT: vblendvps %xmm2, %xmm3, %xmm1, %xmm1
-; AVX2-NEXT: vextractps $1, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $1, %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: movl %edx, %ecx
-; AVX2-NEXT: vmovd %xmm1, %esi
-; AVX2-NEXT: vmovd %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %esi
-; AVX2-NEXT: vmovd %edx, %xmm2
-; AVX2-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $2, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $2, %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $2, %edx, %xmm2, %xmm2
-; AVX2-NEXT: vpextrd $3, %xmm1, %ecx
-; AVX2-NEXT: vpextrd $3, %xmm0, %eax
-; AVX2-NEXT: xorl %edx, %edx
-; AVX2-NEXT: divl %ecx
-; AVX2-NEXT: vpinsrd $3, %edx, %xmm2, %xmm0
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15]
+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vsubpd %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm4 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX2-NEXT: vpor %ymm3, %ymm4, %ymm4
+; AVX2-NEXT: vsubpd %ymm3, %ymm4, %ymm3
+; AVX2-NEXT: vdivpd %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vcvttpd2dq %ymm2, %xmm3
+; AVX2-NEXT: vpsrad $31, %xmm3, %xmm4
+; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm5 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]
+; AVX2-NEXT: vsubpd %ymm5, %ymm2, %ymm2
+; AVX2-NEXT: vcvttpd2dq %ymm2, %xmm2
+; AVX2-NEXT: vandpd %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vorpd %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpmulld %xmm1, %xmm2, %xmm1
+; AVX2-NEXT: vpsubd %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: vp_urem_v4i32:
@@ -752,28 +593,14 @@ define void @vp_urem_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %out, i32 %vp) noun
; AVX512-NEXT: vpcmpnleud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %k1
; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
; AVX512-NEXT: vmovdqa32 %xmm1, %xmm2 {%k1}
-; AVX512-NEXT: vpextrd $1, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $1, %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %ecx
-; AVX512-NEXT: movl %edx, %ecx
-; AVX512-NEXT: vmovd %xmm2, %esi
-; AVX512-NEXT: vmovd %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %esi
-; AVX512-NEXT: vmovd %edx, %xmm1
-; AVX512-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $2, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $2, %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %ecx
-; AVX512-NEXT: vpinsrd $2, %edx, %xmm1, %xmm1
-; AVX512-NEXT: vpextrd $3, %xmm2, %ecx
-; AVX512-NEXT: vpextrd $3, %xmm0, %eax
-; AVX512-NEXT: xorl %edx, %edx
-; AVX512-NEXT: divl %ecx
-; AVX512-NEXT: vpinsrd $3, %edx, %xmm1, %xmm0
+; AVX512-NEXT: vcvtudq2pd %xmm2, %ymm1
+; AVX512-NEXT: vcvtudq2pd %xmm0, %ymm3
+; AVX512-NEXT: vdivpd %ymm1, %ymm3, %ymm1
+; AVX512-NEXT: vcvttpd2udq %ymm1, %xmm1
+; AVX512-NEXT: vpmulld %xmm2, %xmm1, %xmm1
+; AVX512-NEXT: vpsubd %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vmovdqa %xmm0, (%rdi)
+; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%res = call <4 x i32> @llvm.vp.urem.v4i32(<4 x i32> %a0, <4 x i32> %a1, <4 x i1> <i1 -1, i1 -1, i1 -1, i1 -1>, i32 %vp)
store <4 x i32> %res, ptr %out
diff --git a/llvm/test/CodeGen/X86/known-bits.ll b/llvm/test/CodeGen/X86/known-bits.ll
index b29ccaf9981bc..0fef1170112a1 100644
--- a/llvm/test/CodeGen/X86/known-bits.ll
+++ b/llvm/test/CodeGen/X86/known-bits.ll
@@ -3,53 +3,15 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64
define void @knownbits_zext_in_reg(ptr) nounwind {
-; X86-LABEL: knownbits_zext_in_reg:
-; X86: # %bb.0: # %BB
-; X86-NEXT: pushl %ebx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movzbl (%eax), %ecx
-; X86-NEXT: imull $101, %ecx, %eax
-; X86-NEXT: shrl $14, %eax
-; X86-NEXT: imull $177, %ecx, %edx
-; X86-NEXT: shrl $14, %edx
-; X86-NEXT: movzbl %al, %ecx
-; X86-NEXT: xorl %ebx, %ebx
-; X86-NEXT: .p2align 4
-; X86-NEXT: .LBB0_1: # %CF
-; X86-NEXT: # =>This Loop Header: Depth=1
-; X86-NEXT: # Child Loop BB0_2 Depth 2
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: divb %dl
-; X86-NEXT: .p2align 4
-; X86-NEXT: .LBB0_2: # %CF237
-; X86-NEXT: # Parent Loop BB0_1 Depth=1
-; X86-NEXT: # => This Inner Loop Header: Depth=2
-; X86-NEXT: testb %bl, %bl
-; X86-NEXT: jne .LBB0_2
-; X86-NEXT: jmp .LBB0_1
-;
-; X64-LABEL: knownbits_zext_in_reg:
-; X64: # %bb.0: # %BB
-; X64-NEXT: movzbl (%rdi), %eax
-; X64-NEXT: imull $101, %eax, %ecx
-; X64-NEXT: shrl $14, %ecx
-; X64-NEXT: imull $177, %eax, %edx
-; X64-NEXT: shrl $14, %edx
-; X64-NEXT: movzbl %cl, %ecx
-; X64-NEXT: xorl %esi, %esi
-; X64-NEXT: .p2align 4
-; X64-NEXT: .LBB0_1: # %CF
-; X64-NEXT: # =>This Loop Header: Depth=1
-; X64-NEXT: # Child Loop BB0_2 Depth 2
-; X64-NEXT: movl %ecx, %eax
-; X64-NEXT: divb %dl
-; X64-NEXT: .p2align 4
-; X64-NEXT: .LBB0_2: # %CF237
-; X64-NEXT: # Parent Loop BB0_1 Depth=1
-; X64-NEXT: # => This Inner Loop Header: Depth=2
-; X64-NEXT: testb %sil, %sil
-; X64-NEXT: jne .LBB0_2
-; X64-NEXT: jmp .LBB0_1
+; CHECK-LABEL: knownbits_zext_in_reg:
+; CHECK: # %bb.0: # %BB
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: .p2align 4
+; CHECK-NEXT: .LBB0_1: # %CF237
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: testb %al, %al
+; CHECK-NEXT: jne .LBB0_1
+; CHECK-NEXT: jmp .LBB0_1
BB:
%L5 = load i8, ptr %0
%Sl9 = select i1 true, i8 %L5, i8 undef
diff --git a/llvm/test/CodeGen/X86/known-never-zero.ll b/llvm/test/CodeGen/X86/known-never-zero.ll
index c90ab282d2255..9e9b966f447bd 100644
--- a/llvm/test/CodeGen/X86/known-never-zero.ll
+++ b/llvm/test/CodeGen/X86/known-never-zero.ll
@@ -1706,72 +1706,35 @@ define i32 @sdiv_known_nonzero(i32 %xx, i32 %y) {
define i32 @sdiv_known_nonzero_vec(<4 x i32> %xx, <4 x i32> %y, ptr %p) nounwind {
; X86-LABEL: sdiv_known_nonzero_vec:
; X86: # %bb.0:
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X86-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
-; X86-NEXT: movd %xmm2, %ecx
-; X86-NEXT: movl $-1, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: movd %xmm1, %ecx
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %ecx
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; X86-NEXT: pshufd {{.*#+}} xmm3 = xmm1[3,3,3,3]
-; X86-NEXT: movd %xmm3, %edi
-; X86-NEXT: pshufd {{.*#+}} xmm3 = xmm0[3,3,3,3]
-; X86-NEXT: movd %xmm3, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %edi
-; X86-NEXT: movd %eax, %xmm3
+; X86-NEXT: cvtdq2pd %xmm1, %xmm2
+; X86-NEXT: cvtdq2pd %xmm0, %xmm3
+; X86-NEXT: divpd %xmm2, %xmm3
+; X86-NEXT: cvttpd2dq %xmm3, %xmm2
; X86-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
-; X86-NEXT: movd %xmm1, %edi
+; X86-NEXT: cvtdq2pd %xmm1, %xmm1
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: cltd
-; X86-NEXT: idivl %edi
-; X86-NEXT: movd %eax, %xmm0
-; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
-; X86-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
-; X86-NEXT: movdqa %xmm2, (%esi)
+; X86-NEXT: cvtdq2pd %xmm0, %xmm0
+; X86-NEXT: divpd %xmm1, %xmm0
+; X86-NEXT: cvttpd2dq %xmm0, %xmm0
+; X86-NEXT: movd %xmm2, %ecx
+; X86-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; X86-NEXT: movapd %xmm2, (%eax)
; X86-NEXT: rep bsfl %ecx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: sdiv_known_nonzero_vec:
; X64: # %bb.0:
-; X64-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
-; X64-NEXT: vpextrd $1, %xmm1, %ecx
-; X64-NEXT: movl $-1, %eax
-; X64-NEXT: cltd
-; X64-NEXT: idivl %ecx
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: vmovd %xmm1, %esi
-; X64-NEXT: vmovd %xmm0, %eax
-; X64-NEXT: cltd
-; X64-NEXT: idivl %esi
-; X64-NEXT: vmovd %eax, %xmm2
-; X64-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2
-; X64-NEXT: vpextrd $2, %xmm1, %ecx
-; X64-NEXT: vpextrd $2, %xmm0, %eax
-; X64-NEXT: cltd
-; X64-NEXT: idivl %ecx
-; X64-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
-; X64-NEXT: vpextrd $3, %xmm1, %ecx
-; X64-NEXT: vpextrd $3, %xmm0, %eax
-; X64-NEXT: cltd
-; X64-NEXT: idivl %ecx
-; X64-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
-; X64-NEXT: vmovdqa %xmm0, (%rdi)
+; X64-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vcvtdq2pd %xmm1, %ymm1
+; X64-NEXT: vcvtdq2pd %xmm0, %ymm0
+; X64-NEXT: vdivpd %ymm1, %ymm0, %ymm0
+; X64-NEXT: vcvttpd2dq %ymm0, %xmm0
+; X64-NEXT: vmovapd %xmm0, (%rdi)
; X64-NEXT: vmovd %xmm0, %eax
; X64-NEXT: rep bsfl %eax, %eax
+; X64-NEXT: vzeroupper
; X64-NEXT: retq
%x = or <4 x i32> %xx, <i32 64, i32 -1, i32 0, i32 0>
%z = sdiv exact <4 x i32> %x, %y
diff --git a/llvm/test/CodeGen/X86/scalar_widen_div.ll b/llvm/test/CodeGen/X86/scalar_widen_div.ll
index 1d98b4f62069d..f24d018aea88f 100644
--- a/llvm/test/CodeGen/X86/scalar_widen_div.ll
+++ b/llvm/test/CodeGen/X86/scalar_widen_div.ll
@@ -7,27 +7,15 @@
define void @vectorDiv (ptr addrspace(1) %nsource, ptr addrspace(1) %dsource, ptr addrspace(1) %qdest) nounwind {
; CHECK-LABEL: vectorDiv:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)
-; CHECK-NEXT: movslq -{{[0-9]+}}(%rsp), %r8
-; CHECK-NEXT: movq (%rdi,%r8,8), %rdi
-; CHECK-NEXT: movq (%rsi,%r8,8), %r9
-; CHECK-NEXT: movq %rdi, %rax
-; CHECK-NEXT: shrq $32, %rax
-; CHECK-NEXT: movq %r9, %rsi
-; CHECK-NEXT: shrq $32, %rsi
-; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %esi
-; CHECK-NEXT: movl %eax, %esi
-; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %r9d
-; CHECK-NEXT: movd %eax, %xmm0
-; CHECK-NEXT: pinsrd $1, %esi, %xmm0
-; CHECK-NEXT: movq %xmm0, (%rcx,%r8,8)
+; CHECK-NEXT: movslq -{{[0-9]+}}(%rsp), %rax
+; CHECK-NEXT: cvtdq2pd (%rsi,%rax,8), %xmm0
+; CHECK-NEXT: cvtdq2pd (%rdi,%rax,8), %xmm1
+; CHECK-NEXT: divpd %xmm0, %xmm1
+; CHECK-NEXT: cvttpd2dq %xmm1, %xmm0
+; CHECK-NEXT: movlpd %xmm0, (%rdx,%rax,8)
; CHECK-NEXT: retq
entry:
%nsource.addr = alloca ptr addrspace(1), align 4
@@ -139,35 +127,13 @@ define <5 x i16> @test_short_div(<5 x i16> %num, <5 x i16> %div) {
define <4 x i16> @test_ushort_div(<4 x i16> %num, <4 x i16> %div) {
; CHECK-LABEL: test_ushort_div:
; CHECK: # %bb.0:
-; CHECK-NEXT: pextrw $1, %xmm0, %eax
-; CHECK-NEXT: pextrw $1, %xmm1, %ecx
-; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: divw %cx
-; CHECK-NEXT: movl %eax, %ecx
-; CHECK-NEXT: movd %xmm0, %eax
-; CHECK-NEXT: movd %xmm1, %esi
-; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: divw %si
-; CHECK-NEXT: # kill: def $ax killed $ax def $eax
-; CHECK-NEXT: movd %eax, %xmm2
-; CHECK-NEXT: pinsrw $1, %ecx, %xmm2
-; CHECK-NEXT: pextrw $2, %xmm0, %eax
-; CHECK-NEXT: pextrw $2, %xmm1, %ecx
-; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: divw %cx
-; CHECK-NEXT: # kill: def $ax killed $ax def $eax
-; CHECK-NEXT: pinsrw $2, %eax, %xmm2
-; CHECK-NEXT: pextrw $3, %xmm0, %eax
-; CHECK-NEXT: pextrw $3, %xmm1, %ecx
-; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: divw %cx
-; CHECK-NEXT: # kill: def $ax killed $ax def $eax
-; CHECK-NEXT: pinsrw $3, %eax, %xmm2
-; CHECK-NEXT: movdqa %xmm2, %xmm0
+; CHECK-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; CHECK-NEXT: cvtdq2ps %xmm1, %xmm1
+; CHECK-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; CHECK-NEXT: cvtdq2ps %xmm0, %xmm0
+; CHECK-NEXT: divps %xmm1, %xmm0
+; CHECK-NEXT: cvttps2dq %xmm0, %xmm0
+; CHECK-NEXT: packusdw %xmm0, %xmm0
; CHECK-NEXT: retq
%div.r = udiv <4 x i16> %num, %div
ret <4 x i16> %div.r
@@ -249,31 +215,17 @@ define <3 x i64> @test_ulong_div(<3 x i64> %num, <3 x i64> %div) {
define <4 x i8> @test_char_rem(<4 x i8> %num, <4 x i8> %rem) {
; CHECK-LABEL: test_char_rem:
; CHECK: # %bb.0:
-; CHECK-NEXT: pextrb $1, %xmm1, %ecx
-; CHECK-NEXT: pextrb $1, %xmm0, %eax
-; CHECK-NEXT: cbtw
-; CHECK-NEXT: idivb %cl
-; CHECK-NEXT: movsbl %ah, %ecx
-; CHECK-NEXT: movd %xmm1, %edx
-; CHECK-NEXT: movd %xmm0, %eax
-; CHECK-NEXT: cbtw
-; CHECK-NEXT: idivb %dl
-; CHECK-NEXT: movsbl %ah, %eax
-; CHECK-NEXT: movd %eax, %xmm2
-; CHECK-NEXT: pinsrb $1, %ecx, %xmm2
-; CHECK-NEXT: pextrb $2, %xmm1, %ecx
-; CHECK-NEXT: pextrb $2, %xmm0, %eax
-; CHECK-NEXT: cbtw
-; CHECK-NEXT: idivb %cl
-; CHECK-NEXT: movsbl %ah, %eax
-; CHECK-NEXT: pinsrb $2, %eax, %xmm2
-; CHECK-NEXT: pextrb $3, %xmm1, %ecx
-; CHECK-NEXT: pextrb $3, %xmm0, %eax
-; CHECK-NEXT: cbtw
-; CHECK-NEXT: idivb %cl
-; CHECK-NEXT: movsbl %ah, %eax
-; CHECK-NEXT: pinsrb $3, %eax, %xmm2
-; CHECK-NEXT: movdqa %xmm2, %xmm0
+; CHECK-NEXT: pmovsxbd %xmm1, %xmm2
+; CHECK-NEXT: cvtdq2ps %xmm2, %xmm2
+; CHECK-NEXT: pmovsxbd %xmm0, %xmm3
+; CHECK-NEXT: cvtdq2ps %xmm3, %xmm3
+; CHECK-NEXT: divps %xmm2, %xmm3
+; CHECK-NEXT: cvttps2dq %xmm3, %xmm2
+; CHECK-NEXT: packssdw %xmm2, %xmm2
+; CHECK-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
+; CHECK-NEXT: pmullw %xmm2, %xmm1
+; CHECK-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]
+; CHECK-NEXT: psubb %xmm1, %xmm0
; CHECK-NEXT: retq
%rem.r = srem <4 x i8> %num, %rem
ret <4 x i8> %rem.r
@@ -325,28 +277,19 @@ define <5 x i16> @test_short_rem(<5 x i16> %num, <5 x i16> %rem) {
define <4 x i32> @test_uint_rem(<4 x i32> %num, <4 x i32> %rem) {
; CHECK-LABEL: test_uint_rem:
; CHECK: # %bb.0:
-; CHECK-NEXT: pextrd $1, %xmm0, %eax
-; CHECK-NEXT: pextrd $1, %xmm1, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movl %edx, %ecx
-; CHECK-NEXT: movd %xmm0, %eax
-; CHECK-NEXT: movd %xmm1, %esi
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %esi
-; CHECK-NEXT: movd %edx, %xmm2
-; CHECK-NEXT: pinsrd $1, %ecx, %xmm2
-; CHECK-NEXT: pextrd $2, %xmm0, %eax
-; CHECK-NEXT: pextrd $2, %xmm1, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: pinsrd $2, %edx, %xmm2
-; CHECK-NEXT: pextrd $3, %xmm0, %eax
-; CHECK-NEXT: pextrd $3, %xmm1, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: pinsrd $3, %edx, %xmm2
-; CHECK-NEXT: movdqa %xmm2, %xmm0
+; CHECK-NEXT: cvtdq2pd %xmm1, %xmm2
+; CHECK-NEXT: cvtdq2pd %xmm0, %xmm3
+; CHECK-NEXT: divpd %xmm2, %xmm3
+; CHECK-NEXT: cvttpd2dq %xmm3, %xmm2
+; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm3, %xmm3
+; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm4, %xmm4
+; CHECK-NEXT: divpd %xmm3, %xmm4
+; CHECK-NEXT: cvttpd2dq %xmm4, %xmm3
+; CHECK-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; CHECK-NEXT: pmulld %xmm1, %xmm2
+; CHECK-NEXT: psubd %xmm2, %xmm0
; CHECK-NEXT: retq
%rem.r = srem <4 x i32> %num, %rem
ret <4 x i32> %rem.r
@@ -392,28 +335,26 @@ define void @test_int_div(ptr %dest, ptr %old, i32 %n) {
; CHECK-NEXT: testl %edx, %edx
; CHECK-NEXT: jle .LBB12_3
; CHECK-NEXT: # %bb.1: # %bb.nph
-; CHECK-NEXT: movl %edx, %ecx
-; CHECK-NEXT: xorl %r10d, %r10d
+; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB12_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movl (%rdi,%r10), %r8d
-; CHECK-NEXT: movl 4(%rdi,%r10), %eax
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl 4(%rsi,%r10)
-; CHECK-NEXT: movl %eax, %r9d
-; CHECK-NEXT: movl %r8d, %eax
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl (%rsi,%r10)
-; CHECK-NEXT: movd %eax, %xmm0
-; CHECK-NEXT: pinsrd $1, %r9d, %xmm0
-; CHECK-NEXT: movl 8(%rdi,%r10), %eax
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl 8(%rsi,%r10)
-; CHECK-NEXT: movl %eax, 8(%rdi,%r10)
-; CHECK-NEXT: movq %xmm0, (%rdi,%r10)
-; CHECK-NEXT: addq $16, %r10
-; CHECK-NEXT: decl %ecx
+; CHECK-NEXT: movdqa (%rdi,%rax), %xmm0
+; CHECK-NEXT: movdqa (%rsi,%rax), %xmm1
+; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm2, %xmm2
+; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm3, %xmm3
+; CHECK-NEXT: divpd %xmm2, %xmm3
+; CHECK-NEXT: cvttpd2dq %xmm3, %xmm2
+; CHECK-NEXT: cvtdq2pd %xmm1, %xmm1
+; CHECK-NEXT: cvtdq2pd %xmm0, %xmm0
+; CHECK-NEXT: divpd %xmm1, %xmm0
+; CHECK-NEXT: cvttpd2dq %xmm0, %xmm0
+; CHECK-NEXT: movlpd %xmm0, (%rdi,%rax)
+; CHECK-NEXT: movss %xmm2, 8(%rdi,%rax)
+; CHECK-NEXT: addq $16, %rax
+; CHECK-NEXT: decl %edx
; CHECK-NEXT: jne .LBB12_2
; CHECK-NEXT: .LBB12_3: # %for.end
; CHECK-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/shrink_vmul.ll b/llvm/test/CodeGen/X86/shrink_vmul.ll
index 8f344490b66b7..a1d1b984418af 100644
--- a/llvm/test/CodeGen/X86/shrink_vmul.ll
+++ b/llvm/test/CodeGen/X86/shrink_vmul.ll
@@ -2134,56 +2134,57 @@ define void @PR34947(ptr %p0, ptr %p1) nounwind {
;
; X86-AVX2-LABEL: PR34947:
; X86-AVX2: # %bb.0:
-; X86-AVX2-NEXT: pushl %esi
-; X86-AVX2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
+; X86-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-AVX2-NEXT: vmovdqa (%ecx), %ymm0
; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
-; X86-AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
-; X86-AVX2-NEXT: vpextrd $1, %xmm2, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 20(%esi)
-; X86-AVX2-NEXT: movl %edx, %ecx
-; X86-AVX2-NEXT: vmovd %xmm2, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 16(%esi)
-; X86-AVX2-NEXT: vmovd %edx, %xmm3
-; X86-AVX2-NEXT: vpinsrd $1, %ecx, %xmm3, %xmm3
-; X86-AVX2-NEXT: vpextrd $2, %xmm2, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 24(%esi)
-; X86-AVX2-NEXT: vpinsrd $2, %edx, %xmm3, %xmm3
-; X86-AVX2-NEXT: vpextrd $3, %xmm2, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 28(%esi)
-; X86-AVX2-NEXT: vpinsrd $3, %edx, %xmm3, %xmm2
-; X86-AVX2-NEXT: vpextrd $1, %xmm1, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 4(%esi)
-; X86-AVX2-NEXT: movl %edx, %ecx
-; X86-AVX2-NEXT: vmovd %xmm1, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl (%esi)
-; X86-AVX2-NEXT: vmovd %edx, %xmm3
-; X86-AVX2-NEXT: vpinsrd $1, %ecx, %xmm3, %xmm3
-; X86-AVX2-NEXT: vpextrd $2, %xmm1, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 8(%esi)
-; X86-AVX2-NEXT: vpinsrd $2, %edx, %xmm3, %xmm3
-; X86-AVX2-NEXT: vpextrd $3, %xmm1, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 12(%esi)
-; X86-AVX2-NEXT: vpinsrd $3, %edx, %xmm3, %xmm1
-; X86-AVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
+; X86-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; X86-AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15]
+; X86-AVX2-NEXT: vpor %ymm2, %ymm3, %ymm3
+; X86-AVX2-NEXT: vsubpd %ymm2, %ymm3, %ymm3
+; X86-AVX2-NEXT: vcvtdq2pd %xmm1, %ymm4
+; X86-AVX2-NEXT: vdivpd %ymm3, %ymm4, %ymm4
+; X86-AVX2-NEXT: vbroadcastsd {{.*#+}} ymm3 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]
+; X86-AVX2-NEXT: vsubpd %ymm3, %ymm4, %ymm5
+; X86-AVX2-NEXT: vcvttpd2dq %ymm5, %xmm5
+; X86-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm6 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X86-AVX2-NEXT: vpor %ymm2, %ymm6, %ymm6
+; X86-AVX2-NEXT: vsubpd %ymm2, %ymm6, %ymm6
+; X86-AVX2-NEXT: vextracti128 $1, %ymm1, %xmm7
+; X86-AVX2-NEXT: vcvtdq2pd %xmm7, %ymm7
+; X86-AVX2-NEXT: vdivpd %ymm6, %ymm7, %ymm6
+; X86-AVX2-NEXT: vsubpd %ymm3, %ymm6, %ymm7
+; X86-AVX2-NEXT: vcvttpd2dq %ymm7, %xmm7
+; X86-AVX2-NEXT: vinsertf128 $1, %xmm7, %ymm5, %ymm5
+; X86-AVX2-NEXT: vcvttpd2dq %ymm4, %xmm4
+; X86-AVX2-NEXT: vcvttpd2dq %ymm6, %xmm6
+; X86-AVX2-NEXT: vinsertf128 $1, %xmm6, %ymm4, %ymm4
+; X86-AVX2-NEXT: vpsrad $31, %ymm4, %ymm6
+; X86-AVX2-NEXT: vandpd %ymm6, %ymm5, %ymm5
+; X86-AVX2-NEXT: vorpd %ymm5, %ymm4, %ymm5
+; X86-AVX2-NEXT: vmovd {{.*#+}} xmm4 = mem[0],zero,zero,zero
+; X86-AVX2-NEXT: vpmulld %ymm0, %ymm5, %ymm5
+; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
+; X86-AVX2-NEXT: vpsubd %ymm5, %ymm1, %ymm1
+; X86-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm5 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero
+; X86-AVX2-NEXT: vpor %ymm2, %ymm5, %ymm5
+; X86-AVX2-NEXT: vsubpd %ymm2, %ymm5, %ymm2
+; X86-AVX2-NEXT: vcvtdq2pd %xmm0, %ymm5
+; X86-AVX2-NEXT: vdivpd %ymm2, %ymm5, %ymm2
+; X86-AVX2-NEXT: vcvttpd2dq %ymm2, %xmm5
+; X86-AVX2-NEXT: vsubpd %ymm3, %ymm2, %ymm2
+; X86-AVX2-NEXT: vpsrad $31, %xmm5, %xmm3
+; X86-AVX2-NEXT: vcvttpd2dq %ymm2, %xmm2
+; X86-AVX2-NEXT: vandpd %xmm3, %xmm2, %xmm2
+; X86-AVX2-NEXT: vorpd %xmm2, %xmm5, %xmm2
+; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [8199,8199,8199,8199,8199,8199,8199,8199]
+; X86-AVX2-NEXT: vpmulld %ymm3, %ymm1, %ymm1
+; X86-AVX2-NEXT: vpmulld %xmm4, %xmm2, %xmm2
+; X86-AVX2-NEXT: vpsubd %xmm2, %xmm0, %xmm0
; X86-AVX2-NEXT: vmovd %xmm0, %eax
-; X86-AVX2-NEXT: xorl %edx, %edx
-; X86-AVX2-NEXT: divl 32(%esi)
-; X86-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm0 = [8199,8199,8199,8199,8199,8199,8199,8199]
-; X86-AVX2-NEXT: vpmulld %ymm0, %ymm1, %ymm0
-; X86-AVX2-NEXT: imull $8199, %edx, %eax # imm = 0x2007
+; X86-AVX2-NEXT: vmovdqa %ymm1, (%eax)
+; X86-AVX2-NEXT: imull $8199, %eax, %eax # imm = 0x2007
; X86-AVX2-NEXT: movl %eax, (%eax)
-; X86-AVX2-NEXT: vmovdqa %ymm0, (%eax)
-; X86-AVX2-NEXT: popl %esi
; X86-AVX2-NEXT: vzeroupper
; X86-AVX2-NEXT: retl
;
@@ -2325,52 +2326,55 @@ define void @PR34947(ptr %p0, ptr %p1) nounwind {
;
; X64-AVX2-LABEL: PR34947:
; X64-AVX2: # %bb.0:
-; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
+; X64-AVX2-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X64-AVX2-NEXT: vmovdqa (%rsi), %ymm2
; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
-; X64-AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
-; X64-AVX2-NEXT: vpextrd $1, %xmm2, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 20(%rsi)
-; X64-AVX2-NEXT: movl %edx, %ecx
-; X64-AVX2-NEXT: vmovd %xmm2, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 16(%rsi)
-; X64-AVX2-NEXT: vmovd %edx, %xmm3
-; X64-AVX2-NEXT: vpinsrd $1, %ecx, %xmm3, %xmm3
-; X64-AVX2-NEXT: vpextrd $2, %xmm2, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 24(%rsi)
-; X64-AVX2-NEXT: vpinsrd $2, %edx, %xmm3, %xmm3
-; X64-AVX2-NEXT: vpextrd $3, %xmm2, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 28(%rsi)
-; X64-AVX2-NEXT: vpinsrd $3, %edx, %xmm3, %xmm2
-; X64-AVX2-NEXT: vpextrd $1, %xmm1, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 4(%rsi)
-; X64-AVX2-NEXT: movl %edx, %ecx
-; X64-AVX2-NEXT: vmovd %xmm1, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl (%rsi)
-; X64-AVX2-NEXT: vmovd %edx, %xmm3
-; X64-AVX2-NEXT: vpinsrd $1, %ecx, %xmm3, %xmm3
-; X64-AVX2-NEXT: vpextrd $2, %xmm1, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 8(%rsi)
-; X64-AVX2-NEXT: vpinsrd $2, %edx, %xmm3, %xmm3
-; X64-AVX2-NEXT: vpextrd $3, %xmm1, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 12(%rsi)
-; X64-AVX2-NEXT: vpinsrd $3, %edx, %xmm3, %xmm1
-; X64-AVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
+; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm3 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
+; X64-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm4 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
+; X64-AVX2-NEXT: vpbroadcastq {{.*#+}} ymm5 = [4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15,4.503599627370496E+15]
+; X64-AVX2-NEXT: vpor %ymm5, %ymm4, %ymm4
+; X64-AVX2-NEXT: vsubpd %ymm5, %ymm4, %ymm4
+; X64-AVX2-NEXT: vcvtdq2pd %xmm3, %ymm6
+; X64-AVX2-NEXT: vdivpd %ymm4, %ymm6, %ymm4
+; X64-AVX2-NEXT: vbroadcastsd {{.*#+}} ymm6 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9]
+; X64-AVX2-NEXT: vsubpd %ymm6, %ymm4, %ymm7
+; X64-AVX2-NEXT: vcvttpd2dq %ymm7, %xmm7
+; X64-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm8 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
+; X64-AVX2-NEXT: vpor %ymm5, %ymm8, %ymm8
+; X64-AVX2-NEXT: vsubpd %ymm5, %ymm8, %ymm8
+; X64-AVX2-NEXT: vextracti128 $1, %ymm3, %xmm9
+; X64-AVX2-NEXT: vcvtdq2pd %xmm9, %ymm9
+; X64-AVX2-NEXT: vdivpd %ymm8, %ymm9, %ymm8
+; X64-AVX2-NEXT: vsubpd %ymm6, %ymm8, %ymm9
+; X64-AVX2-NEXT: vcvttpd2dq %ymm9, %xmm9
+; X64-AVX2-NEXT: vinsertf128 $1, %xmm9, %ymm7, %ymm7
+; X64-AVX2-NEXT: vcvttpd2dq %ymm4, %xmm4
+; X64-AVX2-NEXT: vcvttpd2dq %ymm8, %xmm8
+; X64-AVX2-NEXT: vinsertf128 $1, %xmm8, %ymm4, %ymm4
+; X64-AVX2-NEXT: vpsrad $31, %ymm4, %ymm8
+; X64-AVX2-NEXT: vandpd %ymm7, %ymm8, %ymm7
+; X64-AVX2-NEXT: vorpd %ymm7, %ymm4, %ymm4
+; X64-AVX2-NEXT: vpmulld %ymm2, %ymm4, %ymm2
+; X64-AVX2-NEXT: vpsubd %ymm2, %ymm3, %ymm2
+; X64-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; X64-AVX2-NEXT: vpor %ymm5, %ymm3, %ymm3
+; X64-AVX2-NEXT: vsubpd %ymm5, %ymm3, %ymm3
+; X64-AVX2-NEXT: vcvtdq2pd %xmm1, %ymm4
+; X64-AVX2-NEXT: vdivpd %ymm3, %ymm4, %ymm3
+; X64-AVX2-NEXT: vcvttpd2dq %ymm3, %xmm4
+; X64-AVX2-NEXT: vpsrad $31, %xmm4, %xmm5
+; X64-AVX2-NEXT: vsubpd %ymm6, %ymm3, %ymm3
+; X64-AVX2-NEXT: vcvttpd2dq %ymm3, %xmm3
+; X64-AVX2-NEXT: vandpd %xmm5, %xmm3, %xmm3
+; X64-AVX2-NEXT: vorpd %xmm3, %xmm4, %xmm3
+; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [8199,8199,8199,8199,8199,8199,8199,8199]
+; X64-AVX2-NEXT: vpmulld %ymm4, %ymm2, %ymm2
+; X64-AVX2-NEXT: vpmulld %xmm0, %xmm3, %xmm0
+; X64-AVX2-NEXT: vpsubd %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vmovd %xmm0, %eax
-; X64-AVX2-NEXT: xorl %edx, %edx
-; X64-AVX2-NEXT: divl 32(%rsi)
-; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm0 = [8199,8199,8199,8199,8199,8199,8199,8199]
-; X64-AVX2-NEXT: vpmulld %ymm0, %ymm1, %ymm0
-; X64-AVX2-NEXT: imull $8199, %edx, %eax # imm = 0x2007
+; X64-AVX2-NEXT: imull $8199, %eax, %eax # imm = 0x2007
; X64-AVX2-NEXT: movl %eax, (%rax)
-; X64-AVX2-NEXT: vmovdqa %ymm0, (%rax)
+; X64-AVX2-NEXT: vmovdqa %ymm2, (%rax)
; X64-AVX2-NEXT: vzeroupper
; X64-AVX2-NEXT: retq
%a0 = load <9 x i16>, ptr %p0, align 64
diff --git a/llvm/test/CodeGen/X86/split-vector-rem.ll b/llvm/test/CodeGen/X86/split-vector-rem.ll
index e292e128d9bfa..c9dbc9201068f 100644
--- a/llvm/test/CodeGen/X86/split-vector-rem.ll
+++ b/llvm/test/CodeGen/X86/split-vector-rem.ll
@@ -4,66 +4,44 @@
define <8 x i32> @foo(<8 x i32> %t, <8 x i32> %u) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0:
-; CHECK-NEXT: movdqa %xmm0, %xmm4
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; CHECK-NEXT: movd %xmm0, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
-; CHECK-NEXT: movd %xmm0, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm0
-; CHECK-NEXT: pshufd {{.*#+}} xmm5 = xmm4[2,3,2,3]
-; CHECK-NEXT: movd %xmm5, %eax
+; CHECK-NEXT: cvtdq2pd %xmm2, %xmm4
+; CHECK-NEXT: cvtdq2pd %xmm0, %xmm5
+; CHECK-NEXT: divpd %xmm4, %xmm5
+; CHECK-NEXT: cvttpd2dq %xmm5, %xmm4
; CHECK-NEXT: pshufd {{.*#+}} xmm5 = xmm2[2,3,2,3]
-; CHECK-NEXT: movd %xmm5, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm5
-; CHECK-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1]
-; CHECK-NEXT: movd %xmm4, %eax
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm0
-; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,1,1]
-; CHECK-NEXT: movd %xmm4, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,1,1]
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm2
-; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm5[0]
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
-; CHECK-NEXT: movd %xmm2, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm3[3,3,3,3]
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm1[2,3,2,3]
-; CHECK-NEXT: movd %xmm4, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm3[2,3,2,3]
-; CHECK-NEXT: movd %xmm4, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm4
+; CHECK-NEXT: cvtdq2pd %xmm5, %xmm5
+; CHECK-NEXT: pshufd {{.*#+}} xmm6 = xmm0[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm6, %xmm6
+; CHECK-NEXT: divpd %xmm5, %xmm6
+; CHECK-NEXT: cvttpd2dq %xmm6, %xmm5
+; CHECK-NEXT: unpcklpd {{.*#+}} xmm4 = xmm4[0],xmm5[0]
+; CHECK-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]
+; CHECK-NEXT: pmuludq %xmm2, %xmm4
+; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
+; CHECK-NEXT: pmuludq %xmm5, %xmm2
+; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; CHECK-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
-; CHECK-NEXT: movd %xmm1, %eax
-; CHECK-NEXT: movd %xmm3, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
-; CHECK-NEXT: movd %xmm1, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,1,1,1]
-; CHECK-NEXT: movd %xmm1, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm1
-; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm4[0]
-; CHECK-NEXT: movdqa %xmm2, %xmm1
+; CHECK-NEXT: psubd %xmm4, %xmm0
+; CHECK-NEXT: cvtdq2pd %xmm3, %xmm2
+; CHECK-NEXT: cvtdq2pd %xmm1, %xmm4
+; CHECK-NEXT: divpd %xmm2, %xmm4
+; CHECK-NEXT: cvttpd2dq %xmm4, %xmm2
+; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm3[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm4, %xmm4
+; CHECK-NEXT: pshufd {{.*#+}} xmm5 = xmm1[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm5, %xmm5
+; CHECK-NEXT: divpd %xmm4, %xmm5
+; CHECK-NEXT: cvttpd2dq %xmm5, %xmm4
+; CHECK-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm4[0]
+; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
+; CHECK-NEXT: pmuludq %xmm3, %xmm2
+; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
+; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; CHECK-NEXT: pmuludq %xmm4, %xmm3
+; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
+; CHECK-NEXT: psubd %xmm2, %xmm1
; CHECK-NEXT: retq
%m = srem <8 x i32> %t, %u
ret <8 x i32> %m
diff --git a/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll b/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
index 3117865184ecc..4129382100931 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
@@ -823,289 +823,192 @@ define <16 x i8> @test_remconstant_16i8(<16 x i8> %a) nounwind {
define <16 x i8> @test_rem_variable_16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; SSE2-LABEL: test_rem_variable_16i8:
; SSE2: # %bb.0:
-; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm1
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm2
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm3
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm1
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm2
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm3
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm2
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm4
-; SSE2-NEXT: movsbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movsbl %ah, %eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
+; SSE2-NEXT: psrad $24, %xmm3
+; SSE2-NEXT: cvtdq2ps %xmm3, %xmm3
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm0[8],xmm4[9],xmm0[9],xmm4[10],xmm0[10],xmm4[11],xmm0[11],xmm4[12],xmm0[12],xmm4[13],xmm0[13],xmm4[14],xmm0[14],xmm4[15],xmm0[15]
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; SSE2-NEXT: psrad $24, %xmm5
+; SSE2-NEXT: cvtdq2ps %xmm5, %xmm5
+; SSE2-NEXT: divps %xmm3, %xmm5
+; SSE2-NEXT: cvttps2dq %xmm5, %xmm3
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3]
+; SSE2-NEXT: psrad $24, %xmm2
+; SSE2-NEXT: cvtdq2ps %xmm2, %xmm2
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3]
+; SSE2-NEXT: psrad $24, %xmm4
+; SSE2-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE2-NEXT: divps %xmm2, %xmm4
+; SSE2-NEXT: cvttps2dq %xmm4, %xmm4
+; SSE2-NEXT: packssdw %xmm3, %xmm4
+; SSE2-NEXT: movdqa %xmm1, %xmm2
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm4, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
+; SSE2-NEXT: pand %xmm3, %xmm2
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7]
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
+; SSE2-NEXT: psrad $24, %xmm5
+; SSE2-NEXT: cvtdq2ps %xmm5, %xmm5
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm0[0],xmm6[1],xmm0[1],xmm6[2],xmm0[2],xmm6[3],xmm0[3],xmm6[4],xmm0[4],xmm6[5],xmm0[5],xmm6[6],xmm0[6],xmm6[7],xmm0[7]
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
+; SSE2-NEXT: psrad $24, %xmm7
+; SSE2-NEXT: cvtdq2ps %xmm7, %xmm7
+; SSE2-NEXT: divps %xmm5, %xmm7
+; SSE2-NEXT: cvttps2dq %xmm7, %xmm5
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3]
+; SSE2-NEXT: psrad $24, %xmm4
+; SSE2-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0,0,1,1,2,2,3,3]
+; SSE2-NEXT: psrad $24, %xmm6
+; SSE2-NEXT: cvtdq2ps %xmm6, %xmm6
+; SSE2-NEXT: divps %xmm4, %xmm6
+; SSE2-NEXT: cvttps2dq %xmm6, %xmm4
+; SSE2-NEXT: packssdw %xmm5, %xmm4
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: packuswb %xmm2, %xmm1
+; SSE2-NEXT: psubb %xmm1, %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_rem_variable_16i8:
; SSE41: # %bb.0:
-; SSE41-NEXT: pextrb $1, %xmm1, %ecx
-; SSE41-NEXT: pextrb $1, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %ecx
-; SSE41-NEXT: movd %xmm1, %edx
-; SSE41-NEXT: movd %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %dl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: movd %eax, %xmm2
-; SSE41-NEXT: pinsrb $1, %ecx, %xmm2
-; SSE41-NEXT: pextrb $2, %xmm1, %ecx
-; SSE41-NEXT: pextrb $2, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $2, %eax, %xmm2
-; SSE41-NEXT: pextrb $3, %xmm1, %ecx
-; SSE41-NEXT: pextrb $3, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $3, %eax, %xmm2
-; SSE41-NEXT: pextrb $4, %xmm1, %ecx
-; SSE41-NEXT: pextrb $4, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $4, %eax, %xmm2
-; SSE41-NEXT: pextrb $5, %xmm1, %ecx
-; SSE41-NEXT: pextrb $5, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $5, %eax, %xmm2
-; SSE41-NEXT: pextrb $6, %xmm1, %ecx
-; SSE41-NEXT: pextrb $6, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $6, %eax, %xmm2
-; SSE41-NEXT: pextrb $7, %xmm1, %ecx
-; SSE41-NEXT: pextrb $7, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $7, %eax, %xmm2
-; SSE41-NEXT: pextrb $8, %xmm1, %ecx
-; SSE41-NEXT: pextrb $8, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $8, %eax, %xmm2
-; SSE41-NEXT: pextrb $9, %xmm1, %ecx
-; SSE41-NEXT: pextrb $9, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $9, %eax, %xmm2
-; SSE41-NEXT: pextrb $10, %xmm1, %ecx
-; SSE41-NEXT: pextrb $10, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $10, %eax, %xmm2
-; SSE41-NEXT: pextrb $11, %xmm1, %ecx
-; SSE41-NEXT: pextrb $11, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $11, %eax, %xmm2
-; SSE41-NEXT: pextrb $12, %xmm1, %ecx
-; SSE41-NEXT: pextrb $12, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $12, %eax, %xmm2
-; SSE41-NEXT: pextrb $13, %xmm1, %ecx
-; SSE41-NEXT: pextrb $13, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $13, %eax, %xmm2
-; SSE41-NEXT: pextrb $14, %xmm1, %ecx
-; SSE41-NEXT: pextrb $14, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $14, %eax, %xmm2
-; SSE41-NEXT: pextrb $15, %xmm1, %ecx
-; SSE41-NEXT: pextrb $15, %xmm0, %eax
-; SSE41-NEXT: cbtw
-; SSE41-NEXT: idivb %cl
-; SSE41-NEXT: movsbl %ah, %eax
-; SSE41-NEXT: pinsrb $15, %eax, %xmm2
-; SSE41-NEXT: movdqa %xmm2, %xmm0
+; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
+; SSE41-NEXT: pmovsxbd %xmm2, %xmm2
+; SSE41-NEXT: cvtdq2ps %xmm2, %xmm2
+; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[3,3,3,3]
+; SSE41-NEXT: pmovsxbd %xmm3, %xmm3
+; SSE41-NEXT: cvtdq2ps %xmm3, %xmm3
+; SSE41-NEXT: divps %xmm2, %xmm3
+; SSE41-NEXT: cvttps2dq %xmm3, %xmm2
+; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; SSE41-NEXT: pmovsxbd %xmm3, %xmm3
+; SSE41-NEXT: cvtdq2ps %xmm3, %xmm3
+; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; SSE41-NEXT: pmovsxbd %xmm4, %xmm4
+; SSE41-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE41-NEXT: divps %xmm3, %xmm4
+; SSE41-NEXT: cvttps2dq %xmm4, %xmm3
+; SSE41-NEXT: packssdw %xmm2, %xmm3
+; SSE41-NEXT: pmovsxbd %xmm1, %xmm2
+; SSE41-NEXT: cvtdq2ps %xmm2, %xmm2
+; SSE41-NEXT: pmovsxbd %xmm0, %xmm4
+; SSE41-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE41-NEXT: divps %xmm2, %xmm4
+; SSE41-NEXT: cvttps2dq %xmm4, %xmm2
+; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,1,1]
+; SSE41-NEXT: pmovsxbd %xmm4, %xmm4
+; SSE41-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,1,1]
+; SSE41-NEXT: pmovsxbd %xmm5, %xmm5
+; SSE41-NEXT: cvtdq2ps %xmm5, %xmm5
+; SSE41-NEXT: divps %xmm4, %xmm5
+; SSE41-NEXT: cvttps2dq %xmm5, %xmm4
+; SSE41-NEXT: packssdw %xmm4, %xmm2
+; SSE41-NEXT: packsswb %xmm3, %xmm2
+; SSE41-NEXT: movdqa %xmm2, %xmm3
+; SSE41-NEXT: pmullw %xmm1, %xmm3
+; SSE41-NEXT: pmovzxbw {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
+; SSE41-NEXT: pand %xmm4, %xmm3
+; SSE41-NEXT: pandn %xmm1, %xmm4
+; SSE41-NEXT: pmaddubsw %xmm4, %xmm2
+; SSE41-NEXT: psllw $8, %xmm2
+; SSE41-NEXT: por %xmm3, %xmm2
+; SSE41-NEXT: psubb %xmm2, %xmm0
; SSE41-NEXT: retq
;
-; AVX-LABEL: test_rem_variable_16i8:
-; AVX: # %bb.0:
-; AVX-NEXT: vpextrb $1, %xmm1, %ecx
-; AVX-NEXT: vpextrb $1, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %ecx
-; AVX-NEXT: vmovd %xmm1, %edx
-; AVX-NEXT: vmovd %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %dl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vmovd %eax, %xmm2
-; AVX-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $2, %xmm1, %ecx
-; AVX-NEXT: vpextrb $2, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $3, %xmm1, %ecx
-; AVX-NEXT: vpextrb $3, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $4, %xmm1, %ecx
-; AVX-NEXT: vpextrb $4, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $5, %xmm1, %ecx
-; AVX-NEXT: vpextrb $5, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $6, %xmm1, %ecx
-; AVX-NEXT: vpextrb $6, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $7, %xmm1, %ecx
-; AVX-NEXT: vpextrb $7, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $8, %xmm1, %ecx
-; AVX-NEXT: vpextrb $8, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $9, %xmm1, %ecx
-; AVX-NEXT: vpextrb $9, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $10, %xmm1, %ecx
-; AVX-NEXT: vpextrb $10, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $11, %xmm1, %ecx
-; AVX-NEXT: vpextrb $11, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $12, %xmm1, %ecx
-; AVX-NEXT: vpextrb $12, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $13, %xmm1, %ecx
-; AVX-NEXT: vpextrb $13, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $14, %xmm1, %ecx
-; AVX-NEXT: vpextrb $14, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
-; AVX-NEXT: vpextrb $15, %xmm1, %ecx
-; AVX-NEXT: vpextrb $15, %xmm0, %eax
-; AVX-NEXT: cbtw
-; AVX-NEXT: idivb %cl
-; AVX-NEXT: movsbl %ah, %eax
-; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: test_rem_variable_16i8:
+; AVX1: # %bb.0:
+; AVX1-NEXT: vpmovsxbd %xmm1, %xmm2
+; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,1,1]
+; AVX1-NEXT: vpmovsxbd %xmm3, %xmm3
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
+; AVX1-NEXT: vcvtdq2ps %ymm2, %ymm2
+; AVX1-NEXT: vpmovsxbd %xmm0, %xmm3
+; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
+; AVX1-NEXT: vpmovsxbd %xmm4, %xmm4
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: vcvtdq2ps %ymm3, %ymm3
+; AVX1-NEXT: vdivps %ymm2, %ymm3, %ymm2
+; AVX1-NEXT: vcvttps2dq %ymm2, %ymm2
+; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
+; AVX1-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
+; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; AVX1-NEXT: vpmovsxbd %xmm3, %xmm3
+; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm1[3,3,3,3]
+; AVX1-NEXT: vpmovsxbd %xmm4, %xmm4
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: vcvtdq2ps %ymm3, %ymm3
+; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; AVX1-NEXT: vpmovsxbd %xmm4, %xmm4
+; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm0[3,3,3,3]
+; AVX1-NEXT: vpmovsxbd %xmm5, %xmm5
+; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm4, %ymm4
+; AVX1-NEXT: vcvtdq2ps %ymm4, %ymm4
+; AVX1-NEXT: vdivps %ymm3, %ymm4, %ymm3
+; AVX1-NEXT: vcvttps2dq %ymm3, %ymm3
+; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
+; AVX1-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
+; AVX1-NEXT: vpacksswb %xmm3, %xmm2, %xmm2
+; AVX1-NEXT: vpmullw %xmm1, %xmm2, %xmm3
+; AVX1-NEXT: vbroadcastss {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
+; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3
+; AVX1-NEXT: vpandn %xmm1, %xmm4, %xmm1
+; AVX1-NEXT: vpmaddubsw %xmm1, %xmm2, %xmm1
+; AVX1-NEXT: vpsllw $8, %xmm1, %xmm1
+; AVX1-NEXT: vpor %xmm1, %xmm3, %xmm1
+; AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; AVX1-NEXT: vzeroupper
+; AVX1-NEXT: retq
+;
+; AVX2NOBW-LABEL: test_rem_variable_16i8:
+; AVX2NOBW: # %bb.0:
+; AVX2NOBW-NEXT: vpmovsxbd %xmm1, %ymm2
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm2, %ymm2
+; AVX2NOBW-NEXT: vpmovsxbd %xmm0, %ymm3
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm3, %ymm3
+; AVX2NOBW-NEXT: vdivps %ymm2, %ymm3, %ymm2
+; AVX2NOBW-NEXT: vcvttps2dq %ymm2, %ymm2
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm2, %xmm3
+; AVX2NOBW-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
+; AVX2NOBW-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; AVX2NOBW-NEXT: vpmovsxbd %xmm3, %ymm3
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm3, %ymm3
+; AVX2NOBW-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; AVX2NOBW-NEXT: vpmovsxbd %xmm4, %ymm4
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm4, %ymm4
+; AVX2NOBW-NEXT: vdivps %ymm3, %ymm4, %ymm3
+; AVX2NOBW-NEXT: vcvttps2dq %ymm3, %ymm3
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm3, %xmm4
+; AVX2NOBW-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
+; AVX2NOBW-NEXT: vpacksswb %xmm3, %xmm2, %xmm2
+; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero
+; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX2NOBW-NEXT: vpmullw %ymm1, %ymm2, %ymm1
+; AVX2NOBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2
+; AVX2NOBW-NEXT: vpackuswb %xmm2, %xmm1, %xmm1
+; AVX2NOBW-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; AVX2NOBW-NEXT: vzeroupper
+; AVX2NOBW-NEXT: retq
+;
+; AVX512BW-LABEL: test_rem_variable_16i8:
+; AVX512BW: # %bb.0:
+; AVX512BW-NEXT: vpmovsxbd %xmm1, %zmm2
+; AVX512BW-NEXT: vcvtdq2ps %zmm2, %zmm2
+; AVX512BW-NEXT: vpmovsxbd %xmm0, %zmm3
+; AVX512BW-NEXT: vcvtdq2ps %zmm3, %zmm3
+; AVX512BW-NEXT: vdivps %zmm2, %zmm3, %zmm2
+; AVX512BW-NEXT: vcvttps2dq %zmm2, %zmm2
+; AVX512BW-NEXT: vpmovdw %zmm2, %ymm2
+; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX512BW-NEXT: vpmullw %ymm1, %ymm2, %ymm1
+; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1
+; AVX512BW-NEXT: vpsubb %xmm1, %xmm0, %xmm0
+; AVX512BW-NEXT: vzeroupper
+; AVX512BW-NEXT: retq
%res = srem <16 x i8> %a, %b
ret <16 x i8> %res
}
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
index ccea182ad60b7..64566055ab953 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
@@ -551,218 +551,85 @@ define <4 x i32> @test_divv_4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
define <8 x i16> @test_divv_8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
; SSE2-LABEL: test_divv_8i16:
; SSE2: # %bb.0:
-; SSE2-NEXT: pextrw $7, %xmm0, %eax
-; SSE2-NEXT: pextrw $7, %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm2
-; SSE2-NEXT: pextrw $6, %xmm0, %eax
-; SSE2-NEXT: pextrw $6, %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm3
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; SSE2-NEXT: pextrw $5, %xmm0, %eax
-; SSE2-NEXT: pextrw $5, %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm4
-; SSE2-NEXT: pextrw $4, %xmm0, %eax
-; SSE2-NEXT: pextrw $4, %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm2
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; SSE2-NEXT: pextrw $3, %xmm0, %eax
-; SSE2-NEXT: pextrw $3, %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm3
-; SSE2-NEXT: pextrw $2, %xmm0, %eax
-; SSE2-NEXT: pextrw $2, %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm4
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
-; SSE2-NEXT: pextrw $1, %xmm0, %eax
-; SSE2-NEXT: pextrw $1, %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm3
-; SSE2-NEXT: movd %xmm0, %eax
-; SSE2-NEXT: movd %xmm1, %ecx
-; SSE2-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE2-NEXT: xorl %edx, %edx
-; SSE2-NEXT: divw %cx
-; SSE2-NEXT: # kill: def $ax killed $ax def $eax
-; SSE2-NEXT: movd %eax, %xmm0
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
+; SSE2-NEXT: pxor %xmm2, %xmm2
+; SSE2-NEXT: movdqa %xmm1, %xmm3
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
+; SSE2-NEXT: cvtdq2ps %xmm3, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
+; SSE2-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE2-NEXT: divps %xmm3, %xmm4
+; SSE2-NEXT: cvttps2dq %xmm4, %xmm3
+; SSE2-NEXT: pslld $16, %xmm3
+; SSE2-NEXT: psrad $16, %xmm3
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
+; SSE2-NEXT: cvtdq2ps %xmm1, %xmm1
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
+; SSE2-NEXT: divps %xmm1, %xmm0
+; SSE2-NEXT: cvttps2dq %xmm0, %xmm0
+; SSE2-NEXT: pslld $16, %xmm0
+; SSE2-NEXT: psrad $16, %xmm0
+; SSE2-NEXT: packssdw %xmm3, %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_divv_8i16:
; SSE41: # %bb.0:
-; SSE41-NEXT: pextrw $1, %xmm0, %eax
-; SSE41-NEXT: pextrw $1, %xmm1, %ecx
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %cx
-; SSE41-NEXT: movl %eax, %ecx
-; SSE41-NEXT: movd %xmm0, %eax
-; SSE41-NEXT: movd %xmm1, %esi
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %si
-; SSE41-NEXT: # kill: def $ax killed $ax def $eax
-; SSE41-NEXT: movd %eax, %xmm2
-; SSE41-NEXT: pinsrw $1, %ecx, %xmm2
-; SSE41-NEXT: pextrw $2, %xmm0, %eax
-; SSE41-NEXT: pextrw $2, %xmm1, %ecx
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %cx
-; SSE41-NEXT: # kill: def $ax killed $ax def $eax
-; SSE41-NEXT: pinsrw $2, %eax, %xmm2
-; SSE41-NEXT: pextrw $3, %xmm0, %eax
-; SSE41-NEXT: pextrw $3, %xmm1, %ecx
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %cx
-; SSE41-NEXT: # kill: def $ax killed $ax def $eax
-; SSE41-NEXT: pinsrw $3, %eax, %xmm2
-; SSE41-NEXT: pextrw $4, %xmm0, %eax
-; SSE41-NEXT: pextrw $4, %xmm1, %ecx
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %cx
-; SSE41-NEXT: # kill: def $ax killed $ax def $eax
-; SSE41-NEXT: pinsrw $4, %eax, %xmm2
-; SSE41-NEXT: pextrw $5, %xmm0, %eax
-; SSE41-NEXT: pextrw $5, %xmm1, %ecx
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %cx
-; SSE41-NEXT: # kill: def $ax killed $ax def $eax
-; SSE41-NEXT: pinsrw $5, %eax, %xmm2
-; SSE41-NEXT: pextrw $6, %xmm0, %eax
-; SSE41-NEXT: pextrw $6, %xmm1, %ecx
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %cx
-; SSE41-NEXT: # kill: def $ax killed $ax def $eax
-; SSE41-NEXT: pinsrw $6, %eax, %xmm2
-; SSE41-NEXT: pextrw $7, %xmm0, %eax
-; SSE41-NEXT: pextrw $7, %xmm1, %ecx
-; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE41-NEXT: xorl %edx, %edx
-; SSE41-NEXT: divw %cx
-; SSE41-NEXT: # kill: def $ax killed $ax def $eax
-; SSE41-NEXT: pinsrw $7, %eax, %xmm2
-; SSE41-NEXT: movdqa %xmm2, %xmm0
+; SSE41-NEXT: pxor %xmm2, %xmm2
+; SSE41-NEXT: pmovzxwd {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; SSE41-NEXT: cvtdq2ps %xmm1, %xmm1
+; SSE41-NEXT: pmovzxwd {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SSE41-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
+; SSE41-NEXT: cvtdq2ps %xmm0, %xmm0
+; SSE41-NEXT: divps %xmm1, %xmm0
+; SSE41-NEXT: cvttps2dq %xmm0, %xmm1
+; SSE41-NEXT: cvtdq2ps %xmm3, %xmm0
+; SSE41-NEXT: cvtdq2ps %xmm4, %xmm2
+; SSE41-NEXT: divps %xmm0, %xmm2
+; SSE41-NEXT: cvttps2dq %xmm2, %xmm0
+; SSE41-NEXT: packusdw %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_divv_8i16:
; AVX1: # %bb.0:
-; AVX1-NEXT: vpextrw $1, %xmm0, %eax
-; AVX1-NEXT: vpextrw $1, %xmm1, %ecx
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %cx
-; AVX1-NEXT: movl %eax, %ecx
-; AVX1-NEXT: vmovd %xmm0, %eax
-; AVX1-NEXT: vmovd %xmm1, %esi
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %si
-; AVX1-NEXT: # kill: def $ax killed $ax def $eax
-; AVX1-NEXT: vmovd %eax, %xmm2
-; AVX1-NEXT: vpinsrw $1, %ecx, %xmm2, %xmm2
-; AVX1-NEXT: vpextrw $2, %xmm0, %eax
-; AVX1-NEXT: vpextrw $2, %xmm1, %ecx
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %cx
-; AVX1-NEXT: # kill: def $ax killed $ax def $eax
-; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
-; AVX1-NEXT: vpextrw $3, %xmm0, %eax
-; AVX1-NEXT: vpextrw $3, %xmm1, %ecx
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %cx
-; AVX1-NEXT: # kill: def $ax killed $ax def $eax
-; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
-; AVX1-NEXT: vpextrw $4, %xmm0, %eax
-; AVX1-NEXT: vpextrw $4, %xmm1, %ecx
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %cx
-; AVX1-NEXT: # kill: def $ax killed $ax def $eax
-; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
-; AVX1-NEXT: vpextrw $5, %xmm0, %eax
-; AVX1-NEXT: vpextrw $5, %xmm1, %ecx
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %cx
-; AVX1-NEXT: # kill: def $ax killed $ax def $eax
-; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
-; AVX1-NEXT: vpextrw $6, %xmm0, %eax
-; AVX1-NEXT: vpextrw $6, %xmm1, %ecx
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %cx
-; AVX1-NEXT: # kill: def $ax killed $ax def $eax
-; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
-; AVX1-NEXT: vpextrw $7, %xmm0, %eax
-; AVX1-NEXT: vpextrw $7, %xmm1, %ecx
-; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
-; AVX1-NEXT: xorl %edx, %edx
-; AVX1-NEXT: divw %cx
-; AVX1-NEXT: # kill: def $ax killed $ax def $eax
-; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0
+; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT: vcvtdq2ps %ymm1, %ymm1
+; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
+; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0
+; AVX1-NEXT: vdivps %ymm1, %ymm0, %ymm0
+; AVX1-NEXT: vcvttps2dq %ymm0, %ymm0
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
+; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2NOBW-LABEL: test_divv_8i16:
; AVX2NOBW: # %bb.0:
; AVX2NOBW-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
-; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm2, %ymm2
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm1, %ymm1
; AVX2NOBW-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
-; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm3
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm3, %ymm3
-; AVX2NOBW-NEXT: vdivpd %ymm2, %ymm3, %ymm2
-; AVX2NOBW-NEXT: vcvttpd2dq %ymm2, %xmm2
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm1, %ymm1
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX2NOBW-NEXT: vdivpd %ymm1, %ymm0, %ymm0
-; AVX2NOBW-NEXT: vcvttpd2dq %ymm0, %xmm0
-; AVX2NOBW-NEXT: vpackusdw %xmm2, %xmm0, %xmm0
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm0, %ymm0
+; AVX2NOBW-NEXT: vdivps %ymm1, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vcvttps2dq %ymm0, %ymm0
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2NOBW-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
; AVX2NOBW-NEXT: vzeroupper
; AVX2NOBW-NEXT: retq
;
; AVX512BW-LABEL: test_divv_8i16:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
-; AVX512BW-NEXT: vcvtdq2pd %ymm1, %zmm1
+; AVX512BW-NEXT: vcvtdq2ps %ymm1, %ymm1
; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
-; AVX512BW-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512BW-NEXT: vdivpd %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: vcvttpd2dq %zmm0, %ymm0
+; AVX512BW-NEXT: vcvtdq2ps %ymm0, %ymm0
+; AVX512BW-NEXT: vdivps %ymm1, %ymm0, %ymm0
+; AVX512BW-NEXT: vcvttps2dq %ymm0, %ymm0
; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512BW-NEXT: vzeroupper
@@ -774,365 +641,140 @@ define <8 x i16> @test_divv_8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
define <16 x i8> @test_divv_16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; SSE2-LABEL: test_divv_16i8:
; SSE2: # %bb.0:
-; SSE2-NEXT: pushq %rbp
-; SSE2-NEXT: pushq %r15
-; SSE2-NEXT: pushq %r14
-; SSE2-NEXT: pushq %r13
-; SSE2-NEXT: pushq %r12
-; SSE2-NEXT: pushq %rbx
-; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %esi
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %edi
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r8d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r9d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r10d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r11d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %ebx
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %ebp
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r14d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r15d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r12d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %r13d
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movzbl %al, %edx
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movl %eax, %ecx
-; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
-; SSE2-NEXT: divb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
-; SSE2-NEXT: # xmm0 = mem[0],zero,zero,zero
-; SSE2-NEXT: movd %esi, %xmm1
-; SSE2-NEXT: movd %edi, %xmm2
-; SSE2-NEXT: movd %r8d, %xmm3
-; SSE2-NEXT: movd %r9d, %xmm4
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; SSE2-NEXT: movd %r10d, %xmm0
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; SSE2-NEXT: movd %r11d, %xmm2
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
-; SSE2-NEXT: movd %ebx, %xmm1
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
-; SSE2-NEXT: movd %ebp, %xmm4
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
-; SSE2-NEXT: movd %r14d, %xmm2
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
-; SSE2-NEXT: movd %r15d, %xmm0
-; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
-; SSE2-NEXT: movd %r12d, %xmm3
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
-; SSE2-NEXT: movd %r13d, %xmm4
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
-; SSE2-NEXT: movd %edx, %xmm5
+; SSE2-NEXT: pxor %xmm2, %xmm2
+; SSE2-NEXT: movdqa %xmm1, %xmm3
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
+; SSE2-NEXT: movdqa %xmm3, %xmm4
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
+; SSE2-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm2[8],xmm5[9],xmm2[9],xmm5[10],xmm2[10],xmm5[11],xmm2[11],xmm5[12],xmm2[12],xmm5[13],xmm2[13],xmm5[14],xmm2[14],xmm5[15],xmm2[15]
+; SSE2-NEXT: movdqa %xmm5, %xmm6
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm2[4],xmm6[5],xmm2[5],xmm6[6],xmm2[6],xmm6[7],xmm2[7]
+; SSE2-NEXT: cvtdq2ps %xmm6, %xmm6
+; SSE2-NEXT: divps %xmm4, %xmm6
+; SSE2-NEXT: cvttps2dq %xmm6, %xmm4
; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; SSE2-NEXT: movzbl %cl, %ecx
-; SSE2-NEXT: movd %ecx, %xmm2
-; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
-; SSE2-NEXT: movzbl %al, %eax
-; SSE2-NEXT: movd %eax, %xmm0
+; SSE2-NEXT: cvtdq2ps %xmm3, %xmm3
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3]
+; SSE2-NEXT: cvtdq2ps %xmm5, %xmm5
+; SSE2-NEXT: divps %xmm3, %xmm5
+; SSE2-NEXT: cvttps2dq %xmm5, %xmm3
+; SSE2-NEXT: packssdw %xmm4, %xmm3
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; SSE2-NEXT: movdqa %xmm1, %xmm4
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
+; SSE2-NEXT: cvtdq2ps %xmm4, %xmm4
; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
-; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3]
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE2-NEXT: popq %rbx
-; SSE2-NEXT: popq %r12
-; SSE2-NEXT: popq %r13
-; SSE2-NEXT: popq %r14
-; SSE2-NEXT: popq %r15
-; SSE2-NEXT: popq %rbp
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
+; SSE2-NEXT: cvtdq2ps %xmm5, %xmm5
+; SSE2-NEXT: divps %xmm4, %xmm5
+; SSE2-NEXT: cvttps2dq %xmm5, %xmm4
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
+; SSE2-NEXT: cvtdq2ps %xmm1, %xmm1
+; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
+; SSE2-NEXT: divps %xmm1, %xmm0
+; SSE2-NEXT: cvttps2dq %xmm0, %xmm0
+; SSE2-NEXT: packssdw %xmm4, %xmm0
+; SSE2-NEXT: packuswb %xmm3, %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_divv_16i8:
; SSE41: # %bb.0:
-; SSE41-NEXT: pushq %rbp
-; SSE41-NEXT: pushq %r15
-; SSE41-NEXT: pushq %r14
-; SSE41-NEXT: pushq %r13
-; SSE41-NEXT: pushq %r12
-; SSE41-NEXT: pushq %rbx
-; SSE41-NEXT: pextrb $1, %xmm1, %ecx
-; SSE41-NEXT: pextrb $1, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; SSE41-NEXT: movd %xmm1, %ecx
-; SSE41-NEXT: movd %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; SSE41-NEXT: pextrb $2, %xmm1, %ecx
-; SSE41-NEXT: pextrb $2, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r9d
-; SSE41-NEXT: pextrb $3, %xmm1, %ecx
-; SSE41-NEXT: pextrb $3, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r10d
-; SSE41-NEXT: pextrb $4, %xmm1, %ecx
-; SSE41-NEXT: pextrb $4, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r11d
-; SSE41-NEXT: pextrb $5, %xmm1, %ecx
-; SSE41-NEXT: pextrb $5, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %ebx
-; SSE41-NEXT: pextrb $6, %xmm1, %ecx
-; SSE41-NEXT: pextrb $6, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %ebp
-; SSE41-NEXT: pextrb $7, %xmm1, %ecx
-; SSE41-NEXT: pextrb $7, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r14d
-; SSE41-NEXT: pextrb $8, %xmm1, %ecx
-; SSE41-NEXT: pextrb $8, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r15d
-; SSE41-NEXT: pextrb $9, %xmm1, %ecx
-; SSE41-NEXT: pextrb $9, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r12d
-; SSE41-NEXT: pextrb $10, %xmm1, %ecx
-; SSE41-NEXT: pextrb $10, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r13d
-; SSE41-NEXT: pextrb $11, %xmm1, %ecx
-; SSE41-NEXT: pextrb $11, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movzbl %al, %r8d
-; SSE41-NEXT: pextrb $12, %xmm1, %ecx
-; SSE41-NEXT: pextrb $12, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movl %eax, %edx
-; SSE41-NEXT: pextrb $13, %xmm1, %ecx
-; SSE41-NEXT: pextrb $13, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movl %eax, %esi
-; SSE41-NEXT: pextrb $14, %xmm1, %ecx
-; SSE41-NEXT: pextrb $14, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movl %eax, %edi
-; SSE41-NEXT: movzbl %dl, %edx
-; SSE41-NEXT: pextrb $15, %xmm0, %eax
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: movzbl %sil, %esi
-; SSE41-NEXT: pextrb $15, %xmm1, %ecx
-; SSE41-NEXT: divb %cl
-; SSE41-NEXT: movd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
-; SSE41-NEXT: # xmm0 = mem[0],zero,zero,zero
-; SSE41-NEXT: pinsrb $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
-; SSE41-NEXT: pinsrb $2, %r9d, %xmm0
-; SSE41-NEXT: pinsrb $3, %r10d, %xmm0
-; SSE41-NEXT: pinsrb $4, %r11d, %xmm0
-; SSE41-NEXT: pinsrb $5, %ebx, %xmm0
-; SSE41-NEXT: pinsrb $6, %ebp, %xmm0
-; SSE41-NEXT: pinsrb $7, %r14d, %xmm0
-; SSE41-NEXT: pinsrb $8, %r15d, %xmm0
-; SSE41-NEXT: pinsrb $9, %r12d, %xmm0
-; SSE41-NEXT: pinsrb $10, %r13d, %xmm0
-; SSE41-NEXT: pinsrb $11, %r8d, %xmm0
-; SSE41-NEXT: pinsrb $12, %edx, %xmm0
-; SSE41-NEXT: pinsrb $13, %esi, %xmm0
-; SSE41-NEXT: movzbl %dil, %ecx
-; SSE41-NEXT: pinsrb $14, %ecx, %xmm0
-; SSE41-NEXT: movzbl %al, %eax
-; SSE41-NEXT: pinsrb $15, %eax, %xmm0
-; SSE41-NEXT: popq %rbx
-; SSE41-NEXT: popq %r12
-; SSE41-NEXT: popq %r13
-; SSE41-NEXT: popq %r14
-; SSE41-NEXT: popq %r15
-; SSE41-NEXT: popq %rbp
+; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm2, %xmm2
+; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[3,3,3,3]
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm3, %xmm3
+; SSE41-NEXT: divps %xmm2, %xmm3
+; SSE41-NEXT: cvttps2dq %xmm3, %xmm2
+; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm3, %xmm3
+; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE41-NEXT: divps %xmm3, %xmm4
+; SSE41-NEXT: cvttps2dq %xmm4, %xmm3
+; SSE41-NEXT: packssdw %xmm2, %xmm3
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm2, %xmm2
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm4 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm4, %xmm4
+; SSE41-NEXT: divps %xmm2, %xmm4
+; SSE41-NEXT: cvttps2dq %xmm4, %xmm2
+; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm1, %xmm1
+; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; SSE41-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SSE41-NEXT: cvtdq2ps %xmm0, %xmm0
+; SSE41-NEXT: divps %xmm1, %xmm0
+; SSE41-NEXT: cvttps2dq %xmm0, %xmm0
+; SSE41-NEXT: packssdw %xmm0, %xmm2
+; SSE41-NEXT: packuswb %xmm3, %xmm2
+; SSE41-NEXT: movdqa %xmm2, %xmm0
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_divv_16i8:
; AVX1: # %bb.0:
-; AVX1-NEXT: pushq %rbp
-; AVX1-NEXT: pushq %r15
-; AVX1-NEXT: pushq %r14
-; AVX1-NEXT: pushq %r13
-; AVX1-NEXT: pushq %r12
-; AVX1-NEXT: pushq %rbx
-; AVX1-NEXT: vpextrb $1, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $1, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: # kill: def $al killed $al def $eax
-; AVX1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; AVX1-NEXT: vmovd %xmm1, %ecx
-; AVX1-NEXT: vmovd %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %esi
-; AVX1-NEXT: vpextrb $2, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $2, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %edx
-; AVX1-NEXT: vpextrb $3, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $3, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %edi
-; AVX1-NEXT: vpextrb $4, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $4, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r8d
-; AVX1-NEXT: vpextrb $5, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $5, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r9d
-; AVX1-NEXT: vpextrb $6, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $6, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r10d
-; AVX1-NEXT: vpextrb $7, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $7, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r11d
-; AVX1-NEXT: vpextrb $8, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $8, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %ebx
-; AVX1-NEXT: vpextrb $9, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $9, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %ebp
-; AVX1-NEXT: vpextrb $10, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $10, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r14d
-; AVX1-NEXT: vpextrb $11, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $11, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r15d
-; AVX1-NEXT: vpextrb $12, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $12, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r12d
-; AVX1-NEXT: vpextrb $13, %xmm1, %ecx
-; AVX1-NEXT: vpextrb $13, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %r13d
-; AVX1-NEXT: vpextrb $14, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: vpextrb $14, %xmm1, %ecx
-; AVX1-NEXT: divb %cl
-; AVX1-NEXT: movl %eax, %ecx
-; AVX1-NEXT: vmovd %esi, %xmm2
-; AVX1-NEXT: vpextrb $15, %xmm0, %eax
-; AVX1-NEXT: movzbl %al, %eax
-; AVX1-NEXT: vpextrb $15, %xmm1, %esi
-; AVX1-NEXT: divb %sil
-; AVX1-NEXT: # kill: def $al killed $al def $eax
-; AVX1-NEXT: vpinsrb $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2, %xmm0 # 4-byte Folded Reload
-; AVX1-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $3, %edi, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $4, %r8d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $5, %r9d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $6, %r10d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $8, %ebx, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $9, %ebp, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $10, %r14d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $11, %r15d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $12, %r12d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $13, %r13d, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
-; AVX1-NEXT: popq %rbx
-; AVX1-NEXT: popq %r12
-; AVX1-NEXT: popq %r13
-; AVX1-NEXT: popq %r14
-; AVX1-NEXT: popq %r15
-; AVX1-NEXT: popq %rbp
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,1,1]
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
+; AVX1-NEXT: vcvtdq2ps %ymm2, %ymm2
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm3 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
+; AVX1-NEXT: vcvtdq2ps %ymm3, %ymm3
+; AVX1-NEXT: vdivps %ymm2, %ymm3, %ymm2
+; AVX1-NEXT: vcvttps2dq %ymm2, %ymm2
+; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
+; AVX1-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
+; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
+; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm3, %ymm1
+; AVX1-NEXT: vcvtdq2ps %ymm1, %ymm1
+; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
+; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,3]
+; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm3, %ymm0
+; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0
+; AVX1-NEXT: vdivps %ymm1, %ymm0, %ymm0
+; AVX1-NEXT: vcvttps2dq %ymm0, %ymm0
+; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
+; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0
+; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2NOBW-LABEL: test_divv_16i8:
; AVX2NOBW: # %bb.0:
; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm2, %ymm2
+; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm3 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm3, %ymm3
+; AVX2NOBW-NEXT: vdivps %ymm2, %ymm3, %ymm2
+; AVX2NOBW-NEXT: vcvttps2dq %ymm2, %ymm2
; AVX2NOBW-NEXT: vextracti128 $1, %ymm2, %xmm3
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm3, %ymm3
-; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm4 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
-; AVX2NOBW-NEXT: vextracti128 $1, %ymm4, %xmm5
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm5, %ymm5
-; AVX2NOBW-NEXT: vdivpd %ymm3, %ymm5, %ymm3
-; AVX2NOBW-NEXT: vcvttpd2dq %ymm3, %xmm3
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm2, %ymm2
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm4, %ymm4
-; AVX2NOBW-NEXT: vdivpd %ymm2, %ymm4, %ymm2
-; AVX2NOBW-NEXT: vcvttpd2dq %ymm2, %xmm2
; AVX2NOBW-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; AVX2NOBW-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
-; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm3
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm3, %ymm3
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm1, %ymm1
; AVX2NOBW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; AVX2NOBW-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
-; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm4
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm4, %ymm4
-; AVX2NOBW-NEXT: vdivpd %ymm3, %ymm4, %ymm3
-; AVX2NOBW-NEXT: vcvttpd2dq %ymm3, %xmm3
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm1, %ymm1
-; AVX2NOBW-NEXT: vcvtdq2pd %xmm0, %ymm0
-; AVX2NOBW-NEXT: vdivpd %ymm1, %ymm0, %ymm0
-; AVX2NOBW-NEXT: vcvttpd2dq %ymm0, %xmm0
-; AVX2NOBW-NEXT: vpackssdw %xmm3, %xmm0, %xmm0
+; AVX2NOBW-NEXT: vcvtdq2ps %ymm0, %ymm0
+; AVX2NOBW-NEXT: vdivps %ymm1, %ymm0, %ymm0
+; AVX2NOBW-NEXT: vcvttps2dq %ymm0, %ymm0
+; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2NOBW-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX2NOBW-NEXT: vpackuswb %xmm0, %xmm2, %xmm0
; AVX2NOBW-NEXT: vzeroupper
; AVX2NOBW-NEXT: retq
@@ -1140,20 +782,12 @@ define <16 x i8> @test_divv_16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; AVX512BW-LABEL: test_divv_16i8:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
-; AVX512BW-NEXT: vextracti64x4 $1, %zmm1, %ymm2
-; AVX512BW-NEXT: vcvtdq2pd %ymm2, %zmm2
+; AVX512BW-NEXT: vcvtdq2ps %zmm1, %zmm1
; AVX512BW-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
-; AVX512BW-NEXT: vextracti64x4 $1, %zmm0, %ymm3
-; AVX512BW-NEXT: vcvtdq2pd %ymm3, %zmm3
-; AVX512BW-NEXT: vdivpd %zmm2, %zmm3, %zmm2
-; AVX512BW-NEXT: vcvttpd2dq %zmm2, %ymm2
-; AVX512BW-NEXT: vpmovdb %zmm2, %xmm2
-; AVX512BW-NEXT: vcvtdq2pd %ymm1, %zmm1
-; AVX512BW-NEXT: vcvtdq2pd %ymm0, %zmm0
-; AVX512BW-NEXT: vdivpd %zmm1, %zmm0, %zmm0
-; AVX512BW-NEXT: vcvttpd2dq %zmm0, %ymm0
+; AVX512BW-NEXT: vcvtdq2ps %zmm0, %zmm0
+; AVX512BW-NEXT: vdivps %zmm1, %zmm0, %zmm0
+; AVX512BW-NEXT: vcvttps2dq %zmm0, %zmm0
; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
-; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
%res = udiv <16 x i8> %a, %b
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
index 8bde992e6a05c..ab9393f9301ba 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
@@ -423,116 +423,138 @@ define <16 x i32> @test_divv_16i32(<16 x i32> %a, <16 x i32> %b) nounwind {
;
define <8 x i64> @test_rem7_8i64(<8 x i64> %a) nounwind {
-; AVX-LABEL: test_rem7_8i64:
-; AVX: # %bb.0:
-; AVX-NEXT: vextracti32x4 $3, %zmm0, %xmm1
-; AVX-NEXT: vpextrq $1, %xmm1, %rcx
-; AVX-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm2
-; AVX-NEXT: vmovq %xmm1, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm1
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
-; AVX-NEXT: vextracti32x4 $2, %zmm0, %xmm2
-; AVX-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm3
-; AVX-NEXT: vmovq %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm2
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; AVX-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
-; AVX-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX-NEXT: vpextrq $1, %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm3
-; AVX-NEXT: vmovq %xmm2, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm2
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; AVX-NEXT: vpextrq $1, %xmm0, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm3
-; AVX-NEXT: vmovq %xmm0, %rcx
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: mulq %rsi
-; AVX-NEXT: movq %rcx, %rax
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: shrq %rax
-; AVX-NEXT: addq %rdx, %rax
-; AVX-NEXT: shrq $2, %rax
-; AVX-NEXT: leaq (,%rax,8), %rdx
-; AVX-NEXT: subq %rdx, %rax
-; AVX-NEXT: addq %rcx, %rax
-; AVX-NEXT: vmovq %rax, %xmm0
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
-; AVX-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
-; AVX-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
-; AVX-NEXT: retq
+; NODQ-LABEL: test_rem7_8i64:
+; NODQ: # %bb.0:
+; NODQ-NEXT: vextracti32x4 $3, %zmm0, %xmm1
+; NODQ-NEXT: vpextrq $1, %xmm1, %rcx
+; NODQ-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm2
+; NODQ-NEXT: vmovq %xmm1, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm1
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; NODQ-NEXT: vextracti32x4 $2, %zmm0, %xmm2
+; NODQ-NEXT: vpextrq $1, %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm3
+; NODQ-NEXT: vmovq %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm2
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; NODQ-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
+; NODQ-NEXT: vextracti128 $1, %ymm0, %xmm2
+; NODQ-NEXT: vpextrq $1, %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm3
+; NODQ-NEXT: vmovq %xmm2, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm2
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; NODQ-NEXT: vpextrq $1, %xmm0, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm3
+; NODQ-NEXT: vmovq %xmm0, %rcx
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: mulq %rsi
+; NODQ-NEXT: movq %rcx, %rax
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: shrq %rax
+; NODQ-NEXT: addq %rdx, %rax
+; NODQ-NEXT: shrq $2, %rax
+; NODQ-NEXT: leaq (,%rax,8), %rdx
+; NODQ-NEXT: subq %rdx, %rax
+; NODQ-NEXT: addq %rcx, %rax
+; NODQ-NEXT: vmovq %rax, %xmm0
+; NODQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
+; NODQ-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; NODQ-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
+; NODQ-NEXT: retq
+;
+; AVX512DQ-LABEL: test_rem7_8i64:
+; AVX512DQ: # %bb.0:
+; AVX512DQ-NEXT: vpbroadcastq {{.*#+}} zmm1 = [7,7,7,7,7,7,7,7]
+; AVX512DQ-NEXT: vcvtuqq2pd {ru-sae}, %zmm1, %zmm2
+; AVX512DQ-NEXT: vbroadcastsd {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
+; AVX512DQ-NEXT: vdivpd {rd-sae}, %zmm2, %zmm3, %zmm2
+; AVX512DQ-NEXT: vcvtuqq2pd {rd-sae}, %zmm0, %zmm3
+; AVX512DQ-NEXT: vmulpd {rd-sae}, %zmm2, %zmm3, %zmm3
+; AVX512DQ-NEXT: vcvtpd2uqq {rd-sae}, %zmm3, %zmm3
+; AVX512DQ-NEXT: vpsllq $3, %zmm3, %zmm4
+; AVX512DQ-NEXT: vpsubq %zmm4, %zmm3, %zmm3
+; AVX512DQ-NEXT: vpaddq %zmm3, %zmm0, %zmm0
+; AVX512DQ-NEXT: vcvtuqq2pd {rd-sae}, %zmm0, %zmm3
+; AVX512DQ-NEXT: vmulpd {rd-sae}, %zmm2, %zmm3, %zmm2
+; AVX512DQ-NEXT: vcvtpd2uqq {rd-sae}, %zmm2, %zmm2
+; AVX512DQ-NEXT: vpsllq $3, %zmm2, %zmm3
+; AVX512DQ-NEXT: vpsubq %zmm3, %zmm2, %zmm2
+; AVX512DQ-NEXT: vpaddq %zmm2, %zmm0, %zmm0
+; AVX512DQ-NEXT: vpcmpnltuq %zmm1, %zmm0, %k1
+; AVX512DQ-NEXT: vpsubq %zmm1, %zmm0, %zmm0 {%k1}
+; AVX512DQ-NEXT: retq
%res = urem <8 x i64> %a, <i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7, i64 7>
ret <8 x i64> %res
}
diff --git a/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll b/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
index 1d9977e6d6287..36b9631e276e9 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
@@ -431,49 +431,25 @@ define void @test_urem_v2i32(ptr %x, ptr %y, ptr %z) nounwind {
define void @test_sdiv_v2i32(ptr %x, ptr %y, ptr %z) nounwind {
; X64-LABEL: test_sdiv_v2i32:
; X64: # %bb.0:
-; X64-NEXT: movq %rdx, %rcx
-; X64-NEXT: movq (%rdi), %rax
-; X64-NEXT: movq %rax, %xmm0
-; X64-NEXT: movq (%rsi), %rsi
-; X64-NEXT: movq %rsi, %xmm1
-; X64-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-NEXT: cltd
-; X64-NEXT: idivl %esi
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; X64-NEXT: movd %xmm0, %esi
-; X64-NEXT: cltd
-; X64-NEXT: idivl %esi
-; X64-NEXT: movd %eax, %xmm0
-; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; X64-NEXT: movq %xmm2, (%rcx)
+; X64-NEXT: cvtdq2pd (%rsi), %xmm0
+; X64-NEXT: cvtdq2pd (%rdi), %xmm1
+; X64-NEXT: divpd %xmm0, %xmm1
+; X64-NEXT: cvttpd2dq %xmm1, %xmm0
+; X64-NEXT: movlpd %xmm0, (%rdx)
; X64-NEXT: retq
;
; X86-LABEL: test_sdiv_v2i32:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: movd %xmm1, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]
-; X86-NEXT: movd %xmm1, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm0
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; X86-NEXT: movq %xmm2, (%ecx)
-; X86-NEXT: popl %esi
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: cvtdq2pd %xmm1, %xmm1
+; X86-NEXT: cvtdq2pd %xmm0, %xmm0
+; X86-NEXT: divpd %xmm1, %xmm0
+; X86-NEXT: cvttpd2dq %xmm0, %xmm0
+; X86-NEXT: movlpd %xmm0, (%eax)
; X86-NEXT: retl
%a = load <2 x i32>, ptr %x
%b = load <2 x i32>, ptr %y
@@ -485,49 +461,25 @@ define void @test_sdiv_v2i32(ptr %x, ptr %y, ptr %z) nounwind {
define void @test_srem_v2i32(ptr %x, ptr %y, ptr %z) nounwind {
; X64-LABEL: test_srem_v2i32:
; X64: # %bb.0:
-; X64-NEXT: movq %rdx, %rcx
-; X64-NEXT: movq (%rdi), %rax
-; X64-NEXT: movq %rax, %xmm0
-; X64-NEXT: movq (%rsi), %rsi
-; X64-NEXT: movq %rsi, %xmm1
-; X64-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-NEXT: cltd
-; X64-NEXT: idivl %esi
-; X64-NEXT: movd %eax, %xmm2
-; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; X64-NEXT: movd %xmm0, %esi
-; X64-NEXT: cltd
-; X64-NEXT: idivl %esi
-; X64-NEXT: movd %eax, %xmm0
-; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; X64-NEXT: movq %xmm2, (%rcx)
+; X64-NEXT: cvtdq2pd (%rsi), %xmm0
+; X64-NEXT: cvtdq2pd (%rdi), %xmm1
+; X64-NEXT: divpd %xmm0, %xmm1
+; X64-NEXT: cvttpd2dq %xmm1, %xmm0
+; X64-NEXT: movlpd %xmm0, (%rdx)
; X64-NEXT: retq
;
; X86-LABEL: test_srem_v2i32:
; X86: # %bb.0:
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: movd %xmm1, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm2
-; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; X86-NEXT: movd %xmm0, %eax
-; X86-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]
-; X86-NEXT: movd %xmm1, %esi
-; X86-NEXT: cltd
-; X86-NEXT: idivl %esi
-; X86-NEXT: movd %eax, %xmm0
-; X86-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; X86-NEXT: movq %xmm2, (%ecx)
-; X86-NEXT: popl %esi
+; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
+; X86-NEXT: cvtdq2pd %xmm1, %xmm1
+; X86-NEXT: cvtdq2pd %xmm0, %xmm0
+; X86-NEXT: divpd %xmm1, %xmm0
+; X86-NEXT: cvttpd2dq %xmm0, %xmm0
+; X86-NEXT: movlpd %xmm0, (%eax)
; X86-NEXT: retl
%a = load <2 x i32>, ptr %x
%b = load <2 x i32>, ptr %y
diff --git a/llvm/test/CodeGen/X86/vector-rem.ll b/llvm/test/CodeGen/X86/vector-rem.ll
index 8d32d3e39ace7..f9124ae05b392 100644
--- a/llvm/test/CodeGen/X86/vector-rem.ll
+++ b/llvm/test/CodeGen/X86/vector-rem.ll
@@ -4,36 +4,25 @@
define <4 x i32> @foo(<4 x i32> %t, <4 x i32> %u) nounwind {
; CHECK-LABEL: foo:
; CHECK: # %bb.0:
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
-; CHECK-NEXT: movd %xmm2, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
-; CHECK-NEXT: movd %xmm2, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
-; CHECK-NEXT: movd %xmm3, %eax
+; CHECK-NEXT: cvtdq2pd %xmm1, %xmm2
+; CHECK-NEXT: cvtdq2pd %xmm0, %xmm3
+; CHECK-NEXT: divpd %xmm2, %xmm3
+; CHECK-NEXT: cvttpd2dq %xmm3, %xmm2
; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
-; CHECK-NEXT: movd %xmm3, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm3
-; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; CHECK-NEXT: movd %xmm0, %eax
-; CHECK-NEXT: movd %xmm1, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm2
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; CHECK-NEXT: movd %xmm0, %eax
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; CHECK-NEXT: movd %xmm0, %ecx
-; CHECK-NEXT: cltd
-; CHECK-NEXT: idivl %ecx
-; CHECK-NEXT: movd %edx, %xmm0
-; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
-; CHECK-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; CHECK-NEXT: movdqa %xmm2, %xmm0
+; CHECK-NEXT: cvtdq2pd %xmm3, %xmm3
+; CHECK-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,2,3]
+; CHECK-NEXT: cvtdq2pd %xmm4, %xmm4
+; CHECK-NEXT: divpd %xmm3, %xmm4
+; CHECK-NEXT: cvttpd2dq %xmm4, %xmm3
+; CHECK-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
+; CHECK-NEXT: pmuludq %xmm1, %xmm2
+; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
+; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; CHECK-NEXT: pmuludq %xmm3, %xmm1
+; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; CHECK-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
+; CHECK-NEXT: psubd %xmm2, %xmm0
; CHECK-NEXT: retq
%m = srem <4 x i32> %t, %u
ret <4 x i32> %m
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