[llvm] [IR][NFC] Add LoadStoreProperties to copy load/store attrs (PR #206470)
Harrison Hao via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 30 01:25:44 PDT 2026
https://github.com/harrisonGPU updated https://github.com/llvm/llvm-project/pull/206470
>From 066b68940776feae429d9644d16336ae7f460104 Mon Sep 17 00:00:00 2001
From: Harrison Hao <tsworld1314 at gmail.com>
Date: Mon, 29 Jun 2026 19:34:55 +0800
Subject: [PATCH 1/3] [IR][NFC] Add LoadStoreInstAttributes to copy load/store
attrs
---
llvm/include/llvm/IR/Instructions.h | 34 +++++++++++++++++++
llvm/lib/CodeGen/AtomicExpandPass.cpp | 8 ++---
llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp | 4 +--
.../InstCombineLoadStoreAlloca.cpp | 10 +++---
4 files changed, 42 insertions(+), 14 deletions(-)
diff --git a/llvm/include/llvm/IR/Instructions.h b/llvm/include/llvm/IR/Instructions.h
index f43a9b5c1acc2..1d64c19aae952 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -172,6 +172,14 @@ class AllocaInst : public UnaryInstruction {
}
};
+/// A structure representing the attributes of a load or store instruction.
+struct LoadStoreInstAttributes {
+ bool IsVolatile = false;
+ Align Alignment;
+ AtomicOrdering Ordering = AtomicOrdering::NotAtomic;
+ SyncScope::ID SSID = SyncScope::System;
+};
+
//===----------------------------------------------------------------------===//
// LoadInst Class
//===----------------------------------------------------------------------===//
@@ -249,6 +257,19 @@ class LoadInst : public UnaryInstruction {
setSyncScopeID(SSID);
}
+ /// Returns the attributes of this load instruction.
+ LoadStoreInstAttributes getAttributes() const {
+ return {isVolatile(), getAlign(), getOrdering(), getSyncScopeID()};
+ }
+
+ /// Sets the attributes of this load instruction.
+ void setAttributes(const LoadStoreInstAttributes &Attrs) {
+ setVolatile(Attrs.IsVolatile);
+ setAlignment(Attrs.Alignment);
+ setOrdering(Attrs.Ordering);
+ setSyncScopeID(Attrs.SSID);
+ }
+
bool isSimple() const { return !isAtomic() && !isVolatile(); }
bool isUnordered() const {
@@ -373,6 +394,19 @@ class StoreInst : public Instruction {
setSyncScopeID(SSID);
}
+ /// Returns the attributes of this store instruction.
+ LoadStoreInstAttributes getAttributes() const {
+ return {isVolatile(), getAlign(), getOrdering(), getSyncScopeID()};
+ }
+
+ /// Sets the attributes of this store instruction.
+ void setAttributes(const LoadStoreInstAttributes &Attrs) {
+ setVolatile(Attrs.IsVolatile);
+ setAlignment(Attrs.Alignment);
+ setOrdering(Attrs.Ordering);
+ setSyncScopeID(Attrs.SSID);
+ }
+
bool isSimple() const { return !isAtomic() && !isVolatile(); }
bool isUnordered() const {
diff --git a/llvm/lib/CodeGen/AtomicExpandPass.cpp b/llvm/lib/CodeGen/AtomicExpandPass.cpp
index 059c0d5cb7b8b..0767d0baad287 100644
--- a/llvm/lib/CodeGen/AtomicExpandPass.cpp
+++ b/llvm/lib/CodeGen/AtomicExpandPass.cpp
@@ -564,9 +564,7 @@ LoadInst *AtomicExpandImpl::convertAtomicLoadToIntegerType(LoadInst *LI) {
Value *Addr = LI->getPointerOperand();
auto *NewLI = Builder.CreateLoad(NewTy, Addr);
- NewLI->setAlignment(LI->getAlign());
- NewLI->setVolatile(LI->isVolatile());
- NewLI->setAtomic(LI->getOrdering(), LI->getSyncScopeID());
+ NewLI->setAttributes(LI->getAttributes());
LLVM_DEBUG(dbgs() << "Replaced " << *LI << " with " << *NewLI << "\n");
Value *NewVal = LI->getType()->isPtrOrPtrVectorTy()
@@ -720,9 +718,7 @@ StoreInst *AtomicExpandImpl::convertAtomicStoreToIntegerType(StoreInst *SI) {
Value *Addr = SI->getPointerOperand();
StoreInst *NewSI = Builder.CreateStore(NewVal, Addr);
- NewSI->setAlignment(SI->getAlign());
- NewSI->setVolatile(SI->isVolatile());
- NewSI->setAtomic(SI->getOrdering(), SI->getSyncScopeID());
+ NewSI->setAttributes(SI->getAttributes());
LLVM_DEBUG(dbgs() << "Replaced " << *SI << " with " << *NewSI << "\n");
SI->eraseFromParent();
return NewSI;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
index f410fa97f90ea..b2e3004bd5cad 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
@@ -696,7 +696,7 @@ void AMDGPUSwLowerLDS::translateLDSMemoryOperationsToGlobalMemory(
getTranslatedGlobalMemoryPtrOfLDS(LoadMallocPtr, LIOperand);
LoadInst *NewLI = IRB.CreateAlignedLoad(LI->getType(), Replacement,
LI->getAlign(), LI->isVolatile());
- NewLI->setAtomic(LI->getOrdering(), LI->getSyncScopeID());
+ NewLI->setAttributes(LI->getAttributes());
AsanInfo.Instructions.insert(NewLI);
LI->replaceAllUsesWith(NewLI);
LI->eraseFromParent();
@@ -706,7 +706,7 @@ void AMDGPUSwLowerLDS::translateLDSMemoryOperationsToGlobalMemory(
getTranslatedGlobalMemoryPtrOfLDS(LoadMallocPtr, SIOperand);
StoreInst *NewSI = IRB.CreateAlignedStore(
SI->getValueOperand(), Replacement, SI->getAlign(), SI->isVolatile());
- NewSI->setAtomic(SI->getOrdering(), SI->getSyncScopeID());
+ NewSI->setAttributes(SI->getAttributes());
AsanInfo.Instructions.insert(NewSI);
SI->replaceAllUsesWith(NewSI);
SI->eraseFromParent();
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
index e6481c89c0265..2055ffb3950b7 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
@@ -605,7 +605,7 @@ LoadInst *InstCombinerImpl::combineLoadToNewType(LoadInst &LI, Type *NewTy,
LoadInst *NewLoad =
Builder.CreateAlignedLoad(NewTy, LI.getPointerOperand(), LI.getAlign(),
LI.isVolatile(), LI.getName() + Suffix);
- NewLoad->setAtomic(LI.getOrdering(), LI.getSyncScopeID());
+ NewLoad->setAttributes(LI.getAttributes());
copyMetadataForLoad(*NewLoad, LI);
return NewLoad;
}
@@ -624,7 +624,7 @@ static StoreInst *combineStoreToNewValue(InstCombinerImpl &IC, StoreInst &SI,
StoreInst *NewStore =
IC.Builder.CreateAlignedStore(V, Ptr, SI.getAlign(), SI.isVolatile());
- NewStore->setAtomic(SI.getOrdering(), SI.getSyncScopeID());
+ NewStore->setAttributes(SI.getAttributes());
for (const auto &MDPair : MD) {
unsigned ID = MDPair.first;
MDNode *N = MDPair.second;
@@ -1166,10 +1166,8 @@ Instruction *InstCombinerImpl::visitLoadInst(LoadInst &LI) {
LoadInst *V2 = Builder.CreateLoad(LI.getType(), LoadOp2,
LoadOp2->getName() + ".val");
assert(LI.isUnordered() && "implied by above");
- V1->setAlignment(Alignment);
- V1->setAtomic(LI.getOrdering(), LI.getSyncScopeID());
- V2->setAlignment(Alignment);
- V2->setAtomic(LI.getOrdering(), LI.getSyncScopeID());
+ V1->setAttributes(LI.getAttributes());
+ V2->setAttributes(LI.getAttributes());
// It is safe to copy any metadata that does not trigger UB. Copy any
// poison-generating metadata.
V1->copyMetadata(LI, Metadata::PoisonGeneratingIDs);
>From 08e60e27ca605e65bfb239ee78e630e865855d3a Mon Sep 17 00:00:00 2001
From: Harrison Hao <tsworld1314 at gmail.com>
Date: Mon, 29 Jun 2026 21:06:46 +0800
Subject: [PATCH 2/3] Update for comments
---
llvm/include/llvm/IR/Instructions.h | 36 +++++++++----------
llvm/lib/CodeGen/AtomicExpandPass.cpp | 4 +--
llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp | 4 +--
.../InstCombineLoadStoreAlloca.cpp | 8 ++---
4 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/llvm/include/llvm/IR/Instructions.h b/llvm/include/llvm/IR/Instructions.h
index 1d64c19aae952..ed59ac595442c 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -172,8 +172,8 @@ class AllocaInst : public UnaryInstruction {
}
};
-/// A structure representing the attributes of a load or store instruction.
-struct LoadStoreInstAttributes {
+/// A structure representing the properties of a load or store instruction.
+struct LoadStoreInstProperties {
bool IsVolatile = false;
Align Alignment;
AtomicOrdering Ordering = AtomicOrdering::NotAtomic;
@@ -257,17 +257,17 @@ class LoadInst : public UnaryInstruction {
setSyncScopeID(SSID);
}
- /// Returns the attributes of this load instruction.
- LoadStoreInstAttributes getAttributes() const {
+ /// Returns the properties of this load instruction.
+ LoadStoreInstProperties getProperties() const {
return {isVolatile(), getAlign(), getOrdering(), getSyncScopeID()};
}
- /// Sets the attributes of this load instruction.
- void setAttributes(const LoadStoreInstAttributes &Attrs) {
- setVolatile(Attrs.IsVolatile);
- setAlignment(Attrs.Alignment);
- setOrdering(Attrs.Ordering);
- setSyncScopeID(Attrs.SSID);
+ /// Sets the properties of this load instruction.
+ void setProperties(const LoadStoreInstProperties &Props) {
+ setVolatile(Props.IsVolatile);
+ setAlignment(Props.Alignment);
+ setOrdering(Props.Ordering);
+ setSyncScopeID(Props.SSID);
}
bool isSimple() const { return !isAtomic() && !isVolatile(); }
@@ -394,17 +394,17 @@ class StoreInst : public Instruction {
setSyncScopeID(SSID);
}
- /// Returns the attributes of this store instruction.
- LoadStoreInstAttributes getAttributes() const {
+ /// Returns the properties of this store instruction.
+ LoadStoreInstProperties getProperties() const {
return {isVolatile(), getAlign(), getOrdering(), getSyncScopeID()};
}
- /// Sets the attributes of this store instruction.
- void setAttributes(const LoadStoreInstAttributes &Attrs) {
- setVolatile(Attrs.IsVolatile);
- setAlignment(Attrs.Alignment);
- setOrdering(Attrs.Ordering);
- setSyncScopeID(Attrs.SSID);
+ /// Sets the properties of this store instruction.
+ void setProperties(const LoadStoreInstProperties &Props) {
+ setVolatile(Props.IsVolatile);
+ setAlignment(Props.Alignment);
+ setOrdering(Props.Ordering);
+ setSyncScopeID(Props.SSID);
}
bool isSimple() const { return !isAtomic() && !isVolatile(); }
diff --git a/llvm/lib/CodeGen/AtomicExpandPass.cpp b/llvm/lib/CodeGen/AtomicExpandPass.cpp
index 0767d0baad287..0951f8b0dbc80 100644
--- a/llvm/lib/CodeGen/AtomicExpandPass.cpp
+++ b/llvm/lib/CodeGen/AtomicExpandPass.cpp
@@ -564,7 +564,7 @@ LoadInst *AtomicExpandImpl::convertAtomicLoadToIntegerType(LoadInst *LI) {
Value *Addr = LI->getPointerOperand();
auto *NewLI = Builder.CreateLoad(NewTy, Addr);
- NewLI->setAttributes(LI->getAttributes());
+ NewLI->setProperties(LI->getProperties());
LLVM_DEBUG(dbgs() << "Replaced " << *LI << " with " << *NewLI << "\n");
Value *NewVal = LI->getType()->isPtrOrPtrVectorTy()
@@ -718,7 +718,7 @@ StoreInst *AtomicExpandImpl::convertAtomicStoreToIntegerType(StoreInst *SI) {
Value *Addr = SI->getPointerOperand();
StoreInst *NewSI = Builder.CreateStore(NewVal, Addr);
- NewSI->setAttributes(SI->getAttributes());
+ NewSI->setProperties(SI->getProperties());
LLVM_DEBUG(dbgs() << "Replaced " << *SI << " with " << *NewSI << "\n");
SI->eraseFromParent();
return NewSI;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
index b2e3004bd5cad..a1828d1b4b5cb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
@@ -696,7 +696,7 @@ void AMDGPUSwLowerLDS::translateLDSMemoryOperationsToGlobalMemory(
getTranslatedGlobalMemoryPtrOfLDS(LoadMallocPtr, LIOperand);
LoadInst *NewLI = IRB.CreateAlignedLoad(LI->getType(), Replacement,
LI->getAlign(), LI->isVolatile());
- NewLI->setAttributes(LI->getAttributes());
+ NewLI->setProperties(LI->getProperties());
AsanInfo.Instructions.insert(NewLI);
LI->replaceAllUsesWith(NewLI);
LI->eraseFromParent();
@@ -706,7 +706,7 @@ void AMDGPUSwLowerLDS::translateLDSMemoryOperationsToGlobalMemory(
getTranslatedGlobalMemoryPtrOfLDS(LoadMallocPtr, SIOperand);
StoreInst *NewSI = IRB.CreateAlignedStore(
SI->getValueOperand(), Replacement, SI->getAlign(), SI->isVolatile());
- NewSI->setAttributes(SI->getAttributes());
+ NewSI->setProperties(SI->getProperties());
AsanInfo.Instructions.insert(NewSI);
SI->replaceAllUsesWith(NewSI);
SI->eraseFromParent();
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
index 2055ffb3950b7..0336b832050db 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
@@ -605,7 +605,7 @@ LoadInst *InstCombinerImpl::combineLoadToNewType(LoadInst &LI, Type *NewTy,
LoadInst *NewLoad =
Builder.CreateAlignedLoad(NewTy, LI.getPointerOperand(), LI.getAlign(),
LI.isVolatile(), LI.getName() + Suffix);
- NewLoad->setAttributes(LI.getAttributes());
+ NewLoad->setProperties(LI.getProperties());
copyMetadataForLoad(*NewLoad, LI);
return NewLoad;
}
@@ -624,7 +624,7 @@ static StoreInst *combineStoreToNewValue(InstCombinerImpl &IC, StoreInst &SI,
StoreInst *NewStore =
IC.Builder.CreateAlignedStore(V, Ptr, SI.getAlign(), SI.isVolatile());
- NewStore->setAttributes(SI.getAttributes());
+ NewStore->setProperties(SI.getProperties());
for (const auto &MDPair : MD) {
unsigned ID = MDPair.first;
MDNode *N = MDPair.second;
@@ -1166,8 +1166,8 @@ Instruction *InstCombinerImpl::visitLoadInst(LoadInst &LI) {
LoadInst *V2 = Builder.CreateLoad(LI.getType(), LoadOp2,
LoadOp2->getName() + ".val");
assert(LI.isUnordered() && "implied by above");
- V1->setAttributes(LI.getAttributes());
- V2->setAttributes(LI.getAttributes());
+ V1->setProperties(LI.getProperties());
+ V2->setProperties(LI.getProperties());
// It is safe to copy any metadata that does not trigger UB. Copy any
// poison-generating metadata.
V1->copyMetadata(LI, Metadata::PoisonGeneratingIDs);
>From d8d7e5207c9b2e3541608eb472ef230448e6f18e Mon Sep 17 00:00:00 2001
From: Harrison Hao <tsworld1314 at gmail.com>
Date: Tue, 30 Jun 2026 16:24:52 +0800
Subject: [PATCH 3/3] Add Load/Store Properties section
---
llvm/include/llvm/IR/Instructions.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/llvm/include/llvm/IR/Instructions.h b/llvm/include/llvm/IR/Instructions.h
index ed59ac595442c..12be429595c4a 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -172,6 +172,10 @@ class AllocaInst : public UnaryInstruction {
}
};
+//===----------------------------------------------------------------------===//
+// Load/Store Properties
+//===----------------------------------------------------------------------===//
+
/// A structure representing the properties of a load or store instruction.
struct LoadStoreInstProperties {
bool IsVolatile = false;
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